INTERSIL ISL28276IAZ-T

ISL28276
®
Data Sheet
June 23, 2006
Dual Precision Micropower Single Supply
Rail-to-Rail Input and Output Precision
Op-Amps
The ISL28276 is a dual channel micropower precision
operational amplifier optimized for single supply operation at
5V and can operate down to 2.4V. For equivalent
performance in a single channel op-amp reference EL8176.
The ISL28276 features an Input Range Enhancement Circuit
(IREC) which enables the ISL28276 to maintain CMRR
performance for input voltages greater than the positive
supply. The input signal is capable of swinging 0.5V above a
5.0V supply (0.25V for a 2.4V supply) and to within 10mV
from ground. The output operation is rail to rail.
The ISL28276 draws minimal supply current while meeting
excellent DC-accuracy, AC-performance, noise and output
drive specifications. Offset current, voltage and current
noise, slew rate, and gain-bandwidth product are all two to
ten times better than other micropower op-amps with
equivalent supply current ratings.
The ISL28276 can be operated from one lithium cell or two
Ni-Cd batteries. The input range includes both positive and
negative rail.
FN6301.0
Features
• 120µA supply current for both channels
• 100µV max offset voltage
• 500pA input bias current
• 400kHz gain-bandwidth product
• 115dB PSRR and CMRR
• Single supply operation down to 2.4V
• Input is capable of swinging above V+ and within 10mV of
Ground
• Rail-to-rail output
• Output sources 31mA load current
• Pb-free plus anneal available (RoHS compliant)
Applications
• Battery- or solar-powered systems
• 4mA to 25mA current loops
• Handheld consumer products
• Medical devices
• Thermocouple amplifiers
• Photodiode pre-amps
Ordering Information
PART NUMBER
ISL28276IAZ
(See Note)
PART
MARKING
TAPE &
REEL
PACKAGE
PKG.
DWG. #
28276IAZ
-
16 Ld QSOP MDP0040
(Pb-free)
ISL28276IAZ-T7 28276IAZ
(See Note)
7”
16 Ld QSOP MDP0040
(Pb-free)
NOTE: Intersil Pb-free plus anneal products employ special Pb-free
material sets; molding compounds/die attach materials and 100%
matte tin plate termination finish, which are RoHS compliant and
compatible with both SnPb and Pb-free soldering operations. Intersil
Pb-free products are MSL classified at Pb-free peak reflow
temperatures that meet or exceed the Pb-free requirements of
IPC/JEDEC J STD-020.
1
• pH probe amplifiers
Pinouts
ISL28276
(16 LD QSOP)
TOP VIEW
NC 1
16 NC
NC 2
15 V+
OUT_A 3
14 OUT_B
IN-_A 4
13 IN-_B
IN+_A 5
12 IN+_B
EN_A 6
11 EN_B
V- 7
10 NC
NC 8
9 NC
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2006. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
ISL28276
Absolute Maximum Ratings (TA = 25°C)
Output Short-Circuit Duration . . . . . . . . . . . . . . . . . . . . . . .Indefinite
Ambient Operating Temperature Range . . . . . . . . .-40°C to +125°C
Storage Temperature Range . . . . . . . . . . . . . . . . . .-65°C to +150°C
Operating Junction Temperature . . . . . . . . . . . . . . . . . . . . . +125°C
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5.5V, 1V/µs
Differential Input Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5mA
Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5V
Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . V- - 0.5V to V+ + 0.5V
ESD tolerance, Human Body Model . . . . . . . . . . . . . . . . . . . . . .3kV
ESD tolerance, Machine Model . . . . . . . . . . . . . . . . . . . . . . . . .300V
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
IMPORTANT NOTE: All parameters having Min/Max specifications are guaranteed. Typical values are for information purposes only. Unless otherwise noted, all tests
are at the specified temperature and are pulsed tests, therefore: TJ = TC = TA
Opreating Junction
Electrical Specifications
PARAMETER
V+ = 5V, 0V, VCM = 0.1V, VO = 1.4V, TA = 25°C unless otherwise specified.
Boldface limits apply over the operating temperature range, -40°C to +125°C
DESCRIPTION
CONDITIONS
MIN
TYP
MAX
UNIT
-100
-150
20
100
150
µV
VOS
Input Offset Voltage
∆V OS
-----------------∆Time
Long Term Input Offset Voltage Stability
1.2
µV/Mo
∆V OS
---------------∆T
Input Offset Drift vs Temperature
0.3
µV/°C
IOS
Input Offset Current
0.25
1.3
2.0
nA
IB
Input Bias Current
0.5
2
2.5
nA
eN
Input Noise Voltage Peak-to-Peak
f = 0.1Hz to 10Hz
1
µVPP
Input Noise Voltage Density
fO = 1kHz
25
nV/√Hz
iN
Input Noise Current Density
fO = 1kHz
0.1
pA/√Hz
CMIR
Input Voltage Range
Guaranteed by CMRR test
0
CMRR
Common-Mode Rejection Ratio
VCM = 0V to 5V
90
80
115
dB
PSRR
Power Supply Rejection Ratio
V+ = 2.4V to 5V
90
80
115
dB
AVOL
Large Signal Voltage Gain
VO = 0.5V to 4.5V, RL = 100kΩ
350
350
550
V/mV
VO = 0.5V to 4.5V, RL = 1kΩ
25
V/mV
Output low, RL = 100kΩ
3
6
30
mV
130
175
225
mV
VOUT
Maximum Output Voltage Swing
-2
-2.5
Output low, RL = 1kΩ
5
V
Output high, RL = 100kΩ
4.990
4.97
4.996
V
Output high, RL = 1kΩ
4.800
4.750
4.880
V
SR+
Positive Slew Rate
0.13
0.10
0.17
0.20
0.25
V/µs
SR-
Negative Slew Rate
0.10
0.09
0.13
0.17
0.19
V/µs
GBW
Gain Bandwidth Product
2
400
kHz
FN6301.0
June 23, 2006
ISL28276
Electrical Specifications
PARAMETER
V+ = 5V, 0V, VCM = 0.1V, VO = 1.4V, TA = 25°C unless otherwise specified.
Boldface limits apply over the operating temperature range, -40°C to +125°C (Continued)
DESCRIPTION
CONDITIONS
MIN
TYP
MAX
UNIT
IS,ON
Supply Current, Enabled
All channels enabled.
120
156
175
µA
IS,OFF
Supply Current, Disabled
All channels disabled.
4
7
9
µA
ISC+
Short Circuit Sourcing Capability
RL = 10Ω
29
23
31
mA
ISC-
Short Circuit Sinking Capability
RL = 10Ω
24
19
26
mA
VS
Minimum Supply Voltage
VINH
Enable Pin High Level
VINL
Enable Pin Low Level
IENH
Enable Pin Input Current
VEN = 5V
IENL
Enable Pin Input Current
VEN = 0V
2.4
V
2
V
0.8
V
-0.1
0.7
1.3
1.5
µA
0
+0.1
µA
Typical Performance Curves
8
45
40
GAIN (dB)
VS = ±1.25V
35
VS = ±1.0V
30
GAIN (dB)
4
0
VS = ±2.5V
AV = 1
-4 RL = 10kΩ
CL = 2.7pF
RF = 100Ω
RG = OPEN
-8
100
1k
10k
100k
1M
10M
25
AV = 100
15 RL = 10kΩ
CL = 2.7pF
10 R /R = 99.02
F G
RF = 221kΩ
5
RG = 2.23kΩ
0
100
1k
FREQUENCY (Hz)
VS = ±1.25V
VS = ±1.0V
10k
100k
1M
FREQUENCY (Hz)
FIGURE 1. FREQUENCY RESPONSE vs SUPPLY VOLTAGE
FIGURE 2. FREQUENCY RESPONSE vs SUPPLY VOLTAGE
0
200
VCM = VDD/2
150 AV = -1
INPUT OFFSET VOLTAGE (µV)
INPUT OFFSET VOLTAGE (µV)
VS = ±2.5V
20
100
50
VDD = 5V
0
VDD = 2.5V
-50
-100
-150
-200
-20
VOS, µV
-40
-60
-80
-100
0
1
2
3
4
5
OUTPUT VOLTAGE (V)
FIGURE 3. INPUT OFFSET VOLTAGE vs OUTPUT VOLTAGE
3
0
1
2
3
4
5
COMMON-MODE INPUT VOLTAGE (V)
FIGURE 4. INPUT OFFSET VOLTAGE vs COMMON-MODE
INPUT VOLTAGE
FN6301.0
June 23, 2006
ISL28276
(Continued)
80
40
40
0
0
-40
-40
PHASE
10
1k
100
10k
100k
1M
100
60
50
40
0
20
GAIN
-50
0
-20
10
-120
10M
-100
100
10k
1k
-150
1M
100k
FREQUENCY (Hz)
FREQUENCY (Hz)
FIGURE 5. AVOL vs FREQUENCY @ 100kΩ LOAD
FIGURE 6. AVOL vs FREQUENCY @ 1kΩ LOAD
120
110
90
100
90
80
PSRR +
80
70
60
50
40
30
20
10
CMRR(dB)
PSRR (dB)
1
150
80
-80
-80
200
100
PSRR -
100
VS = 5VDC
VSOURCE = 1Vp-p
RL = 100kΩ
AV = +1
70
60
50
VS = 5VDC
VSOURCE = 1Vp-p
RL = 100kΩ
AV = +1
0
10
PHASE (°)
80
GAIN (dB)
120
PHASE (°)
GAIN (dB)
Typical Performance Curves
40
1k
10k
100k
1M
30
10
100
1k
10k
100k
1M
FREQUENCY (Hz)
FREQUENCY (Hz)
FIGURE 8. CMRR vs FREQUENCY
FIGURE 7. PSRR vs FREQUENCY
2.56
VIN
VIN
2.54
VS = 5VDC
VOUT = 0.1Vp-p
RL = 500Ω
AV = -2
2.52
VOUT
2.50
2.48
VS = 5VDC
VOUT = 0.1Vp-p
RL = 500W
AV = +1
2.46
2.44
VOUT
2.42
0
2
4
6
8
10
12
14
16
18
20
FIGURE 9. SMALL SIGNAL TRANSIENT RESPONSE
4
0
100
200
300
400
500
FIGURE 10. LARGE SIGNAL TRANSIENT RESPONSE
FN6301.0
June 23, 2006
ISL28276
Typical Performance Curves
(Continued)
1k
VOLTAGE NOISE (nV/√Hz)
CURRENT NOISE (pA/√Hz)
10.00
1.00
0.10
100
10
1
10
0.01
1
10
100
1k
10k
100k
100
FREQUENCY (Hz)
1k
10k
100k
FREQUENCY (Hz)
FIGURE 12. VOLTAGE NOISE vs FREQUENCY
FIGURE 11. CURRENT NOISE vs FREQUENCY
6
V+ = 5V
VOLTAGE NOISE (200nV/DIV)
VIN
VOLTS (V)
5
4
100K
VS +
100K
3
DUT
+
1K
VS -
VOUT
Function
Generator
33140A
2
1
1µVP-P
0
0
50
100
TIME (1s/DIV)
FIGURE 13. 0.1Hz TO 10Hz INPUT VOLTAGE NOISE
200
FIGURE 14. INPUT VOLTAGE SWING ABOVE THE V+ SUPPLY
10k
155
1k
SUPPLY CURRENT (µA)
INPUT BIAS, OFFSET CURRENTS (pA)
150
TIME (mS)
IB+
100
IOS
IB-
10
1
0
1
2
3
4
COMMON-MODE INPUT VOLTAGE (V)
FIGURE 15. INPUT BIAS + OFFSET CURRENTS vs
COMMON-MODE INPUT VOLTAGE
5
5
135
115
95
75
55
35
2
2.5
3
3.5
4
4.5
5
5.5
SUPPLY VOLTAGE (V)
FIGURE 16. SUPPLY CURRENT vs SUPPLY VOLTAGE
FN6301.0
June 23, 2006
ISL28276
Typical Performance Curves
(Continued)
120
150
n=6
n=7
140
CURRENT (µA)
CURRENT (µA)
110
100
90
80
70
-40
130
120
110
100
-20
0
20
40
60
80
100
90
-40
120
-20
0
TEMPERATURE (°C)
FIGURE 17. SUPPLY CURRENT vs TEMPERATURE VS = ±1.2V
ENABLED. RL = INF
1400
n=7
CURRENT (pA)
CURRENT (pA)
800
600
400
200
-20
0
20
40
60
80
TEMPERATURE (°C)
100
1000
800
600
400
0
-40
120
1700
1200
1500
1000
1300
800
600
200
500
40
60
80
100
120
TEMPERATURE (°C)
FIGURE 21. I BIAS(-) vs TEMPERATURE VS = ±2.5V
6
40
60
80
100
120
n=7
900
700
20
20
1100
400
0
0
FIGURE 20. I BIAS(+) vs TEMPERATURE VS = ±1.2V
n=7
-20
-20
TEMPERATURE (°C)
CURRENT (pA)
CURRENT (pA)
n=7
200
FIGURE 19. I BIAS(+) vs TEMPERATURE VS = ±2.5V
0
-40
120
1200
1000
1400
100
FIGURE 18. SUPPLY CURRENT vs TEMPERATURE VS = ±2.5V
ENABLED. RL = INF
1200
0
-40
20
40
60
80
TEMPERATURE (°C)
300
-40
-20
0
20
40
60
80
TEMPERATURE (°C)
100
120
FIGURE 22. I BIAS(-) vs TEMPERATURE VS = ±1.2V
FN6301.0
June 23, 2006
ISL28276
Typical Performance Curves
(Continued)
1300
1200
n=7
900
CURRENT (pA)
CURRENT (pA)
1000
800
600
400
700
500
300
200
0
-40
n=7
1100
100
-20
0
20
40
60
80
100
-100
-40
120
-20
0
TEMPERATURE (°C)
FIGURE 23. INPUT OFFSET CURRENT vs TEMPERATURE
VS = ±2.5V
200
200
n=5
n=6
100
50
VOS (µV)
VOS (µV)
120
150
100
50
0
0
-50
-50
-100
-100
-150
-20
0
20
40
60
80
100
120
-200
-40
-20
0
TEMPERATURE (°C)
20
40
60
80
100
120
TEMPERATURE (°C)
FIGURE 25. INPUT OFFSET VOLTAGE vs TEMPERATURE
VS = ±2.5V
130
100
FIGURE 24. INPUT OFFSET CURRENT vs TEMPERATURE
VS = ±1.2V
150
-150
-40
20
40
60
80
TEMPERATURE (°C)
FIGURE 26. INPUT OFFSET VOLTAGE vs TEMPERATURE
VS = ±1.2V
114
n=7
n=6
112
PSRR (dB)
CMRR (dB)
120
110
110
108
106
100
104
90
-40
-20
0
20
40
60
80
100
120
TEMPERATURE (°C)
FIGURE 27. CMRR vs TEMPERATURE VCM = +2.5V TO -2.5V
7
102
-40
-20
0
20
40
60
80
100
120
TEMPERATURE (°C)
FIGURE 28. PSRR vs TEMPERATURE VS = ±1.2V TO ±2.5V
FN6301.0
June 23, 2006
ISL28276
Typical Performance Curves
2.40
(Continued)
n=5
-2.32
2.39
-2.35
VOUT (V)
VOUT (V)
-2.34
2.37
2.36
-2.36
-2.37
2.35
-2.38
-2.39
-20
0
20
40
60
80
100
120
-2.4
-40
TEMPERATURE (°C)
-20
0
20
40
60
80
100
120
TEMPERATURE (°C)
FIGURE 29. POSITIVE VOUT vs TEMPERATURE RL = 1k
VS = ±2.5V
2.4992
FIGURE 30. NEGATIVE VOUT vs TEMPERATURE RL = 1k
VS = ±2.5V
-2.4956
n=7
2.499
-2.496
-2.4962
VOUT (V)
VOUT (V)
2.4986
2.4984
2.4982
2.498
-2.4964
-2.4966
2.4978
-2.4968
2.4976
-2.497
2.4974
-40
n=7
-2.4958
2.4988
-20
0
20
40
60
80
100
120
-2.4972
-40
-20
0
FIGURE 31. POSITIVE VOUT vs TEMPERATURE RL = 100k
VS = ±2.5V
14
20
40
60
80
100
120
TEMPERATURE (°C)
TEMPERATURE (°C)
FIGURE 32. NEGATIVE VOUT vs TEMPERATURE RL = 100k
VS = ±2.5V
0.9
n=7
n=5
12
10
0.8
IIH (µA)
8
IIL (nA)
OU
2.38
2.34
-40
n=5
-2.33
6
4
0.7
2
0.6
0
-2
-4
-40
-20
0
20
40
60
80
100
120
TEMPERATURE (°C)
FIGURE 33. IIL (EN) vs TEMPERATURE VS = ±2.5V
8
0.5
-40
-20
0
20
40
60
80
100
120
TEMPERATURE (°C)
FIGURE 34. IIH (EN) vs TEMPERATURE VS = ±2.5V
FN6301.0
June 23, 2006
ISL28276
Typical Performance Curves
(Continued)
0.16
0.18
n=7
n=5
0.15
SLEW RATE (V/µs)
SLEW RATE (V/µs)
0.16
0.14
0.12
0.1
0.14
0.13
0.12
0.11
0.08
-40
-20
0
20
40
60
80
100
0.1
-40
120
-20
0
TEMPERATURE (°C)
FIGURE 35. + SLEW RATE vs TEMPERATURE VS = ±2.5V
INPUT = ±0.75V AV = 2
1.2
1
POWER DISSIPATION (W)
POWER DISSIPATION (W)
1.2
893mW
QS
θ
OP
JA
16
=1
12
°C
/W
0.6
60
80
100
120
JEDEC JESD51-3 LOW EFFECTIVE THERMAL
CONDUCTIVITY TEST BOARD
1.4
0.8
40
FIGURE 36. - SLEW RATE vs TEMPERATURE VS = ±2.5V
INPUT = ±0.75V AV = 2
JEDEC JESD51-7 HIGH EFFECTIVE THERMAL
CONDUCTIVITY TEST BOARD
1
20
TEMPERATURE (°C)
0.4
0.2
0.8
633mW
0.6
θJ
0.4
QS
O
A =1
58
P1
°C
6
/W
0.2
0
0
0
25
50
75 85
100
125
150
AMBIENT TEMPERATURE (°C)
FIGURE 37. PACKAGE POWER DISSIPATION vs AMBIENT
TEMPERATURE
9
0
25
50
75 85 100
125
150
AMBIENT TEMPERATURE (°C)
FIGURE 38. PACKAGE POWER DISSIPATION vs AMBIENT
TEMPERATURE
FN6301.0
June 23, 2006
ISL28276
Pin Descriptions
ISL28276
(16 LD QSOP)
PIN NAME
EQUIVALENT
CIRCUIT
1
NC
No internal connection
2
NC
No internal connection
3
OUT_A
Circuit 3
Amplifier A output
4
IN-_A
Circuit 1
Amplifier A inverting input
5
IN+_A
Circuit 1
Amplifier A non-inverting input
6
EN_A
Circuit 2
Amplifier A enable pin internal pull-down; Logic “1” selects the disabled state; Logic “0” selects
the enabled state.
7
V-
Circuit 4
Negative power supply
8
NC
No internal connection
9
NC
No internal connection
10
NC
No internal connection
11
EN_B
Circuit 2
Amplifier B enable pin with internal pull-down; Logic “1” selects the disabled state; Logic “0”
selects the enabled state.
12
IN+_B
Circuit 1
Amplifier B non-inverting input
13
IN-_B
Circuit 1
Amplifier B inverting input
14
OUT_B
Circuit 3
Amplifier B output
15
V+
Circuit 4
Positive power supply
16
NC
DESCRIPTION
No internal connection
V+
V+
IN-
IN+
V+
LOGIC
PIN
V-
VCIRCUIT 2
Applications Information
Introduction
The ISL28276 is an enhanced rail-to-rail input micropower
precision operational amplifiers with an enable feature. The
part is designed to operate from single supply (2.4V to 5.0V)
or dual supply (±1.2V to ±2.5V). The device is capable of
swinging 0.5V above a 5.0V supply (0.25V for a 2.4V supply)
and to within 10mV from ground. The ISL28276 maintains
CMRR performance for input voltages greater than the
positive supply. The output operation can swing within about
3mV of the supply rails with a 100kΩ load (reference
Figures 29 through 32).
Rail-to-Rail Input
The input common-mode voltage range of the ISL28276
goes from negative supply to positive supply without
introducing additional offset errors or degrading performance
associated with a conventional rail-to-rail input operational
10
CAPACITIVELY
COUPLED
ESD CLAMP
OUT
V-
CIRCUIT 1
V+
VCIRCUIT 3
CIRCUIT 4
amplifier. Many rail-to-rail input stages use two differential
input pairs, a long-tail PNP (or PFET) and an NPN (or
NFET). Severe penalties have to be paid for this circuit
topology. As the input signal moves from one supply rail to
another, the operational amplifier switches from one input
pair to the other causing drastic changes in input offset
voltage and an undesired change in magnitude and polarity
of input offset current.
The ISL28276 achieves input rail-to-rail without sacrificing
important precision specifications and degrading distortion
performance. The devices’ input offset voltage exhibits a
smooth behavior throughout the entire common-mode input
range. The input bias current versus the common-mode
voltage range gives us an undistorted behavior from typically
10mV above the negative rail and 10% higher than the V+
rail (0.5V higher than V+ when V+ equals 5v).
FN6301.0
June 23, 2006
ISL28276
Input Protection
All input terminals have internal ESD protection diodes to
both positive and negative supply rails, limiting the input
voltage to within one diode beyond the supply rails. The
ISL28276 has additional back-to-back diodes across the
input terminals. If overdriving the inputs is necessary, the
external input current must never exceed 5mA. External
series resistors may be used as an external protection to
limit excessive external voltage and current from damaging
the inputs.
Input Bias Current Compensation
The input bias currents of the ISL28276 are decimated down
to a typical of 500pA while maintaining an excellent
bandwidth for a micro-power operational amplifier. Inside the
ISL28276 is an input bias canceling circuit. The input stage
transistors are still biased with an adequate current for
speed but the canceling circuit sinks most of the base
current, leaving a small fraction as input bias current.
Rail-to-Rail Output
A pair of complementary MOSFET devices are used to
achieve the rail-to-rail output swing. The NMOS sinks
current to swing the output in the negative direction. The
PMOS sources current to swing the output in the positive
direction. The ISL28276 with a 100kΩ load will swing to
within 3mV of the supply rails.
Enable/Disable Feature
The ISL28276 offers an EN pin that disables the device
when pulled up to at least 2.2V. In the disabled state (output
in a high impedance state), the part consumes typically 4µA.
By disabling the part, multiple ISL28276 parts can be
connected together as a MUX. The outputs are tied together
in parallel and a channel can be selected by the EN pin. The
EN pin also has an internal pull down. If left open, the EN pin
will pull to the negative rail and the device will be enabled by
default.
currents, components can be mounted to the PC board
using Teflon standoff insulators.
V+
HIGH IMPEDANCE INPUT
1/2 ISL28276
IN
FIGURE 39. GUARD RING EXAMPLE FOR UNITY GAIN
AMPLIFIER
Example Application
Thermocouples are the most popular temperature-sensing
device because of their low cost, interchangeability, and
ability to measure a wide range of temperatures. The
ISL28276 (Figure 40) is used to convert the differential
thermocouple voltage into single-ended signal with 10X gain.
The ISL28276's rail-to-rail input characteristic allows the
thermocouple to be biased at ground and the converter to
run from a single 5V supply.
R4
100kΩ
R3
10kΩ
R2
10kΩ
K TYPE
THERMOCOUPLE
V+
+
ISL28276
V-
410µV/°C
+
5V
R1
100kΩ
FIGURE 40. THERMOCOUPLE AMPLIFIER
Proper Layout Maximizes Performance
To achieve the maximum performance of the high input
impedance and low offset voltage of the ISL28276, care
should be taken in the circuit board layout. The PC board
surface must remain clean and free of moisture to avoid
leakage currents between adjacent traces. Surface coating
of the circuit board will reduce surface moisture and provide
a humidity barrier, reducing parasitic resistance on the
board. When input leakage current is a concern, the use of
guard rings around the amplifier inputs will further reduce
leakage currents. Figure 39 shows a guard ring example for
a unity gain amplifier that uses the low impedance amplifier
output at the same voltage as the high impedance input to
eliminate surface leakage. The guard ring does not need to
be a specific width, but it should form a continuous loop
around both inputs. For further reduction of leakage
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FN6301.0
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ISL28276
Quarter Size Outline Plastic Packages Family (QSOP)
MDP0040
A
QUARTER SIZE OUTLINE PLASTIC PACKAGES FAMILY
D
(N/2)+1
N
E
SYMBOL QSOP16 QSOP24 QSOP28 TOLERANCE NOTES
PIN #1
I.D. MARK
E1
1
(N/2)
A
0.068
0.068
0.068
Max.
-
A1
0.006
0.006
0.006
±0.002
-
A2
0.056
0.056
0.056
±0.004
-
b
0.010
0.010
0.010
±0.002
-
c
0.008
0.008
0.008
±0.001
-
D
0.193
0.341
0.390
±0.004
1, 3
E
0.236
0.236
0.236
±0.008
-
E1
0.154
0.154
0.154
±0.004
2, 3
e
0.025
0.025
0.025
Basic
-
L
0.025
0.025
0.025
±0.009
-
L1
0.041
0.041
0.041
Basic
-
N
16
24
28
Reference
-
B
0.010
C A B
e
H
C
SEATING
PLANE
0.007
0.004 C
b
C A B
Rev. E 3/01
NOTES:
1. Plastic or metal protrusions of 0.006” maximum per side are not
included.
L1
A
2. Plastic interlead protrusions of 0.010” maximum per side are not
included.
3. Dimensions “D” and “E1” are measured at Datum Plane “H”.
c
4. Dimensioning and tolerancing per ASME Y14.5M-1994.
SEE DETAIL "X"
0.010
A2
GAUGE
PLANE
L
A1
4°±4°
DETAIL X
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Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
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12
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