Features of the Low Side Family IPS10xx

Application Note AN-1083
Features of the Low-Side Family IPS10xx
By Fabio Necco, International Rectifier
Table of Contents
Page
Introduction ..........................................................................................1
Diagnosis .............................................................................................1
Input Current vs. Temperature........................................................1
Selection of the Resistor Rdiag.......................................................1
Protections ...........................................................................................2
Over-temperature Protection ..........................................................2
Thermal Runaway Prevention.........................................................2
OT Protection Response Time........................................................2
Over-current Protection...................................................................2
Operation at VIN > 5.5V...................................................................3
Operation at VIN < 4.5V...................................................................3
Active Clamp...................................................................................3
Switching Performances.......................................................................4
Maximum Frequency ......................................................................5
Input Voltage Maximum Rise Time .................................................5
Maximum Inductive/Capacitive Load....................................................5
Maximum Battery Voltage ....................................................................6
Loss of Ground.....................................................................................6
Thermal Impedance Curve...................................................................6
Summary..............................................................................................6
The new IPS10XX family of protected power MOSFETs consists of three terminal low side
devices based upon the latest IR proprietary vertical technology P3 (Power Product Platform).
IR protected MOSFETs are vertical power MOSFETs integrated with protection circuitry. The new
IPS10XX family features logic level inputs, over-temperature shut down protection, over-current
shut down protection, active clamp and diagnosis through the input pin. The new families are
monolithic for RDSON as low as 13mΩ, which allows faster response time for the over temperature
protection and more accurate over current shut down. Compared to the previous low side family,
the IPS10XX offers better protection, integrated with a more efficient power MOSFET and a
diagnostic feature without the need of additional terminals. This application note explains the
features included in the low side IPS family IPS10XX and provides suggestions on how to use
these devices in the automotive environment.
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AN-1083
cover
APPLICATION NOTE
International Rectifier • 233 Kansas Street, El Segundo, CA 90245
AN-1083
z
USA
Features of the low-side family IPS10XX
By Fabio Necco
International Rectifier
Table of Contents
• Introduction
• Diagnosis
•
Input current vs. temperature
•
Selection of the resistor Rdiag
• Protections
•
Over-temperature protection
•
Thermal run-away prevention
•
OT protection response time
•
Over-current protection
•
Operation at VIN > 5.5V
•
Operation at VIN < 4.5
•
Active clamp
• Switching performances
•
Maximum frequency
•
Input voltage maximum rise time
• Maximum inductive load
• Maximum capacitive load
• Maximum battery voltage
• Loss of GND
• Thermal impedance
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Application Note AN-1083
Features of the low-side family IPS10XX
By Fabio Necco, International Rectifier
For additional data, please visit International Rectifier
website at: www.irf.com
Load
Current path in case
of GND loss
Introduction
RDIAG
Out
The new IPS10XX family of protected power MOSFETs
consists of three terminal low side devices based upon the
3
latest IR proprietary vertical technology P (Power Product
Platform). IR protected MOSFETs are vertical power
MOSFETs integrated with protection circuitry. The new
IPS10XX family features logic level inputs, overtemperature shut down protection, over-current shut down
protection, active clamp and diagnosis through the input
pin.
The new families are monolithic for RDSON as low as 13mΩ,
which allows faster response time for the over temperature
protection and more accurate over current shut down.
Compared to the previous low side family, the IPS10XX
offers better protection, integrated with a more efficient
power MOSFET and a diagnostic feature without the need
of additional terminals. This application note explains the
features included in the low side IPS family IPS10XX and
provides suggestions on how to use these devices in the
automotive environment.
µ
D
Battery
Control
In
15K
150K
A/D
In
2K
S
VDIAG
GND
Figure 1. Diagnostic voltage reading on LS
Typical diagnostic voltages for a 1.2KΩ RDIAG resistor are
shown in table 1.
Condition
I_in
Vdiag
Normal
32uA
4.96V
Fault
Rdiag
230uA
4.72V
Table 1. Low side diagnosis levels
1.2KΩ
Input current vs. temperature
The value of the input current changes with the junction
temperature. Curves similar to the one showed in Figure 2
are provided in the device datasheet.
Iin (µA)
Diagnosis
300
Diagnostic features are used to communicate the condition
of the IPS to the microcontroller. The IPS protects itself
against different fault conditions. Fault conditions can be
either over current or over temperature. Once the fault
condition is detected by the IPS, the diagnostic information
is made available through the input pin. The low side family
can detect different kind of faults but only provide two
statuses: fault or normal condition. Fault conditions can be
over current, over temperature or open load. No distinction
on the kind of fault is made. The diagnostic is implemented
through the input current. When the input is turned ON (to
VIN = 5V) the current at the input terminal (In) will change
depending on the condition of the IPS. The current in case
of a fault condition is about 8 times higher than that in
normal conditions. A resistor in series with the input allows
current variations to be translated to voltage variations. A
typical connection of the IPS is shown in figure 1.
Diagnostic voltage can be detected at the input pin, after
the input resistor (RDIAG).
International Rectifier Technical Assistance Center:
250
200
I on
I latch
150
100
50
0
-50
0
50
100
150
T (°C)
Figure 2 Input current variation with temperature
Selection of the resistor Rdiag
The resistor RDIAG serves two purposes. First of all, it
provides protection for the microcontroller in case of ground
disconnection. Under this condition a current flows between
VBAT and the input pin (In) as shown in figure 1. Secondly,
since the current through the input pin changes when a fault
is detected, the value of this resistor determines the
diagnostic voltage levels. RDIAG must be selected according
to the characteristics of the input stage that is used to read
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Application Note AN-1083
the diagnostic. The higher RDIAG the bigger the voltage
difference between fault and no-fault condition. There is a
limit to the maximum value for this resistor and it is due to
the minimum high-level input voltage (VIH min). In order to
keep the device ON the input voltage must be above the
VIHmin = 4.5V. RDIAG can be selected as follows:
R DIAG =
VOH min − VIH min
IIN max
VIH min = 4.5 V and IIN max = 250µA from the datasheet.
Assuming VOH min = 4.8 V (min. microprocessor VOH)
R DIAG = 1.2KΩ
The diagnostic levels, corresponding to a 1.2 Kohm resistor,
are shown in Table 1. Due to the input current level, an
analog input is required to read the diagnostic voltage.
If, after a thermal shut down, the device is turned ON before
TRESET, the over temperature protection circuit will react
before the device can be activated, preventing thermal run
away.
OT protection response time
The over temperature protection response time varies
depending on the output current. The system will react faster
to higher currents, due to the fact that the junction
temperature will reach the over temperature shut down
threshold quicker. The behavior of the Over temperature
protection for the IPS1011 is shown in figure 4. Figures like
this are provided in the data sheet of each device. When the
IPS is used in series with a fuse, the fuse characteristic must
be above the Over temperature protection response time
characteristic of the IPS, as shown in figure 4.
IDS A
100
50°C/W 25°C ambient
50°C/W 85°C ambient
50°C/W -40°C ambient
Fuse Characteristic
90
80
70
Protections
60
50
The previous section describes the diagnosis features that
can be used to inform the logic stage (micro controller) about
the IPS status. The following section explains how the device
protects itself when a fault condition is detected. Over current
and over temperature could damage the IPS if no protection
is implemented.
40
30
20
10
0
Over-temperature protection
0.1
The IPS shuts down when the junction temperature exceeds
the over temperature limit of 165°C. The IPS10XX latches
after the shut down takes place. In order to restart in latch
mode (after OT shutdown), the input needs to be kept “low”
for a time longer than TRESET. This time is set by design to
allow the temperature to go below a defined level and is
defined based on the thermal characteristics of the package.
Shut down waveforms are shown in figure 3.
Vin
t
Ids
Isd
t<T reset
t>T reset
Ishutdown
t
Tj
Tsd
165°C
Tshutdown
t
1
10
100
t (s)
Figure 4. Over temperature response time
Over-current protection
The IPS10XX family features an over-current shut down
protection.
When the drain current reaches the preset shut down limit,
the device will be turned OFF. The response time of the
current shut down feature is a function of the peak current,
the inner delay and the di/dt slope. The behavior of the
IPS10XX depends on whether the over current happens
when the device is already ON or the device is turned ON
under an over-current condition. A typical behavior of an
IPS1031 under these two conditions is shown in figure 5a
and 5b.
Input 5V/div
Input 5V/div
VDS 10/div
VDS 10/div
Ids 20A/div
T=5us/div
Ids 10A/div
T=10us/div
Figure 3. Shut down and re-start feature
a) Short circuit after IPS already ON
Thermal run-away prevention
The response time of the over temperature protection circuit
has been significantly improved from the previous family. A
faster response time protects from thermal run-away.
International Rectifier Technical Assistance Center:
b) IPS turned ON under short circuit
Figure 5. Over current shut down behavior
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Application Note AN-1083
Operation at VIN > 5.5V
Continuous operations at input voltage higher than 5.5V are
not recommended since the behavior of the protections
changes with the input voltage, as shown in figures 6 and 7.
In particular, increased over temperature may reduce the
long-term reliability of the device. Operating continuously
with VIN > 5.5V is therefore not recommended.
IDS (A)
80
70
60
50
40
30
Operation at VIN < 4.5
20
In the IPS10XX the protection features are supplied through
the input pin and therefore depend on VIN.
The behavior of the over temperature shut down versus the
input voltage is shown in Figure 6. The over temperature
threshold is low at low VIN causing the device to fail to turn
ON at high temperatures. This does not affect the life of the
device.
Figure 7 shows the behavior of the over current protection as
a function of the input voltage. In normal operation, the gate
voltage is equal to the input voltage. When VIN is around
2.5V, the power MOSFET will not be fully ‘ON’ and the
current will be limited by the trans-conductance of the power
MOSFET. In this mode the current is limited below over
current shut down threshold and the MOSFET will not latch.
The power dissipation under this condition can be very high,
causing the junction temperature to rise.
Repeated turn on and off under this condition may reduce
the reliability due to the high thermal excursion of the
junction temperature (thermal cycling).
Operating continuously with Vin < 4.5V is therefore not
recommended.
I limit
10
I shutdow n
0
0
1
2
3
4
5
6
VIN (V)
Figure 7. Over current protection vs. input voltage
Active clamp
Purpose of the active clamp
When switched OFF, an inductive load generates a voltage
across its terminal whose amplitude depends on the current
slope and the inductance value. In a low side configuration
the over voltage across the inductance will cause the drainto-source voltage to rise above battery. This causes the body
diode to go into avalanche if no external zener clamps or
freewheeling diodes are used, as shown in figure 8.
The purpose of the active clamp is to limit the voltage across
the MOSFET to a value below the body diode break down
voltage to reduce the amount of stress on the device during
switching.
In conclusion continuous operations are recommended only
for input voltages between 4.5V and 5.5V.
TSD (°C)
90
Switch ON
Switch OFF
VDS = 0V
VLOAD = VBATTERY
VDS = VCLAMP
VLOAD = VBATTERY – VCLAMP
VLOAD < 0
200
D
Load
180
VLOAD
160
Load
VLOAD
140
Battery
120
Battery
D
100
VDS
80
5V
60
VDS
0V
S
S
40
20
Figure 8. Active clamp circuitry
0
0
1
2
3
4
5
6
Figure 6. Over temperature protection vs. input voltage
International Rectifier Technical Assistance Center:
VIN (V)
Active clamp methodology
One way to control the VDS of a MOSFET is by driving it in
linear region. A feedback loop inside the IPS, regulates the
VDS to the targeted active clamp voltage by adjusting the
output MOSFET gate voltage independently from the load
current. The internal circuitry consists of a zener diode
connected between drain and gate and a resistor from gate
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Application Note AN-1083
to ground. Please note that during active clamp, the output
MOSFET is driven in linear region and the power dissipation
does not depend on the RDSON.
100
Iload (A)
VIN
Tclamp
Iclamp
t
10
IDS
Vclamp
t
VDS
1
0.001
∆Tj
t
Tj
t
Fig 9. Active clamp waveforms
Energy consideration when using active clamp
An active clamp allows faster recirculation compared to free
wheeling techniques, and does not require the use of
external devices.
However the drawback of the active clamp technique is that
the energy is dissipated by the IPS and is potentially
damaging. Energy dissipation calculations are shown in the
following section:
Energy dissipated by the IPS:
EIPS
0.1
1
L (mH)
Figure 10. Output current vs. maximum inductive load
Temperature increase during active clamp
The energy dissipation during active clamp will cause the
junction temperature to increase as shown in figure 9.
The temperature increase during active clamp can be
estimated as follows:
∆ Tj = PCL ⋅ Z TH ( t CLAMP )
Where: Z TH ( t CLAMP ) is the thermal impedance @t = tCLAMP
which be read from the thermal impedance curves given in
the data sheets and in figure 12.
PCL = VCL ⋅ ICLavg : Power dissipation during active clamp
VCLAMP
1
= ⋅ L ⋅ I2 ⋅
2
VCLAMP − VBATT
VCL = 39 V : Typical VCLAMP value for the IPS10XX
Energy dissipated by the load:
ICLavg =
1
⋅ L ⋅ I2
2
t CL =
Since VCLAMP must be higher than VBATT, the IPS dissipates
more energy than the load. This is due to the fact that during
active clamp some energy is taken from the battery.
The energy dissipated by the IPS is proportional to the load
inductance and the load current.
Curves similar to figure 10 are given in the data sheet and
can be used to estimate the maximum load inductance
versus load current. These curves are based upon the
amount of energy that can be dissipated by the IPS during
an active clamp. The section “maximum inductive load”
explains how to calculate the maximum value of inductance.
Please note that the load ‘parasitic resistance’ provides a
limitation to the load current. Maximum load current must be
calculated in the worst possible supply conditions.
For example for a 100uH load, the curves shows a maximum
Iloadmax = 23A. If the worst-case VBATTERY is 37V, the
inductor minimum series resistance must be 37V/23A= 1.6
Ohm, according to figure 10.
International Rectifier Technical Assistance Center:
0.01
di
=
dt
ICL : Average current during active clamp
2
ICL : Active clamp duration
di
dt
VBattery − VCL : Demagnetization current
L
The temperature increase during active clamp must be
limited by design to avoid damaging the IPS.
Switching performances
The input of the IPS10xx is internally connected to the gate
of the MOSFET through a 15Kohm resistor. This limits the
speed of the IPS, reduces electrical noise and improves
EMC performances compared to the previous families.
Typical switching waveforms are showed in Figure 11.
Switching times are provided in the data sheet.
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Application Note AN-1083
80%
VIN
20%
t
Tr-in
80%
IDS
(typical Isd =85A for the IPS1011). The data sheet also
shows that, if the load current is limited, higher inductances
can be driven.
The formula below show how to calculate the maximum load
inductance with the available data from the IPS10XX data
sheet. (ISHUTDOWN typ = 85A VCLAMP typ =39V @ VBATT = 14V)
20%
Td on
Td off
Tr
Tf
t
Power dissipation during a single active clamp can be
calculated as follows: P
CL
VDS
t
Figure 11. Typical switching waveforms
The data sheet indicates a maximum recommended
frequency which is calculated to have conduction losses
equal to switching losses. Operating at higher frequency is
possible, but the contribution due to the switching losses will
be higher than that of the conduction losses. The maximum
switching frequency is therefore only limited by the turn ON
and turn OFF times and by the power dissipation.
Input voltage maximum rise time
The over temperature (OT) protection block is supplied via
the input. The OT response time will decrease with input
voltage for VIN below 4.5V.
If the input rise time is longer than the over temperature
protection response time, the over temperature can be
triggered before the device can turn ON, even if the
temperature is lower than 150°C.
Table 2 shows typical over temperature shut down
thresholds for different input rise times.
< 1us
165
3us
145
6us
100
20us
80
Table 2. OT reaction time vs. Tr-in
The data sheet suggests 1us as the maximum input voltage
raise time.
Maximum inductive load
As explained in the active clamp section, inductive loads
contribute to the junction temperature increase due to the
active clamp feature. The value of inductance affects the
duration of the active clamp and therefore the maximum
junction temperature of the device. The worst condition is
when the device shuts down due to over temperature
(Tj=165C) and the load current is just below the over current
shut down threshold. Due to the inductive load, the active
clamp will be triggered at shut down and the junction
temperature will increase.
The maximum load inductance indicated in the datasheet is
the value of inductance that causes an increase of 35 °C in
the junction temperature in case of over temperature shut
down (worst case OT=165C) at the maximum load current
International Rectifier Technical Assistance Center:
VCL ⋅ ICL
= 1657 W
2
If TJclamp = 200°C (max Tj allowed during active clamp)
∆ Tj = TJclamp − 165°C = 35°C
Maximum frequency
Tr-in (0.5V - 4.5V).
Typical max start
temperature °C
=
Since ∆ Tj = PCL ⋅ Z TH ( t CL )
We can calculate the maximum ZTH(tcl) as follows:
Z TH ( tcl) =
∆ Tj ⋅
PCL
=
35
= 0.02 °C
W
1657
From the ZTH(tcl) curve we can read tCL.
t CL = 22µs : active clamp phase duration
and L = t ⋅ VBatt − VCL = 6.5µH
CL
ILOAD
The formula above shows that the maximum inductance
depends on the load current.
The calculations above are based upon 85A worst-case load
current. However, the parasitic series resistance of the load
limits the maximum load current. A load with a series
resistance of 0.5 Ohm will limit the maximum current to 28A
@VBATT =14V and the maximum inductive load will be
100µH. Parasitic resistance must therefore be considered
when calculating the maximum inductive load. Please note
that the junction temperature will rise above 165°C if an OT
shut down occurs while driving an inductive load. Repetitive
operation during this condition may impact the reliability of
the device (i.e. thermal cycling) and must be avoided.
Maximum capacitive load
There are two effects to consider when driving capacitive
loads. First is the behavior of the current shut down threshold
which decreases with the input voltage when Vin<4.5. For
input below 3V the trans-conductance of the MOSFET limits
the current. The second is the dynamic response of the over
current shut down in relation to the slope of the output peak
current caused by the capacitor.
A capacitive load generates a peak current which depends
on the slew rate of the VDS and on the capacitance value.
For this reason when driving capacitive loads, the over
current protection can be triggered at turn on, causing a
protection feature to act during normal operations.
The maximum capacitive load can be estimated assuming
the maximum peak current (at turn on) to be half of the shut
down current threshold, given in the datasheet.
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Application Note AN-1083
For the IPS1011, with a typical current shut down of 85A, the
peak current during turn on should be limited to about 42A
The maximum capacitive load that the IPS can drive may be
calculated as follows:
iCload = C ⋅
dVC
dt
dVDS
dt
The minimum dVDS/dt is given by the minimum Rise time
(20uS) needed to go from 20% to 80% of VBAT = 14V
dVDS 14 − 2.8 − 2.8
8.4
=
=
= 420 ⋅ 10 3
dt
20 ⋅ 10 −6
20 ⋅ 10 −6
0.1
0.01
1E-05 1E-04 0.001 0.01
which gives:
C=
10
1
Assuming VC = VBATT - VDS, and a constant VBATT
iCload = C ⋅
100
i Cload
42
=
= 100µF
dV DS
420 ⋅ 10 3
dt
0.1
1
10
100
t (s)
Figure 12. Thermal impedance
Please note that DC motors often use capacitors connected
in parallel with the winding for EMC purposes. This
capacitive load must be taken into account when selecting
the IPS.
Maximum battery voltage
The 10XX families are designed and qualified to operate
continuously at battery voltages up to 28V, as indicated in
the datasheet. The drain-to-source voltage can exceed 28V
but will be clamped at 36V by the active clamp. Energy
dissipation calculations must be performed for voltages
above 36V, such as in the case of inductive loads, or
automotive pulses. The device can handle voltages between
28V and 36V as long as they are not permanently applied.
Summary
This application note explains the behavior of the IPS10XX
and gives suggestions on how to design the circuitry around
the IPS10XX for automotive applications. This document
also explains how the protection features behave outside the
recommended conditions of the data sheet.
Protection features, such as over-current shut down and
over-temperature, are designed to protect the IPS against
extreme conditions but are not intended to be used
repeatedly under normal operations since they can shorten
the life of the device.
Please contact the IR Technical Assistance Center with any
questions regarding the IPS10XX family.
Loss of ground
In case of loss of the ground connection, a parasitic structure
in the IPS will create a current path from the battery to the
input pin, through the load. This current will flow into the
output of the micro and can cause damage to the output
stage of the micro if not limited. The connection of the
diagnostic resistor (RDIAG) in series with the input pin, as
described previously in this document, provides a limitation
for the current in case of GND loss.
Thermal impedance curve
Thermal impedance curves (similar to the one showed in
Figure 12) are given in the data sheet and can be used to
determine the maximum load inductance and the thermal
performances of the device.
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