Data Sheet

74AHC1G08-Q100;
74AHCT1G08-Q100
2-input AND gate
Rev. 1 — 13 July 2012
Product data sheet
1. General description
74AHC1G08-Q100 and 74AHCT1G08-Q100 are high-speed Si-gate CMOS devices.
They provide a 2-input AND function.
The AHC device has CMOS input switching levels and supply voltage range 2 V to 5.5 V.
The AHCT device has TTL input switching levels and supply voltage range 4.5 V to 5.5 V.
This product has been qualified to the Automotive Electronics Council (AEC) standard
Q100 (Grade 1) and is suitable for use in automotive applications.
2. Features and benefits
 Automotive product qualification in accordance with AEC-Q100 (Grade 1)
 Specified from 40 C to +85 C and from 40 C to +125 C
 Symmetrical output impedance
 High noise immunity
 Low power dissipation
 Balanced propagation delays
 ESD protection:
 MIL-STD-883, method 3015 exceeds 2000 V
 HBM JESD22-A114F exceeds 2000 V
 MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 )
 SOT353-1 and SOT753 package options
3. Ordering information
Table 1.
Ordering information
Type number
74AHC1G08GW-Q100
Package
Temperature range
Name
Description
Version
40 C to +125 C
TSSOP5
plastic thin shrink small outline package;
5 leads; body width 1.25 mm
SOT353-1
40 C to +125 C
SC-74A
plastic surface-mounted package; 5 leads
SOT753
74AHCT1G08GW-Q100
74AHC1G08GV-Q100
74AHCT1G08GV-Q100
74AHC1G08-Q100; 74AHCT1G08-Q100
NXP Semiconductors
2-input AND gate
4. Marking
Table 2.
Marking codes
Type number
Marking[1]
74AHC1G08GW-Q100
AE
74AHC1G08GV-Q100
A08
74AHCT1G08GW-Q100
CE
74AHCT1G08GV-Q100
C08
[1]
The pin 1 indicator is located on the lower left corner of the device, below the marking code.
5. Functional diagram
A
1
B
2
A
1
Y
&
4
4
Y
2
B
mna114
mna113
Fig 1. Logic symbol
mna221
Fig 2. IEC logic symbol
Fig 3. Logic diagram
6. Pinning information
6.1 Pinning
$+&*4
$+&7*4
%
$
*1'
9&&
<
DDD
Fig 4. Pin configuration
6.2 Pin description
Table 3.
Pin description
Symbol
Pin
Description
B
1
data input
A
2
data input
GND
3
ground (0 V)
Y
4
data output
VCC
5
supply voltage
74AHC_AHCT1G08_Q100
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 13 July 2012
© NXP B.V. 2012. All rights reserved.
2 of 12
74AHC1G08-Q100; 74AHCT1G08-Q100
NXP Semiconductors
2-input AND gate
7. Functional description
Table 4.
Function table
H = HIGH voltage level; L = LOW voltage level
Inputs
Output
A
B
Y
L
L
L
L
H
L
H
L
L
H
H
H
8. Limiting values
Table 5.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
Parameter
Min
Max
Unit
VCC
supply voltage
Conditions
0.5
+7.0
V
VI
input voltage
0.5
+7.0
V
IIK
input clamping current
VI < 0.5 V
20
-
mA
IOK
output clamping current
VO < 0.5 V or VO > VCC + 0.5 V
IO
output current
0.5 V < VO < VCC + 0.5 V
-
20
mA
-
25
mA
ICC
supply current
-
75
mA
IGND
ground current
75
-
mA
Tstg
storage temperature
65
+150
C
Ptot
total power dissipation
-
250
mW
[1]
Tamb = 40 C to +125 C
[2]
[1]
The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
[2]
For both TSSOP5 and SC-74A packages: above 87.5 C the value of Ptot derates linearly with 4.0 mW/K.
9. Recommended operating conditions
Table 6.
Recommended operating conditions
Voltages are referenced to GND (ground = 0 V).
Symbol Parameter
VCC
supply voltage
VI
input voltage
VO
output voltage
Tamb
ambient temperature
t/V
input transition rise
and fall rate
74AHC_AHCT1G08_Q100
Product data sheet
Conditions
74AHC1G08-Q100
74AHCT1G08-Q100
Unit
Min
Typ
Max
Min
Typ
Max
2.0
5.0
5.5
4.5
5.0
5.5
V
0
-
5.5
0
-
5.5
V
0
-
VCC
0
-
VCC
V
40
+25
+125
40
+25
+125
C
VCC = 3.3 V  0.3 V
-
-
100
-
-
-
ns/V
VCC = 5.0 V  0.5 V
-
-
20
-
-
20
ns/V
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 13 July 2012
© NXP B.V. 2012. All rights reserved.
3 of 12
NXP Semiconductors
74AHC1G08-Q100; 74AHCT1G08-Q100
2-input AND gate
10. Static characteristics
Table 7.
Static characteristics
Voltages are referenced to GND (ground = 0 V).
Symbol Parameter
25 C
Conditions
40 C to +85 C 40 C to +125 C Unit
Min
Typ
Max
Min
Max
Min
Max
VCC = 2.0 V
1.5
-
-
1.5
-
1.5
-
V
VCC = 3.0 V
2.1
-
-
2.1
-
2.1
-
V
VCC = 5.5 V
3.85
-
-
3.85
-
3.85
-
V
VCC = 2.0 V
-
-
0.5
-
0.5
-
0.5
V
VCC = 3.0 V
-
-
0.9
-
0.9
-
0.9
V
VCC = 5.5 V
-
-
1.65
-
1.65
-
1.65
V
HIGH-level
VI = VIH or VIL
output voltage
IO = 50 A; VCC = 2.0 V
1.9
2.0
-
1.9
-
1.9
-
V
IO = 50 A; VCC = 3.0 V
2.9
3.0
-
2.9
-
2.9
-
V
IO = 50 A; VCC = 4.5 V
4.4
4.5
-
4.4
-
4.4
-
V
IO = 4.0 mA; VCC = 3.0 V
2.58
-
-
2.48
-
2.40
-
V
IO = 8.0 mA; VCC = 4.5 V
For type 74AHC1G08-Q100
VIH
VIL
VOH
VOL
HIGH-level
input voltage
LOW-level
input voltage
3.94
-
-
3.8
-
3.70
-
V
LOW-level
VI = VIH or VIL
output voltage
IO = 50 A; VCC = 2.0 V
-
0
0.1
-
0.1
-
0.1
V
IO = 50 A; VCC = 3.0 V
-
0
0.1
-
0.1
-
0.1
V
IO = 50 A; VCC = 4.5 V
-
0
0.1
-
0.1
-
0.1
V
IO = 4.0 mA; VCC = 3.0 V
-
-
0.36
-
0.44
-
0.55
V
IO = 8.0 mA; VCC = 4.5 V
-
-
0.36
-
0.44
-
0.55
V
-
-
0.1
-
1.0
-
2.0
A
II
input leakage
current
VI = 5.5 V or GND;
VCC = 0 V to 5.5 V
ICC
supply current VI = VCC or GND; IO = 0 A;
VCC = 5.5 V
-
-
1.0
-
10
-
40
A
CI
input
capacitance
-
1.5
10
-
10
-
10
pF
For type 74AHCT1G08-Q100
VIH
HIGH-level
input voltage
VCC = 4.5 V to 5.5 V
2.0
-
-
2.0
-
2.0
-
V
VIL
LOW-level
input voltage
VCC = 4.5 V to 5.5 V
-
-
0.8
-
0.8
-
0.8
V
VOH
HIGH-level
VI = VIH or VIL; VCC = 4.5 V
output voltage
IO = 50 A
4.4
4.5
-
4.4
-
4.4
-
V
3.94
-
-
3.8
-
3.70
-
V
-
0
0.1
-
0.1
-
0.1
V
-
-
0.36
-
0.44
-
0.55
V
-
-
0.1
-
1.0
-
2.0
A
IO = 8.0 mA
VOL
LOW-level
VI = VIH or VIL; VCC = 4.5 V
output voltage
IO = 50 A
IO = 8.0 mA
II
input leakage
current
74AHC_AHCT1G08_Q100
Product data sheet
VI = 5.5 V or GND;
VCC = 0 V to 5.5 V
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 13 July 2012
© NXP B.V. 2012. All rights reserved.
4 of 12
74AHC1G08-Q100; 74AHCT1G08-Q100
NXP Semiconductors
2-input AND gate
Table 7.
Static characteristics …continued
Voltages are referenced to GND (ground = 0 V).
Symbol Parameter
25 C
Conditions
40 C to +85 C 40 C to +125 C Unit
Min
Typ
Max
Min
Max
Min
Max
ICC
supply current VI = VCC or GND; IO = 0 A;
VCC = 5.5 V
-
-
1.0
-
10
-
40
A
ICC
additional
per input pin; VI = 3.4 V;
supply current other inputs at VCC or GND;
IO = 0 A; VCC = 5.5 V
-
-
1.35
-
1.5
-
1.5
mA
CI
input
capacitance
-
1.5
10
-
10
-
10
pF
11. Dynamic characteristics
Table 8.
Dynamic characteristics
GND = 0 V; tr = tf =  3.0 ns. For test circuit see Figure 6.
Symbol
Parameter
25 C
Conditions
Min
Typ
CL = 15 pF
-
CL = 50 pF
-
40 C to +85 C 40 C to +125 C Unit
Max
Min
Max
Min
Max
4.6
8.8
1.0
6.5
12.3
1.0
10.5
1.0
12.0
ns
14.0
1.0
16.0
ns
-
3.2
5.9
1.0
7.0
1.0
8.0
ns
For type 74AHC1G08-Q100
tpd
propagation
delay
[1]
A and B to Y;
see Figure 5
VCC = 3.0 V to 3.6 V
VCC = 4.5 V to 5.5 V
[2]
[3]
CL = 15 pF
CL = 50 pF
CPD
power
dissipation
capacitance
-
4.6
7.9
1.0
9.0
1.0
10.5
ns
-
17
-
-
-
-
-
pF
CL = 15 pF
-
3.6
6.2
1.0
7.1
1.0
8.0
ns
CL = 50 pF
-
5.1
7.9
1.0
9.0
1.0
10.5
ns
-
19
-
-
-
-
-
pF
per buffer;
CL = 50 pF; f = 1 MHz;
VI = GND to VCC
[4]
For type 74AHCT1G08-Q100
tpd
propagation
delay
[1]
A and B to Y;
see Figure 5
VCC = 4.5 V to 5.5 V
CPD
power
dissipation
capacitance
per buffer;
CL = 50 pF; f = 1 MHz;
VI = GND to VCC
[1]
tpd is the same as tPLH and tPHL.
[2]
Typical values are measured at VCC = 3.3 V.
[3]
Typical values are measured at VCC = 5.0 V.
[4]
[3]
[4]
CPD is used to determine the dynamic power dissipation PD (W).
PD = CPD  VCC2  fi +  (CL  VCC2  fo) where:
fi = input frequency in MHz; fo = output frequency in MHz;
CL = output load capacitance in pF;
VCC = supply voltage in Volts
74AHC_AHCT1G08_Q100
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 13 July 2012
© NXP B.V. 2012. All rights reserved.
5 of 12
74AHC1G08-Q100; 74AHCT1G08-Q100
NXP Semiconductors
2-input AND gate
12. Waveforms
VM
A, B input
tPLH
tPHL
VM
Y output
mna116
Measurement points are given in Table 9.
Fig 5. Input (A and B) to output (Y) propagation delays
Table 9.
Measurement point
Type
Input
Output
VI
VM
VM
74AHC1G08-Q100
GND to VCC
0.5  VCC
0.5  VCC
74AHCT1G08-Q100
GND to 3.0 V
1.5 V
0.5  VCC
VCC
PULSE
GENERATOR
VI
VO
DUT
RT
CL
mna101
Test data is given in Table 8. Definitions for test circuit:
CL = Load capacitance including jig and probe capacitance.
RT = Termination resistance should be equal to output impedance Zo of the pulse generator.
Fig 6. Load circuitry for switching times
74AHC_AHCT1G08_Q100
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 13 July 2012
© NXP B.V. 2012. All rights reserved.
6 of 12
74AHC1G08-Q100; 74AHCT1G08-Q100
NXP Semiconductors
2-input AND gate
13. Package outline
TSSOP5: plastic thin shrink small outline package; 5 leads; body width 1.25 mm
E
D
SOT353-1
A
X
c
y
HE
v M A
Z
5
4
A2
A
(A3)
A1
θ
1
Lp
3
L
e
w M
bp
detail X
e1
0
1.5
3 mm
scale
DIMENSIONS (mm are the original dimensions)
UNIT
A
max.
A1
A2
A3
bp
c
D(1)
E(1)
e
e1
HE
L
Lp
v
w
y
Z(1)
θ
mm
1.1
0.1
0
1.0
0.8
0.15
0.30
0.15
0.25
0.08
2.25
1.85
1.35
1.15
0.65
1.3
2.25
2.0
0.425
0.46
0.21
0.3
0.1
0.1
0.60
0.15
7°
0°
Note
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
OUTLINE
VERSION
SOT353-1
REFERENCES
IEC
JEDEC
JEITA
MO-203
SC-88A
EUROPEAN
PROJECTION
ISSUE DATE
00-09-01
03-02-19
Fig 7. Package outline SOT353-1 (TSSOP5)
74AHC_AHCT1G08_Q100
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 13 July 2012
© NXP B.V. 2012. All rights reserved.
7 of 12
74AHC1G08-Q100; 74AHCT1G08-Q100
NXP Semiconductors
2-input AND gate
Plastic surface-mounted package; 5 leads
SOT753
D
E
B
y
A
X
HE
5
v M A
4
Q
A
A1
c
1
2
3
Lp
detail X
bp
e
w M B
0
1
2 mm
scale
DIMENSIONS (mm are the original dimensions)
UNIT
A
A1
bp
c
D
E
e
HE
Lp
Q
v
w
y
mm
1.1
0.9
0.100
0.013
0.40
0.25
0.26
0.10
3.1
2.7
1.7
1.3
0.95
3.0
2.5
0.6
0.2
0.33
0.23
0.2
0.2
0.1
OUTLINE
VERSION
REFERENCES
IEC
JEDEC
SOT753
JEITA
SC-74A
EUROPEAN
PROJECTION
ISSUE DATE
02-04-16
06-03-16
Fig 8. Package outline SOT753 (SC-74A)
74AHC_AHCT1G08_Q100
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 13 July 2012
© NXP B.V. 2012. All rights reserved.
8 of 12
74AHC1G08-Q100; 74AHCT1G08-Q100
NXP Semiconductors
2-input AND gate
14. Abbreviations
Table 10.
Abbreviations
Acronym
Description
CDM
Charged Device Model
DUT
Device Under Test
ESD
ElectroStatic Discharge
HBM
Human Body Model
MM
Machine Model
TTL
Transistor-Transistor Logic
MIL
Military
15. Revision history
Table 11.
Revision history
Document ID
Release date
74AHC_AHCT1G08_Q100 v.1 20120713
74AHC_AHCT1G08_Q100
Product data sheet
Data sheet status
Change notice
Supersedes
Product data sheet
-
-
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 13 July 2012
© NXP B.V. 2012. All rights reserved.
9 of 12
NXP Semiconductors
74AHC1G08-Q100; 74AHCT1G08-Q100
2-input AND gate
16. Legal information
16.1 Data sheet status
Document status[1][2]
Product status[3]
Definition
Objective [short] data sheet
Development
This document contains data from the objective specification for product development.
Preliminary [short] data sheet
Qualification
This document contains data from the preliminary specification.
Product [short] data sheet
Production
This document contains the product specification.
[1]
Please consult the most recently issued document before initiating or completing a design.
[2]
The term ‘short data sheet’ is explained in section “Definitions”.
[3]
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.nxp.com.
16.2 Definitions
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences of
use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is intended
for quick reference only and should not be relied upon to contain detailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semiconductors sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
Product specification — The information and data provided in a Product
data sheet shall define the specification of the product as agreed between
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customer have explicitly agreed otherwise in writing. In no event however,
shall an agreement be valid in which the NXP Semiconductors product is
deemed to offer functions and qualities beyond those described in the
Product data sheet.
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Limited warranty and liability — Information in this document is believed to
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changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
74AHC_AHCT1G08_Q100
Product data sheet
Suitability for use in automotive applications — This NXP
Semiconductors product has been qualified for use in automotive
applications. Unless otherwise agreed in writing, the product is not designed,
authorized or warranted to be suitable for use in life support, life-critical or
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representation or warranty that such applications will be suitable for the
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Customers are responsible for the design and operation of their applications
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Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
damage to the device. Limiting values are stress ratings only and (proper)
operation of the device at these or any other conditions above those given in
the Recommended operating conditions section (if present) or the
Characteristics sections of this document is not warranted. Constant or
repeated exposure to limiting values will permanently and irreversibly affect
the quality and reliability of the device.
Terms and conditions of commercial sale — NXP Semiconductors
products are sold subject to the general terms and conditions of commercial
sale, as published at http://www.nxp.com/profile/terms, unless otherwise
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agreement shall apply. NXP Semiconductors hereby expressly objects to
applying the customer’s general terms and conditions with regard to the
purchase of NXP Semiconductors products by customer.
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 13 July 2012
© NXP B.V. 2012. All rights reserved.
10 of 12
NXP Semiconductors
74AHC1G08-Q100; 74AHCT1G08-Q100
2-input AND gate
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between the translated and English versions.
Export control — This document as well as the item(s) described herein
may be subject to export control regulations. Export might require a prior
authorization from competent authorities.
16.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks
are the property of their respective owners.
17. Contact information
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
74AHC_AHCT1G08_Q100
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 13 July 2012
© NXP B.V. 2012. All rights reserved.
11 of 12
NXP Semiconductors
74AHC1G08-Q100; 74AHCT1G08-Q100
2-input AND gate
18. Contents
1
2
3
4
5
6
6.1
6.2
7
8
9
10
11
12
13
14
15
16
16.1
16.2
16.3
16.4
17
18
General description . . . . . . . . . . . . . . . . . . . . . . 1
Features and benefits . . . . . . . . . . . . . . . . . . . . 1
Ordering information . . . . . . . . . . . . . . . . . . . . . 1
Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2
Pinning information . . . . . . . . . . . . . . . . . . . . . . 2
Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 2
Functional description . . . . . . . . . . . . . . . . . . . 3
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 3
Recommended operating conditions. . . . . . . . 3
Static characteristics. . . . . . . . . . . . . . . . . . . . . 4
Dynamic characteristics . . . . . . . . . . . . . . . . . . 5
Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 7
Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . 9
Legal information. . . . . . . . . . . . . . . . . . . . . . . 10
Data sheet status . . . . . . . . . . . . . . . . . . . . . . 10
Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Contact information. . . . . . . . . . . . . . . . . . . . . 11
Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
© NXP B.V. 2012.
All rights reserved.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
Date of release: 13 July 2012
Document identifier: 74AHC_AHCT1G08_Q100