M AN792 A Method to Determine How Much Power a SOT23 Can Dissipate in an Application Author: Terry Cleveland Microchip Technology Inc. INTRODUCTION With the introduction of smaller surface mount (SMT) packages, it is becoming increasingly important to know their maximum power handling capability in specific applications. The power dissipation capability is directly proportional to size. As the size decreases, the amount of power that the package can dissipate decreases. Also, with the development of new high performance packages such as MSOPs, MLPs and SC70s, it is important to know how much power the package can reliably dissipate. Data sheets and package manufactures provide power handling data for packages using industry standard test setups. It is impossible to specify the capability for specific applications. The actual power handling capability can vary significantly depending on many application specific variables. This application note introduces a simple method to measure the thermal resistance from junction to ambient for small SMT components in your design. Using this method, designers can verify thermal performance in their specific applications and gain insight that will be valuable for new designs. In addition to introducing a simple method for measuring power dissipation capability, this application note will provide the reader with basic heat transfer concepts that are applicable to small SMT packages and discuss the fundamentals of thermal resistance. The measurement of thermal resistance for several examples are provided. THE BASICS OF HEAT TRANSFER The source of heat for the SMT package is created by power dissipation internal to the device. Heat is removed from the dissipating energy source by three means: conduction, convection, and radiation. Conduction The first is through the method of conduction. Heat is conducted from the junction of the power dissipating device through the silicon, package material, lead frame, printed circuit board and board coating material, if applicable. The relationship for conduction is simply: 2001 Microchip Technology Inc. dT H = – k × A × -----dx Where: H represents the rate of heat transfer, A represents the cross sectional area of the interface, dT/dx represents the Temperature Gradient across the material. The heat transfer is a function of the temperature difference, the cross sectional area and the constant “k”. “k” is the thermal conductivity of the material. Examples of thermal conductivity constants for some common materials are shown in Table 1. TABLE 1: Thermal Conductivity values for some common materials Material k (cal/m*C*s) Silver 98 Copper 93 Aluminum 48 Glass 0.24 Fiber Glass 0.011 Air (dry) 0.0057 Convection Heat is also transferred by convection, the transfer of energy (heat) through a fluid or medium (air). The transfer of heat by means of convection has an impact on the power dissipation capability of the small SMT package. For natural convection, air currents are set up by the rising of heated air and the falling of cooling air. This sets up air circulation that facilitates the removal of heat. In a forced air environment (air is being circulated by a fan), the convection heat transfer process is enhanced and the power dissipation capability is increased. Radiation Radiation, another method of heat transfer that is applicable to the SMT environment. A material whose temperature is elevated will emit more energy than the same material with a cooler temperature. If in your DS00792A-page 1 AN792 application, there is a large component dissipating a significant amount of heat, it will elevate the temperature of adjacent smaller components. ature) differential increases across the resistor (thermal resistance) for the circuit shown in Figure 1. Using the analogy, the following two equations can be written as: When considering all of the methods of heat transfer and mounting variations, it is a difficult job to determine accurately the power dissipation capability for small SMT packages in system level applications. ( TJ – TC ) R θJC = ----------------------Power THERMAL RESISTANCE DEFINED Thermal resistance defines how well a material can resist the flow of heat. The heat or energy source is in the form of power dissipation within the junction of the device. For typical semiconductor thermal management applications, low thermal resistance is desired. For insulating applications as in building materials, a large thermal resistance is desired to keep the heat either inside the controlled environment or outside, depending on the application. We can define thermal resistance in terms of a temperature difference per rate of energy (power) as shown below: ∆T R θ = --------------- Power Where: and ( TC – TA ) R θCA = ----------------------Power These equations can be used to determine the maximum allowable thermal resistance, peak junction temperature or maximum power dissipation for a given ambient temperature by rearranging terms and solving for the desired variable. Surface Mount Packages For surface mount applications, the case is somewhat ambiguous. Most manufacturers specify the thermal resistance from junction to ambient. The equation below shows the simplification for the SMT case when the thermal resistance from junction to ambient is desired. TJ – TA RθJA = -----------------Power Rθ is thermal resistance, ∆T is a difference in temperature from one boundary to another and, Power is energy per unit time. The typical boundaries used for leaded package applications include, but are not limited to, the semiconductor junction, package case, electrically insulating material, heatsink and air. In most applications, heat or energy can be approximated as a single point source and flows through the material and interfaces setting up a temperature differential from high to low. The highest temperature is most often defined as the semiconductor junction while the lowest temperature is defined most often as the ambient air temperature. An analogy exists between the thermal dynamics and electrical circuit theory to facilitate the computation of thermal resistance for electrical engineers. Figure 1 shows this thermal dynamics analogy for a TO-220 style package. The power dissipation in the junction of the device is an energy source. In this example, there are three temperatures defined. In reality, there could be many more. The three temperatures defined are: TA= Ambient Temperature, TC= Case Temperature and TJ= Junction Temperature. The power is analogous to a current source, temperature differential is analogous to voltage drop with ambient temperature defined as ground or 0 volts and thermal resistance is analogous to resistance. In this model, capacitors Cjc (junction to case) and Cca (case to ambient) can be used to model the dynamic thermal impedance of the system. As the current (power source) increases, the voltage (temper- DS00792A-page 2 The following example is used to calculate thermal resistance junction to ambient. If the junction temperature = 125°C, ambient temperature = 25°C and Power Dissipation (PD) = 333 mW, the calculated junction to ambient thermal resistance is: 125°C – 25°C R θJA = ----------------------------------- = 300°C/W 333mW WHY IS THERMAL RESISTANCE IMPORTANT? Design Input At the concept stage of the design, an approximation for the thermal resistance is needed to select the proper device and package for a particular application. In formulating this estimate, the three methods of heat transfer should be considered as well as any other environmental factors that could influence the thermal resistance, such as forced air or small enclosures that could raise the internal ambient temperature. Reliability Predictions Thermal resistance is also an important parameter used in reliability predictions at the device and system level. For example, if the junction temperature of a device is operating at 160°C versus 130°C, the failure rate for that device will increase by an order of magnitude of 10X. Accurate thermal resistance data is important for all of these reasons. 2001 Microchip Technology Inc. AN792 TJ = Junction Temperature TO-220 Example TA = Ambiant Temperature TC TJ Rθjc Cjc Rθca Cca ISOURCE PDissipation TA = Ambient Temperature FIGURE 1: Analogy between Thermal Resistance and Circuit Analysis What Factors Influence the Thermal Resistance? Many factors influence the flow of heat. They can be broken up into two types, internal factors and external factors. The internal factors are device package size, die size, package material, number of device pins, etc. All of these factors make up the thermal resistance from junction to case. For packages such as the SOT23, MSOP and SC70 that do not have a metal tab or “case”, the thermal resistance from junction to case is almost insignificant. The external factors such as thickness and size of external copper pads, size and proximity to internal copper layers, proximity to other large power dissipaters, natural or forced air flow along with many other application specific variables influence the thermal resistance enough to make the junction to case thermal resistance alone insignificant. Industry Standard Thermal Resistance Measurements Industry standards exist as a means to standardize the measurement of thermal resistance. Standards organizations such as EIA (Electronics Industry Association) and SEMI (Semiconductor Equipment and Materials International) have developed test method standards that specify tests to measure semiconductor package thermal resistance. Package and device manufacturers use these standards to test packages and devices and provide thermal resistance data for their specific products. The standards define the external parameters that affect the thermal resistance such as board size, number of layers, copper thickness (weight), stabilization time for static measurements, air flow characteristics for forced air measurements, etc. There are also specifications on how to measure device junction temperature by properly selecting and using a T.S.P. (temperature sensitive parameter) such as the forward 2001 Microchip Technology Inc. drop of a well characterized diode or the voltage drop across a saturated MOSFET with a well characterized ON resistance. By adhering to all of these specifications, a 10% error is the objective. Typical Thermal Resistance for SMT Packages TABLE 2: Common SMT Resistance, 4-Layer Board Package Thermal Package Thermal Resistance RθJA °C/Watt MSOP-10 113.1 SOIC-8 163.0 SOT223 57.3 DPAK-3 59.2 Table 2 shows the thermal resistance data that was collected using the 4-layer method described in the EIA standard JC51-7, high thermal conductivity case. The thermal resistance for a particular application can and will vary widely depending on the external factors that affect the thermal resistance from junction to ambient. TABLE 3: Common SMT Resistance, 2-Layer Board Package Thermal Package Thermal Resistance RθJA °C/Watt SOT23-3 336.0 SOT23-5 255.9 MSOP-8 206.3 SOIC-8 163.0 Table 3 shows the thermal resistance data that was collected using the 2-layer method described in the SEMI G38-87 standard. DS00792A-page 3 AN792 Both the EIA and SEMI standards specify the size of the board outline, copper weight, trace width, test chamber size, measurement settling time parameters, etc. VIN LDO VOUT IOUT GND Power = ( V IN – V OUT ) × I OUT T junction = Approximately 160°C θ JA = ( T junction – T ambient ) ⁄ P dissipated FIGURE 2: CMOS LDO Power Dissipation Analysis APPLICATION SPECIFIC THERMAL RESISTANCE (JUNCTION TO AMBIENT) The thermal resistance from junction to ambient can vary over a 2:1 range. Additional variation can occur if cooling air or natural convection is facilitated by other application specific conditions.The question that every design engineer should ask themselves is “What is the junction to ambient thermal resistance in my application?” How do I know how much power I can safely dissipate without being too conservative? Modeling is an alternative, but is complex. The technique described in this application note is for those for which modeling isn’t option or those who would like a quick verification of their model without an elaborate test set up. The method is similar to that of EIA/JEDEC standards, EIA 51-3 (Low effective Thermal Conductivity for SMT packages) and EIA 51-7 (High Effective Thermal Conductivity for SMT packages.) Refer to these references for details. MEASURING THERMAL RESISTANCE USING MICROCHIP’S LOW DROP OUT REGULATORS The proposed method utilizes the broad package offering of Microchip’s Low Dropout Regulator (LDO) family. By utilizing the internal thermal shutdown of the LDO and the ease at which the internal power dissipation can be determined, the junction to ambient thermal resistance can be measured. For the high performance CMOS LDO, the input current is equal to the output current plus the internal bias current required to operate the LDO. The operating current is typically less than 60 µA at full load, justifying the approximation for power dissipation in Figure 2. In DS00792A-page 4 order to determine the thermal resistance in your application, you must know the ambient temperature, the thermal shutdown temperature and the power dissipated internally to the LDO. The LDO thermal shutdown temperature can be measured by elevating its junction temperature into shutdown using a thermal chamber. While elevating the ambient temperature of the LDO, monitor the output voltage and note the temperature where it shuts down with a 100 µA load and an input voltage 1V above the regulated output voltage. When the LDO is shut down due to the elevated ambient temperature, the junction does not cool and the LDO will remain in shutdown until the ambient temperature is lowered. There is typically 10°C to 15°C of hysteresis between the shutdown point and the temperature that the LDO will turn back on. When the LDO shuts down because of high junction temperate due to power dissipation, the junction temperature will decrease once the shutdown point is reached because the power dissipation is now zero. Figure 3 is an oscilloscope trace of an LDO output while in thermal shutdown caused by excessive power dissipation. As shown, the LDO shuts off until the temperature cools roughly 10°C and turns back on. The power dissipation again elevates the die temperature until shutdown occurs. The frequency and duty cycle of this event are dependant on system thermal time constants and ambient temperature. FIGURE 3: LDO Operating in Thermal Shutdown PROCEDURE The following step by step procedure can be used to measure the thermal resistance of a specific application. 1. 2. Estimate RθJA using manufacturer’s provided data and previous experience. This is only done to provide a starting point, making it faster to determine the thermal resistance empirically. Using the results from step 1, calculate the required input voltage and load current required to dissipate enough power to enter thermal shutdown. Is this load current within the LDO current 2001 Microchip Technology Inc. AN792 3. 4. specification? If not, the input to output voltage difference must be increased by lowering the output voltage or raising the input voltage. Increase the LDO load current until the onset of thermal shutdown is observed. This will require a long sweep that is on the order of 1 to 2 seconds (See Figure 3). The LDO will turn off due to the die (junction) temperature exceeding its thermal shutdown point. Once it has shutdown, the die temperature will cool below the typical 10°C hysteresis and turn back on. Note that it will take some time for the temperature of the system to stabilize. Using the power dissipation measured for the onset of thermal shutdown, the ambient temperature and the known thermal shutdown junction temperature the thermal resistance can be calculated. TEST SETUP Figure 4 is a picture of the test hardware used for measuring the thermal resistance of several of Microchip’s LDOs. Shown in the picture are three boards: Microchip’s MXDEV™ analog driver board platform, thermal management stimulus board and a personality board located inside the “wind tunnel”. FIGURE 4: MXDEV Analog Driver Board Evaluation System The MXDEV analog driver board platform was used as an interface with a personal computer to facilitate the data collection in a classroom environment. MXDEV hardware and MXLAB™ software are used with Microchip’s demo boards to evaluate several analog and interface product offerings. LDO Under Test Stimulus Board The Thermal Management Stimulus board was developed to interface the MXDEV analog driver board environment with the test method for measuring thermal resistance described previously. LDO Input Voltage Two voltage sources are available within Microchip’s MXDEV environment (+9V and +5V). In an effort to dissipate the power required for the LDO under test to enter thermal shutdown, the desired input voltage to the LDO is 6.0V. Microchip’s TC105 Switching Power Supply Controller was used to convert +9V to +6V providing input voltage to the LDO under test. As shown in Figure 5, Microchip’s TC1410N MOSFET driver was used to interface the 6.0V switching regulator controller to the +9V input supply provided within the MXDEV environment by level shifting the gate drive from 0V 5V to rail - rail. Experimental Test Setup 2001 Microchip Technology Inc. DS00792A-page 5 AN792 Data Collection Fsw=300 kHz L +6V +9V +5V TC105 TC1410N C VDD Out SHDN GND FB Microchip’s 8-Channel Analog-to-Digital (A/D) Converter, MCP3208, was used to read the ambient temperature (combined with the TC1047 linear temperature sensor), the LDO input voltage, the LDO output voltage, fan speed and the LDO load current. Within the MXDEV environment, the MCP3208 interfaces with the MXDEV analog driver board to facilitate measuring the variables needed for calculating the application specific thermal resistance. Personality Board FIGURE 5: 6.0V Supply LDO Load current setting The LDO load current setting was automated through the MXDEV environment using Microchip’s Digital Potentiometer MCP42010 and single amplifier MCP601. The MCP42010 was used as a variable reference input to the MCP601 configured as an error amplifier with the loop closed around the LDO load current sense resistor. With this scheme, the LDO load current could be set within the MXLAB software and read back using the MCP3208 A/D converter to facilitate the thermal resistance measurement. The SOT23-5 package option was used for the MCP601 to interface with the 6.0V supply voltage provided to the LDO load current source. The flexibility of the single amplifier SOT23-5 package was utilized to save board space and cost when interfacing the amplifier to the 6.0V source while all other data collection linear circuits were operating off of the 5.0V rail. See Figure 6 for the circuit implementation. ILOAD LDO Output Personality boards were developed for two linear regulator families: the TC1186 150 mA low drop out linear regulator family (SOT23-5 package) and the TC1107 300 mA low drop out linear regulator family (MSOP-8 package). One board was designed to comply with the EIA standard 51-3, low thermal conductivity, and another was designed to represent a higher thermal conductivity application specific 4-layer board. Thermal Resistance Versus Airflow The personality boards are inserted into the moving air through a slot in the side of the wind tunnel. Using the combination of two Microchip devices, the TC648 and MCP42010, thermal resistance data was collected within a forced air or “wind tunnel” environment. See Figure 7 for circuit implementation. The wind tunnel is used to simulate applications with external forced airflow provided. The MCP42010 digital potentiometer was used to vary the reference input voltage of the TC648, a pulse width modulated linear input voltage Fan Speed controller. The PWM output was used to control the airflow speed within the wind tunnel shown in Figure 4. +5V 4.096V Ref. +6V Digi-Pot Input MCP601 Digi-Pot Input C TC648 VIN VAS CF C 9V FAN Input TO FAN VDD VOUT GND OTF 100% FAN Speed LED FIGURE 6: LDO Load Current Setting DS00792A-page 6 FIGURE 7: Fan Speed Control Circuit 2001 Microchip Technology Inc. AN792 EXAMPLES Microchip’s TC1186, a 5-pin SOT23 LDO was tested for thermal resistance using this method. The test vehicle was developed using the EIA 51-3 low thermal conductivity specification. The standard identifies a 3 inch by 4.5 inch board, 1 oz. copper weight and 10 mil traces fanned out a minimum of 1 inch away from the package under test. The results are shown in Table 4. TABLE 4: Example SOT23-5 using EIA 51-3 low thermal conductivity Parameter TC1186-2.5VCT VIN (V) 6.0 VOUT (V) 2.46 TJ Shutdown (°C) 176 TAMBIENT (°C) 23.1 IOUT (mA) 165.6 PDISS (mW) 586.2 RθJA (°C/W) 260.8 Microchip’s TC1107, an MSOP 8-pin LDO was tested using this method with the results shown in Table 5. The test vehicle was developed using the same EIA standard as in the previous SOT23-5 example. TABLE 5: Example MSOP-8 using EIA 51-3 low thermal conductivity Parameter TC1107-2.5VCT VIN (V) 5.98 VOUT (V) 2.45 TJ Shutdown (°C) 172 TAMBIENT (°C) 22.3 IOUT (mA) 176.6 PDISS (mW) 623.4 RθJA (°C/W) 240.1 Table 6 shows data taken for a 4-layer board using Microchip’s TC1186-2.5VCT. The board is constructed using 4 layers. The outer 2 layers are made of 2 oz. copper while the inner 2 layers are constructed of 1 oz. copper. There are 1 inch copper planes located on the internal layers directly under the LDO under test to model a typical layout utilizing ground and power planes. As shown, the thermal impedance is lower than the same device and package tested using a 2-layer board with 1 oz. copper. 2001 Microchip Technology Inc. TABLE 6: Example SOT23-5 using typical 4-layer board layout Parameter TC1186-2.5VCT VIN (V) 5.99 VOUT (V) 2.44 TJ Shutdown (°C) 164 TAMBIENT (°C) 22.2 IOUT (mA) 305.2 PDISS (mW) 1.084 RθJA (°C/W) 130.1 Table 7 shows data taken for the TC1107 packaged in an MSOP-8. The test vehicle was developed using a similar strategy, as in the previous example shown in Table 6. TABLE 7: Example MSOP-8 using a typical 4-layer board layout. Parameter TC1107-2.5VCT VIN (V) 5.99 VOUT (V) 2.46 TJ Shutdown (°C) 172° TAMBIENT (°C) 22.1 IOUT (mA) 279.4 PDISS (mW) 986.3 RθJA (°C/W) 152.0 DATA SUMMARY The thermal resistance data is summarized in Table 8. Data for the 2-Layer boards display how well the MSOP-8 and the SOT23-5 compare when both were tested to the same EIA Low Thermal Conductivity Standard. The MSOP-8 thermal resistance for this particular application is lower by ≈8%. The EIA standard specifies a 10 mil trace width connection to the pins. Looking at the 4-Layer data, the SOT23-5 has a lower thermal resistance than the MSOP-8 by approximately 15%. For this case, larger traces were used for the SOT23-5 than the MSOP-8 because the pin width and spacing are larger for the SOT23-5 package. In a practical design, the SOT23-5 power dissipation capability may be higher than the MSOP-8. The thermal resistance for Junction-to-Case shown in the right hand column is a good ideal comparison between different packages. The Junction-to-Case thermal resistance is measured using as close to an ideal heatsink as possible. This thermal resistance represents the theoretical limit for minimum thermal resistance from junction to ambient. DS00792A-page 7 AN792 TABLE 8: CONCLUSION Thermal Resistance Summary Device Board RθJA(°C/W) RθJC(°C/W) SOT23-5 2 Layer 260.8 81.0 SOT23-5 4 Layers 130.1 81.0 MSOP-8 2 Layers 240.1 39.1 MSOP-8 4 Layers 152.0 39.1 Thermal Resistance With Forced Airflow 2-Layer Low Thermal Conductivity application Figure 8 displays how the thermal resistance changed for both the SOT23-5 and the MSOP-8 packages for the 2-layer low thermal conductivity application described previously when cooling airflow was varied. Thermal Resistance (C/Watt) 270 .0 250 .0 230 .0 REFERENCES AND REFERENCED STANDARDS S O T 23-5 2 -La yer b oa rd 210 .0 190 .0 1. M S O P -8 2-L aye r b o ard 170 .0 150 .0 0.0 100 .0 200 .0 300 .0 400 .0 500 .0 A irflo w (L in ea r F eet / M in u te) FIGURE 8: Thermal Resistance vs. Airflow for 2-Layer Board 4-Layer 1” Square Copper Internal Planes Application Figure 9 displays how the thermal resistance changed for both the SOT23-5 and the MSOP-8 packages for the 4-layer appplication described previously as cooling air was varied. Thermal Resistance (C/Watt) 160.0 150.0 MSOP-8 4-Layer Board 140.0 130.0 120.0 SOT23-5 4-Layer Board 110.0 100.0 0.0 100.0 200.0 300.0 When developing products using small surface mount components, the thermal resistance will vary greatly depending on the specifics of the application. All of the environmental conditions and methods of heat transfer contribute to make up the actual power dissipation capability for the specific application. Data sheets and standards provide useful information to compare packages and devices. The data provided is for a specific test specification or set of conditions. This data does not apply to your specific application. The information provided can be used to compare your specific application to the test standard and estimate the actual application specific thermal resistance. By using the proposed method outlined in this application note, the actual thermal resistance can be measured allowing you to optimize your design. Once the thermal resistance of the specific application is known, the guess work is taken out of the design. 400.0 500.0 Airflow (Linear Feet / Min.) D. Halliday, R. Resnick, Fundamentals of Physics (New York: John Wiley and Sons., Inc., 1986). 2. EIA/JESD51, Methodology for the thermal measurement of component packages. 3. EIA/JESD51-1, Integrated circuit thermal measurement method - electrical test method. 4. EIA/JESD51-2, Integrated circuit thermal test method environmental conditions - natural convection (still air). 5. EIA/JESD51-6, Integrated circuit thermal test method environmental conditions - forced convection (moving air). 6. EIA/JESD51-3, Low effective thermal conductivity test board for leaded surface mount packages. 7. EIA/JESD51-7, High effective thermal conductivity test board for leaded surface mount packages. 8. EIA/JEDEC Publication, EIA/JEP129 Thermal test chip guideline. 9. SEMI G38-87, Still and forced air junction-toambient thermal resistance measurements. 10. SEMI G42-88, Thermal test board standardization, Tj-a measurements. FIGURE 9: Thermal Resistance vs. Airflow for 4-Layer Board DS00792A-page 8 2001 Microchip Technology Inc. AN792 Information contained in this publication regarding device applications and the like is intended through suggestion only and may be superseded by updates. It is your responsibility to ensure that your application meets with your specifications. No representation or warranty is given and no liability is assumed by Microchip Technology Incorporated with respect to the accuracy or use of such information, or infringement of patents or other intellectual property rights arising from such use or otherwise. Use of Microchip’s products as critical components in life support systems is not authorized except with express written approval by Microchip. No licenses are conveyed, implicitly or otherwise, under any intellectual property rights. Trademarks The Microchip name and logo, the Microchip logo, PIC, PICmicro, PICMASTER, PICSTART, PRO MATE, KEELOQ, SEEVAL, MPLAB and The Embedded Control Solutions Company are registered trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. 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