CC26xx HW Training Layout Considerations Fredrik Kervel, Bluetooth Smart Applications 1 Reference Schematic VDD_EB VDDS Decoupling Capacitors VDDS Pin 11 Pin 28 C2 C3 C4 C6 C7 DNM 100nF 100nF 10uF 100nF BLM18HE152SN1 2 1 FL1 Pin 18 DCDC_SW2 VDDS VDDS R1 100k 6 DIO_0 7 DIO_1 8 DIO_2 9 DIO_3 10 DIO_4 15 DIO_5/JTAG_TDO DIO_6/JTAG_TDI16 20 DIO_7 21 DIO_8 22 DIO_9 23 DIO_10 24 DIO_11 25 DIO_12 26 DIO_13 27 DIO_14 nRESET JTAG_TCK JTAG_TMS C20 100nF 19 14 13 12 C19 1uF 33 U1 DIO_0 DIO_1 DIO_2 DIO_3 DIO_4 DIO_5 DIO_6 DIO_7 DIO_8 DIO_9 DIO_10 DIO_11 DIO_12 DIO_13 DIO_14 RESET_N JTAG_TCKC JTAG_TMSC VDDR VDDS VDDS2 VDDS_DCDC VDDR VDDR DCDC_SW RX_TX RF_N RF_P X24M_P X24M_N X32K_Q2 X32K_Q1 L1 10uH Place L1 and C8 close to pin 17 10uF 100nF C10 C16 100nF DNM C31 17 DCDC_SW L21 2.4nH 3 2 1 RFN 6.8pF A1 C21 1 2 1 1pF 1 L10 6.8nH X24M_P X24M_N RFP 5 4 2 C11 VSS CC2650F128RHB 1 L11 2.4nH 2 L12 2 1 C12 2nH C13 DNM 1pF L13 2nH 2 C14 R12 12pF 0 3 1 C15 2.4GHz DNM R12 and C15 for antenna matching Y2 24MHz Y1 1 32.768kHz Pin 32 2 DCOUPL 12pF C9 RX_TX 1pF C17 C8 VDDR 28 11 18 29 32 31 30 VDDR Decoupling Capacitors Pin 29 1 3 C18 12pF 2 4 2 Reference Layout • Follow the reference layout! • All reference designs are for 2-layer PCBs – Thickness = 0.8 mm – 4 (or more) layers is also ok • Place the RF match close to the RF pins • Solid ground plane – No signal traces underneath the RF path! – Ground return paths between the antenna / RFcomponents and CC26xx must be uninterrupted – Keep as much signal- and power routing on the top layer as possible • Place decoupling caps as close to the VDD pins as possible – Ground return paths between decoupling caps and CC26xx should be short and direct • DC/DC-regulator must have a short and direct ground connection to CC26xx 3 Reference Layout – Differential output • Antenna match components • Longer RF traces must have 50 ohm impedance • Notice orientation of pi-filter layout – Shunt components oriented opposite way to avoid crosstalk 4 Reference Layout – Differential output • Antenna match components • Longer RF traces must have 50 ohm impedance • Notice orientation of pi-filter layout – Shunt components oriented opposite way to avoid crosstalk • No traces underneath the RF path – Will increase the impedance of the RF ground return paths and, even worse, create current loops – May lead to reduced RF performance and spuriuos emission 5 Reference Layout – Single ended output 6 Reference Layout – Everything else • Make sure decoupling ground paths are short and direct (low impedance) • Make sure the DCDC switch ground path is short and direct (low impedance) • Try to locate as much routing as possible on the top layer in 2-layer PCBs 7 Reference Layout – Everything else • Make sure decoupling ground paths are short and direct (low impedance) • Make sure the DCDC switch ground path is short and direct (low impedance) • Try to locate as much routing as possible on the top layer in 2-layer PCBs 8 Reference Layout – Trace impedance • For RF traces longer than a certain length the impedance should be controlled • TXLine is a free tool for PCB trace impedance calculations – http://www.awrcorp.com/products/optional-products/tx-line-transmission-line-calculator 9