Signal Integrity Evaluation of Bourns Lightning Protection Solutions with HighSpeed Interfaces National Semiconductor Lab Report Many high-speed interface devices, such as cable drivers and equalizers provide nominal or even enhanced Electrical Overstress protection. But depending upon the end application, extended protection from severe overstress may be required. In the past, the loading of the protection devices impacted overall performance of the interface. Recent technology advancements in the area of protection devices has occurred where robust overstress protection is now provided without major impact to performance. This Lab Report discusses the Bourns Lightning Solutions and their use on multiple high-speed, extended length interface applications. Bourns lightning protection solutions suitable for National Semiconductor’s high speed interface devices consist of gas discharge tubes (GDT) and transient blocking unit (TBUTM) protectors. Table 1 summarizes common lightning protection standards in the industry and Bourns devices suitable for each of the standards. Note the low capacitance loading of these devices. Standard: GR-1089 Intra-B GR-1089 Intra-B Enhanced IEC610004-5 Class 0-3 IEC610004-5 Class 4-5 Lightning 800V/100A Diff 1500V/100A Com 5000V/500A 2000V/48A 4000V/95A 6000V/150A Power Cross 120V 230V - - 230V TBU GDT C650 G5500AS C850 G5200AS C650 G5500AS C850 G5200AS C850 G5200AS Resistance Capacitance 10Ω 1 pF 14Ω 1 pF 10Ω 1 pF 14Ω 1 pF 14Ω 1 pF TABLE 1. Common Lightning Protection Standards and Recommended Bourns Solutions Doc. LVDS_1000_1_0 Rev 1.0 1 of 12 National Semiconductor Corp. ITU-T K.21 As Table 1 indicates, two combinations of GDT and TBU devices (one is G5500AS and C650; the other is G5200AS and C850) cover all five listed lightning protection standards. This lab report documents both a time and frequency domain evaluation of each of the Bourns lightning solutions as well as their impact on performance to National Semiconductor’s interface devices, DS15BA101, DS15EA101 and DS25BR150 in typical high-speed point-to-point applications. Test Boards Figure 1 illustrates the GDT&TBU PCB board developed for high-speed signal integrity evaluation of Bourns lightning solutions. The board features high bandwidth SMA connectors, controlled 50 ohm impedance microstrips and inner layer cutouts under the GDT and TBU devices for minimal capacitive parasitics. Figure 1. GDT&TBU High Speed PCB The National DriveCable02EVK was used for the evaluation with the DS15BA101 and DS15EA101 Cable Driver and Equalizer. The National DS25BR150EVK was used for the evaluation with the DS25BR150 high-speed LVDS Buffer / Repeater device. Doc. LVDS_1000_1_0 Rev 1.0 2 of 12 National Semiconductor Corp. TDR Step Response / Impedance Profile Figure 2 illustrates the TDR (Time Domain Reflectometry) test setup. A TDR signal was applied to the GDT/TBU Test board and the impedance profile was recorded. Figure 2. TDR Test Setup Figure 3 illustrates the impedance profile of the GDT&TBU board with the G5500AS and C650 devices; Figure 4 with the G5200AS and C850 devices. The red line indicates the profile calculated based on the 25ps rise time TDR step response. The white line is the impedance profile when passed through a 100 ps rise time filter. Note that 100 ps is the typical rise time of the LVDS drivers requiring the lightning protection. SMA GDT TBU Pads Figure 3. GTD&TBU Board with G5500AS and C650 Impedance Profile Doc. LVDS_1000_1_0 Rev 1.0 3 of 12 National Semiconductor Corp. SMA GDT TBU Pads Figure 4. GTD&TBU Board with G5200AS and C850 Impedance Profile Comments/Conclusions: The filtered impedance profile of the GDT&TBU board with both solutions is within the 40-60 ohm range and indicates acceptable impedance control of the signal path. Minimal impact to signal integrity of the link is expected. Doc. LVDS_1000_1_0 Rev 1.0 4 of 12 National Semiconductor Corp. Frequency Domain Responses: S21, S11 and S22 Figures 5, 6 and 7 illustrate the GDT&TBU board insertion (S21) and return (S11 & S22) losses respectively. G5500AS_C650 G5200AS_C850 0 -3 Insertion Loss [dB] -6 -9 -12 -15 -18 -21 0 1000 2000 3000 4000 5000 f [MHz] Figure 5. GTD&TBU Board Insertion Loss (S21) G5500AS_C650 G5200AS_C850 0 Return Loss [dB] -5 -10 -15 -20 -25 -30 0 1000 2000 3000 4000 5000 f [MHz] Figure 6. GTD&TBU Board Return Loss (GDT side) (S11) Doc. LVDS_1000_1_0 Rev 1.0 5 of 12 National Semiconductor Corp. G5500AS_C650 G5200AS_C850 0 Return Loss [dB] -5 -10 -15 -20 -25 -30 0 1000 2000 3000 4000 5000 f [MHz] Figure 7. GTD&TBU Board Return Loss (TBU side) (S22) Comments/Conclusions: Based on the insertion loss, the -3 dB bandwidth of the GDT&TBU board is around 3 GHz for both solutions. The return loss is below -15 dB limit up to about 1.5 GHz if measured from the GDT side and up to 2 GHz if measured from the TBU side. These characteristics indicate that the solution can be used optimally at bit rates up to 2 Gbps and may be acceptable at bit rates as high as 3 Gbps. Doc. LVDS_1000_1_0 Rev 1.0 6 of 12 National Semiconductor Corp. Time Domain Evaluation with the DS25BR150 Figure 8 illustrates the DS25BR150 test setup with the GDT&TBU solution inserted on both sides of a short coaxial cable. Figure 8. Test Setup with the DS25BR150 Test Details: Test Equipment List • Advantest D3186 Pattern Generator • Tektronix CSA8000 Oscilloscope Hardware List • DS25BR150 Evaluation Kit; Part Number: DS25BR150EVK Conditions • ta = 25o C • VDD = 3.3 V • Data collected on July 6, 2007; LVDS Applications Lab, NSME; Results: Table 2 (next page) shows a set of eye diagrams taken at the output of the second LVDS buffer under the two configuration scenarios: one scenario with the GDT&TBU boards inserted and one without the boards. Comments/Conclusions: The time domain test results confirm the conclusions made based on the frequency domain measurements: the GDT&TBU solution may be used at bit rates up to 3 Gbps. The added jitter due to the GDT&TBU board was only approximately 15-20 ps at the key bit rates (1.5, 2.5 and 3.125 Gbps). Table 2 – (next page) - illustrates an Eye Diagram Comparison of the Link with and without the GDT&TBU Solution Doc. LVDS_1000_1_0 Rev 1.0 7 of 12 National Semiconductor Corp. 1.5 Gbps NRZ PRBS-7, w/o GDT&TBU, TJ=24 ps 1.5 Gbps NRZ PRBS-7, with GDT&TBU, TJ=42 ps 2.5 Gbps NRZ PRBS-7, w/o GDT&TBU, TJ=25 ps 2.5 Gbps NRZ PRBS-7, with GDT&TBU, TJ=45 ps 3.125 Gbps NRZ PRBS-7, w/o GDT&TBU, TJ=35 ps 3.125 Gbps NRZ PRBS-7, with GDT&TBU, TJ=52 ps Doc. LVDS_1000_1_0 Rev 1.0 8 of 12 National Semiconductor Corp. Time Domain Evaluation with the Cable Extender Chipset Figure 9 illustrates the Cable Extender Chipset (DS15BA101 and DS15EA101) test setup with the GDT&TBU solution inserted on both side of a relatively long CAT5e cable. Figure 9. Test Setup with the Cable Extender Chipset Test Details: Test Equipment List • Advantest D3186 Pattern Generator • Tektronix TDS 6604 Oscilloscope Hardware List • DS15BA101 and DS15EA101 Evaluation Kit; Part Number: DriveCable02EVK • 25m, 50m, 75m and 100m Belden 1700A (CAT5e) Conditions • ta = 25o C • VDD = 3.3 V • Data collected on July 6, 2007; LVDS Applications Lab, NSME; Results: Figures 10, 11, 12 and 13 show jitter as a function of data/bit rate curves for the three test cases: A: configuration (Figure 9) without the GDT&TBU boards inserted, B: configuration (Figure 9) with the GDT&TBU boards inserted, C: configuration (Figure 9) with the GDT&TBU boards inserted and the DS15BA101’s RVO tweaked to compensate for the series resistance of the TBUs. The 0.5 UI (unit interval = 1/ Bit Rate) is an arbitrary jitter limit. Doc. LVDS_1000_1_0 Rev 1.0 9 of 12 National Semiconductor Corp. 0.5 UI A B C 600 Jitter [ps] 500 400 300 200 100 0 250 500 750 1000 1250 1500 1750 2000 Data Rate [Mbps] Figure 10. Jitter as a Function of Data Rate – 25m CAT5e 0.5 UI A B C 600 Jitter [ps] 500 400 300 200 100 0 250 500 750 1000 1250 1500 1750 2000 Data Rate [Mbps] Figure 11. Jitter as a Function of Data Rate – 50m CAT5e Doc. LVDS_1000_1_0 Rev 1.0 10 of 12 National Semiconductor Corp. 0.5 UI A B C 800 700 Jitter [ps] 600 500 400 300 200 100 0 250 500 750 1000 1250 1500 1750 2000 Data Rate [Mbps] Figure 12. Jitter as a Function of Data Rate – 75m CAT5e 0.5 UI A B C 800 700 Jitter [ps] 600 500 400 300 200 100 0 250 500 750 1000 1250 1500 1750 2000 Data Rate [Mbps] Figure 13. Jitter as a Function of Data Rate – 100m CAT5e Comments/Conclusions: The TBU series resistance impacts the performance of the adaptive equalizer (DS15EA101) especially with longer cables (75 and 100m), however, the increase in the launch amplitude on the transmit side of the link (Change of the DS15BA101’s RVO from 953 to 750 ohms) helped to subside the impact to acceptable levels. The use of the Bourns CA family, with lower series resistance, further reduces these minor impacts. Doc. LVDS_1000_1_0 Rev 1.0 11 of 12 National Semiconductor Corp. Overall Conclusions: This lab report investigated both GDT and TBU impact on high-speed interface links. A TDR was used to verify that the impedance impact to the link was minimal. Frequency domain analysis was checked next and S21, S11 and S22 all showed minimal degradation or impact. Finally two applications where operated at speed, and eye patterns were collected to show the time domain analysis and overall jitter, again impact was minimal and the links operated at full specifications. When enhanced and extended protection for severe electrical overstress, such as lightning protection is required in an application, the Bourns GDT and TBU protection devices offer excellent protection with minimal impact to the highspeed links. References: National LVDS Resources LVDS Feature website http://www.national.com/analog/lvds The DriveCable02EVK was used for the evaluation with the DS15BA101 and DS15EA101. More info about the DriveCable02EVK can be found here: http://www.national.com/pf/DS/DS15EA101.html#Boards The DS25BR150EVK was used for the evaluation with the DS25BR150. More info about the DS25BR150EVK can be found here: http://www.national.com/pf/DS/DS25BR150.html#Boards Bourns Resources TBU Surge Protection Datasheets, Brochure and White Paper http://www.bourns.com/ProductLine.aspx?name=tbu http://www.bourns.com/data/global/pdfs/C650_C850.pdf http://www.bourns.com/data/global/pdfs/bourns_tbu_short_form.pdf http://www.bourns.com/data/global/pdfs/Bourns_tbu_white_paper.pdf Doc. LVDS_1000_1_0 Rev 1.0 12 of 12 National Semiconductor Corp.