BGS17GA14 SP7T Diversity Antenna Switch with GPIO Interface Data Sheet Revision 3.0 - 2016-02-29 Edition 2016-02-29 Published by Infineon Technologies AG 81726 Munich, Germany c 2016 Infineon Technologies AG All Rights Reserved. LEGAL DISCLAIMER The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics. With respect to any examples or hints given herein, any typical values stated herein and/or any information regarding the application of the device, Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind, including without limitation, warranties of non-infringement of intellectual property rights of any third party. Information For further information on technology, delivery terms and conditions and prices, please contact the nearest Infineon Technologies Office (www.infineon.com). Warnings Due to technical requirements, components may contain dangerous substances. For information on the types in question, please contact the nearest Infineon Technologies Office. Infineon Technologies components may be used in life-support devices or systems only with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered. BGS17GA14 Revision History Document No.: BGS17GA14__v3.0.pdf Revision History: Rev. v3.0 Previous Version: 2.0 Page Subjects (major changes since last revision) 12 Carrier tape drawing updated Trademarks of Infineon Technologies AG TM TM TM TM TM TM TM TM TM TM TM µHVIC , µIPM , µPFC , AU-ConvertIR , AURIX , C166 , CanPAK , CIPOS , CIPURSE , CoolDP , CoolGaN , TM TM TM TM TM TM TM TM TM TM COOLiR , CoolMOS , CoolSET , CoolSiC , DAVE , DI-POL , DirectFET , DrBlade , EasyPIM , EconoBRIDGE , TM TM TM TM TM TM TM TM TM EconoDUAL , EconoPACK , EconoPIM , EiceDRIVER , eupec , FCOS , GaNpowIR , HEXFET , HITFET , TM TM TM TM TM TM TM TM TM TM HybridPACK , iMOTION , IRAM , ISOFACE , IsoPACK , LEDrivIR , LITIX , MIPAQ , ModSTACK , my-d , TM TM TM TM TM TM TM TM TM NovalithIC , OPTIGA , OptiMOS , ORIGA , PowIRaudio , PowIRStage , PrimePACK , PrimeSTACK , PROFET , TM TM TM TM TM TM TM TM TM PRO-SIL , RASIC , REAL3 , SmartLEWIS , SOLID FLASH , SPOC , StrongIRFET , SupIRBuck , TEMPFET , TM TM TM TM TM TRENCHSTOP , TriCore , UHVIC , XHP , XMC . Other Trademarks All referenced product or service names and trademarks are the property of their respective owners. Trademarks updated November 2015 Data Sheet 3 Revision 3.0 - 2016-02-29 BGS17GA14 Contents Contents 1 Features 5 2 Product Description 5 3 Maximum Ratings 6 4 Operation Ranges 7 5 RF Characteristics 8 6 GPIO Specification 9 7 Package related information 9 List of Figures 1 2 3 4 5 6 BGS17GA14 block diagram Footprint, top view . . . . . Package Outline Drawing . Land Pattern Drawing . . . Laser marking . . . . . . . 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Maximum Ratings, Table I . Maximum Ratings, Table II . Operation Ranges . . . . . RF Input Power . . . . . . . RF Characteristics . . . . . IMD2 Testcases . . . . . . IMD3 Testcases . . . . . . GPIO Truth Table . . . . . . Mechanical Data . . . . . . Pin definition . . . . . . . . Data Sheet 4 Revision 3.0 - 2016-02-29 BGS17GA14 BGS17GA14 1 Features • 7 high-linearity, interchangeable RX ports • Low insertion loss • Low harmonic generation • High port-to-port-isolation • Suitable for Edge / C2K / LTE / WCDMA Applications • 0.1 to 3.8 GHz coverage • No decoupling capacitors required if no DC applied on RF lines • On chip control logic including ESD protection • General Purpose Input-Output (GPIO) Interface • Small form factor 2.0 mm x 2.0 mm • No power supply blocking required • High EMI robustness • RoHS and WEEE compliant package 2 Product Description The BGS17GA14 is a Single Pole Eight Throw (SP8T) Diversity Switch Module optimized for wireless applications up to 3.8 GHz. As part of a pin- and functional-compatible SP3T-SP8T product family it has been designed to meet the requirements of chipset reference designs. The module comes in a miniature ATSLP package and comprises of a high power CMOS SP8T switch with integrated GPIO interface. This RF switch is a perfect solution for multimode handsets based on LTE and WCDMA. The switch device configuration is shown in Fig. 1. The switch is controlled via a GPIO interface. It features DC-free RF ports and unlike GaAs technology, external DC blocking capacitors at the RF ports are only required if DC voltage is applied externally. Table 1: Ordering Information Type Package Marking BGS17GA14 ATSLP-14 G7 Data Sheet 5 Revision 3.0 - 2016-02-29 BGS17GA14 RX1 RX2 RX3 RX4 ANT RX5 RX6 RX7 SP7T VDD V1 GPIO Interface V2 V3 GND Figure 1: BGS17GA14 block diagram 3 Maximum Ratings Table 2: Maximum Ratings, Table I at TA = 25 ◦C, unless otherwise specified Parameter Symbol Min. Typ. Max. Frequency Range f 0.1 – Supply voltage Vdd -0.5 – Storage temperature range TSTG Junction temperature RF input power at all Rx ports Values -55 – Unit Note / Test Condition – GHz 1) 3.6 V – 150 ◦ C – C – Tj – – 125 ◦ PRF _Rx – – 32 dBm CW 2) VESDCDM −500 – +500 V All pins ESD capability, HBM 3) VESDHBM −1 – +1 kV Digital, digital versus RF −1 – +1 V RF −8 – +8 kV ANT versus system GND, ESD capability, CDM ESD capability, system level 4) VESDANT with 27 nH shunt inductor 1) There is also a DC connection between switched paths. The DC voltage at RF ports VRFDC has to be 0V. 2) Field-Induced Charged-Device Model JESD22-C101. Simulates charging/discharging events that occur in production equipment and processes. Potential for CDM ESD events occurs whenever there is metal-to-metal contact in manufacturing. 3) Human Body Model ANSI/ESDA/JEDEC JS-001-2012 (R = 1.5 kΩ, C = 100 pF). 4) IEC 61000-4-2 (R = 330 Ω, C = 150 pF), contact discharge. Data Sheet 6 Revision 3.0 - 2016-02-29 BGS17GA14 Table 3: Maximum Ratings, Table II at TA = 25 ◦C, unless otherwise specified Parameter Symbol Thermal resistance junction - solder- Values Unit Note / Test Condition – K/W – – 0 V No DC voltages allowed on – Vdd +0.7 V – Unit Note / Test Condition Min. Typ. Max. RthJS – 60 VRFDC 0 VCtrlx -0.7 ing point Maximum DC-voltage on RF-Ports and RF-Ground RF-Ports GPIO control voltage levels 4 Operation Ranges Table 4: Operation Ranges Parameter Symbol Values Min. Typ. Max. Supply voltage Vdd 2.4 3.0 3.4 V – Supply current Idd – 75 175 µA – GPIO control voltage high VCtrl_H 1.35 – Vdd V – GPIO control voltage low VCtrl_L 0 – 0.45 V – GPIO control input capaci- CCtrl – – 2 pF – TA -30 25 85 ◦ – tance Ambient temperature C Table 5: RF Input Power Parameter Symbol Rx ports (50 Ω) PRF _Rx Data Sheet Values Min. Typ. Max. – – 28 7 Unit Note / Test Condition dBm – Revision 3.0 - 2016-02-29 BGS17GA14 5 RF Characteristics Table 6: RF Characteristics at TA = −30 ◦C...85 ◦C, PIN = 0 dBm, Supply Voltage Vdd = 2.4 V...3.4 V, unless otherwise specified Parameter Symbol Values Unit Note / Test Condition Min. Typ. Max. – 0.27 0.35 dB 698–960 MHz – 0.41 0.56 dB 1428–1990 MHz – 0.48 0.58 dB 1920–2170 MHz – 0.53 0.62 dB 2170–2690 MHz – 0.56 0.71 dB 3400–3600 MHz – 0.56 0.74 dB 3600–3800 MHz 20 24 – dB 698–960 MHz 14 19 – dB 1428–1990 MHz 13 17 – dB 1920–2170 MHz 12 15 – dB 2170–2690 MHz 11 14 – dB 3400–3600 MHz 11 14 – dB 3600–3800 MHz 32 26 50 41 – – dB dB 698–960 MHz 1428–1990 MHz 24 39 – dB 1920–2170 MHz 22 37 – dB 2170–2690 MHz 19 33 – dB 3400–3600 MHz 19 32 – dB 3600–3800 MHz 105 – dBc 25 dBm, 50 Ω, CW mode 96 – dBc 25 dBm, 50 Ω, CW mode 1) Insertion Loss All Rx Ports Return Loss IL 1) All Rx Ports RL 1) Isolation All Rx Ports ISO 1) Harmonic Generation (UMTS Band 1, Band 5) 2nd harmonic generation rd 3 harmonic generation PH2 92 PH3 88 1) Intermodulation Distortion (UMTS Band 1, Band 5) 2nd order intermodulation IMD2 low – -105 -100 dBm IMT, US Cell (see Tab. 7) order intermodulation IMD3 – -110 -105 dBm IMT, US Cell (see Tab. 8) order intermodulation IMD2 high – -115 -110 dBm IMT, US Cell (see Tab. 7) RF Rise Time tRT – – 2 µs 10 % to 90 % RF signal Switching Time tST – 2 4 µs Power Up Settling Time tPup – 10 25 µs rd nd 3 2 Switching Time 1) On 50 % Ctrl signal to 90 % RF signal After power down mode application board without any matching components. Data Sheet 8 Revision 3.0 - 2016-02-29 BGS17GA14 Table 7: IMD2 Testcases Band CW tone 1 (MHz) CW tone 1 (dBm) IMT 1950 20 US Cell 835 20 CW tone 2 (MHz) CW tone 2 (dBm) 190 (IMD2 low) -15 4090 (IMD2 high) 45 (IMD2 low) -15 1715 (IMD2 high) Table 8: IMD3 Testcases Band CW tone 1 (MHz) CW tone 1 (dBm) CW tone 2 (MHz) CW tone 2 (dBm) IMT 1950 20 1760 -15 US Cell 835 20 790 -15 6 GPIO Specification Table 9: Modes of Operation (Truth Table) Control Inputs State Mode V1 V2 V3 1 RX1-ANT 0 0 0 2 RX2-ANT 0 0 1 3 RX3-ANT 0 1 0 4 RX4-ANT 0 1 1 5 RX5-ANT 1 0 0 6 RX6-ANT 1 0 1 7 RX7-ANT 1 1 0 8 50Ω 1 1 1 7 Package related information The switch has a package size of 2000 µm in x-dimension and 2000 µm in y-dimension with a maximum deviation of ±50 µm in each dimension. Fig. 2 shows the footprint from top view. The definition of each pin can be found in Tab. 11. In addition a recommendation for the land pattern is displayed in Fig. 4 followed by information regarding laser marking (see Fig. 5). Table 10: Mechanical Data Parameter Symbol Value Unit Package X-Dimension X 2000 ± 50 µm Package Y-Dimension Y 2000 ± 50 µm Package Height H 0.65 max µm Data Sheet 9 Revision 3.0 - 2016-02-29 BGS17GA14 RX7 ANT NC 14 13 12 RX5 1 11 RX6 RX3 2 10 RX4 Top View RX1 3 9 RX2 VDD 4 8 NC 5 6 7 V3 V2 V1 Figure 2: Footprint, top view Table 11: Pin Definition No. Name Pin Type Function 0 GND GND RF ground; die pad 1 RX5 I/O RX port 5 2 RX3 I/O RX port 3 3 RX1 I/O RX port 1 4 VDD PWR VDD supply 5 V3 I GPIO control pin 6 V2 I GPIO control pin 7 V1 I GPIO control pin 8 NC 9 RX2 I/O RX port 2 10 RX4 I/O RX port 4 11 RX6 I/O RX port 6 12 NC 13 ANT I/O Antenna port 14 RX7 I/O RX port 7 Data Sheet Not connected Not connected 10 Revision 3.0 - 2016-02-29 BGS17GA14 Bottom view 0.1 B 0.18 ±0.05 8x 8 9 10 11 0.1 A 0.2 ±0.05 8x 7 12 6 13 5 0.1 A Pin 1 marking 3 2 1 0.45 0.1 A 14 4 B 1 ±0.05 0.2 ±0.05 6x 0.4 1 ±0.05 1.69 2 x 0.4 = 0.8 0.02 MAX. STANDOFF 2 ±0.05 2 ±0.05 A 0.1 B 0.6 ±0.05 0.1 B Top view 0.18 ±0.05 6x 3 x 0.45 = 1.35 1.69 Figure 3: Package Outline Drawing 14x 0.25 14x 0.25 0.45 0.4 0.845 0.85 0.845 1 0.4 14x 0.23 0.85 14x 0.23 1 0.45 0.845 0.845 Copper 0.225 0.225 Stencil apertures Solder mask Figure 4: Land Pattern Drawing Data Sheet 11 Revision 3.0 - 2016-02-29 BGS17GA14 12 Type code Date code (YW) Pin 1 marking Figure 5: Laser marking 4 2.2 8 Pin 1 marking 0.75 2.2 Figure 6: Carrier Tape Data Sheet 12 Revision 3.0 - 2016-02-29 w w w . i n f i n e o n . c o m Published by Infineon Technologies AG