2DAA-F6R

oH
V SC
AV ER OM
AI SIO PL
LA N IA
BL S NT
E
Features
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*R
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Applications
Lead free versions available
RoHS compliant (lead free version)*
ESD protection > 25k volts
Protects four unidirectional lines
Small SMT package
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Cell phones
PDAs and notebooks
Digital cameras
MP3 players and GPS
2DAA-F6R - Integrated Passive & Active Device
General Information
The 2DAA-F6R device provides ESD protection for the I/O
port of portable electronic devices such as cell phones,
modems and PDAs. The device incorporates four TVS
unidirectional diodes configured for interfacing to external
lines.
The ESD protection provided by the component enables
an I/O port to withstand a minimum ±8 KV Contact / ±15 KV
Air Discharge per the ESD test method specified in IEC
61000-4-2. The device measures 1.00 mm x 1.50 mm and
is available in a 6 bump Flip Chip package intended to be
mounted directly onto an FR4 printed circuit board. The
Flip Chip device meets typical thermal cycle and bend test
specifications without the use of an underfill material.
SOLDER
BUMPS
SILICON
DIE
E
T
E
L
O
S
B
O
Electrical & Thermal Characteristics
Electrical Characteristics
(TA = 25 °C unless otherwise noted)
Per TVS Diode Specification
Capacitance @ 0 V 1 MHz
Rated Standoff Voltage
Breakdown Voltage @ 1 mA
Clamping Voltage
@ IP = 5 A tP = 8/20 µs
@ IPP = 24 A tP = 8/20 µs
Leakage Current @ 5 V
ESD Protection: IEC 61000-4-2
Contact Discharge
Air Discharge
Surge Protection: IEC 61000-4-5
8/20 µs - Level 2 (Line - Gnd)
8/20 µs - Level 3 (Line - Line)
Symbol
Minimum
Nominal
Maximum
Unit
C
VWM
VBR
120
150
5.0
180
pF
V
V
9.5
11
10
V
V
µA
6.0
VC
VC
IR
1
±8
±15
kV
kV
24
24
A
A
Thermal Characteristics
(TA = 25 °C unless otherwise noted)
Operating Temperature Range
Storage Temperature Range
Peak Pulse Power (tP = 8/20 µs)
*RoHS Directive 2002/95/EC Jan 27 2003 including Annex
Specifications are subject to change without notice.
Customers should verify actual device performance in their specific applications.
TJ
TSTG
PPP
-40
-55
25
25
+85
+150
300
°C
°C
W
2DAA-F6R - Integrated Passive & Active Device
Mechanical Characteristics
This is a silicon-based device and is packaged using chip scale packaging technology. Solder bumps, formed on the silicon die,
provide the interconnect medium from die to PCB. The bumps are arranged on the die in a regular grid formation. The grid pitch is
0.5 mm and the dimensions for the packaged device are shown below.
0.490 - 0.524
(0.019 - 0.021)
0.15 - 0.005
DIA.
(0.006 - 0.002)
A1
B1
0.50
(0.020)
A2
B2
1.475 - 1.525
(0.058 - 0.060)
0.50
(0.020)
E
T
E
L
O
S
B
O
A3
0.414 - 0.424
(0.016 - 0.017)
B3
0.180 - 0.280
(0.007 - 0.011)
0.180 - 0.280
(0.007 - 0.011)
0.50
(0.020)
0.965 - 1.015
(0.038 - 0.040)
Reliability Data
DIMENSIONS =
MILLIMETERS
(INCHES)
Reliability data is gathered on an ongoing basis for Bourns® Integrated Passive and Active Devices.
“Package level” testing of the integrity of the solder joint is carried out on an independent Daisy-Chain test device. A 25-Pin Daisy
Chain component is available from Bourns for this purpose (part number 2TAD-C25R). This is a 5 x 5 array featuring 0.5 mm pitch
solder bumps. The Distance to Neutral Point (DNP) on that component is larger than that of the 2DAA-F6R and is thus deemed
suitable for Thermal Cycle testing.
“Silicon level” reliability performance is based on similarity to other integrated passive CSP devices from Bourns.
Overshoot and Clamping Voltage Response
5 Volts per Division
35
25
15
5
-5
-90,000 ns
10,000 ns
110,000 ns
ESD Test Pulse - 25 kilovolt, 1/30 ns (waveshape)
Specifications are subject to change without notice.
Customers should verify actual device performance in their specific applications.
2DAA-F6R - Integrated Passive & Active Device
Block Diagram
PCB Design and SMT Processing
The CSP device block diagram below includes the pin names and basic electrical
connections associated with each channel.
EXT1
Please consult the “Bourns Design
Guide Using CSP” for notes on PCB
design and SMT Processing.
EXT4
How to Order
2 DAA - F6R ____
GND
GND
Thinfilm
Model
Flip Chip
E
T
E
L
O
S
B
O
No. of Solder Bumps
EXT2
EXT3
Packaging Option
R = Tape and Reel
Packaged 5000 pcs. / 7 ” reel
Terminations
LF = Sn/Ag/Cu (lead free)
Blank = Sn/Pb
Specifications are subject to change without notice.
Customers should verify actual device performance in their specific applications.
2DAA-F6R - Integrated Passive & Active Device
Device Pin Out
The pin-out for the device is shown below with the bumps facing up.
1
EXT4
EXT1
2
3
B
Pin Out
A1
A2
A3
EXT3
A
Function
EXT1
GND
EXT2
Pin Out
B1
B2
B3
Function
EXT4
GND
EXT3
EXT2
GND x 2
Packaging
E
T
E
L
O
S
B
O
The surface mount product is packaged in an 8 mm x 4 mm Tape and Reel format per EIA-481 standard.
TOP SIDE VIEW
(INTO COMPONENT POCKET)
DIMENSIONS =
0.30 ± 0.05
(.01 ± .002)
0.3
MAX.
(0.01)
0.70 ± 0.1
(0.03 ± 0.004)
(INCHES)
4.00 ± 0.10
(.16 ± .004)
1.5 ± 0.1/-0
(.06 ± .004/-0)
DIA.
2.00 ± 0.05
(.08 ± .002)
R
MILLIMETERS
1.70 ± 0.05
(.07 ± .002)
1.12 ± 0.05
(.04 ± .002)
4.00 ± 0.10
(.16 ± .004)
ORIENTATION
OF COMPONENT
IN POCKET
1.75 ± 0.10
(.07 ± .004)
8.00 ± 0.30
(.31 ± .01)
3.50 ± 0.05
(.14 ± .002)
R 0.25 TYP.
(0.010)
BACKSIDE FACING UP
Reliable Electronic Solutions
Asia-Pacific:
TEL +886- (0)2 25624117 • FAX +886- (0)2 25624116
Europe:
TEL +41-41 768 5555 • FAX +41-41 768 5510
The Americas: TEL +1-951 781-5492 • FAX +1-951 781-5700
www.bourns.com
COPYRIGHT© 2004, BOURNS, INC. LITHO IN U.S.A. 08/04 e/IPA0411
2DAA-F6R REV. B, 1/05
Specifications are subject to change without notice.
Customers should verify actual device performance in their specific applications.
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