BGS18MN14 Data Sheet (1.7 MB)

BGS18MN14
SP8T Diversity Antenna Switch with MIPI RFFE Interface
Data Sheet
Revision 3.0 - July 3, 2014
Power Management & Multimarket
Edition July 3, 2014
Published by Infineon Technologies AG
81726 Munich, Germany
c
2014
Infineon Technologies AG
All Rights Reserved.
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AND ALL INFORMATION GIVEN IN THIS APPLICATION NOTE.
Information
For further information on technology, delivery terms and conditions and prices, please contact the nearest Infineon
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Due to technical requirements, components may contain dangerous substances. For information on the types in
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BGS18MN14
Confidential
Revision History
Document No.: BGS18MN14_v3.0.pdf
Revision History: Revision 3.0
Previous Version: Revision 0.7
Page
Subjects (major changes since last revision)
15
Figure 9 updated
Trademarks of Infineon Technologies AG
AURIXTM , C166TM , CanPAKTM , CIPOSTM , CIPURSETM ,CoolGaNTM ,CoolMOSTM , CoolSETTM , CoolSiCTM , CORECONTROLTM ,
DAVETM , DI-POLTM ,EasyPIMTM , EconoBRIDGETM , EconoDUALTM , EconoPACKTM , EconoPIMTM , EiceDRIVERTM , eupecTM ,
FCOSTM , HITFETTM , HybridPACKTM , ISOFACETM , I2 RFTM , IsoPACKTM , MIPAQTM , ModSTACKTM , my-dTM , NovalithICTM ,
OmniTuneTM , OptiMOSTM , ORIGATM , OPTIGATM , PROFETTM , PRO-SILTM , PRIMARIONTM , PrimePACKTM , RASICTM ,
ReverSaveTM , SatRICTM , SIEGETTM , SIPMOSTM , SOLID FLASHTM , SmartLEWISTM , TEMPFETTM , thinQ!TM , TriCoreTM ,
TRENCHSTOPTM .
Other Trademarks
Advance Design SystemTM (ADS) of Agilent Technologies, AMBATM , ARMTM , MULTI-ICETM , PRIMECELLTM , REALVIEWTM ,
THUMBTM of ARM Limited, UK. AUTOSARTM is licensed by AUTOSAR development partnership. BluetoothTM of Bluetooth
SIG Inc. CAT-iqTM of DECT Forum. COLOSSUSTM , FirstGPSTM of Trimble Navigation Ltd. EMVTM of EMVCo, LLC (Visa
Holdings Inc.). EPCOSTM of Epcos AG. FLEXGOTM of Microsoft Corporation. FlexRayTM is licensed by FlexRay Consortium.
HYPERTERMINALTM of Hilgraeve Incorporated. IECTM of Commission Electrotechnique Internationale. IrDATM of Infrared Data
Association Corporation. ISOTM of INTERNATIONAL ORGANIZATION FOR STANDARDIZATION. MATLABTM of MathWorks,
Inc. MAXIMTM of Maxim Integrated Products, Inc. MICROTECTM , NUCLEUSTM of Mentor Graphics Corporation. MifareTM of
NXP. MIPITM of MIPI Alliance, Inc. MIPSTM of MIPS Technologies, Inc., USA. muRataTM of MURATA MANUFACTURING CO.,
MICROWAVE OFFICETM (MWO) of Applied Wave Research Inc., OmniVisionTM of OmniVision Technologies, Inc. OpenwaveTM
Openwave Systems Inc. RED HATTM Red Hat, Inc. RFMDTM RF Micro Devices, Inc. SIRIUSTM of Sirius Sattelite Radio Inc.
SOLARISTM of Sun Microsystems, Inc. SPANSIONTM of Spansion LLC Ltd. SymbianTM of Symbian Software Limited. TAIYO
YUDENTM of Taiyo Yuden Co. TEAKLITETM of CEVA, Inc. TEKTRONIXTM of Tektronix Inc. TOKOTM of TOKO KABUSHIKI
KAISHA TA. UNIXTM of X/Open Company Limited. VERILOGTM , PALLADIUMTM of Cadence Design Systems, Inc. VLYNQTM of
Texas Instruments Incorporated. VXWORKSTM , WIND RIVERTM of WIND RIVER SYSTEMS, INC. ZETEXTM of Diodes Zetex
Limited.
Last Trademarks Update 2012-12-13
Data Sheet
3
Revision 3.0 - July 3, 2014
BGS18MN14
Confidential
Contents
Contents
1 Features
5
2 Product Description
5
3 Maximum Ratings
6
4 Operation Ranges
7
5 RF Characteristics
8
6 MIPI RFFE Specification
10
7 Pin Definition and Package Outline
14
List of Figures
1
2
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4
5
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12
13
BGS18MN14 block diagram . . . . . . . . . . . .
MIPI to RF Time . . . . . . . . . . . . . . . . . .
Received clock signal constraints . . . . . . . . .
Bus active data receiver timing requirements . .
Bus park cycle timing . . . . . . . . . . . . . . .
Bus active data transmission timing specification
Requirements for VIO-initiated reset . . . . . . .
Application circuit . . . . . . . . . . . . . . . . . .
Pin configuration (top view) . . . . . . . . . . . .
Package outline . . . . . . . . . . . . . . . . . . .
Marking . . . . . . . . . . . . . . . . . . . . . . .
Land pattern and stencil mask . . . . . . . . . .
Tape dimensions . . . . . . . . . . . . . . . . . .
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List of Tables
1
2
3
4
5
6
7
8
9
10
11
12
13
Ordering information . . . .
Maximum ratings, Table I .
Maximum ratings, Table II .
Operation ranges . . . . . .
RF input power . . . . . . .
RF characteristics . . . . .
IMD2 Testcases . . . . . .
IMD3 Testcases . . . . . .
Switching Time . . . . . . .
Register mapping . . . . . .
MIPI RFFE operating timing
Truth table . . . . . . . . . .
Pin configuration . . . . . .
Data Sheet
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4
Revision 3.0 - July 3, 2014
BGS18MN14
Confidential
SP8T Diversity Antenna Switch
1 Features
• Suitable for multi-mode WCDMA / LTE diversity applications
• Ultra-low insertion loss and harmonics generation
• 8 high-linearity, interchangeable RX ports
• 0.1 to 2.7 GHz coverage
• High port-to-port-isolation
• Direct to battery supply enabled by large supply voltage range
from 2.5 V to 5.5 V
• Integrated MIPI RFFE interface supporting 1.2 and 1.8 V bus
voltage
• Software programmable MIPI RFFE USID
• No decoupling capacitors required if no DC applied on RF lines
• Small form factor 2.0 mm x 2.0 mm
• 1 kV HBM ESD protection
• RoHS and WEEE compliant package
2 Product Description
The BGS18MN14 is a Single Pole Eight Throw (SP8T) Diversity Switch Module optimized for wireless applications up
to 2.7 GHz. It is a perfect solution for multi-mode handsets based on quadband GSM, WCDMA and LTE. The switch
module configuration is shown in Fig. 1. The module comes in a miniature TSNP package and comprises of a high
power CMOS SP8T switch with integrated MIPI RFFE interface.
No external DC blocking capacitors are required in typical applications as long as no DC is applied to any RF port.
Table 1: Ordering Information
Type
Package
Marking
BGS18MN14
PG-TSNP-14-3
18M2
Data Sheet
5
Revision 3.0 - July 3, 2014
BGS18MN14
Confidential
ANT
RX01
RX02
RX03
RX04
RX05
RX06
RX08
RX07
SP8T
GND
VDD
VIO
SCLK
SDATA
MIPI RFFE
Controller
Figure 1: BGS18MN14 block diagram
3 Maximum Ratings
Table 2: Maximum Ratings, Table I at TA = 25 ◦ C, unless otherwise specified
Parameter
Symbol
Values
Min.
Typ.
Max.
Unit
Note / Test Condition
1)
Frequency range
f
0.1
–
–
GHz
Supply voltage
VDD
-0.5
–
6.0
V
–
C
–
C
–
Storage temperature range
TSTG
-65
–
150
◦
Junction temperature
Tj
–
–
125
◦
RF input power at all RX ports
PRF _RX
–
–
32
dBm
CW
ESD capability, CDM
2)
VESDCDM
−500
–
+500
V
All pins
ESD capability, HBM
3)
VESDHBM
-1
–
+1
kV
Digital, digital versus RF
-1
–
+1
kV
RF
−8
–
+8
kV
ANT versus system GND,
ESD capability, system level
4)
VESDANT
with 27 nH shunt inductor
1)
Switch has no highpass response. There is also a DC connection between switched paths. The DC voltage at RF ports VRFDC has to be 0V.
Field-Induced Charged-Device Model JESD22-C101. Simulates charging/discharging events that occur in production equipment and
processes. Potential for CDM ESD events occurs whenever there is metal-to-metal contact in manufacturing.
3) Human Body Model ANSI/ESDA/JEDEC JS-001-2012 (R = 1.5 kΩ, C = 100 pF).
4) IEC 61000-4-2 (R = 330 Ω, C = 150 pF), contact discharge.
2)
Data Sheet
6
Revision 3.0 - July 3, 2014
BGS18MN14
Confidential
Table 3: Maximum Ratings, Table II at TA = 25 ◦ C, unless otherwise specified
Parameter
Symbol
Values
Unit
Note / Test Condition
–
K/W
–
–
0
V
No DC voltages allowed on
-0.5
–
3.6
V
–
-0.7
–
VIO +0.7
V
–
Unit
Note / Test Condition
Min.
Typ.
Max.
RthJS
–
60
VRFDC
0
RFFE supply voltage
VIO
RFFE control voltage levels
VSCLK ,
Thermal resistance junction - soldering point
Maximum DC-voltage on RF ports
and RF ground
RF ports
VSDATA
4 Operation Ranges
Table 4: Operation Ranges
Parameter
Symbol
Supply voltage
Values
Min.
Typ.
Max.
VDD
2.5
3.5
5.5
V
–
2)
Supply current
IDD
–
80
200
µA
–
Supply current in user low
ILP
-
0.6
10
µA
–
ISD
-
0.5
1
µA
–
VIO
1.1
1.8
1.95
V
–
VIH
0.7*VIO
–
VIO
V
–
RFFE input low voltage
VIL
0
–
0.3*VIO
V
–
RFFE output high voltage1)
VOH
0.8*VIO
–
VIO
V
–
RFFE output low voltage
VOL
0
–
0.2*VIO
V
–
RFFE control input capaci-
CCtrl
–
–
2
pF
–
RFFE supply current2)
IVIO
–
15
–
µA
Idle state
Ambient temperature
TA
-30
25
85
◦
–
power mode2)
Supply current in shutdown
2)
state
RFFE supply voltage
1)
RFFE input high voltage
1)
1)
tance
C
1) SCLK
2) T
A
and SDATA
= -30 ◦ C...+85 ◦ C, VDD = 2.5...5.5 V
Table 5: RF Input Power
Parameter
RX ports (50Ω)
Data Sheet
Symbol
PRF _RX
Values
Min.
Typ.
Max.
–
–
27
7
Unit
Note / Test Condition
dBm
–
Revision 3.0 - July 3, 2014
BGS18MN14
Confidential
5 RF Characteristics
Table 6: RF Characteristics at TA = -30 ◦ C...+85 ◦ C, PIN = 0 dBm, VDD = 2.5...5.5 V , Z0 =50Ω, unless otherwise
specified
Parameter
Symbol
Values
Unit
Note / Test Condition
Min.
Typ.
Max.
0.20
0.30
0.40
dB
0.1 to 1.0 GHz
0.40
0.50
0.60
dB
1.0 to 2.0 MHz
0.50
0.65
0.80
dB
2.0 to 2.7 MHz
0.25
0.35
0.45
dB
0.1 to 1.0 GHz
0.50
0.60
0.70
dB
1.0 to 2.0 MHz
0.65
0.80
0.95
dB
2.0 to 2.7 MHz
19
22
25
dB
0.1 to 1.0 GHz
14
17
20
dB
1.0 to 2.0 MHz
11
14
17
dB
2.0 to 2.7 MHz
17
20
23
dB
0.1 to 1.0 GHz
12
15
18
dB
1.0 to 2.0 MHz
10
13
16
dB
2.0 to 2.7 MHz
28
40
52
dB
0.1 to 1.0 GHz
22
32
42
dB
1.0 to 2.0 MHz
18
29
40
dB
2.0 to 2.7 MHz
30
42
54
dB
0.1 to 1.0 GHz
23
33
43
dB
1.0 to 2.0 MHz
20
30
40
dB
2.0 to 2.7 MHz
1)
Insertion Loss
RX01-03, RX06-07
IL
1)
Insertion Loss
RX04, RX05
IL
1)
Antenna Return Loss
RX01-08
RL
Port Return Loss1)
RX01-08
RL
Isolation (ANT-RX)
RX01-08
ISO
Isolation (RX-RX)
RX01-08
ISO
Intermodulation Distortion (UMTS Band 1, Band 5)
2nd order intermodulation
IMD2 low
–
-105
-95
dBm
IMT, US Cell (see Tab. 7)
3rd order intermodulation
IMD3
–
-105
-100
dBm
IMT, US Cell (see Tab. 8)
2nd order intermodulation
IMD2 high
–
-110
-100
dBm
IMT, US Cell (see Tab. 7)
Harmonic Generation (UMTS Band 1, Band 5)
H2
H3
1) On
PHarm
75
85
–
dBc
25 dBm, 50Ω, CW mode
PHarm
90
95
–
dBc
25 dBm, 50Ω, CW mode
application board with application circuit according to Fig. 8
Data Sheet
8
Revision 3.0 - July 3, 2014
BGS18MN14
Confidential
Table 7: IMD2 Testcases
Band
CW tone 1 (MHz)
CW tone 1 (dBm)
IMT
1950
20
US Cell
835
20
CW tone 2 (MHz)
190 (IMD2 low)
4090 (IMD2 high)
45 (IMD2 low)
1715 (IMD2 high)
CW tone 2 (dBm)
-15
-15
Table 8: IMD3 Testcases
Band
CW tone 1 (MHz)
CW tone 1 (dBm)
CW tone 2 (MHz)
CW tone 2 (dBm)
IMT
1950
20
1760
-15
US Cell
835
20
790
-15
Table 9: Switching Time at TA = -30 ◦ C...+85 ◦ C, PIN = 0 dBm, Supply Voltage = 2.5 V...2.5 V, unless otherwise
specified
Parameter
Symbol
Values
Unit
Min.
Typ.
Max.
Note / Test Condition
Switching Time
MIPI to RF Time
tINT
0.5
2
5
µs
Power up settling time
tPUP
–
10
25
µs
50 % last SCLK falling edge to
90 % ON, see Fig. 2
After power down mode
SDATA
TINT
SCLK
90%
RF Signal
Figure 2: MIPI to RF Time
Data Sheet
9
Revision 3.0 - July 3, 2014
BGS18MN14
Confidential
6 MIPI RFFE Specification
Supported MIPI Functions
The MIPI RFFE interface supports following functions:
• Register write command sequence
• Register read command sequence
• Register 0 write command sequence
• Programmable USID
• Trigger function
All sequences are implemented according to the ’MIPI Alliance Specification for RF Front-End Control Interface’
document version 1.10 - 26. July 2011. By default the device goes into low power mode after power on.
Table 10: Register Mapping
Register
Address
Register Name
0x0000
REGISTER_0
7:0
MODE_CTRL
0x001C
PM_TRIG
7:6
5
4
3
2
1
0
PWR_MODE
TRIGGER_MASK_2
TRIGGER_MASK_1
TRIGGER_MASK_0
TRIGGER_2
TRIGGER_1
TRIGGER_0
0x001D
PRODUCT_ID
7:0
0x001E
MANUFACTURER_ID
7:0
0x001F
0x001B
Data Sheet
Data
Bits
Function
Default
Broadcast
Support
Trigger
Support
R/W
00000000
No
Yes
R/W
10
0
0
0
0
0
0
Yes
No
No
No
Yes
Yes
Yes
No
No
No
No
No
No
No
R/W
PRODUCT_ID
10000111
No
No
R
MANUFACTURER_ID [7:0]
00011010
No
No
R
MAN_USID
7:6
5:4
3:0
SPARE
MANUFACTURER_ID [9:8]
USID
00
01
1010
No
No
R/W
GROUP_SID
7:4
3:0
RESERVED
GROUP_SID
0
0
No
No
R/W
10
Revision 3.0 - July 3, 2014
BGS18MN14
Confidential
Table 11: MIPI RFFE Operating Timing
Parameter
Symbol
SCLK Frequency
FSCLK
SCLK Period
TSCLK
Values
Unit
Note / Test Condition
26
MHz
Full speed
–
13
MHz
Half speed
0.038
–
32
µs
Full speed
0.077
–
32
µs
Half speed
11.25
–
–
ns
Full speed, see Fig. 3
24
–
–
ns
Half speed, see Fig. 3
11.25
–
–
ns
Full speed, see Fig. 3
24
–
–
ns
Half speed, see Fig. 3
1
–
–
ns
Full speed, see Fig. 4
2
–
–
ns
Half speed, see Fig. 4
5
–
–
ns
Full speed, see Fig. 4
5
–
–
ns
Half speed, see Fig. 4
–
–
10
ns
Full speed, see Fig. 5
–
–
18
ns
Half speed, see Fig. 5
–
–
10.25
ns
Full speed, see Fig. 6
–
–
22
ns
Half speed, see Fig. 6
2.1
–
6.5
ns
Full speed, see Fig. 6
Min.
Typ.
Max.
0.032
–
0.032
SCLK Low Period
TSCLKIL
SCLK High Period
TSCLKIH
SDATA Setup Time
TS
SDATA Hold Time
TH
SDATA Release Time
TSDATAZ
Time for Data Output
TD
SDATA Rise/Fall Time
TSDATAOTR
2.1
–
10
ns
Half speed, see Fig. 6
VIO Rise Time
TVIO-R
10
–
450
µs
See Fig. 7
VIO Reset Time
TVIO-RST
10
–
–
µs
See Fig. 7
Reset Delay Time
TSIGOL
0.12
–
–
µs
See Fig. 7
TSCLKIH
TSCLKIL
VTPmax
VTNmin
Figure 3: Received clock signal constraints
Data Sheet
11
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BGS18MN14
Confidential
VTPmax
SCLK
VTPmin
TS
TH
TS
TH
VTPmax
SDATA
VTPmin
Figure 4: Bus active data receiver timing requirements
VTPmax
SCLK
VTNmin
TSDATAZ
VOHmin
SDATA
VOLmax
Bus Park Cycle
Signal driven
Signal not driven, pull down only
TSDATAZ is measured from SCLK VTN level for a device receiving SCLK and driving SDATA lines
Figure 5: Bus park cycle timing
Data Sheet
12
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BGS18MN14
Confidential
VTPmax
SCLK
VTPmin
TD
TD
TSDATAOTR
TSDATAOTR
VOHmin
SDATA
VOLmax
Figure 6: Bus active data transmission timing specification
TSIGOL
VIO (V)
Not To Scale
VIOmax
VIOmin
SCLK & SDATA must be
held at low level from
deassertion of VIO until
the end of TSIGOL
TVIO-RST
All slave registers
set/reset to
manufacturer‘s
defaults
TVIO-R
VVIO-RST
(0.2V)
Time
Figure 7: Requirements for VIO-initiated reset
Table 12: Modes of Operation (Truth Table)
REGISTER_0 Bits
State
Mode
D7
D6
D5
D4
D3
D2
D1
D0
1
Isolation
x
0
0
0
1
0
0
0
2
RX01
x
0
0
0
0
0
0
0
3
RX02
x
0
0
0
0
0
1
0
4
RX03
x
0
0
0
0
0
0
1
5
RX04
x
0
0
0
0
0
1
1
6
RX05
x
0
0
0
0
1
1
1
7
RX06
x
0
0
0
0
1
0
1
8
RX07
x
0
0
0
0
1
1
0
9
RX08
x
0
0
0
0
1
0
0
Data Sheet
13
Revision 3.0 - July 3, 2014
BGS18MN14
Confidential
7 Pin Definition and Package Outline
Table 13: Pin Configuration
No.
Name
Pin Type
Buffer Type
Function
0
GND
GND
RF ground; die pad
1
RX03
I/O
RX port 3
2
RX02
I/O
RX port 2
3
RX01
I/O
RX port 1
4
VDD
PWR
VDD supply
5
VIO
PWR
MIPI RFFE supply
6
SDATA
I/O
MIPI RFFE data
7
SCLK
I
MIPI RFFE clock
8
NC
9
RX08
I/O
RX port 8
10
RX07
I/O
RX port 7
11
RX06
I/O
RX port 6
12
RX05
I/O
RX port 5
13
ANT
I/O
Antenna port
14
RX04
I/O
RX port 4
Not connected
ANT
BGS18MN14
SP8T
27nH
Figure 8: Application circuit
Data Sheet
14
Revision 3.0 - July 3, 2014
BGS18MN14
RX06
RX07
RX08
NC
Confidential
11
10
9
8
ANT
13
6
SDATA
RX04
14
5
VIO
1
2
3
4
VDD
SCLK
RX01
7
RX02
12
RX03
RX05
Figure 9: Pin configuration (top view)
Bottom view
0.1 B
Top view
3 x 0.5 = 1.5
0.2 ±0.05
14x
8
10
11
12
1.7
13
6
14
3
2
1
0.2 x 45°
Pin 1 marking
1.1 ±0.05
0.17 ±0.05
14x
0.45
5
4
B
9
0.45
0.5
7
0.4
2 ±0.05
2 x 0.4 = 0.8
0.05 MAX.
1.1 ±0.05
2 ±0.05
A
0.1 B
0.77 MAX.
0.1 A
0.1 A
Figure 10: Package outline
1234
Type code
Date code
(YYWW)
Pin 1 marking
Figure 11: Marking
Data Sheet
15
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BGS18MN14
Confidential
14x 0.22
0.22
0.25
0.5
Copper
0.85
0.4 0.4
1.1
0.85
1.1
0.4 0.4
0.25
14x 0.25
1.1
0.25
0.5
0.85
0.85
(stencil thickness 80 µm)
Stencil apertures
Solder mask
Figure 12: Land pattern and stencil mask
4
8
2.3
Pin 1
marking
0.95
2.3
Figure 13: Tape dimensions
Data Sheet
16
Revision 3.0 - July 3, 2014
w w w . i n f i n e o n . c o m
Published by Infineon Technologies AG
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