Datasheet

SIDACtor ® Protection Thyristors
Broadband Optimized™ Protection
SDP Biased Series - 5x6 QFN
RoHS
Pb e3
Description
This new SDP Biased series provides overvoltage
protection for applications such as VDSL2, ADSL2, and
ADSL2+ with minimal effect on data signals. This latest
silicon design innovation results in a capacitive loading
characteristic that is compatible with these high bandwidth
applications. This surface mount QFN package provides a
surge capability that exceeds most worldwide standards
and recommendations for lightning surge withstand
capability of secondary protectors.
Features & Benefits
• Compatible with VDSL2
(30MHz)
Agency Approvals
Agency
• Balanced overvoltage
protection
Agency File Number
E133083
• Low distortion
• Low insertion loss
Pinout Designation
• SO-8 footprint compatible
• Fails short circuit when
surged in excess of ratings
• 2nd level interconnect is
Pb-free per IPC/JEDEC
J-STD-609A.01
• Low profile
Tip in
1
- Bias
Ground
Ring in
8
Tip out
2
7
3
6
+ Bias
Ground
4
5
Ring out
Applicable Global Standards
Schematic Symbol
Line In (1)
-Bias (2)
(6) Ground
(5) Line Out
• TIA-968-B
• GR 1089 Intra-building
• ITU K.20/21 Enhanced
Level
• YD/T 1082
• YD/T 993
• YD/T 950
• IEC 61000-4-5
(7) +Bias
Line In (4)
• GR 1089 Inter-building
• ITU K.20/21 Basic Level
(8) Line Out
Ground (3)
• TIA-968-A
8002 tcO snevaH pillihP
Electrical Characteristics
Part Number
Marking
SDP0080Q38CB
SDP0220Q38CB
SDP0640Q38CB
SDP0720Q38CB
SDP0900Q38CB
SDP1100Q38CB
SDP1300Q38CB
SDP1800Q38CB
SDP2600Q38CB
SDP3100Q38CB
SDP3500Q38CB
SDP-8C
SDP02C
SDP06C
SDP07C
SDP09C
SDP11C
SDP13C
SDP18C
SDP26C
SDP31C
SDP35C
[email protected]=5µA [email protected]/µs
IS
IT
[email protected]=2.2
Amps
V min
V max
mA min
mA max
A max
V max
6
16
58
65
75
90
120
170
220
275
320
25
30
77
88
98
130
160
220
300
350
400
50
50
150
150
150
150
150
150
150
150
150
800
800
800
800
800
800
800
800
800
800
800
2.2
2.2
2.2
2.2
2.2
2.2
2.2
2.2
2.2
2.2
2.2
8
8
8
8
8
8
8
8
8
8
8
Notes:
- Absolute maximum ratings measured at TA= 25ºC (unless otherwise noted).
- Devices are bi-directional (unless otherwise noted).
- Part with * is under development.
© 2014 Littelfuse, Inc.
Specifications are subject to change without notice.
Revised: 12/17/14
IH
Capacitance
See Capacitance vs
Voltage Chart
SIDACtor ® Protection Thyristors
Broadband Optimized™ Protection
V-I: Characteristics
Capacitance vs. Voltage*
+I
40
Bias Voltage
35
IT
IDRM
Capacitance (pF)
IS
IH
-V
0V
5V
24V
50V
30
+V
3.3V
12V
30V
25
20
15
VDRM
VT
10
VS
5
0
0.1
1
10
100
Line Voltage (V)
-I
* Bias voltage must be lower than VDRM
50/60Hz Ratings
Parameter Name
Test Conditions
Value
Units
ITSM Maximum non-reptitive
on-state current, 50/60Hz
0.5s
1s
2s
5s
30s
900s
6.5
4.6
3.4
2.3
1.3
0.73
A
Surge Ratings
ITSM
IPP
Series
C
2x10µs
1.2x50µs/8x20µs
10x700/5x310µs
10x1000µs
600VRMS 1 cycle
A min
A min
A min
A min
ARMS
500
400
200
100
30
Notes:
- Peak pulse current rating (IPP) is repetitive and guaranteed for the life of the product.
- IPP ratings applicable over temperature range of -40ºC to +85ºC
- The device must initially be in thermal equilibrium with -40°C < TJ < +150°C
Thermal Considerations
Package
5x6 QFN
Symbol
Parameter
Value
Unit
TJ
Junction Temperature
-40 to +150
°C
TSTG
Storage Temperature Range
-40 to +150
°C
R0JA
Thermal Resistance: Junction to Ambient
100
°C/W
© 2014 Littelfuse, Inc.
Specifications are subject to change without notice.
Revised: 12/17/14
SIDACtor ® Protection Thyristors
Broadband Optimized™ Protection
Normalized VS Change vs. Junction Temperature
Normalized DC Holding Current vs. Case Temperature
2.0
10
IH
8
6
25 °C
4
1.8
IH (TC = 25ºC)
12
1.6
1.4
2
0
-4
25°C
1.2
1.0
Ratio of
Percent of VS Change – %
14
0.8
0.6
-6
0.4
-8
-40
-40 -20
0
-20
20 40 60 80 100 120 140 160
0
20
40
60
80
100 120 140
160
Case Temperature (TC) - ºC
Junction Temperature (TJ) – °C
Soldering Parameters
- Temperature Min (Ts(min))
Pre Heat
- Temperature Max (Ts(max))
- Time (Min to Max) (ts)
Pb-Free assembly
(see Fig. 1)
+150°C
+200°C
60-180 secs.
Average ramp up rate (Liquidus Temp (TL)
to peak)
3°C/sec. Max.
TS(max) to TL - Ramp-up Rate
3°C/sec. Max.
Reflow
- Temperature (TL) (Liquidus)
+217°C
- Temperature (tL)
60-150 secs.
Peak Temp (TP)
+260(+0/-5)°C
Time within 5°C of actual Peak Temp (tp)
30 secs. Max.
Ramp-down Rate
6°C/sec. Max.
Time 25°C to Peak Temp (TP)
8 min. Max.
Do not exceed
+260°C
Physical Specifications
Lead Material
Figure 1
TP
TL
TS(max)
100% Matte-Tin Plated
Body Material
UL recognized epoxy meeting flammability
classification 94V-0
Ramp-down
Preheat
TS(min)
tS
25
time to peak temperature
(t 25ºC to peak)
Resources
© 2014 Littelfuse, Inc.
Specifications are subject to change without notice.
Revised: 12/17/14
Samples
Time
Environmental Specifications
High Temp Voltage
Blocking
80% Rated VDRM (VAC Peak ) +125°C or +150°C,
504 or 1008 hrs. MIL-STD-750 (Method 1040)
JEDEC, JESD22-A-101
Temp Cycling
-65°C to +150°C, 15 min. dwell, 10 up to 100
cycles. MIL-STD-750 (Method 1051) EIA/JEDEC,
JESD22-A104
Biased Temp &
Humidity
52 VDC (+85°C) 85%RH, 504 up to 1008 hrs. EIA/
JEDEC, JESD22-A-101
High Temp Storage
+150°C 1008 hrs. MIL-STD-750 (Method 1031)
JEDEC, JESD22-A-101
Low Temp Storage
-65°C, 1008 hrs.
Thermal Shock
0°C to +100°C, 5 min. dwell, 10 sec. transfer,
10 cycles. MIL-STD-750 (Method 1056) JEDEC,
JESD22-A-106
Resistance to Solder
Heat
+260°C, 30 secs. MIL-STD-750 (Method 2031)
Moisture Sensitivity
Level
85%RH, +85°C, 168 hrs., 3 reflow cycles
(+260°C Peak). JEDEC-J-STD-020, Level 1
Additional Information
Datasheet
Critical Zone
TL to TP
tL
Copper Alloy
Terminal Finish
tP
Ramp-up
Temperature
Reflow Condition
SIDACtor ® Protection Thyristors
Broadband Optimized™ Protection
Dimensions — 5x6 QFN
A
5
I
B
6
H
D
7
8
K
L
J
E
4
3
I
2
PIN 1 & 8: TIP CONNECTIONS
PIN 2: BIAS (-)
PIN 3 & 6: GROUND CONNECTIONS
PIN 4 & 5: RING CONNECTIONS
PIN 7: BIAS (+)
C
F (REF)
F
G
PIN 1 INDICATOR
Inches
Dimension
G (REF)
A
B
C
D
E
F
G
H
I
J
K
L
Millimeters
Min
Max
Min
Max
0.187
0.226
0.054
0.165
0.027
0.011
0.047
0.032
0.027
0.100
0.027
0.015
0.207
0.246
0.064
0.171
0.033
0.017
0.053
0.038
0.033
0.106
0.033
0.021
4.745
5.745
1.374
4.199
0.686
0.279
1.194
0.800
0.686
2.540
0.686
0.381
5.253
6.253
1.628
4.351
0.838
0.432
1.346
0.953
0.838
2.692
0.838
0.533
5x6 QFN Solder Pad Layout
.0200
.0500
.2920 .2050 .1180
Part Numbering
Part Marking
SDP xxx 0 Q38 C B
TYPE
SIDACtor DSL Protector
MEDIAN VOLTAGE
CONSTRUCTION VARIABLE
XXXXXX
BIASED
Part Marking Code
(Refer to Electrical Characteristics Table)
IPP RATING
XXXXX
Date Code
PACKAGE TYPE
Packing Options
Package Type
Q38
Description
Quantity
Added Suffix
Industry Standard
5x6x1.5 QFN
Tape and Reel Pack
4000
N/A
EIA-481-D
© 2014 Littelfuse, Inc.
Specifications are subject to change without notice.
Revised: 12/17/14
SIDACtor ® Protection Thyristors
Broadband Optimized™ Protection
Tape and Reel Specifications — 5x6 QFN
Reel Dimension
Symbols
C
A
D
N
W1
B
Tape Leader and Trailer Dimensions
END
CARRIER TAPE
START
COVER TAPE
A
B
C
D
N
W1
A0
B0
D0
D1
E1
E2
F
TRAILER
160mm MIN
LEADER
400mm MIN
K0
P0
P1
Tape Dimension Items
D0
P0
P2
T
CARRIER TAPE
D1
B0 F
E2 W
W0
K0
E1
P1
COVER TAPE
© 2014 Littelfuse, Inc.
Specifications are subject to change without notice.
Revised: 12/17/14
A0
P2
T
W
W0
Description
Inches
Millimeters
Min
Max
Min
Reel Diameter
N/A 12.992 N/A
Drive Spoke Width
0.059
N/A
1.50
Arbor Hole Diameter
0.504 0.531 12.80
Drive Spoke Diameter
0.795
N/A
20.20
Hub Diameter
1.969
N/A
50.00
Reel Inner Width at Hub 0.488 0.567 12.40
Pocket Width at Bottom 0.204 0.212 5.20
Pocket Length at Bottom 0.244 0.252 6.20
Feed Hole Diameter
0.059 0.063 1.50
Pocket Hole Diameter
0.059
N/A
1.50
Feed Hole Position 1
0.065 0.073 1.65
Feed Hole Position 2
0.400 0.408 10.15
Feed Hole Center 0.212 0.220 5.40
Pocket Hole Center 2
Pocket Depth
0.067 0.075 1.70
Feed Hole Pitch
0.153 0.161 3.90
Component Spacing
0.311 0.319
7.90
Feed Hole Center 0.077 0.081 1.90
Pocket Hole Center 1
Carrier Tape Thickness
0.010 0.014 0.25
Embossed Carrier
0.460 0.484 11.70
Tape Width
Cover Tape Width
0.358 0.366 9.10
Max
330.0
N/A
13.50
N/A
N/A
14.40
5.40
6.40
1.60
N/A
1.85
10.35
5.60
1.90
4.10
8.10
2.10
0.35
12.30
9.30