REVISIONS LTR DESCRIPTION A DATE (YR-MO-DA) APPROVED 16-06-10 C. SAFFLE Add device type 02 and case outline Y. - ro REV SHEET REV A A A A A A A A A A A A A A A A A SHEET 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 REV STATUS REV A A A A A A A A A A A A A A OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED BY RICK OFFICER STANDARD MICROCIRCUIT DRAWING THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE AMSC N/A DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 http://www.landandmaritime.dla.mil CHECKED BY RAJESH PITHADIA APPROVED BY CHARLES F. SAFFLE DRAWING APPROVAL DATE 15-11-19 REVISION LEVEL A MICROCIRCUIT, DIGITAL-LINEAR, BICMOS, SINGLE 32-CHANNEL ANALOG MUX WITH OVERVOLTAGE PROTECTION, MONOLITHIC SILICON SIZE CAGE CODE A 67268 SHEET DSCC FORM 2233 APR 97 5962-15220 1 OF 31 5962-E405-16 1. SCOPE 1.1 Scope. This drawing documents two product assurance class levels consisting of high reliability (device class Q) and space application (device class V). A choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels is reflected in the PIN. 1.2 PIN. The PIN is as shown in the following example: 5962 R Federal stock class designator \ 15220 RHA designator (see 1.2.1) 01 V X C Device type (see 1.2.2) Device class designator (see 1.2.3) Case outline (see 1.2.4) Lead finish (see 1.2.5) / \/ Drawing number 1.2.1 RHA designator. Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number 01 ISL71841SEH 02 ISL73841SEH Circuit function Radiation hardened BICMOS, silicon on insulator (SOI), single 32-channel analog MUX with high impedance analog input overvoltage protection Radiation hardened BICMOS, silicon on insulator (SOI), single 32-channel analog MUX with high impedance analog input overvoltage protection 1.2.3 Device class designator. The device class designator is a single letter identifying the product assurance level as follows: Device class Device requirements documentation Q, V Certification and qualification to MIL-PRF-38535 1.2.4 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter X Y Descriptive designator See figure 1 CQCC1-N44 Terminals 48 44 Package style Quad flat pack with grounded lid Ceramic leadless chip carrier with grounded lid 1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes Q and V. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-15220 A REVISION LEVEL A SHEET 2 1.3 Absolute maximum ratings. 1/ Supply voltage between +VS and -VS ...................................................................................... 40 V Supply voltage between +VS and GND .................................................................................... +20 V Supply voltage between -VS and GND ..................................................................................... -20 V VREF to GND ............................................................................................................................ +16.5 V Digital input overvoltage range ................................................................................................. +VS to GND Maximum current through a selected switch ............................................................................ 10mA Analog input overvoltage range (power on/off) ......................................................................... -35 V VS +35 V Storage temperature range ...................................................................................................... -65C to +150C Junction temperature (TJ) ......................................................................................................... +150C Lead temperature (soldering, 10 seconds) ............................................................................... +275C Thermal resistance, junction-to-case (JC) : Case outline X ................................................................................................................... 2C/W Case outline Y ................................................................................................................... 3C/W Thermal resistance, junction-to-ambient (JA) : Case outline X ................................................................................................................... 50C/W Case outline Y ................................................................................................................... 31C/W 1.4 Recommended operating conditions. Positive supply voltage (+VS) ................................................................................................... +10.8 to +16.5 V Negative supply voltage (-VS) .................................................................................................. -10.8 to -16.5 V VREF ......................................................................................................................................... 4.5 V to 5.5 V dc VAH ........................................................................................................................................... 4.0 V dc VAL ........................................................................................................................................... 0.8 V dc VEN ........................................................................................................................................... 0.8 V dc Ambient operating temperature range (TA) .............................................................................. -55C to +125C 1.5 Radiation features. Maximum total dose available (high dose rate = 50 – 300 rad(Si)/s) : Device type 01 .................................................................................................................. 100 krad(Si) 2/ Maximum total dose available (low dose rate 10 mrad(Si)/s) : Device types 01 and 02 .................................................................................................... 50 krad(Si) 2/ 3/ Single event phenomena (SEP): 2 No SEL occurs at effective LET (see 4.4.4.3) ....................................................................... ≤ 86 MeV/(cm /mg) 4/ 5/ 2 No SEB occurs at surface LET (see 4.4.4.3) ........................................................................ ≤ 86 MeV/(cm /mg) 4/ 5/ Single event transients (SET) observed at an effective LET (see 4.4.4.3) -6 2 2 (SET magnitude of ±20 mV detection threshold at a cross section 4.4X10 cm ) ................ ≤ 86 MeV/(cm /mg) 5/ ______ 1/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance and affect reliability. 2/ Device type 01 radiation end point limits for the noted parameters are guaranteed only for the conditions as specified in MIL-STD-883, method 1019, condition A to a maximum total dose of 100 krads(Si), and condition D to a maximum total dose of 50 krads(Si). 3/ Device type 02 radiation end point limits for the noted parameters are guaranteed only for the conditions as specified in MIL-STD-883, method 1019, condition D to a maximum total dose of 50 krads(Si). 4/ Device types 01 and 02 use silicon on insulator (SOI) technology. No single-event burnout (SEB) or single-event latchup (SEL) was observed when irradiated with Au ions at normal incidence, corresponding to a surface LET 2 of 86 MeV/(cm /mg). The normal particle range into silicon for Au ions after 30 mm of air is about 118 m and the Bragg peak range is 53 m, resulting Au ion penetrate well beyond the sensitive volume of the devices. 5/ Limits are characterized at initial qualification and after any design or process changes which may affect the SEP characteristics, but are not production tested unless specified by the customer through the purchase order or contract. For more information on SEP test results, customers are requested to contact the manufacturer. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-15220 A REVISION LEVEL A SHEET 3 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 MIL-STD-1835 - Test Method Standard Microcircuits. Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 MIL-HDBK-780 - List of Standard Microcircuit Drawings. Standard Microcircuit Drawings. (Copies of these documents are available online at http://quicksearch.dla.mil or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Non-Government publications. The following document(s) form a part of this document to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. ASTM INTERNATIONAL (ASTM) ASTM F1192 - Standard Guide for the Measurement of Single Event Phenomena (SEP) Induced by Heavy Ion Irradiation of semiconductor Devices. (Copies of these documents are available online at http://www.astm.org or from ASTM International, 100 Barr Harbor Drive, P.O. Box C700, West Conshohocken, PA, 19428-2959). 2.3 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements for device classes Q and V shall be in accordance with MIL-PRF-38535 as specified herein, or as modified in the device manufacturer's Quality Management (QM) plan. The modification in the QM plan shall not affect the form, fit, or function as described herein. 3.1.1 Microcircuit die. For the requirements of microcircuit die, see appendix A to this document. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535 and herein for device classes Q and V. 3.2.1 Case outline. The case outline shall be in accordance with 1.2.4 herein and figure 1. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 2. 3.2.3 Truth table. The truth table shall be as specified on figure 3. 3.2.4 Logic diagrams. The logic diagrams shall be as specified on figure 4. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-15220 A REVISION LEVEL A SHEET 4 3.2.5 Radiation exposure circuit. The radiation exposure circuit shall be maintained by the manufacturer under document revision level control and shall be made available to the preparing and acquiring activity upon request. 3.3 Electrical performance characteristics and postirradiation parameter limits. Unless otherwise specified herein, the electrical performance characteristics and postirradiation parameter limits are as specified in table IA and shall apply over the full ambient operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table IIA. The electrical tests for each subgroup are defined in table I. 3.5 Marking. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturer's PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the "5962-" on the device. For RHA product using this option, the RHA designator shall still be marked. Marking for device classes Q and V shall be in accordance with MIL-PRF-38535. 3.5.1 Certification/compliance mark. The certification mark for device classes Q and V shall be a "QML" or "Q" as required in MIL-PRF-38535. 3.6 Certificate of compliance. For device classes Q and V, a certificate of compliance shall be required from a QML-38535 listed manufacturer in order to supply to the requirements of this drawing (see 6.6.1 herein). The certificate of compliance submitted to DLA Land and Maritime-VA prior to listing as an approved source of supply for this drawing shall affirm that the manufacturer's product meets, for device classes Q and V, the requirements of MIL-PRF-38535 and herein. 3.7 Certificate of conformance. A certificate of conformance as required for device classes Q and V in MIL-PRF-38535 shall be provided with each lot of microcircuits delivered to this drawing. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-15220 A REVISION LEVEL A SHEET 5 TABLE IA. Electrical performance characteristics. Test Channel on resistance Symbol RON Conditions 1/ -55C TA +125C +VS = +15 V, -VS = -15 V unless otherwise specified Group A subgroups Device type Limits Min ±VS = 15.0 V, 16.5 V 1,2,3 IOUT = -1 mA, VIN = +5 V, -5 V M, D, P, L, R 01, 02 Unit Max 500 1 3/ 500 1,2,3 700 1 3/ 700 ±VS = 15.0 V, 16.5 V IOUT = -1 mA, VIN = +VS, -VS M, D, P, L, R RON match between channels ∆RON ±VS = 15.0 V, 16.5 V 1,2,3 IOUT = -1 mA, VIN = +5 V, -5 V M, D, P, L, R RON flatness ∆RON-FL ±VS = 15.0 V, 16.5 V 1,2,3 IOUT = -1mA, VIN = +5 V, -5 V IS(OFF) 1, 2, 3 01, 02 25 25 01, 02 -10 10 1 3/ -100 100 1, 3 -10 10 2 -20 20 1 3/ -100 100 -10 10 2, 3 -10 80 1 3/ -100 100 1 -10 10 2, 3 -80 10 1 3/ -100 100 nA -VS + 5 V, see figure 5 2/ M, D, P, L, R VIN = -VS + 5 V, all unused inputs and output equal +VS - 5 V, see figure 5 2/ M, D, P, L, R Switch off leakage into the source of an unselected channel with supplies grounded 20 1 3/ VIN = +VS - 5 V, all unused inputs and output equal 20 1 3/ M, D, P, L, R Switch off leakage Into the source of an unselected channel 01, 02 IS(OFF) power off VIN = +25 V, 1 VREF = VEN = VA = ±VS = 0 V, unused inputs = 0 V, see figure 5 M, D, P, L, R VIN = -25 V, VREF = VEN = VA = ±VS = 0 V, unused inputs = 0 V, see figure 5 M, D, P, L, R 01, 02 nA See footnotes at end of table. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-15220 A REVISION LEVEL A SHEET 6 TABLE IA. Electrical performance characteristics - Continued. Test Switch off leakage into the source of an unselected channel with supplies open Symbol IS(OFF) power off Conditions 1/ -55C TA +125C +VS = +15 V, -VS = -15 V unless otherwise specified Group A subgroups -10 10 2, 3 -10 80 1 3/ -100 100 1 -10 10 2, 3 -80 10 1 3/ -100 100 -10 10 2 -80 80 1 3/ -500 500 1, 3 -10 10 2 -20 20 M, D, P, L, R 1 3/ -500 500 VIN = +35 V, VOUT = 0 V unused inputs = 0 V, see figure 5 1, 3 -10 10 2 -80 80 M, D, P, L, R 1 3/ -750 750 1, 3 -10 10 2 -20 20 1 3/ -750 750 VIN = +25 V, 1 VREF = VEN = VA = ±VS = open, unused inputs = 0 V, see figure 5 VREF = VEN = VA = ±VS = open, unused inputs = 0 V, see figure. 5 M, D, P, L, R VIN = +35V, VOUT = 0 V unused inputs = 0 V, see figure 5 1, 3 M, D, P, L, R VIN = -35 V, VOUT = 0 V unused inputs = 0 V, see figure 5 Switch off leakage into the source of an unselected channel (over voltage) IS(OFF) over voltage Unit Max VIN = -25 V, IS(ON) over voltage Limits Min M, D, P, L, R Switch on leakage into the source of a selected channel (over voltage) Device type VIN = -35 V, VOUT = 0 V unused inputs = 0 V, see figure 5 M, D, P, L, R 01, 02 01, 02 01, 02 nA nA nA See footnotes at end of table. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-15220 A REVISION LEVEL A SHEET 7 TABLE IA. Electrical performance characteristics - Continued. Test Switch off leakage into the drain with the part disabled Symbol ID(OFF) Conditions 1/ -55C TA +125C +VS = +15 V, -VS = -15 V unless otherwise specified Group A subgroups VOUT = +VS - 5 V, all inputs = -VS +5 V, see figure 5 2/ VOUT = -VS + 5V, all inputs = +VS - 5 V, see figure 5 2/ M, D, P, L, R Switch off leakage into the drain of an unselected channel (over voltage) ID(OFF) over voltage VOUT = 0 V, VIN = +35 V, unused inputs = 0 V, see figure 5 M, D, P, L, R Switch on leakage into the source/drain for a selected switch ID(ON) VIN = VOUT =+VS - 5 V, VEN = 0.8 V, unused inputs = -VS + 5 V, see figure 5 2/ M, D, P, L, R -10 10 2 0 120 1 3/ -80 80 1, 3 -10 10 2 -120 0 1 3/ -80 80 -10 10 1 3/ -500 500 1, 2, 3 -10 10 1 3/ -500 500 -10 10 2 0 120 1 3/ -100 100 1, 3 -10 10 2 -120 0 1 3/ -100 100 1, 3 VIN = VOUT = -VS + 5 V, VEN = 0.8 V, unused inputs = +VS - 5 V, see figure 5 2/ M, D, P, L, R Unit Max 01, 02 1, 2, 3 VOUT = 0 V, VIN = -35 V, unused inputs = 0 V, see figure. 5 M, D, P, L, R Limits Min 1, 3 M, D, P, L, R Device type 01, 02 01, 02 nA nA nA See footnotes at end of table. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-15220 A REVISION LEVEL A SHEET 8 TABLE IA. Electrical performance characteristics - Continued. Test Symbol Logic input high/low voltage level VIH/VIL Input Current Into VA and IIH/IIL Conditions 1/ -55C TA +125C +VS = +15 V, -VS = -15 V unless otherwise specified Group A subgroups 1, 2, 3 M, D, P, L, R 1, 2, 3 M, D, P, L, R Positive supply current I+ I- 1,2,3 VA = 0 V, VEN = 0.8 V 2/ +ISBY Negative standby power supply -ISBY Supply current in VREF IREF 1,2,3 VA = 0 V, VEN = 0.8 V 2/ 1,2,3 VA = 0 V, VEN = 4.0 V 2/ 1,2,3 M, D, P, L, R Capacitance: channel input CS(OFF) Capacitance: channel output CD(OFF) Off isolation VISO Crosstalk rejection VCT Charge injection VCTE 1.2 1.6 1.2 1.6 -100 100 -100 100 400 VREF = 5.5 V, 2/ VEN = 0.8 V 1,2,3 01, 02 -400 VEN = 0.8 V, f = 200 kHz, CL = 7 pF, RL = 1 k, VS = 3 VRMS, TA = +25C, see 4.4.1c CL = 100 pF, VIN = 0 V, see 4.4.1c nA µA µA -400 01, 02 400 µA 400 01, 02 -400 µA -400 01, 02 35 1 3/ +VS = -VS = 0 V, f = 1 MHz, TA = +25C, see 4.4.1c +VS = -VS = 0 V, f = 1 MHz, TA = +25C, see 4.4.1c +VS = -VS = 0 V, f = 1 MHz, TA = +25C, see 4.4.1c VEN = 4.0 V, f = 200 kHz, CL = 7 pF, RL = 1 k, VS = 3 VRMS, TA = +25C, see 4.4.1c V 400 1 3/ M, D, P, L, R CA Max 1 3/ VA = 0 V, VEN = 4.0 V 2/ Unit Min 01, 02 1 3/ M, D, P, L, R Capacitance: digital input Limits 1 3/ M, D, P, L, R Positive standby supply current 01, 02 1 3/ M, D, P, L, R Negative power supply 01, 02 1 3/ VA = VEN = 0.8 V, 4.0 V VEN Device type µA 35 4 01, 02 7 pF 4 01, 02 5 pF 4 01, 02 50 pF 4 01, 02 75 dB 4 01, 02 47 dB 4 01, 02 5 pC See footnotes at end of table. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-15220 A REVISION LEVEL A SHEET 9 TABLE IA. Electrical performance characteristics - Continued. Test Symbol Functional test Transition time from address inputs to output Conditions 1/ -55C TA +125C +VS = +15 V, -VS = -15 V unless otherwise specified Group A subgroups CL = 50 pF, RL = 1 k, see figure 6 M, D, P, L, R Break-before-make time delay tBBM see figure 6 tON(EN), tOFF(EN) 7,8A,8B 01, 02 9 01, 02 800 9 3/ 800 01, 02 5 200 10,11 5 200 9 3/ 5 400 01, 02 see figure 6 10,11 M, D, P, L, R Max 800 9 CL = 50 pF, RL = 1 k, Unit 10,11 9 CL = 50 pF, RL = 1 k, M, D, P, L, R Propagation delay time enable to I/O channels Limits Min See 4.4.1d tALH, tAHL Device type 600 ns `ns ns 600 9 3/ 800 See footnotes at end of table. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-15220 A REVISION LEVEL A SHEET 10 TABLE IA. Electrical performance characteristics. Test Channel on resistance Symbol RON Conditions 4/ -55C TA +125C +VS = +12 V, -VS = -12 V unless otherwise specified Group A subgroups Device type Limits Min ±VS = 10.8 V, 13.2 V, 1,2,3 01, 02 Unit Max 500 IOUT = -1mA, VIN = +5 V,-5 V M, D, P, L, R ±VS = 10.8 V, 13.2 V, IOUT = -1mA, VIN = V+,VM, D, P, L, R RON match between channels ∆RON ±VS = 10.8 V, 13.2 V, 1 3/ 500 1,2,3 700 1 3/ 700 1,2,3 01, 02 20 IOUT = -1 mA, VIN = +5 V,-5 V M, D, P, L, R RON flatness ∆RON-FL 1 3/ 1,2,3 ±VS = 13.2 V, 20 01, 02 25 IOUT = -1 mA, VIN = +5 V,-5 V M, D, P, L, R ±VS = 10.8 V, 1 3/ 25 1,2,3 30 1 3/ 40 IOUT = -1mA, VIN = +5 V,-5 V M, D, P, L, R Positive supply current I+ 1,2,3 VA = 0 V, VEN = 0.8 V 5/ M, D, P, L, R Negative power supply I- +ISBY Negative standby power supply -ISBY Supply current into VREF IREF 400 1 3/ 1,2,3 VA = 0 V, VEN = 0.8 V 5/ M, D, P, L, R Positive standby supply current 01, 02 400 01, 02 1 3/ 1,2,3 VA = 0 V, VEN = 4.0 V 5/ M, D, P, L, R -400 1,2,3 M, D, P, L, R 01, 02 400 1,2,3 VIN = VA = VEN = 0.8 V M, D, P, L, R µA 400 01, 02 1 3/ VREF = 5.5 V, 5/ µA -400 1 3/ VA = 0 V, VEN = 4.0 V 5/ µA -400 µA -400 01, 02 1 3/ 35 µA 35 See footnotes at end of table. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-15220 A REVISION LEVEL A SHEET 11 TABLE IA. Electrical performance characteristics - Continued. Test Transition time from address inputs to output Symbol tALH, tAHL Conditions 4/ -55C TA +125C +VS = +12 V, -VS = -12 V unless otherwise specified Group A subgroups 9 CL = 50 pF, RL = 1 k, see figure 6 tBBM see figure 6 tON(EN), tOFF(EN) 800 9 3/ 800 01, 02 5 200 10,11 5 200 9 3/ 5 400 01, 02 600 ns ns ns see figure 6 10,11 M, D, P, L, R 1/ Max 800 9 CL = 50 pF, RL = 1 k, 01, 02 Unit 10,11 9 CL = 50 pF, RL = 1 k, M, D, P, L, R Propagation delay time enable to I/O channels Limits Min M, D, P, L, R Break-before-make time delay Device type 600 9 3/ 800 Unless otherwise specified, VAH (logic level high) = 4.0 V dc, VAL (logic level low) = 0.8 V dc, VEN = 4.0 V, and VREF = 5.0 V dc. +VS = +15 V dc, -VS = -15 V dc. 2/ +VS = +16.5 V dc, -VS = -16.5 V dc. VAH (logic level high) = 4.0 V dc, VAL (logic level low) = 0.8 V dc, VEN = 4.0 V, and VREF = 5.0 V dc. 3/ RHA device type 01 supplied to this drawing will meet all levels M, D, P, L, and R of irradiation for condition A and irradiation of M, D, P, and L levels for condition D. However, device type 01 is only tested at the “R” level in accordance with MIL-STD-883, method 1019, condition A, and tested at the “L” level for condition D (see 1.5 herein). RHA device type 02 supplied to this drawing will meet all levels M, D, P, and L of irradiation for condition D. However, device type 02 is only tested at the “L” level in accordance with MIL-STD-883, method 1019, condition D (see 1.5 herein). Pre and Post irradiation values and parameters are as specified in Table IA. When performing post irradiation electrical measurements for any RHA level, TA = +25C. 4/ Unless otherwise specified, VAH (logic level high) = 4.0 V dc, VAL (logic level low) = 0.8 V dc, VEN = 4.0 V, and VREF = 5.0 V dc. +VS = +12 V dc, -VS = -12 V dc. 5/ +VS = +13.2 V dc, -VS = -13.2 V dc. VAH (logic level high) = 4.0 V dc, VAL (logic level low) = 0.8 V dc, VEN = 4.0 V, and VREF = 5.0 V dc. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-15220 A REVISION LEVEL A SHEET 12 TABLE IB. SEP test limits. 1/ 2/ Device types SEP Temperature (TC) Linear energy transfer (LET) at bias VS = 20 V. 01, 02 No SEL occurs 125°C Effective LET= 86 MeV-cm /mg 3/ 4/ No SEB observed 125°C Surface LET= 86 MeV-cm /mg 3/ 4/ SET observed 25°C LET= 86 MeV-cm /mg 5/ 2 2 2 1/ For SEP test conditions, see 4.4.4.2 herein. 2/ Technology characterization and model verification supplemented by in-line data may be used in lieu of end of line testing. Test plan must be approved by the technical review board and qualifying activity. 3/ Device types 01 and 02 use silicon on insulator (SOI) technology. No single-event burnout (SEB) or single-event latchup (SEL) was observed when irradiated with Au ions at normal incidence, corresponding to 2 a surface LET of 86 MeV/(cm /mg). The normal particle range into silicon for Au ions after 30 mm of air is about 118 m and the Bragg peak range is 53 m, resulting Au ion penetrate well beyond the sensitive volume of the devices. 4/ Limits are characterized at initial qualification and after any design or process changes which may affect the SEP characteristics, but are not production tested unless specified by the customer through the purchase order or contract. For more information on SEP test results, customers are requested to contact the manufacturer. -6 5/ SET observed at magnitude of ±20 mV detection threshold to a cross section 4.4X10 cm 2. For SET test VS = 10.8 V and VS = 16.5 V. See manufacturer’s single event effects report for further details. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-15220 A REVISION LEVEL A SHEET 13 Case outline X FIGURE 1. Case outline. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-15220 A REVISION LEVEL A SHEET 14 Case outline X – continued. Dimensions Inches Symbol Millimeters Min Max Min Max A 0.076 0.099 1.93 2.51 b 0.008 0.015 0.20 0.38 c 0.009 0.016 0.23 0.41 D 0.555 0.572 14.10 14.53 D1 1.080 1.118 27.43 28.40 E 0.555 0.572 14.10 14.53 E1 1.080 1.118 27.43 28.40 e 0.040 BSC 1.02 BSC e1 0.015 --- 0.38 --- e2 0.007 --- 0.18 --- L 0.253 0.287 6.43 7.29 NOTES: 1. Controlling dimensions are inch, millimeter dimensions are given for reference only. FIGURE 1. Case outline - continued. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-15220 A REVISION LEVEL A SHEET 15 Device types 01, 02 Case outline X Terminal number Terminal symbol Terminal number Terminal symbol 1 OUT 25 A4 2 NC 26 NC 3 IN 16 27 NC 4 IN 15 28 EN 5 IN 14 29 GND 6 IN 13 30 -VS 7 IN 12 31 IN 17 8 IN 11 32 IN 18 9 IN 10 33 IN 19 10 IN 9 34 IN 20 11 IN 8 35 IN 21 12 IN 7 36 IN 22 13 IN 6 37 IN 23 14 IN 5 38 IN 24 15 IN 4 39 IN 25 16 IN 3 40 IN 26 17 IN 2 41 IN 27 18 IN 1 42 IN 28 19 +VS 43 IN 29 20 VREF 44 IN 30 21 A0 45 IN 31 22 A1 46 IN 32 23 A3 47 NC 24 A3 48 NC Package Lid Tied internally to terminal 29 (GND) NC = No connection FIGURE 2. Terminal connections. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-15220 A REVISION LEVEL A SHEET 16 Device type 01 Case outline Terminal number Y Terminal symbol Terminal number Terminal symbol 1 OUT 25 EN 2 IN 16 26 GND 3 IN 15 27 -VS 4 IN 14 28 NC 5 IN 13 29 IN 17 6 IN 12 30 IN 18 7 IN 11 31 IN 19 8 IN 10 32 IN 20 9 IN 9 33 IN 21 10 IN 8 34 IN 22 11 IN 7 35 IN 23 12 IN 6 36 IN 24 13 IN 5 37 IN 25 14 IN 4 38 IN 26 15 IN 3 39 IN 27 16 IN 2 40 IN 28 17 IN 1 41 IN 29 18 +VS 42 IN 30 19 VREF 43 IN 31 20 A0 44 IN 32 21 A1 22 A3 23 A3 24 A4 Package Lid Tied internally to terminal 26 (GND) NC = No connection FIGURE 2. Terminal connections - continued. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-15220 A REVISION LEVEL A SHEET 17 Truth table A4 A3 A2 A1 A0 EN On channel X X X X X H None L L L L L L 1 L L L L H L 2 L L L H L L 3 L L L H H L 4 L L H L L L 5 L L H L H L 6 L L H H L L 7 L L H H H L 8 L H L L L L 9 L H L L H L 10 L H L H L L 11 L H L H H L 12 L H H L L L 13 L H H L H L 14 L H H H L L 15 L H H H H L 16 H L L L L L 17 H L L L H L 18 H L L H L L 19 H L L H H L 20 H L H L L L 21 H L H L H L 22 H L H H L L 23 H L H H H L 24 H H L L L L 25 H H L L H L 26 H H L H L L 27 H H L H H L 28 H H H L L L 29 H H H L H L 30 H H H H L L 31 H H H H H L 32 FIGURE 3. Truth table. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-15220 A REVISION LEVEL A SHEET 18 NOTE: Main switch INXX: Switch on, body tied to source. Switch off, body tied to VS – 0.7 V. FIGURE 4. Logic diagram. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-15220 A REVISION LEVEL A SHEET 19 FIGURE 5. Test circuits for dc levels. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-15220 A REVISION LEVEL A SHEET 20 FIGURE 6. Test circuits and waveforms for ac levels. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-15220 A REVISION LEVEL A SHEET 21 4. VERIFICATION 4.1 Sampling and inspection. For device classes Q and V, sampling and inspection procedures shall be in accordance with MIL-PRF-38535 or as modified in the device manufacturer's Quality Management (QM) plan. The modification in the QM plan shall not affect the form, fit, or function as described herein. 4.2 Screening. For device classes Q and V, screening shall be in accordance with MIL-PRF-38535, and shall be conducted on all devices prior to qualification and technology conformance inspection. 4.2.1 Additional criteria for device classes Q and V. a. The burn-in test duration, test condition and test temperature, or approved alternatives shall be as specified in the device manufacturer's QM plan in accordance with MIL-PRF-38535. The burn-in test circuit shall be maintained under document revision level control of the device manufacturer's Technology Review Board (TRB) in accordance with MIL-PRF-38535 and shall be made available to the acquiring or preparing activity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in method 1015 of MIL-STD-883. b. For device classes Q and V interim and final electrical test parameters shall be as specified in table IIA herein. c. Additional screening for device class V beyond the requirements of device class Q shall be as specified in MIL-PRF-38535, Appendix B. 4.3 Qualification inspection for device classes Q and V. Qualification inspection for device classes Q and V shall be in accordance with MIL-PRF-38535. Inspections to be performed shall be those specified in MIL-PRF-38535 and herein for groups A, B, C, D, and E inspections (see 4.4.1 through 4.4.4). 4.4 Conformance inspection. Technology conformance inspection for classes Q and V shall be in accordance with MIL-PRF-38535 including groups A, B, C, D, and E inspections, and as specified herein. 4.4.1 Group A inspection. a. Tests shall be as specified in table IIA herein. b. Subgroups 5 and 6 in table I, method 5005 of MIL-STD-883 shall be omitted. c. Subgroup 4 (CA, CS, CD, VCT, VCTE, and VISO measurements) should be measured for initial qualification and after any process or design changes which may affect input or output capacitance. d. For device classes Q and V, subgroups 7 and 8 shall include verifying the functionality of the device. 4.4.2 Group C inspection. The group C inspection end-point electrical parameters shall be as specified in table IIA herein. 4.4.2.1 Additional criteria for device classes Q and V. The steady-state life test duration, test condition and test temperature, or approved alternatives shall be as specified in the device manufacturer's QM plan in accordance with MIL-PRF-38535. The test circuit shall be maintained under document revision level control by the device manufacturer's TRB in accordance with MIL-PRF-38535 and shall be made available to the acquiring or preparing activity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in method 1005 of MIL-STD-883. 4.4.3 Group D inspection. The group D inspection end-point electrical parameters shall be as specified in table IIA herein. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-15220 A REVISION LEVEL A SHEET 22 TABLE IIA. Electrical test requirements. Test requirements Subgroups (in accordance with MIL-PRF-38535, table III) Device Device class Q class V Interim electrical parameters (see 4.2) Final electrical parameters (see 4.2) 1,7,9 1,7,9 1,2,3,7,8A, 1/ 8B,9,10,11 1,2,3, 1/ 2/ 7,8A,8B,9, 10,11 Group A test requirements (see 4.4) 1,2,3,7,8A, 8B,9,10,11 1,2,3,7,8A, 8B,9,10,11 Group C end-point electrical parameters (see 4.4) 1,2,3,4,7,8A, 8B,9,10,11 1,2,3,4,7, 8A,8B,9,10,11 Group D end-point electrical parameters (see 4.4) Group E end-point electrical parameters (see 4.4) 1,7,9 1,7,9 1,7,9 1,7,9 1/ 2/ For device class Q, PDA applies to subgroup 1. For device class V, PDA applies to subgroups 1, 7, and delta. Delta limits (see table IIB) shall be required and the delta values shall be computed with reference to the zero hour electrical parameters (see table IA). 4.4.4 Group E inspection. Group E inspection is required only for parts intended to be marked as radiation hardness assured (see 3.5 herein). RHA levels for device classes Q and V shall be as specified in MIL-PRF-38535. End-point electrical parameters shall be as specified in table IIA herein. 4.4.4.1 Total dose irradiation testing. Total dose irradiation testing shall be performed in accordance with MIL-STD-883 method 1019, condition A and D as specified herein. 4.4.4.2 Single event phenomena (SEP). When specified in the purchase order or contract, SEP testing shall be performed on class V devices. SEP testing shall be performed on the Standard Evaluation Circuit (SEC) or alternate SEP test vehicle as approved by the qualifying activity at initial qualification and after any design or process changes which may affect the upset or latchup characteristics. Test four devices with zero failures. ASTM F1192 may be used as a guideline when performing SEP testing. The test conditions for SEP are as follows: a. The ion beam angle of incidence shall be between normal to the die surface and 60 to the normal, inclusive (i.e. 0 angle 60). No shadowing of the ion beam due to fixturing or package related effects is allowed. 7 2 b. The fluence shall be 100 errors or 10 ions/cm . 2 5 2 c. The flux shall be between 10 and 10 ions/cm /s. The cross-section shall be verified to be flux independent by measuring the cross-section at two flux rates which differ by at least an order of magnitude. d. The particle range shall be 20 micron in silicon. e. The test temperature shall be +25C and the maximum rated operating temperature 10C. f. Bias conditions shall be defined by the manufacturer for the latchup measurements. g. For SEL test limits, see Table IB herein. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-15220 A REVISION LEVEL A SHEET 23 TABLE IIB. Burn-in and operating life test delta parameters. TA = +25C. Parameters Symbol Conditions Delta limits Positive supply current +16.5 V, +13.2 V +I VEN = 0.8 V 35 A Negative supply current -16.5 V, -13.2 V -I VEN = 0.8 V 35 A Positive standby supply current +16.5 V, +13.2 V +ISBY VEN = 4.0 V 35 A Negative standby supply current -16.5 V, -13.2 V -ISBY VEN = 4.0 V 35 A Switch on resistance RON Switch on resistance RON Switch on resistance RON Switch on resistance RON Input leakage current, Address and enable pin(s) IIH/IIL Switch off leakage into the source of an unselected channel VS = +16.5 V, -16.5 V, 70 ID = 1 mA, VEN = 0.8 V VS = +15.0 V, -15.0 V, 70 ID = 1 mA, VEN = 0.8 V VS = +13.2 V, -13.2 V, 70 ID = 1 mA, VEN = 0.8 V VS = +10.8 V, -10.8 V, 70 ID = 1 mA, VEN = 0.8 V Measure inputs sequentially, ground all unbiased pins 20 nA VS = +16.5 V, -16.5 V, IS(OFF) 5 nA VIN = V+ - 5 V Measure inputs sequentially Switch off leakage into the drain with the part disabled ID(OFF) Switch on leakage into the source/drain for a selected switch ID(ON) Switch off leakage into the source of an unselected channel VS = +16.5 V, -16.5 V 5 nA VOUT = V+ -5 V VS = +16.5 V, -16.5 V, 5 nA VIN = VOUT = V+ -5 V VS = +16.5 V, -16.5 V, IS(OFF) 5 nA VIN = V- + 5 V, measure inputs sequentially Switch off leakage into the drain with the part disabled ID(OFF) Switch on leakage into the source/drain for a selected switch ID(ON) STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 VS = +16.5 V, -16.5 V, 5 nA VOUT = V- +5 V VS = +16.5 V, -16.5 V, 5 nA VIN = VOUT = V- +5 V SIZE 5962-15220 A REVISION LEVEL A SHEET 24 5. PACKAGING 5.1 Packaging requirements. The requirements for packaging shall be in accordance with MIL-PRF-38535 for device classes Q and V. 6. NOTES 6.1 Intended use. Microcircuits conforming to this drawing are intended for use for Government microcircuit applications (original equipment), design applications, and logistics purposes. 6.1.1 Replaceability. Microcircuits covered by this drawing will replace the same generic device covered by a contractor prepared specification or drawing. 6.2 Configuration control of SMD's. All proposed changes to existing SMD's will be coordinated with the users of record for the individual documents. This coordination will be accomplished using DD Form 1692, Engineering Change Proposal. 6.3 Record of users. Military and industrial users should inform DLA Land and Maritime when a system application requires configuration control and which SMD's are applicable to that system. DLA Land and Maritime will maintain a record of users and this list will be used for coordination and distribution of changes to the drawings. Users of drawings covering microelectronic devices (FSC 5962) should contact DLA Land and Maritime-VA, telephone (614) 692-8108. 6.4 Comments. Comments on this drawing should be directed to DLA Land and Maritime-VA, Columbus, Ohio 43218-3990, or telephone (614) 692-0540. 6.5 Abbreviations, symbols, and definitions. The abbreviations, symbols, and definitions used herein are defined in MIL-PRF-38535 and MIL-HDBK-1331. 6.6 Sources of supply. 6.6.1 Sources of supply for device classes Q and V. Sources of supply for device classes Q and V are listed in MIL-HDBK-103 and QML-38535. The vendors listed in MIL-HDBK-103 and QML-38535 have submitted a certificate of compliance (see 3.6 herein) to DLA Land and Maritime-VA and have agreed to this drawing. 6.7 Additional information. When applicable, a copy of the following additional data shall be maintained and available from the device manufacturer: a. RHA test conditions (SEP). b. Single event latchup (SEL) occurrence. c. Single event burn-out (SEB) observances. d. Single event transient (SET) observances. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-15220 A REVISION LEVEL A SHEET 25 APPENDIX A APPENDIX A FORMS A PART OF SMD 5962-15220 A.1 SCOPE A.1.1 Scope. This appendix establishes minimum requirements for microcircuit die to be supplied under the Qualified Manufacturers List (QML) Program. QML microcircuit die meeting the requirements of MIL-PRF-38535 and the manufacturers approved QM plan for use in monolithic microcircuits, multi-chip modules (MCMs), hybrids, electronic modules, or devices using chip and wire designs in accordance with MIL-PRF-38534 are specified herein. Two product assurance classes consisting of military high reliability (device class Q) and space application (device class V) are reflected in the Part or Identification Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels are reflected in the PIN. A.1.2 PIN. The PIN is as shown in the following example: 5962 R Federal stock class designator \ RHA designator (see A.1.2.1) 15220 01 V 9 A Device type (see A.1.2.2) Device class designator (see A.1.2.3) Die code Die details (see A.1.2.4) / \/ Drawing number A.1.2.1 RHA designator. Device classes Q and V RHA identified die meet the MIL-PRF-38535 specified RHA levels. A dash (-) indicates a non-RHA die. A.1.2.2 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number 01 ISL71841SEH 02 ISL73841SEH Circuit function Radiation hardened dielectrically isolated (DI) BICMOS single 32-channel analog MUX with high impedance analog input overvoltage protection Radiation hardened BICMOS, silicon on insulator (SOI), single 32-channel analog MUX with high impedance analog input overvoltage protection A.1.2.3 Device class designator. Device class Q or V STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 Device requirements documentation Certification and qualification to the die requirements of MIL-PRF-38535 SIZE 5962-15220 A REVISION LEVEL A SHEET 26 APPENDIX A APPENDIX A FORMS A PART OF SMD 5962-15220 A.1.2.4 Die details. The die details designation is a unique letter which designates the die's physical dimensions, bonding pad location(s) and related electrical function(s), interface materials, and other assembly related information, for each product and variant supplied to this appendix. A.1.2.4.1 Die physical dimensions. Die type Figure number 01, 02 A-1 A.1.2.4.2 Die bonding pad locations and electrical functions. Die type Figure number 01, 02 A-1 A.1.2.4.3 Interface materials. Die type Figure number 01, 02 A-1 A.1.2.4.4 Assembly related information. Die type Figure number 01, 02 A-1 A.1.3 Absolute maximum ratings. See paragraph 1.3 herein for details. A.1.4 Recommended operating conditions. See paragraph 1.4 herein for details. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-15220 A REVISION LEVEL A SHEET 27 APPENDIX A APPENDIX A FORMS A PART OF SMD 5962-15220 A.2 APPLICABLE DOCUMENTS. A.2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARD MIL-STD-883 - Test Method Standard Microcircuits. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at http://quicksearch.dla.mil or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) A.2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. A.3 REQUIREMENTS A.3.1 Item requirements. The individual item requirements for device classes Q and V shall be in accordance with MIL-PRF-38535 and as specified herein or as modified in the device manufacturer’s Quality Management (QM) plan. The modification in the QM plan shall not affect the form, fit, or function as described herein. A.3.2 Design, construction and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535 and herein and the manufacturer’s QM plan for device classes Q and V. A.3.2.1 Die physical dimensions. The die physical dimensions shall be as specified in A.1.2.4.1 and on figure A-1. A.3.2.2 Die bonding pad locations and electrical functions. The die bonding pad locations and electrical functions shall be as specified in A.1.2.4.2 and on figure A-1. A.3.2.3 Interface materials. The interface materials for the die shall be as specified in A.1.2.4.3 and on figure A-1. A.3.2.4 Assembly related information. The assembly related information shall be as specified in A.1.2.4.4 and on figure A-1. A.3.2.5 Truth table. The truth table shall be as defined in paragraph 3.2.3 herein. A.3.2.6 Radiation exposure circuit. The radiation exposure circuit shall be as defined in paragraph 3.2.5 herein. A.3.3 Electrical performance characteristics and post-irradiation parameter limits. Unless otherwise specified herein, the electrical performance characteristics and post-irradiation parameter limits are as specified in table IA of the body of this document. A.3.4 Electrical test requirements. The wafer probe test requirements shall include functional and parametric testing sufficient to make the packaged die capable of meeting the electrical performance requirements in table IA. A.3.5 Marking. As a minimum, each unique lot of die, loaded in single or multiple stack of carriers, for shipment to a customer, shall be identified with the wafer lot number, the certification mark, the manufacturer’s identification and the PIN listed in A.1.2 herein. The certification mark shall be a “QML” or “Q” as required by MIL-PRF-38535. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-15220 A REVISION LEVEL A SHEET 28 APPENDIX A APPENDIX A FORMS A PART OF SMD 5962-15220 A.3.6 Certification of compliance. For device classes Q and V, a certificate of compliance shall be required from a QML-38535 listed manufacturer in order to supply to the requirements of this drawing (see A.6.4 herein). The certificate of compliance submitted to DLA Land and Maritime -VA prior to listing as an approved source of supply for this appendix shall affirm that the manufacturer’s product meets, for device classes Q and V, the requirements of MIL-PRF-38535 and the requirements herein. A.3.7 Certificate of conformance. A certificate of conformance as required for device classes Q and V in MIL-PRF-38535 shall be provided with each lot of microcircuit die delivered to this drawing. A.4 VERIFICATION A.4.1 Sampling and inspection. For device classes Q and V, die sampling and inspection procedures shall be in accordance with MIL-PRF-38535 or as modified in the device manufacturer’s Quality Management (QM) plan. The modifications in the QM plan shall not affect the form, fit, or function as described herein. A.4.2 Screening. For device classes Q and V, screening shall be in accordance with MIL-PRF-38535, and as defined in the manufacturer’s QM plan. As a minimum, it shall consist of: a. Wafer lot acceptance for class V product using the criteria defined in MIL-STD-883, method 5007. b. 100% wafer probe (see paragraph A.3.4 herein). c. 100% internal visual inspection to the applicable class Q or V criteria defined in MIL-STD-883, method 2010 or the alternate procedures allowed in MIL-STD-883, method 5004. A.4.3 Conformance inspection. A.4.3.1 Group E inspection. Group E inspection is required only for parts intended to be identified as radiation assured (see A.3.5 herein). RHA levels for device classes Q and V shall be as specified in MIL-PRF-38535. End point electrical testing of packaged die shall be as specified in table IIA herein. Group E tests and conditions are as specified in paragraphs 4.4.4, 4.4.4.1, and 4.4.4.2 herein. A.5 DIE CARRIER A.5.1 Die carrier requirements. The requirements for the die carrier shall be accordance with the manufacturer’s QM plan or as specified in the purchase order by the acquiring activity. The die carrier shall provide adequate physical, mechanical and electrostatic protection. A.6 NOTES A.6.1 Intended use. Microcircuit die conforming to this drawing are intended for use in microcircuits built in accordance with MIL-PRF-38535 or MIL-PRF-38534 for government microcircuit applications (original equipment), design applications, and logistics purposes. A.6.2 Comments. Comments on this appendix should be directed to DLA Land and Maritime -VA, Columbus, Ohio, 43218-3990 or telephone (614)-692-0540. A.6.3 Abbreviations, symbols, and definitions. The abbreviations, symbols, and definitions used herein are defined in MIL-PRF-38535 and MIL-HDBK-1331. A.6.4 Sources of supply for device classes Q and V. Sources of supply for device classes Q and V are listed in QML-38535. The vendors listed within MIL-HDBK-103 and QML-38535 have submitted a certificate of compliance (see A.3.6 herein) to DLA Land and Maritime -VA and have agreed to this drawing. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-15220 A REVISION LEVEL A SHEET 29 APPENDIX A APPENDIX A FORMS A PART OF SMD 5962-15220 -VS +VS NOTE: Pad numbers reflect terminal numbers when placed in case outline X (see figure 1). FIGURE A-1. Die bonding pad locations and electrical functions. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-15220 A REVISION LEVEL A SHEET 30 APPENDIX A APPENDIX A FORMS A PART OF SMD 5962-15220 Die bonding pad locations and electrical functions Die physical dimensions. Die size: 5000 microns x 4080 microns. Die thickness: 483 microns 25.4 microns. Interface materials. Top metallization: 300 Å TiN on 2.8 m Al Cu . TiN is removed from bond pads. Backside metallization: Silicon Glassivation. Type: Silicon nitride on oxide Thickness: 12 kÅ silicon nitride on 3 kÅ oxide Substrate: Bonded wafer dielectrically isolated. Assembly related information. Substrate potential: Floating Special assembly instructions: Double bond (2 bond wires) to GND pads. FIGURE A-1. Die bonding pad locations and electrical functions - continued. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-15220 A REVISION LEVEL A SHEET 31 STANDARD MICROCIRCUIT DRAWING BULLETIN DATE: 16-06-10 Approved sources of supply for SMD 5962-15220 are listed below for immediate acquisition information only and shall be added to MIL-HDBK-103 and QML-38535 during the next revision. MIL-HDBK-103 and QML-38535 will be revised to include the addition or deletion of sources. The vendors listed below have agreed to this drawing and a certificate of compliance has been submitted to and accepted by DLA Land and Maritime-VA. This information bulletin is superseded by the next dated revision of MIL-HDBK-103 and QML-38535. DLA Land and Maritime maintains an online database of all current sources of supply at http://www.landandmaritime.dla.mil/Programs/Smcr/. Standard microcircuit drawing PIN 1/ Vendor CAGE number Vendor similar PIN 2/ 5962R1522001VXC 34371 ISL71841SEHVF 5962R1522001VYA 34371 ISL71841SEHVL 5962R1522001V9A 34371 ISL71841SEHVX 5962L1522002VXC 34371 ISL73841SEHVF 5962L1522002V9A 34371 ISL73841SEHVX 1/ The lead finish shown for each PIN representing a hermetic package is the most readily available from the manufacturer listed for that part. If the desired lead finish is not listed contact the vendor to determine its availability. 2/ Caution. Do not use this number for item acquisition. Items acquired to this number may not satisfy the performance requirements of this drawing. Vendor CAGE number 34371 Vendor name and address Intersil Corporation 1650 Robert Conlan Blvd. Palm Bay, FL 32905 The information contained herein is disseminated for convenience only and the Government assumes no liability whatsoever for any inaccuracies in the information bulletin.