Test Report 020 Total Dose Testing of the ISL71830SEH 16-Channel Analog Multiplexer Introduction Test Description This report summarizes the results of a total dose test of the ISL71830SEH 16-channel low voltage analog multiplexer. The test was conducted in order to determine the sensitivity of the part to the total dose environment. Irradiation under bias and with all pins grounded and subsequent high temperature anneals are complete. Irradiation Facilities Reference Documents • MIL-STD-883 test method 1019 • ISL71830SEH datasheet. • DLA Land and Maritime Standard Microcircuit Drawing (SMD) 5962-15247 Irradiation was performed using a Hopewell Designs N40 panoramic low dose rate 60Co irradiator located in the Palm Bay, Florida Intersil facility. The irradiations were performed at 8.554mrad(Si)/s to 9.322mrad(Si)/s in accordance with MIL-STD-883 Test Method 1019. A PbAl box was used to shield the test board and devices under test against low energy secondary gamma radiation. The high temperature anneal was performed under bias at +100°C for 168 hours. Test Fixturing Figure 1 on page 2 shows the configuration and power supply sequencing used for biased irradiation. Part Description The ISL71830SEH is a radiation tolerant 16-channel analog multiplexer that is fabricated using Intersil's proprietary P6SOI (Silicon on Insulator) process technology to provide excellent latch-up performance. The part operates over a single supply range from 3.3V to 5V and has four digital address inputs plus an enable pin that can be driven with adjustable logic thresholds to select one of 16 available channels. Inactive channels are isolated from the active channel by a high impedance, which inhibits any interaction between them. The ISL71830SEH's low switch ON-resistance allows improved signal integrity and reduced power losses. The ISL71830SEH is also designed for cold sparing making it compatible with redundancy techniques in high reliability applications. The part is designed to provide a high impedance to the analog source in a powered OFF condition, making it easy to add additional backup devices without incurring extra power dissipation. The ISL71830SEH also has analog overvoltage protection on the switch inputs that disables the switch during an overvoltage event to protect upstream and downstream devices. All inputs are Electrostatic Discharge (ESD) protected to 5kV Human Body Model (HBM). The ISL71830SEH is available in a 28 Ld Ceramic Dual Flatpack (CDFP) and operates over the extended temperature range of -55°C to +125°C. The ISL71831SEH is a 32-channel version of the ISL71830SEH and is available in a 48 Ld Ceramic Quad Flatpack (CQFP); please refer to the ISL71831SEH datasheet for further information. November 10, 2015 TR020.0 1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 1-888-468-3774 | Copyright Intersil Americas LLC 2015. All Rights Reserved Intersil (and design) is a trademark owned by Intersil Corporation or one of its subsidiaries. All other trademarks mentioned are the property of their respective owners. Test Report 020 V2 R2 R1 1 (VDD) (OUT) 28 2 N/C (N/C) 27 3 N/C (S8) 26 4 (S16) (S7) 25 233032-005-662 5 (S15) 7 (S13) (S6) 24 ISL71830SEH 6 (S14) (S5) 23 MASK # 54250A01 (S4) 22 8 (S12) (S3) 21 9 (S11) (S2) 20 (S1) 19 10 (S10) 11 (S9) (ENB) 18 12 (GND) (A0) 17 13 (VREF) (A1) 16 14 (A3) (A2) 15 1. V1 = +5.5V, ±0.1V 2. V2 = +2.75V, ±0.1V 3. R1 and R2 = 1Ω, ±5%, ¼ Watt (Per socket) 4. Socket is 28 pin flatpack (Sensata 628-0282315 5. Power-on sequence is V1 followed by V2 6. Power-off sequence is V2 then V1 FIGURE 1. IRRADIATION BIAS CONFIGURATION AND POWER SUPPLY SEQUENCING FOR THE ISL71830SEH Characterization Equipment and Procedures All electrical testing was performed outside the irradiator using production Automated Test Equipment (ATE) with data logging of all parameters at each downpoint. All downpoint electrical testing was performed at room temperature. Experimental Matrix Results Attributes Data Total dose testing of the ISL71830SEH is complete and showed no reject devices after irradiation up to 75krad(Si) or after the post-75krad(Si) irradiation anneal. Table 1 summarizes the results. Testing proceeded in accordance with the guidelines of MIL-STD-883 Test Method 1019. The experimental matrix consisted of 16 samples irradiated at low dose rate with all pins grounded and 16 samples irradiated at low dose rate under bias (four control units were used). Samples of the ISL71830SEH were drawn from development lot J69526 and were packaged in the production hermetic 28-pin ceramic flatpack package outline K28.A. The samples were processed through the standard burn in cycle and were screened to the SMD 5962-15247 limits at room, low and high temperature before irradiation. Downpoints Downpoints were zero, 10krad(Si), 30krad(Si), 50krad(Si) and 75krad(Si). All samples were subjected to a high temperature biased anneal for 168 hours at +100°C following irradiation Submit Document Feedback 2 TR020.0 November 10, 2015 Test Report 020 TABLE 1. ISL71830SEH TOTAL DOSE TEST ATTRIBUTES DATA DOSE RATE BIAS SAMPLE SIZE 8.554mrad(Si)/s to 9.322mrad(Si)/s Figure 1 16 8.554mrad(Si)/s to 9.322mrad(Si)/s Grounded 16 DOWNPOINT BIN 1 (Note 1) REJECTS Pre-irradiation 16 10krad(Si) 16 0 30krad(Si) 16 0 50krad(Si) 16 0 75krad(Si) 16 0 Anneal, 168 hours at +100°C (Note 2) 16 0 Pre-irradiation 16 10krad(Si) 16 0 30krad(Si) 16 0 50krad(Si) 16 0 75krad(Si) 16 0 Anneal, 168 hours at +100°C (Note 2) 16 0 NOTES: 1. Bin 1 indicates a device that passes all pre-irradiation specification limits. 2. The 168 hours anneal was performed at +100°C using the bias configuration shown in Figure 1. Submit Document Feedback 3 TR020.0 November 10, 2015 Test Report 020 Variables Data The plots in Figures 2 through 22 show data at all downpoints. The plots show the average of key parameters as a function of total dose for each of the two irradiation conditions. Many of the plots show the total dose response of the average of parameters, such as ON-resistance and the various leakage parameters for each of the 16 channels in order to facilitate the interpretation of the results as well as managing the length of this report. All samples showed excellent stability over irradiation. See the “Conclusion” on page 15 for further discussion. Variables Data Plots 140 SPEC LIMIT 120 ON-RESISTANCE (Ω) 100 80 60 40 rON MINIMUM, BIASED rON MINIMUM, GROUNDED rON MAXIMUM, BIASED rON MAXIMUM, GROUNDED 20 AVERAGE OF 16 CHANNELS 0 0 25 50 75 ANNEAL TOTAL DOSE (krad(Si)) AT 0.01rad(Si)/s FIGURE 2. ISL71830SEH minimum and maximum switch ON-resistance, average of 16 channels, as a function of low dose rate total dose irradiation for the unbiased (all pins grounded) and the biased (per Figure 1) cases. The dose rate was 8.554mrad(Si)/s to 9.322mrad(Si)/s. Sample size for each of the two cells was 16. The post-irradiation SMD limit is 120Ω maximum. Submit Document Feedback 4 TR020.0 November 10, 2015 Test Report 020 Variables Data Plots (Continued) 6 SPEC LIMIT ON-RESISTANCE MATCH (Ω) 5 4 3 2 rON MATCH, 4.5V, BIASED rON MATCH, 4.5V, GROUNDED rON MATCH, 0.5V, BIASED rON MATCH, 0.5V, GROUNDED 1 AVERAGE OF 16 CHANNELS 0 0 25 50 75 ANNEAL TOTAL DOSE (krad(Si)) AT 0.01rad(Si)/s FIGURE 3. ISL71830SEH switch ON-resistance match, average of 16 channels, as a function of low dose rate total dose irradiation for the unbiased (all pins grounded) and the biased (per Figure 1) cases. The dose rate was 8.554mrad(Si)/s to 9.322mrad(Si)/s. Sample size for each of the two cells was 16. The post-irradiation SMD limit is 5Ω maximum. 45 SPEC LIMIT 40 ON-RESISTANCE FLATNESS (Ω) 35 30 25 20 15 10 rON FLATNESS, BIASED rON FLATNESS, GROUNDED 5 AVERAGE OF 16 CHANNELS 0 0 25 50 75 ANNEAL TOTAL DOSE (krad(Si)) AT 0.01rad(Si)/s FIGURE 4. ISL71830SEH ON-resistance flatness, average of 16 channels, as a function of low dose rate total dose irradiation for the unbiased (all pins grounded) and the biased (per Figure 1) cases. The dose rate was 8.554mrad(Si)/s to 9.322mrad(Si)/s. Sample size for each of the two cells was 16. The post-irradiation SMD limit is 40Ω maximum. Submit Document Feedback 5 TR020.0 November 10, 2015 Test Report 020 Variables Data Plots (Continued) 40 SPEC LIMIT 30 SWITCH OFF LEAKAGE (nA) 20 10 0 -10 -20 SPEC LIMIT IS(OFF)P5p0_5p5_BIASED IS(OFF)P5p0_5p5_GROUNDED IS(OFF)_P0p5_5p5, BIASED IS(OFF)_P0p5_5p5, GROUNDED -30 AVERAGE OF 16 CHANNELS -40 0 25 50 75 ANNEAL TOTAL DOSE (krad(Si)) AT 0.01rad(Si)/s FIGURE 5. ISL71830SEH switch input OFF leakage, average of all 16 channels, 5.5V supply, input voltage to selected switch 5V or 0.5V, output and all unselected inputs at 0.5V, as a function of low dose rate total dose irradiation for the unbiased (all pins grounded) and the biased (per Figure 1) cases. The dose rate was 8.554mrad(Si)/s to 9.322mrad(Si)/s. Sample size for each of the two cells was 16. The post-irradiation SMD limit is -30µA to 30µA. 40 SPEC LIMIT 30 SWITCH OFF LEAKAGE (nA) 20 10 0 -10 -20 SPEC LIMIT -30 ISOFFP7p0_5p5_BIASED ISOFFP7p0_5p5_ GROUNDED AVERAGE OF 16 CHANNELS -40 0 25 50 75 ANNEAL TOTAL DOSE (krad(Si)) AT 0.01rad(Si)/s FIGURE 6. ISL71830SEH switch input overvoltage OFF leakage, average of all 16 channels, 5.5V supply, input voltage to selected switch 7V, output and all unselected inputs at 0.0V as a function of low dose rate total dose irradiation for the unbiased (all pins grounded) and the biased (per Figure 1) cases. The dose rate was 8.554mrad(Si)/s to 9.322mrad(Si)/s. Sample size for each of the two cells was 16. The post-irradiation SMD limit is -30µA to 30µA. Submit Document Feedback 6 TR020.0 November 10, 2015 Test Report 020 Variables Data Plots (Continued) 25 SPEC LIMIT 20 SWITCH OFF LEAKAGE (nA) 15 10 5 0 -5 -10 -15 SPEC LIMIT ISPOFFSP7p0, BIASED ISPOFFSP7p0, GROUNDED -20 AVERAGE OF 16 CHANNELS -25 0 25 50 75 ANNEAL TOTAL DOSE (krad(Si)) AT 0.01rad(Si)/s FIGURE 7. ISL71830SEH 'supplies off' switch OFF leakage into the input of an unselected channel, average of all 16 channels, supplies, address pins, enable pin and unselected inputs grounded, input voltage to selected switch 7V as a function of low dose rate total dose irradiation for the unbiased (all pins grounded) and the biased (per Figure 1) cases. The dose rate was 8.554mrad(Si)/s to 9.322mrad(Si)/s. Sample size for each of the two cells was 16. The post-irradiation SMD limit is -20µA to 20µA. 25 SPEC LIMIT 20 SWITCH OFF LEAKAGE (nA) 15 10 5 0 -5 -10 -15 SPEC LIMIT ISPOPNSP7p0, BIASED ISPOPNSP7p0, GROUNDED -20 -25 0 25 50 75 ANNEAL TOTAL DOSE (krad(Si)) AT 0.01rad(Si)/s FIGURE 8. ISL71830SEH 'supplies open' switch OFF leakage into the input of an unselected channel, supplies, address pins, enable pin and unselected inputs grounded, input voltage to selected switch 7V and average of all 16 channels, as a function of low dose rate total dose irradiation for the unbiased (all pins grounded) and the biased (per Figure 1) cases. The dose rate was 8.554mrad(Si)/s to 9.322mrad(Si)/s. Sample size for each of the two cells was 16. The post-irradiation SMD limit is -20µA to 20µA. Submit Document Feedback 7 TR020.0 November 10, 2015 Test Report 020 Variables Data Plots (Continued) 6 SPEC LIMIT SWITCH ON LEAKAGE (nA) 5 4 3 SPEC LIMIT IS(ON)P7p0_5p5, BIASED IS(ON)P7p0_5p5, GROUNDED AVERAGE OF 16 CHANNELS 2 0 25 50 75 ANNEAL TOTAL DOSE (krad(Si)) AT 0.01rad(Si)/s FIGURE 9. ISL71830SEH 'overvoltage' switch ON leakage into a selected channel, average of all 16 channels, 5.5V supply, input voltage to selected switch 7V, output open and unselected inputs at 0.0V, as a function of low dose rate total dose irradiation for the unbiased (all pins grounded) and the biased (per Figure 1) cases. The dose rate was 8.554mrad(Si)/s to 9.322mrad(Si)/s. Sample size for each of the two cells was 16. The post-irradiation SMD limit is 2.75µA to 5.5µA. 40 SPEC LIMIT 30 SWITCH OFF LEAKAGE (nA) 20 10 0 -10 -20 IDO(OFF)_P5p0_5p5, BIASED IDO(OFF)_P5p0_5p5, GROUNDED IDO(OFF)_P0p5_5p5, BIASED IDO(OFF)_P0p5_5p5, GROUNDED SPEC LIMIT -30 AVERAGE OF 16 CHANNELS -40 0 25 50 75 ANNEAL TOTAL DOSE (krad(Si)) AT 0.01rad(Si)/s FIGURE 10. ISL71830SEH switch OFF leakage into the multiplexer output, 5.5V supply, input voltage 0.5V or 5V and output voltage 5V or 0.5V as a function of low dose rate total dose irradiation for the unbiased (all pins grounded) and the biased (per Figure 1) cases. The dose rate was 8.554mrad(Si)/s to 9.322mrad(Si)/s. Sample size for each of the two cells was 16. The post-irradiation SMD limit is -30µA to 30µA. Submit Document Feedback 8 TR020.0 November 10, 2015 Test Report 020 Variables Data Plots (Continued) 40 SPEC LIMIT 30 SWITCH ON LEAKAGE (nA) 20 10 0 -10 -20 ID(ON)P5p0_5p5, BIASED ID(ON)P5p0_5p5, GROUNDED ID(ON)P0p5_5p5, BIASED ID(ON)P0p5_5p5, GROUNDED SPEC LIMIT -30 -40 0 25 50 75 ANNEAL TOTAL DOSE (krad(Si)) AT 0.01rad(Si)/s FIGURE 11. ISL71830SEH switch ON leakage into the input and output for a selected switch, average of all 16 channels, 5.5V supply, selected input and output at 0.5V or 5V and unselected inputs at 5V or 0.5V, as a function of low dose rate total dose irradiation for the unbiased (all pins grounded) and the biased (per Figure 1) cases. The dose rate was 8.554mrad(Si)/s to 9.322mrad(Si)/s. Sample size for each of the two cells was 16. The post-irradiation SMD limit is -30µA to 30µA. 1.7 A0-A3 AND ENABLE INPUT LOW VOLTAGE (V) 1.6 1.5 VIL_A0 BIASED VIL_A1 BIASED VIL_A2 BIASED VIL_A3 BIASED VIL_EN BIASED VIL_A0 GROUNDED VIL_A1 GROUNDED VIL_A2 GROUNDED VIL_A3 GROUNDED VIL_EN GROUNDED 1.4 1.3 1.2 0 25 50 75 ANNEAL TOTAL DOSE (krad(Si)) AT 0.01rad(Si)/s FIGURE 12. ISL71830SEH input LOW voltage, address pins A0 through A3 and Enable pin as a function of low dose rate total dose irradiation for the unbiased (all pins grounded) and the biased (per Figure 1) cases. The dose rate was 8.554mrad(Si)/s to 9.322mrad(Si)/s. Sample size for each of the two cells was 16. The post-irradiation SMD limits are 1.3V to 1.6V. Submit Document Feedback 9 TR020.0 November 10, 2015 Test Report 020 Variables Data Plots (Continued) 1.7 SPEC LIMIT INPUT HIGH VOLTAGE (V) 1.6 1.5 VIH_A0 BIASED VIH_A1 BIASED VIH_A2 BIASED VIH_A3 BIASED VIH_EN BIASED VIH_A0 GROUNDED VIH_A1 GROUNDED VIH_A2 GROUNDED VIH_A3 GROUNDED VIH_EN GROUNDED 1.4 SPEC LIMIT 1.3 A0-A3 AND ENABLE 1.2 0 25 50 ANNEAL 75 TOTAL DOSE (krad(Si)) AT 0.01rad(Si)/s FIGURE 13. ISL71830SEH input HIGH voltage, address pins A0 through A3 and Enable pin, as a function of low dose rate total dose irradiation for the unbiased (all pins grounded) and the biased (per Figure 1) cases. The dose rate was 8.554mrad(Si)/s to 9.322mrad(Si)/s. Sample size for each of the two cells was 16. The post-irradiation SMD limits are 1.3V to 1.6V. 1.2 SPEC LIMIT INPUT LOW CURRENT (µA) 1.0 0.8 0.6 IAL_A0 BIASED IAL_A1 BIASED 0.4 IAL_A2 BIASED IAL_A3 BIASED IAL_EN BIASED 0.2 IAL_A0 GROUNDED A0-A3 and Enable IAL_A1 GROUNDED IAL_A2 GROUNDED 0 IAL_A3 GROUNDED IAL_EN GROUNDED -0.2 0 25 50 75 ANNEAL TOTAL DOSE (krad(Si)) AT 0.01rad(Si)/s FIGURE 14. ISL71830SEH input LOW current, address pins A0 through A3 and Enable pin, as a function of low dose rate total dose irradiation for the unbiased (all pins grounded) and the biased (per Figure 1) cases. The dose rate was 8.554mrad(Si)/s to 9.322mrad(Si)/s. Sample size for each of the two cells was 16. The post-irradiation SMD limits are -0.1µA to 0.1µA. Submit Document Feedback 10 TR020.0 November 10, 2015 Test Report 020 Variables Data Plots (Continued) 1.2 SPEC LIMIT 1.0 INPUT HIGH CURRENT (µA) IAH_A0 BIASED 0.8 IAH_A1 BIASED IAH_A2 BIASED 0.6 IAH_A3 BIASED IAH_EN BIASED 0.4 IAH_A0 GROUNDED IAH_A1 GROUNDED 0.2 A0-A3 and Enable IAH_A2 GROUNDED IAH_A3 GROUNDED 0 IAH_EN GROUNDED -0.2 0 25 50 75 ANNEAL TOTAL DOSE (krad(Si)) AT 0.01rad(Si)/s FIGURE 15. ISL71830SEH input HIGH current, address pins A0 through A3 and Enable pin, as a function of low dose rate total dose irradiation for the unbiased (all pins grounded) and the biased (per Figure 1) cases. The dose rate was 8.554mrad(Si)/s to 9.322mrad(Si)/s. Sample size for each of the two cells was 16. The post-irradiation SMD limits are -0.1µA to 0.1µA. 0.35 SPEC LIMIT QUIESCENT SUPPLY CURRENT (µA) 0.30 0.25 0.20 0.15 0.10 0.05 3.6V, BIASED 3.6V, GROUNDED 5.5V, BIASED 5.5V, GROUNDED 0 -0.05 0 25 50 75 ANNEAL TOTAL DOSE (krad(Si)) AT 0.01rad(Si)/s FIGURE 16. ISL71830SEH quiescent supply current, 3.6V and 5.5V supply and VREF voltage, as a function of low dose rate total dose irradiation for the unbiased (all pins grounded) and the biased (per Figure 1) cases. The dose rate was 8.554mrad(Si)/s to 9.322mrad(Si)/s. Sample size for each of the two cells was 16. The post-irradiation SMD limit is 0.3µA maximum for both voltages. Submit Document Feedback 11 TR020.0 November 10, 2015 Test Report 020 Variables Data Plots (Continued) 0.25 SPEC LIMIT REFERENCE CURRENT (µA) 0.20 0.15 0.10 0.05 0 3.6V, BIASED 3.6V, GROUNDED 5.5V, BIASED 5.5V, GROUNDED 0 25 50 75 ANNEAL TOTAL DOSE (krad(Si)) AT 0.01rad(Si)/s FIGURE 17. ISL71830SEH reference supply current, 3.6V and 5.5V supply and VREF voltage as a function of low dose rate total dose irradiation for the unbiased (all pins grounded) and the biased (per Figure 1) cases. The dose rate was 8.554mrad(Si)/s to 9.322mrad(Si)/s. Sample size for each of the two cells was 16. The post-irradiation SMD limit is 0.2µA maximum for both voltages. 120 LOW TO HIGH DELAY SPEC LIMIT ADDRESS TO OUPUT DELAY (ns) 100 80 SPEC LIMIT 60 40 tALH, 4.5V, BIASED tALH, 4.5V, GROUNDED tALH, 3.0V, BIASED tALH, 3.0V, GROUNDED SPEC LIMIT, 4.5V SPEC LIMIT, 3.0V 20 0 0 25 50 75 ANNEAL TOTAL DOSE (krad(Si)) AT 0.01rad(Si)/s FIGURE 18. ISL71830SEH address input to multiplexer output delay, LOW to HIGH as a function of low dose rate total dose irradiation for the unbiased (all pins grounded) and the biased (per Figure 1) cases. The dose rate was 8.554mrad(Si)/s to 9.322mrad(Si)/s. Sample size for each of the two cells was 16. The post-irradiation SMD limits are 70ns maximum (4.5V) and 100ns maximum (3.0V). Submit Document Feedback 12 TR020.0 November 10, 2015 Test Report 020 Variables Data Plots (Continued) 120 HIGH TO LOW DELAY SPEC LIMIT ADDRESS TO OUPUT DELAY (ns) 100 80 SPEC LIMIT 60 40 tAHL, 4.5V, BIASED tAHL, 4.5V, GROUNDED tAHL, 3.0V, BIASED tAHL, 3.0V, GROUNDED SPEC LIMIT, 4.5V SPEC LIMIT, 3.0V 20 0 0 25 50 75 ANNEAL TOTAL DOSE (krad(Si)) AT 0.01rad(Si)/s FIGURE 19. ISL71830SEH address input to multiplexer output delay, HIGH to LOW, as a function of low dose rate total dose irradiation for the unbiased (all pins grounded) and the biased (per Figure 1) cases. The dose rate was 8.554mrad(Si)/s to 9.322mrad(Si)/s. Sample size for each of the two cells was 16. The post-irradiation SMD limits are 70ns maximum (4.5V) and 100ns maximum (3.0V). 60 SPEC LIMIT BREAK-BEFORE-MAKE DELAY (ns) 50 SPEC LIMIT 40 30 20 tBBM, 4.5V, BIASED tBBM, 4.5V, GROUNDED tBBM, 3.0V, BIASED tBBM, 3.0V, GROUNDED SPEC LIMIT, 3.0V and 4.5V SPEC LIMIT, 4.5V SPEC LIMIT, 3.0V 10 SPEC LIMIT 0 0 25 50 75 Anneal TOTAL DOSE (krad(Si)) AT 0.01rad(Si)/s FIGURE 20. ISL71830SEH Break-Before-Make (BBM) delay as a function of low dose rate total dose irradiation for the unbiased (all pins grounded) and the biased (per Figure 1) cases. The dose rate was 8.554mrad(Si)/s to 9.322mrad(Si)/s. Sample size for each of the two cells was 16. The post-irradiation SMD limits are 5ns minimum and 40ns maximum (4.5V) and 5ns minimum and 50.0ns maximum (3.0V). Submit Document Feedback 13 TR020.0 November 10, 2015 Test Report 020 Variables Data Plots (Continued) ENABLE TO OUTPUT PROPAGATION DELAY (ns) 60 SPEC LIMIT 50 SPEC LIMIT 40 30 20 tON(EN), 4.5V, BIASED tON(EN), 4.5V, GROUNDED tON(EN), 3.0V, BIASED tON(EN), 3.0V, GROUNDED SPEC LIMIT, 4.5V SPEC LIMIT, 3.0V 10 0 0 25 50 75 ANNEAL TOTAL DOSE (krad(Si)) AT 0.01rad(Si)/s FIGURE 21. ISL71830SEH enable ON to multiplexer output propagation delay as a function of low dose rate total dose irradiation for the unbiased (all pins grounded) and the biased (per Figure 1) cases. The dose rate was 8.554mrad(Si)/s to 9.322mrad(Si)/s. Sample size for each of the two cells was 16. The post-irradiation SMD limits are 40ns maximum (4.5V) and 50ns maximum (3.0V). ENABLE TO OUTPUT PROPAGATION DELAY (ns) 60 SPEC LIMIT 50 SPEC LIMIT 40 30 20 tOFF(EN), 4.5V, BIASED tOFF(EN), 4.5V, GROUNDED tOFF(EN), 3.0V, BIASED tOFF(EN), 3.0V, GROUNDED SPEC LIMIT, 4.5V SPEC LIMIT, 3.0V 10 0 0 25 50 75 ANNEAL TOTAL DOSE (krad(Si)) AT 0.01rad(Si)/s FIGURE 22. IISL71830SEH enable OFF to multiplexer output propagation delay as a function of low dose rate total dose irradiation for the unbiased (all pins grounded) and the biased (per Figure 1) cases. The dose rate was 8.554mrad(Si)/s to 9.322mrad(Si)/s. Sample size for each of the two cells was 16. The post-irradiation SMD limits are 40ns maximum (4.5V) and 50ns maximum (3.0V). Submit Document Feedback 14 TR020.0 November 10, 2015 Test Report 020 Conclusion This document reports results of a low dose rate total dose test of the ISL71830SEH 16-channel analog multiplexer. Parts were tested at low dose rate underbiased and unbiased conditions as outlined in MIL-STD-883 Test Method 1019.7. The samples were also taken through a high temperature biased anneal at +100°C for 168 hours. ATE characterization testing at downpoints showed no rejects to the SMD Group A limits after biased and grounded irradiation at low dose rate or after the high temperature anneal. Attributes data is presented in Table 1, while variables data for selected parameters is presented in Figure 2 through 22. All parameters showed excellent stability. TABLE 2. REPORTED PARAMETER FIGURE PARAMETER LIMIT LOW LIMIT HIGH UNIT NOTES 2 Switch ON-resistance - 120 Ω 3 Switch ON-resistance match - 5 Ω 4 Switch ON-resistance flatness - 40 Ω 5 Switch input OFF leakage -30 30 nA 6 Switch input OFF leakage -30 30 nA Overvoltage 7 Switch input OFF leakage -20 20 nA Supplies grounded 8 Switch input OFF leakage -20 20 nA Supplies open 9 Switch input ON leakage 2.75 5.5 µA 10 Switch output OFF leakage -30 30 nA 11 Switch output ON leakage -30 30 nA 12 Logic input LOW voltage 1.3 1.6 V 13 Logic input HIGH voltage 1.3 1.6 V 14 Logic input LOW current -0.1 0.1 µA 15 Logic input HIGH current -0.1 0.1 µA 16 Quiescent supply current - 0.3 µA 17 VREF supply current - 0.2 µA 18 Address input to output delay - 70/100 ns LOW to HIGH, 4.5V/3.0V 19 Address input to output delay - 70/100 ns HIGH to LOW, 4.5V/3.0V 20 Break before make delay 5 40/50 ns 4.5V/3.0V 21 Enable ON to output delay - 40/50 ns 4.5V/3.0V 22 Enable OFF to output delay - 40/50 ns 4.5V/3.0V NOTE: 3. Limits are taken from Standard Microcircuit Drawing (SMD) 5962-15247. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that the document is current before proceeding. For information regarding Intersil Corporation and its products, see www.intersil.com Submit Document Feedback 15 TR020.0 November 10, 2015