Schematic

5
4
3
2
1
D
D
C
C
TMDSSK3358 Board
-See the Hardware User Guide for board details
-See the Board Errata document for important details
-See the PCB Build Specification for PCB Details
B
PCB1
PCB2
TMDSSK3358 Board Bare PCB
TMDSSK3358 LCD Carrier Bare PCB
B
A
A
Texas Instruments, Inc.
ARM MPU Business Unit
12500 TI Blvd
Dallas, TX 75243
Final
TMDSSK3358
Title Page
Size
5
4
3
2
Document Number
C
TMDSSK3358_1.2A.dsn
Date:
Friday, March 22, 2013
Sheet: 1
1
Modified By:
Rev
Radha
1.2B
of 17
5
4
3
2
1
D
D
C250
GND_OSC0
AM335X_OSC0_IN
18pF, 50V
Y6
24MHz
AM335X
R191
10K
0 AM335X_OSC0_OUT
R213
C245
VDDSHV6
R216
DNI
18pF, 50V
U26A
V10
C247
C249
DDR_A[14..0]
GND_OSC0
32.768KHz MC-306
GND_OSC1
<7>
22pF
Y7
22pF
0
DDR_A[14..0]
<7>
DDR_BA[2..0]
DDR_D[15..0]
<7>
<7>
<7>
<7>
<7>
<7>
AM335X_OSC1_IN
A6
AM335X_OSC1_OUT
A4
A5
DDR_BA[2..0]
DDR_A0
DDR_A1
DDR_A2
DDR_A3
DDR_A4
DDR_A5
DDR_A6
DDR_A7
DDR_A8
DDR_A9
DDR_A10
DDR_A11
DDR_A12
DDR_A13
DDR_A14
DDR_D[15..0]
DDR_BA0
DDR_BA1
DDR_BA2
F3
H1
E4
C3
C2
B1
D5
E2
D4
C1
F4
F2
E3
H3
H4
D3
C4
E1
B3
DDR_D0
DDR_D1
DDR_D2
DDR_D3
DDR_D4
DDR_D5
DDR_D6
DDR_D7
DDR_D8
DDR_D9
DDR_D10
DDR_D11
DDR_D12
DDR_D13
DDR_D14
DDR_D15
M3
M4
N1
N2
N3
N4
P3
P4
J1
K1
K2
K3
K4
L3
L4
M1
DDR_CLK
DDR_CLKn
DDR_CKE
DDR_CSn
DDR_CASn
DDR_RASn
DDR_WEn
D2
D1
G3
H2
F1
G4
B2
DDR_DQM0
DDR_DQS0
DDR_DQSN0
DDR_DQM1
DDR_DQS1
DDR_DQSN1
M2
P1
P2
J2
L1
L2
DDR_ODT
DDR_RESETn
G1
G2
J3
<7>
<7>
<7>
<7>
<7>
<7>
<7>
B
R217
GND_OSC1
C
<7>
U11
V11
DDR_CLK
DDR_CLKn
DDR_CKE
DDR_CSn
DDR_CASn
DDR_RASn
DDR_WEn
DDR_DQM0
DDR_DQS0
DDR_DQSN0
DDR_DQM1
DDR_DQS1
DDR_DQSN1
<7> DDR_ODT
<7> DDR_RESETn
<7>
J4
DDR_VREF
XTALIN [OSC0_IN]
[PORZ] PWRONRSTn
[NRESETIN_OUT] WARMRSTn
[RTC_PORZ] RTC_PWRONRSTn
XTALOUT [OSC0_OUT]
VSS_OSC
RTC_XTALIN [OSC1_IN]
[XDMA_EVENT_INTR0//TIMER4/CLKOUT1/SPI1_CS1/PR1_PRU1_PRU_R31_16/EMU2/GPIO0_19]
[XDMA_EVENT_INTR1//TCLKIN/CLKOUT2/TIMER7/PR1_PRU0_PRU_R31_16/EMU3/GPIO0_20]
RTC_XTALOUT [OSC1_OUT]
VSS_RTC
[NTRST] TRSTn
TMS
TDI
TCK
TDO
EMU0///////GPIO3_7
EMU1///////GPIO3_8
AM3358
DDR_A0
DDR_A1
DDR_A2
DDR_A3
DDR_A4
DDR_A5
DDR_A6
DDR_A7
DDR_A8
DDR_A9
DDR_A10
DDR_A11
DDR_A12
DDR_A13
DDR_A14
DDR_A15
DDR_BA0
DDR_BA1
DDR_BA2
[NNMI] NMIn
XDMA_EVENT_INTR0
XDMA_EVENT_INTR1
ZCZ Package
[GPMC_CLK/LCD_MEMORY_CLK/GPMC_WAIT1/MMC2_CLK/PR1_MII1_CRS/PR1_MDIO_MDCLK/MCASP0_FSR/GPIO2_1] GPMC_CLK
[GPMC_CSN0///////GPIO1_29] GPMC_CSn0
[GPMC_CSN1/GPMC_CLK/MMC1_CLK/PR1_EDIO_DATA_IN6/PR1_EDIO_DATA_OUT6/PR1_PRU1_PRU_R30_12/PR1_PRU1_PRU_R31_12/GPIO1_30] GPMC_CSn1
[GPMC_CSN2/GPMC_BE1N/MMC1_CMD/PR1_EDIO_DATA_IN7/PR1_EDIO_DATA_OUT7/PR1_PRU1_PRU_R30_13/PR1_PRU1_PRU_R31_13/GPIO1_31] GPMC_CSn2
[GPMC_CSN3///MMC2_CMD/PR1_MII0_CRS/PR1_MDIO_DATA/EMU4/GPIO2_0] GPMC_CSn3
[GPMC_WEN//TIMER6/////GPIO2_4] GPMC_WEn
[GPMC_OEN_REN//TIMER6/////GPIO2_3] GPMC_OEn_REn
[GPMC_ADVN_ALE//TIMER4/////GPIO2_2] GPMC_ADVn_ALE
[GPMC_BE0N_CLE//TIMER5/////GPIO2_5] GPMC_BEn0_CLE
[GPMC_BE1N/GMII2_COL/GPMC_CSN6/MMC2_DAT3/GPMC_DIR/PR1_MII1_RXLINK/MCASP0_ACLKR/GPIO1_28] GPMC_BEn1
[GPMC_WAIT0/GMII2_CRS/GPMC_CSN4/RMII2_CRS_DV/MMC1_SDCD/PR1_MII1_COL/UART4_RXD/GPIO0_30] GPMC_WAIT0
[GPMC_WPN/GMII2_RXERR/GPMC_CSN5/RMII2_RXERR/MMC2_SDCD/PR1_MII1_TXEN/UART4_TXD/GPIO0_31]
GPMC_WPn
[GPMC_AD0/MMC1_DAT0//////GPIO1_0] GPMC_AD0
[GPMC_AD1/MMC1_DAT1//////GPIO1_1] GPMC_AD1
[GPMC_AD2/MMC1_DAT2//////GPIO1_2] GPMC_AD2
[GPMC_AD3/MMC1_DAT3//////GPIO1_3] GPMC_AD3
[GPMC_AD4/MMC1_DAT4//////GPIO1_4] GPMC_AD4
[GPMC_AD5/MMC1_DAT5//////GPIO1_5] GPMC_AD5
[GPMC_AD6/MMC1_DAT6//////GPIO1_6] GPMC_AD6
[GPMC_AD7/MMC1_DAT7//////GPIO1_7] GPMC_AD7
[GPMC_AD8/LCD_DATA23/MMC1_DAT0/MMC2_DAT4/EHRPWM2A/PR1_MII_MT0_CLK//GPIO0_22] GPMC_AD8
[GPMC_AD9/LCD_DATA22/MMC1_DAT1/MMC2_DAT5/EHRPWM2B/PR1_MII0_COL//GPIO0_23] GPMC_AD9
[GPMC_AD10/LCD_DATA21/MMC1_DAT2/MMC2_DAT6/EHRPWM2_TRIPZONE_INPUT/PR1_MII0_TXEN//GPIO0_26] GPMC_AD10
[GPMC_AD11/LCD_DATA20/MMC1_DAT3/MMC2_DAT7/EHRPWM2_SYNCO/PR1_MII0_TXD3//GPIO0_27] GPMC_AD11
[GPMC_AD12/LCD_DATA19/MMC1_DAT4/MMC2_DAT0/EQEP2A_IN/PR1_MII0_TXD2/PR1_PRU0_PRU_R30_14/GPIO1_12] GPMC_AD12
[GPMC_AD13/LCD_DATA18/MMC1_DAT5/MMC2_DAT1/EQEP2B_IN/PR1_MII0_TXD1/PR1_PRU0_PRU_R30_15/GPIO1_13] GPMC_AD13
[GPMC_AD14/LCD_DATA17/MMC1_DAT6/MMC2_DAT2/EQEP2_INDEX/PR1_MII0_TXD0/PR1_PRU0_PRU_R31_14/GPIO1_14] GPMC_AD14
[GPMC_AD15/LCD_DATA16/MMC1_DAT7/MMC2_DAT3/EQEP2_STROBE/PR1_ECAP0_ECAP_CAPIN_APWM_O/PR1_PRU0_PRU_R31_15/GPIO1_15] GPMC_AD15
DDR_D0
DDR_D1
DDR_D2
DDR_D3
DDR_D4
DDR_D5
DDR_D6
DDR_D7
DDR_D8
DDR_D9
DDR_D10
DDR_D11
DDR_D12
DDR_D13
DDR_D14
DDR_D15
[GPMC_A0/GMII2_TXEN/RGMII2_TCTL/RMII2_TXEN/GPMC_A16/PR1_MII_MT1_CLK/EHRPWM1_TRIPZONE_INPUT/GPIO1_16] GPMC_A0
[GPMC_A1/GMII2_RXDV/RGMII2_RCTL/MMC2_DAT0/GPMC_A17/PR1_MII1_TXD3/EHRPWM0_SYNCO/GPIO1_17] GPMC_A1
[GPMC_A2/GMII2_TXD3/RGMII2_TD3/MMC2_DAT1/GPMC_A18/PR1_MII1_TXD2/EHRPWM1A/GPIO1_18] GPMC_A2
[GPMC_A3/GMII2_TXD2/RGMII2_TD2/MMC2_DAT2/GPMC_A19/PR1_MII1_TXD1/EHRPWM1B/GPIO1_19] GPMC_A3
[GPMC_A4/GMII2_TXD1/RGMII2_TD1/RMII2_TXD1/GPMC_A20/PR1_MII1_TXD0/EQEP1A_IN/GPIO1_20] GPMC_A4
[GPMC_A5/GMII2_TXD0/RGMII2_TD0/RMII2_TXD0/GPMC_A21/PR1_MII1_RXD3/EQEP1B_IN/GPIO1_21] GPMC_A5
[GPMC_A6/GMII2_TXCLK/RGMII2_TCLK/MMC2_DAT4/GPMC_A22/PR1_MII1_RXD2/EQEP1_INDEX/GPIO1_22] GPMC_A6
[GPMC_A7/GMII2_RXCLK/RGMII2_RCLK/MMC2_DAT5/GPMC_A23/PR1_MII1_RXD1/EQEP1_STROBE/GPIO1_23] GPMC_A7
[GPMC_A8/GMII2_RXD3/RGMII2_RD3/MMC2_DAT6/GPMC_A24/PR1_MII1_RXD0/MCASP0_ACLKX/GPIO1_24] GPMC_A8
[GPMC_A9/GMII2_RXD2/RGMII2_RD2/MMC2_DAT7/GPMC_A25/PR1_MII_MR1_CLK/MCASP0_FSX/GPIO1_25] GPMC_A9
[GPMC_A10/GMII2_RXD1/RGMII2_RD1/RMII2_RXD1/GPMC_A26/PR1_MII1_RXDV/MCASP0_AXR0/GPIO1_26] GPMC_A10
[GPMC_A11/GMII2_RXD0/RGMII2_RD0/RMII2_RXD0/GPMC_A27/PR1_MII1_RXER/MCASP0_AXR1/GPIO1_27] GPMC_A11
DDR_CK
DDR_CKn [DDR_NCK]
DDR_CKE
DDR_CSn0 [DDR_CSN0]
DDR_CASn [DDR_CASN]
DDR_RASn [DDR_RASN]
DDR_WEn [DDR_WEN]
DDR_DQM0
DDR_DQS0
DDR_DQSn0 [DDR_DQSN0]
DDR_DQM1
DDR_DQS1
DDR_DQSn1 [DDR_DQSN1]
[MMC0_CLK/GPMC_A24/UART3_CTSN/UART2_RXD/DCAN1_TX/PR1_PRU0_PRU_R30_12/PR1_PRU0_PRU_R31_12/GPIO2_30] MMC0_CLK
[MMC0_CMD/GPMC_A25/UART3_RTSN/UART2_TXD/DCAN1_RX/PR1_PRU0_PRU_R30_13/PR1_PRU0_PRU_R31_13/GPIO2_31] MMC0_CMD
[MMC0_DAT0/GPMC_A23/UART5_RTSN/UART3_TXD/UART1_RIN/PR1_PRU0_PRU_R30_11/PR1_PRU0_PRU_R31_11/GPIO2_29] MMC0_DAT0
[MMC0_DAT1/GPMC_A22/UART5_CTSN/UART3_RXD/UART1_DTRN/PR1_PRU0_PRU_R30_10/PR1_PRU0_PRU_R31_10/GPIO2_28] MMC0_DAT1
[MMC0_DAT2/GPMC_A21/UART4_RTSN/TIMER6/UART1_DSRN/PR1_PRU0_PRU_R30_9/PR1_PRU0_PRU_R31_9/GPIO2_27] MMC0_DAT2
[MMC0_DAT3/GPMC_A20/UART4_CTSN/TIMER5/UART1_DCDN/PR1_PRU0_PRU_R30_8/PR1_PRU0_PRU_R31_8/GPIO2_26] MMC0_DAT3
DDR_ODT
DDR_RESETn [DDR_RESETN]
DDR_VTP
B15
A10
B5
B18
A15
D14
PMIC_RESETOUTn
SYS_WARMRESETn
RTC_PORZ
R186
R52
22
22
B10
C11
B11
A12
A11
C14
B14
V12
V6
U9
V9
T13
U6
T7
R7
T6
U18
T17
U17
R220
22
U7
V7
R8
T8
U8
V8
R9
T9
U10
T10
T11
U12
T12
R12
V13
U13
MMC1_D0
MMC1_D1
MMC1_D2
MMC1_D3
R13
V14
U14
T14
R14
V15
U15
T15
V16
U16
T16
V17
RGMII2_TXEN
AM335X_RGMII2_RXDV
RGMII2_TXD3
RGMII2_TXD2
RGMII2_TXD1
RGMII2_TXD0
RGMII2_TXCLK
AM335X_RGMII2_RXCLK
AM335X_RGMII2_RXD3
AM335X_RGMII2_RXD2
AM335X_RGMII2_RXD1
AM335X_RGMII2_RXD0
AM335X_LCD_DATA23
AM335X_LCD_DATA22
AM335X_LCD_DATA21
AM335X_LCD_DATA20
AM335X_LCD_DATA19
AM335X_LCD_DATA18
AM335X_LCD_DATA17
AM335X_LCD_DATA16
G17 R132
G18
G16
G15
F18
F17
PMIC_RESETOUTn
SYS_WARMRESETn
JTAG_TRSTn <17>
JTAG_TMS <17>
JTAG_TDI <17>
JTAG_TCK <17>
JTAG_TDO <17>
JTAG_EMU0 <17>
JTAG_EMU1 <17>
PMIC_INT1_GPIO
<2>
LCD_CAP_TOUCH_WAKE <5>
AM335X_MCASP0_AHCLKR
MMC1_CLK <8>
MMC1_CMD <8>
CAP_TOUCH_INT <14>
RGMII1_INT <12>
GPIO_KEY2 <15>
GPIO_KEY3 <15>
GPIO_KEY4 <15>
AM335X_LCD_DISEN
<9>
GPIO_KEY1 <15>
AM335X_COM_WL_IRQ
<8>
MMC1_D0 <8>
MMC1_D1 <8>
MMC1_D2 <8>
MMC1_D3 <8>
AM335X_GPIO_LED4
AM335X_GPIO_LED3
AM335X_GPIO_LED2
AM335X_GPIO_LED1
AM335X_LCD_DATA[23..0]
R56
R192
R180
R51
R174
R168
<5>
<6,12,14,17>
R49
100K
AM335x_EXTINT
<6,12,13>
AM335X_XDMA_EVENT_INTR0
AM335X_XDMA_EVENT_INTR1
<14>
<8>
DGND
C
<8>
<6>
<6>
<6>
<6>
22
22
22
22
22
22
22
AM335X_LCD_DATA[23..0]
<3,6,9>
AM335X_RGMII2_TXEN <13>
AM335X_RGMII2_RXDV <13>
AM335X_RGMII2_TXD3 <13>
AM335X_RGMII2_TXD2 <13>
AM335X_RGMII2_TXD1 <13>
AM335X_RGMII2_TXD0 <13>
AM335X_RGMII2_TXCLK <13>
AM335X_RGMII2_RXCLK <13>
AM335X_RGMII2_RXD3 <13>
AM335X_RGMII2_RXD2 <13>
AM335X_RGMII2_RXD1 <13>
AM335X_RGMII2_RXD0 <13>
B
AM335X_MMC0_CLK <10>
AM335X_MMC0_CMD <10>
AM335X_MMC0_D0 <10>
AM335X_MMC0_D1 <10>
AM335X_MMC0_D2 <10>
AM335X_MMC0_D3 <10>
DDR_VREF
AM3358_ZCZ
R226
49.9
DGND
C125
0.1uF
DGND
RTC RESET CKT
VRTC
VRTC
8
8
VRTC
R108
10K
U19A
VRTC
U19B
5
1
3
7
R107
RTC_PORZ
6
PMIC_GPIO_RTC
1K
4
4
2
A
SN74AUP2G08
C191
0.01uF
SN74AUP2G08
R125
100K
DGND
DGND
C192
0.01uF
A
Frost Byte 1
DGND
Texas Instruments, Inc.
DGND
ARM MPU Business Unit
12500 TI Blvd
Dallas, TX 75243
DGND
Final
TMDSSK3358
AM335X Section 1 of 3
Size
5
4
3
2
Document Number
C
TMDSSK3358_1.2A.dsn
Date:
Friday, March 22, 2013
Sheet: 2
1
Modified By:
Rev
Radha
1.2B
of 17
5
4
3
2
1
D
D
AM335X
U26B
DGND
<12,13>
AM335X_EXT_WAKEUP
VDDA_ADC
R210
0
R211
DNI
AM335X_XLeft
AM335X_XRight
AM335X_YUp
AM335X_YDown
<9> AM335X_XLeft
<9> AM335X_XRight
<9> AM335X_YUp
<9> AM335X_YDown
R73
0
C6
C5
B6
C7
B7
A7
C8
B8
A8
C9
GNDA_TSC
B9
A9
VREFP_ADC
C88
0.001uF
C89
0.1uF
AM335X_SPI0_SCLK
AM335X_SPI0_D0
AM335X_SPI0_D1
AM335X_SPI0_CS0
C
<10>
GNDA_TSC
22
R171
AM335X_SPI0_CS1
<17>
<17>
<17>
<5,17>
AM335X_UART0_TXD
AM335X_UART0_RXD
AM335X_UART0_CTSn
AM335X_UART0_RTSn
<8>
<8>
<8>
<8>
AM335X_UART1_TXD
AM335X_UART1_RXD
AM335X_UART1_CTSn
AM335X_UART1_RTSn
<16>
<16>
TP3
TP4
USB0_DP
USB0_DM
<13> RGMII2_INT
<16> USB0_VBUS
<11>
<11>
E16
E15
E18
E17
D15
D16
D18
D17
AM335X_I2C0_SCL
AM335X_I2C0_SDA
C16
C17
AM335X_USB0_CE
USB0_ID
N17
N18
M15
P16
F16
P15
AM335X_USB0_VBUS
R17
R18
P18
P17
F15
T18
USB1_DP
USB1_DM
AM335X_USB1_CE
USB1_ID
TP6
AM335X_USB1_DRVVBUS
<11> AM335X_USB1_DRVVBUS
AM335X_USB1_VBUS
VUSB_VBUS1
R126
1.2K, 1/4W
<15>
DDR_VTT_EN
R243
A17
B17
B16
A16
C15
[GMII1_TXCLK/UART2_RXD/RGMII1_TCLK/MMC0_DAT7/MMC1_DAT0/UART1_DCDN/MCASP0_ACLKX/GPIO3_9]
[GMII1_TXD0/RMII1_TXD0/RGMII1_TD0/MCASP1_AXR2/MCASP1_ACLKR/EQEP0B_IN/MMC1_CLK/GPIO0_28]
[GMII1_TXD1/RMII1_TXD1/RGMII1_TD1/MCASP1_FSR/MCASP1_AXR1/EQEP0A_IN/MMC1_CMD/GPIO0_21]
[GMII1_TXD2/DCAN0_RX/RGMII1_TD2/UART4_TXD/MCASP1_AXR0/MMC2_DAT2/MCASP0_AHCLKX/GPIO0_17]
[GMII1_TXD3/DCAN0_TX/RGMII1_TD3/UART4_RXD/MCASP1_FSX/MMC2_DAT1/MCASP0_FSR/GPIO0_16]
[GMII1_TXEN/RMII1_TXEN/RGMII1_TCTL/TIMER4/MCASP1_AXR0/EQEP0_INDEX/MMC2_CMD/GPIO3_3]
[GMII1_CRS/RMII1_CRS_DV/SPI1_D0/I2C1_SDA/MCASP1_ACLKX/UART5_CTSN/UART2_RXD/GPIO3_1]
[GMII1_COL/RMII2_REFCLK/SPI1_SCLK/UART5_RXD/MCASP1_AXR2/MMC2_DAT3/MCASP0_AXR2/GPIO3_0]
MII1_TXCLK
MII1_TXD0
MII1_TXD1
MII1_TXD2
MII1_TXD3
MII1_TXEN
MII1_CRS
MII1_COL
[GMII1_RXCLK/UART2_TXD/RGMII1_RCLK/MMC0_DAT6/MMC1_DAT1/UART1_DSRN/MCASP0_FSX/GPIO3_10]
[GMII1_RXD0/RMII1_RXD0/RGMII1_RD0/MCASP1_AHCLKX/MCASP1_AHCLKR/MCASP1_ACLKR/MCASP0_AXR3/GPIO2_21]
[GMII1_RXD1/RMII1_RXD1/RGMII1_RD1/MCASP1_AXR3/MCASP1_FSR/EQEP0_STROBE/MMC2_CLK/GPIO2_20]
[GMII1_RXD2/UART3_TXD/RGMII1_RD2/MMC0_DAT4/MMC1_DAT3/UART1_RIN/MCASP0_AXR1/GPIO2_19]
[GMII1_RXD3/UART3_RXD/RGMII1_RD3/MMC0_DAT5/MMC1_DAT2/UART1_DTRN/MCASP0_AXR0/GPIO2_18]
[GMII1_RXERR/RMII1_RXERR/SPI1_D1/I2C1_SCL/MCASP1_FSX/UART5_RTSN/UART2_TXD/GPIO3_2]
[GMII1_RXDV/LCD_MEMORY_CLK/RGMII1_RCTL/UART5_TXD/MCASP1_ACLKX/MMC2_DAT0/MCASP0_ACLKR/GPIO3_4]
MII1_RXCLK
MII1_RXD0
MII1_RXD1
MII1_RXD2
MII1_RXD3
MII1_RXERR
MII1_RXDV
[RMII1_REFCLK/XDMA_EVENT_INTR2/SPI1_CS0/UART5_TXD/MCASP1_AXR3/MMC0_POW/MCASP1_AHCLKX/GPIO0_29]
[MDIO_CLK/TIMER5/UART5_TXD/UART3_RTSN/MMC0_SDWP/MMC1_CLK/MMC2_CLK/GPIO0_1]
[MDIO_DATA/TIMER6/UART5_RXD/UART3_CTSN/MMC0_SDCD/MMC1_CMD/MMC2_CMD/GPIO0_0]
MII1_REFCLK
MDIO_CLK
MDIO_DATA
AM3358
AIN0
AIN1
AIN2
AIN3
AIN4
AIN5
AIN6
AIN7
ZCZ Package
VREFP
VREFN
SPI0_SCLK [SPI0_SCLK/UART2_RXD/I2C2_SDA/EHRPWM0A/PR1_UART0_CTS_N/PR1_EDIO_SOF/EMU2/GPIO0_2]
SPI0_D0 [SPI0_D0/UART2_TXD/I2C2_SCL/EHRPWM0B/PR1_UART0_RTS_N/PR1_EDIO_LATCH_IN/EMU3/GPIO0_3]
SPI0_D1 [SPI0_D1/MMC1_SDWP/I2C1_SDA/EHRPWM0_TRIPZONE_INPUT/PR1_UART0_RXD/PR1_EDIO_DATA_IN0/PR1_EDIO_DATA_OUT0/GPIO0_4]
SPI0_CS0 [SPI0_CS0/MMC2_SDWP/I2C1_SCL/EHRPWM0_SYNCI/PR1_UART0_TXD/PR1_EDIO_DATA_IN1/PR1_EDIO_DATA_OUT1/GPIO0_5]
SPI0_CS1 [SPI0_CS1/UART3_RXD/ECAP1_IN_PWM1_OUT/MMC0_POW/XDMA_EVENT_INTR2/MMC0_SDCD/EMU4/GPIO0_6]
LCD_DATA0
LCD_DATA1
LCD_DATA2
LCD_DATA3
LCD_DATA4
LCD_DATA5
LCD_DATA6
LCD_DATA7
LCD_DATA8
LCD_DATA9
LCD_DATA10
LCD_DATA11
CD_DATA12
LCD_DATA13
LCD_DATA14
LCD_DATA15
[LCD_PCLK/GPMC_A10/PR1_MII0_CRS/PR1_EDIO_DATA_IN4/PR1_EDIO_DATA_OUT4/PR1_PRU1_PRU_R30_10/PR1_PRU1_PRU_R31_10/GPIO2_24]
LCD_PCLK
[LCD_VSYNC/GPMC_A8//PR1_EDIO_DATA_IN2/PR1_EDIO_DATA_OUT2/PR1_PRU1_PRU_R30_8/PR1_PRU1_PRU_R31_8/GPIO2_22]
LCD_VSYNC
[LCD_HSYNC/GPMC_A9//PR1_EDIO_DATA_IN3/PR1_EDIO_DATA_OUT3/PR1_PRU1_PRU_R30_9/PR1_PRU1_PRU_R31_9/GPIO2_23]
LCD_HSYNC
[LCD_AC_BIAS_EN/GPMC_A11/PR1_MII1_CRS/PR1_EDIO_DATA_IN5/PR1_EDIO_DATA_OUT5/PR1_PRU1_PRU_R30_11/PR1_PRU1_PRU_R31_11/GPIO2_25] LCD_AC_BIAS_EN
[MCASP0_AHCLKX/EQEP0_STROBE/MCASP0_AXR3/MCASP1_AXR1/EMU4/PR1_PRU0_PRU_R30_7/PR1_PRU0_PRU_R31_7/GPIO3_21] MCASP0_AHCLKX
[MCASP0_ACLKX/EHRPWM0A//SPI1_SCLK/MMC0_SDCD/PR1_PRU0_PRU_R30_0/PR1_PRU0_PRU_R31_0/GPIO3_14]
MCASP0_ACLKX
[MCASP0_FSX/EHRPWM0B//SPI1_D0/MMC1_SDCD/PR1_PRU0_PRU_R30_1/PR1_PRU0_PRU_R31_1/GPIO3_15]
MCASP0_FSX
[MCASP0_AXR0/EHRPWM0_TRIPZONE_INPUT//SPI1_D1/MMC2_SDCD/PR1_PRU0_PRU_R30_2/PR1_PRU0_PRU_R31_2/GPIO3_16]
MCASP0_AXR0
[MCASP0_AHCLKR/EHRPWM0_SYNCI_O/MCASP0_AXR2/SPI1_CS0/ECAP2_IN_PWM2_OUT/PR1_PRU0_PRU_R30_3/PR1_PRU0_PRU_R31_3/GPIO3_17] MCASP0_AHCLKR
[MCASP0_ACLKR/EQEP0A_IN/MCASP0_AXR2/MCASP1_ACLKX/MMC0_SDWP/PR1_PRU0_PRU_R30_4/PR1_PRU0_PRU_R31_4/GPIO3_18]
MCASP0_ACLKR
[MCASP0_FSR/EQEP0B_IN/MCASP0_AXR3/MCASP1_FSX/EMU2/PR1_PRU0_PRU_R30_5/PR1_PRU0_PRU_R31_5/GPIO3_19]
MCASP0_FSR
[MCASP0_AXR1/EQEP0_INDEX//MCASP1_AXR0/EMU3/PR1_PRU0_PRU_R30_6/PR1_PRU0_PRU_R31_6/GPIO3_20] MCASP0_AXR1
USB1_DP
USB1_DM
USB1_CE
USB1_ID
USB1_DRVVBUS[USB1_DRVVBUS///////GPIO3_13]
USB1_VBUS
RGMII1_TXCLK
RGMII1_TXD0
RGMII1_TXD1
RGMII1_TXD2
RGMII1_TXD3
RGMII1_TXEN
L18
M16
L15
L16
L17
J15
J17
AM335X_RGMII1_RXCLK
AM335X_RGMII1_RXD0
AM335X_RGMII1_RXD1
AM335X_RGMII1_RXD2
AM335X_RGMII1_RXD3
R134
R135
R130
R136
R133
R129
22
22
22
22
22
22
AM335X_RGMII1_TXCLK <12>
AM335X_RGMII1_TXD0 <12>
AM335X_RGMII1_TXD1 <12>
AM335X_RGMII1_TXD2 <12>
AM335X_RGMII1_TXD3 <12>
AM335X_RGMII1_TXEN <12>
AM335X_AUDA_BCLK <14>
AM335X_AUDA_DIN <14>
AM335X_RGMII1_RXCLK <12>
AM335X_RGMII1_RXD0 <12>
AM335X_RGMII1_RXD1 <12>
AM335X_RGMII1_RXD2 <12>
AM335X_RGMII1_RXD3 <12>
AM335X_AUDA_FSX <14>
AM335X_RGMII1_RXDV <12>
AM335X_RGMII1_RXDV
H18
M18
M17
AM335X_AUDA_DOUT <14>
AM335X_RGMII1_MDIO_CLK
<12,13>
AM335X_RGMII1_MDIO_DATA
<12,13>
AM335X_LCD_DATA[23..0]
[LCD_DATA0/GPMC_A0/PR1_MII_MT0_CLK/EHRPWM2A//PR1_PRU1_PRU_R30_0/PR1_PRU1_PRU_R31_0/GPIO2_6]
[LCD_DATA1/GPMC_A1/PR1_MII0_TXEN/EHRPWM2B//PR1_PRU1_PRU_R30_1/PR1_PRU1_PRU_R31_1/GPIO2_7]
UART0_TXD[UART0_TXD/SPI1_CS1/DCAN0_RX/I2C2_SCL/ECAP1_IN_PWM1_OUT/PR1_PRU1_PRU_R30_15/PR1_PRU1_PRU_R31_15/GPIO1_11]
UART0_RXD[UART0_RXD/SPI1_CS0/DCAN0_TX/I2C2_SDA/ECAP2_IN_PWM2_OUT/PR1_PRU1_PRU_R30_14/PR1_PRU1_PRU_R31_14/GPIO1_10] [LCD_DATA2/GPMC_A2/PR1_MII0_TXD3/EHRPWM2_TRIPZONE_INPUT//PR1_PRU1_PRU_R30_2/PR1_PRU1_PRU_R31_2/GPIO2_8]
[LCD_DATA3/GPMC_A3/PR1_MII0_TXD2/EHRPWM2_SYNCI_O//PR1_PRU1_PRU_R30_3/PR1_PRU1_PRU_R31_3/GPIO2_9]
UART0_CTSn [UART0_CTSN/UART4_RXD/DCAN1_TX/I2C1_SDA/SPI1_D0/TIMER7/PR1_EDC_SYNC0_OUT/GPIO1_8]
[LCD_DATA4/GPMC_A4/PR1_MII0_TXD1/EQEP2A_IN//PR1_PRU1_PRU_R30_4/PR1_PRU1_PRU_R31_4/GPIO2_10]
UART0_RTSn [UART0_RTSN/UART4_TXD/DCAN1_RX/I2C1_SCL/SPI1_D1/SPI1_CS0/PR1_EDC_SYNC1_OUT/GPIO1_9]
[LCD_DATA5/GPMC_A5/PR1_MII0_TXD0/EQEP2B_IN//PR1_PRU1_PRU_R30_5/PR1_PRU1_PRU_R31_5/GPIO2_11]
[LCD_DATA6/GPMC_A6/PR1_EDIO_DATA_IN6/EQEP2_INDEX/PR1_EDIO_DATA_OUT6/PR1_PRU1_PRU_R30_6/PR1_PRU1_PRU_R31_6/GPIO2_12]
[LCD_DATA7/GPMC_A7/PR1_EDIO_DATA_IN7/EQEP2_STROBE/PR1_EDIO_DATA_OUT7/PR1_PRU1_PRU_R30_7/PR1_PRU1_PRU_R31_7/GPIO2_13]
[LCD_DATA8/GPMC_A12/EHRPWM1_TRIPZONE_INPUT/MCASP0_ACLKX/UART5_TXD/PR1_MII0_RXD3/UART2_CTSN/GPIO2_14]
[LCD_DATA9/GPMC_A13/EHRPWM1_SYNCO/MCASP0_FSX/UART5_RXD/PR1_MII0_RXD2/UART2_RTSN/GPIO2_15]
UART1_TXD [UART1_TXD/MMC2_SDWP/DCAN1_RX/I2C1_SCL//PR1_UART0_TXD/PR1_PRU0_PRU_R31_16/GPIO0_15]
[LCD_DATA10/GPMC_A14/EHRPWM1A/MCASP0_AXR0//PR1_MII0_RXD1/UART3_CTSN/GPIO2_16]
UART1_RXD[UART1_RXD/MMC1_SDWP/DCAN1_TX/I2C1_SDA//PR1_UART0_RXD/PR1_PRU1_PRU_R31_16/GPIO0_14]
[LCD_DATA11/GPMC_A15/EHRPWM1B/MCASP0_AHCLKR/MCASP0_AXR2/PR1_MII0_RXD0/UART3_RTSN/GPIO2_17]
UART1_CTSn [UART1_CTSN/TIMER6/DCAN0_TX/I2C2_SDA/SPI1_CS0/PR1_UART0_CTS_N/PR1_EDC_LATCH0_IN/GPIO0_12]
[LCD_DATA12/GPMC_A16/EQEP1A_IN/MCASP0_ACLKR/MCASP0_AXR2/PR1_MII0_RXLINK/UART4_CTSN/GPIO0_8]
UART1_RTSn [UART1_RTSN/TIMER5/DCAN0_RX/I2C2_SCL/SPI1_CS1/PR1_UART0_RTS_N/PR1_EDC_LATCH1_IN/GPIO0_13]
[LCD_DATA13/GPMC_A17/EQEP1B_IN/MCASP0_FSR/MCASP0_AXR3/PR1_MII0_RXER/UART4_RTSN/GPIO0_9]
[LCD_DATA14/GPMC_A18/EQEP1_INDEX/MCASP0_AXR1/UART5_RXD/PR1_MII_MR0_CLK/UART5_CTSN/GPIO0_10]
I2C0_SCL [I2C0_SCL/TIMER7/UART2_RTSN/ECAP1_IN_PWM1_OUT////GPIO3_6]
[LCD_DATA15/GPMC_A19/EQEP1_STROBE/MCASP0_AHCLKX/MCASP0_AXR3/PR1_MII0_RXDV/UART5_RTSN/GPIO0_11]
I2C0_SDA [I2C0_SDA/TIMER4/UART2_CTSN/ECAP2_IN_PWM2_OUT////GPIO3_5]
USB0_DP
USB0_DM
USB0_CE
USB0_ID
USB0_DRVVBUS [USB0_DRVVBUS///////GPIO0_18]
USB0_VBUS
K18
K17
K16
K15
J18
J16
H17
H16
R1
R2
R3
R4
T1
T2
T3
T4
U1
U2
U3
U4
V2
V3
V4
T5
AM335X_LCD_DATA0
AM335X_LCD_DATA1
AM335X_LCD_DATA2
AM335X_LCD_DATA3
AM335X_LCD_DATA4
AM335X_LCD_DATA5
AM335X_LCD_DATA6
AM335X_LCD_DATA7
AM335X_LCD_DATA8
AM335X_LCD_DATA9
AM335X_LCD_DATA10
AM335X_LCD_DATA11
AM335X_LCD_DATA12
AM335X_LCD_DATA13
AM335X_LCD_DATA14
AM335X_LCD_DATA15
V5
U5
R5
R6
AM335X_LCD_DATA[23..0] <2,6,9> C
AM335X_LCD_PCLK <9>
AM335X_LCD_VSYNC
<9>
AM335X_LCD_HSYNC
<9>
AM335X_LCD_AC_BIAS_EN
<9>
A14
A13
B13
D12
C12
B12
C13
D13
AM335X_MCASP0_AHCLKX <8>
AM335X_MCASP0_ACLKX <8>
AM335X_MCASP0_FSX <8>
AM335X_MCASP0_AXR0 <8>
LCD_BACKLIGHTEN <9>
AM335X_USB1_OC <11>
ACC_INT1 <15>
AM335X_MCASP0_AXR1 <8>
0
C18
<15>
PMIC_POWER_EN
EXT_WAKEUP
ACC_INT2
ECAP0_IN_PWM0_OUT [ECAP0_IN_PWM0_OUT/UART3_TXD/SPI1_CS1/PR1_ECAP0_ECAP_CAPIN_APWM_O/SPI1_SCLK/MMC0_SDWP/XDMA_EVENT_INTR2/GPIO0_7]
R219
4.7K
AM3358_ZCZ
B
B
VDDSHV6
C214
0.1uF
D6
DNI
DGND
C18
0.1uF
DGND
ZIGBEE HEADER
VDDSHV6
VDDSHV6
I2C _HEADER
V3_3D
V3_3D
J8
4
3
2
1
J11
AM335X_I2C0_SDA
AM335X_I2C0_SCL
R233
R232
0
0
I2C_SDA_AUDIO <14>
I2C_SCL_AUDIO <14>
R142
4.7K
R141
4.7K
R179
4.7K
R177
4.7K
R131
4.7K
DGND
<3,5,6,15> AM335X_SPI0_SCLK
<3,5,6,15> AM335X_SPI0_D0
AM335X_SPI0_CS0
AM335X_SPI0_D1
AM335X_SPI0_SCLK
AM335X_SPI0_D0
1
2
3
4
5
6
AM335X_I2C0_SCL
AM335X_I2C0_SDA
<3,5,6,15>
<3,5,6,15>
DNI
DGND
DNI
AM335X_I2C0_SCL
AM335X_I2C0_SDA
AM335X_SPI0_CS0
AM335X_SPI0_D1
AM335X_UART0_RTSn
A
A
USB1_ID
Frost Byte 1
R143
0
Texas Instruments, Inc.
ARM MPU Business Unit
12500 TI Blvd
Dallas, TX 75243
DGND
TMDSSK3358
AM335X Section 2 of 3
Size
5
4
3
2
Document Number
C
TMDSSK3358_1.2A.dsn
Date:
Friday, March 22, 2013
Sheet: 3
1
Modified By:
Rev
Radha
1.2B
of 17
5
4
3
2
1
AM335X POWER
VDDSHV1
D
D
U26C
VDD_CORE
R212
0.1ohm1% Sense
VDD_MPU_AM335X
VDD_MPU
<5>
DNI
PWR_SMPS1_FB
R223
VDDMPU_MON
VDIG2
D10
D11
C10
E9
VDIG2
C
VDIG2
N15
N16
VMMC
C83
1uF
C254
1uF
F10
F11
F12
F13
G13
H13
J13
A2
D9
H15
CAP_VDD_SRAM_CORE
CAP_VDD_SRAM_MPU
CAP_VBB_MPU
F6
F7
G6
G7
G10
H11
J12
K6
K8
K12
L6
L7
L8
L9
M11
M13
N8
N9
N12
N13
C256
1uF
DGND
VAUX1
M14
R15
R16
DGND
DGND
DGND
DGND
N14
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDDSHV1
VDDSHV1
VDDSHV2
VDDSHV2
VDDSHV3
VDDSHV3
VDDSHV4
VDDSHV4
C59
0.01uF
DGND
C98
0.01uF
C52
0.01uF
C78
0.01uF
DGND DGND
C56
0.01uF
DGND
C55
0.01uF
C53
0.01uF
DGND
VDIG1
FB5
VMMC
FB3
VMMC
FB4
VMMC
FB2
VMMC
VDDSHV2
P10
P11
150OHM800mA
VDDSHV3
P12
P13
150OHM800mA
AM3358
H14
J14
150OHM800mA
VDDSHV5
VDDSHV5
ZCZ Package
VDD_MPU
VDD_MPU
VDD_MPU
VDD_MPU
VDD_MPU
VDD_MPU
VDD_MPU
VDD_MPU_MON
VDDSHV6
VDDSHV6
VDDSHV6
VDDSHV6
VDDSHV6
VDDSHV6
VDDSHV6
VDDSHV6
VDDSHV6
CAP_VDD_SRAM_CORE
VDDS_PLL_MPU
VDDS_SRAM_MPU_BB
CAP_VDD_SRAM_MPU
CAP_VBB_MPU
VDDS_SRAM_CORE_BG
VDDS
VDDS
VDDS
VDDS
VDDS
VDDS
VDDS
VDDA3P3V_USB0
VDDA1P8V_USB0
K14
L14
150OHM800mA
E10
E11
E12
E13
F14
G14
N5
P5
P6
VDDSHV6
150OHM800mA
FB6
E6
E14
F9
K13
N6
P9
P14
C
VDAC
VSSA_USB
VDDA_ADC
VDDA3P3V_USB1
VDDA1P8V_USB1
VDDA_ADC
VSSA_USB
VSSA_ADC
VPP
VDDS_PLL_CORE_LCD
VDDS_PLL_DDR
VDDS_DDR
VDDS_DDR
VDDS_DDR
VDDS_DDR
VDDS_DDR
VDDS_DDR
VDDS_DDR
AM3358_ZCZ
VAUX2
VDDS_RTC
CAP_VDD_RTC
[ENZ_KALDO_1P8V] RTC_KALDO_ENn
VDDS_OSC
RESERVED
[TESTOUT]
D8
150OHM800mA 1
E8
2 FB7
VPLL
GNDA_ADC
FB8
150OHM800mA
M5
R10
VDIG2
D7
D6
B4
VDDS_RTC
VDD_RTC
0
DGND
R72
GNDA_TSC
VDIG2
A3
2
GNDA_ADC
VRTC
R11
1
GNDA_ADC
TP10
A1
A18
F8
G8
G9
G11
G12
H6
H7
H8
H9
H10
H12
J6
J7
J8
J9
J10
J11
K7
K9
K10
K11
L10
L11
L12
L13
M6
M7
M8
M9
M10
M12
N7
N10
N11
V1
V18
C84
0.01uF
FB9
VDDSHV5
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
E5
F5
G5
H5
J5
K5
L5
150OHM800mA
VDDSHV4
VDIG2
E7
P7
P8
R218
10K, 1%
DGND
C122
1uF
C95
0.01uF
C239
0.01uF
C72
0.01uF
C99
0.01uF
DGND
R238
B
B
0.24ohm1% Sense
VDDS_DDR3_AM335X
VDDS_DDR
DGND
DGND GND_OSC0
DGND
DGND
GNDA_ADC
See
errata
document
DE-CAPS
VDD_CORE
C51
0.01uF
C94
0.01uF
VDD_CORE
C101
0.01uF
C49
10uF
C91
0.01uF
VDD_MPU_AM335X
C103
0.01uF
C100
0.01uF
C102
0.01uF
C92
0.01uF
C123
10uF
C82
0.01uF
VDDS_DDR3_AM335X
C85
0.01uF
C107
0.01uF
C86
0.01uF
C104
0.01uF
C267
10uF
C261
10uF
C112
C113
C109
C110
C111
C114
C121
C120
C118
C108
C119
C128
C271
C129
C131
C130
C268
C269
C260
0.1uF, 6.3V 0.1uF, 6.3V 0.1uF, 6.3V 0.1uF, 6.3V 0.1uF, 6.3V 0.1uF, 6.3V 0.1uF, 6.3V 0.1uF, 6.3V 0.1uF, 6.3V 0.1uF, 6.3V 0.1uF, 6.3V 0.1uF, 6.3V 0.1uF, 6.3V 0.1uF, 6.3V 0.1uF, 6.3V 0.1uF, 6.3V 0.1uF, 6.3V 0.1uF, 6.3V 0.1uF, 6.3V
DGND
DGND
DGND
DGND
VDDSHV1
VDDSHV2
VDDSHV3
VDDSHV4
VDDSHV5
VDAC
VDDSHV6
A
A
Frost Byte 1
C117
10uF
C105
0.01uF
C106
0.01uF
DGND
C203
10uF
C90
0.01uF
C96
0.01uF
DGND
C28
10uF
C50
0.01uF
C60
0.01uF
DGND
C30
10uF
C80
0.01uF
C57
0.01uF
DGND
C29
10uF
C79
0.01uF
C45
0.01uF
C27
10uF
C258
0.01uF
C116
0.01uF
C127
0.01uF
C93
0.01uF
C255
0.01uF
C126
0.01uF
C44
10uF
C87
0.01uF
C62
0.01uF
C61
0.01uF
C236
0.01uF
DGND
DGND
Texas Instruments, Inc.
ARM MPU Business Unit
12500 TI Blvd
Dallas, TX 75243
DGND
TMDSSK3358
SubArctic Power
Size
5
4
3
2
Document Number
C
TMDSSK3358_1.2A.dsn
Date:
Friday, March 22, 2013
Sheet: 4
1
Modified By:
Rev
Radha
1.2B
of 17
5
4
3
2
1
Main Power Input
VBAT
TP11
J9
U30
D8
1
2
4
3
2
3
1
VPWRIN_JCK
F1
1
VPWRIN_PREFUSE
B520C-13-F
DLW5BTN501SQ2L
C262
100uF
GND_IN
Power Jack RAPC712X
D
2
Fuse 4A
C124
0.1uF
C138
0.1uF
C132
10uF
C137
1uF
D7
SMCJ7.0CA
DGND
D
DGND
DGND
Power Management IC
VRTC_PMIC
U25
28
29
VBAT
C76
4.7uF
C238
2.2uF
VCC7
VRTC
20
DGND
SW3
VFB3
VCC1
C
R59
VRTC
<3,6,15>
<3,6,15>
PMIC_GPIO
10K, 1%
DGND
DGND
R139
R140
AM335X_I2C0_SCL
AM335X_I2C0_SDA
21
38
PMIC_I2C_SCL
PMIC_I2C_SDA
0
0
VAUX33
PMIC_GPIO
R137
R138
R28
10K
<2>
R128
PMIC_INT1_GPIO
PMICSR_I2C_SCL
PMICSR_I2C_SDA
DNI
DNI
TP9
VRTC_PMIC
<2>
VAUX33
PMIC_RESETOUTn
R27
PMIC_PWRHOLD
PMIC_RESETOUTn
10K
C225
0.01uF
DGND
VDAC
VPLL
C42
4.7uF
C227
2.2uF
DGND
C232
2.2uF
DGND
SW2
VFB2
GND2
INT1
SLEEP
PWRON
BOOT1
BOOT0
PWRHOLD
nRESPWRON
VBAT
PWR_SMPS1
2.2uH
0
VDD_MPU
C244
10uF
PWR_SMPS1_FB
VCCIO
SWIO
VFBIO
GNDIO
VDDIO
VCC5
VDAC
VPLL
VCC6
VDIG1
VDIG2
<4>
DGND
R240
150
L10
DGND
2.2uH
VDD_CORE
C67
10uF
12
DGND
DGND
DGND
VBAT
PWR_SWIO
L8
2.2uH
VDDS_DDR
C235
10uF
DGND
PWR_VDDIO
DGND
R144
0
C43
10uF
DGND
VAUX33
6
7
5
VBAT
VDIG1
VDIG2
C211
2.2uF
VBACKUP
D5
Green LED
C97
10uF
13
14
16
15
C
C74
10uF
VBAT
PWR_SMPS2
DGND
TESTV
REFGND
23
22
24
L11
R201
41
42
44
43
VREF
27
VBAT
VCC2
SCLSR_EN1
SDASR_EN2
25
17
VBAT
36
35
32
34
DGND
GPIO_CKSYNC
11
10
18
DGND
SW1
VFB1
GND1
SCL_SCK
SDA_SDI
39
45
37
33
19
26
1
40
PMIC_INT1
PMIC_SLEEP
EXP_PB_POWERON
DNI
OSC32KOUT
CLK32KOUT
9
8
31
30
VAUX33
OSC32KIN
C77
4.7uF
C210
2.2uF
DGND
TP5
DGND
DGND
DGND
47
VAUX2
C221
2.2uF
DGND
VAUX1
VAUX2
TPS65910A3
C31
2.2uF
VCC3
VAUX33
VMMC
GNDP
46
48
VAUX1
C46
4.7uF
VCC4
3
4
2
VBAT
B
VAUX33
VMMC
C213
2.2uF
PPAD
VBAT
B
C63
4.7uF
C212
2.2uF
DGND
DGND
DGND
DGND
DGND
DGND
PWR ON SWITCH
RTC LDO
VBAT
VBAT
OUT
5 R121
0
A
EXP_PB_POWERON
EN
Frost Byte 1
3
4
3
IN
R112
10K
VRTC
U21
1
A
4
C217
1uF
NR
GND
2
Texas Instruments, Inc.
C197
1uF
TPS71718
ARM MPU Business Unit
12500 TI Blvd
Dallas, TX 75243
SW5
B3SL
DGND
DGND
1
2
DGND
TMDSSK3358
VRTC
5
R23
DNI
VRTC_PMIC
4
Platform_Power
DGND
Size
3
2
Document Number
C
TMDSSK3358_1.2A.dsn
Date:
Friday, March 22, 2013
Sheet: 5
1
Modified By:
Rev
Radha
1.2B
of 17
5
4
3
2
1
User Reset/Interrupt Switches
ID Memory
VDDSHV6
VDDSHV6
VDDSHV6
R117
0
U8
SCL
SDA
8
VCC
1
2
3
A0
A1
A2
SYS_WARMRESETn
C115
0.01uF
4
VSS
R74
DNI
SW7
B3SL
7
WP
SYS_WARMRESETn
R29
<2,12,14,17>
DNI
D
3
4
6
5
AM335X_I2C0_SCL
AM335X_I2C0_SDA
3
4
<3,5,15>
<3,5,15>
D
C279
DNI
SW6
B3SL
DGND
1
2
1
2
CAT24C256W
R167
0
AM335x_EXTINT
DGND
<2,12,13>
DGND
DGND
R166
1K
C32
1uF
DGND
DGND
User LEDs
Mechanical
VBAT
D3
Green LED
D4
Green LED
R116
150
D2
Green LED
D1
Green LED
1
1
DGND
Screws
D
M2
M3
Screw2-56_1/4in
Screw2-56_1/4in
C
1
R114
150
MH4
1
R111
150
MH2
1
R113
150
1
1
MH3
1
MH1
C
M4
M5
Screw2-56_1/4in
Screw2-56_1/4in
Q3
G
D
S
D
D
Q2
G
BSS138
Q5
S
Q4
G
StandOffs
G
S
S
BSS138
BSS138
DGND
BSS138
M6
M7
M8
M9
DGND
DGND
Standoff2-56_3/16x3/8in Standoff2-56_3/16x3/8in Standoff2-56_3/16x3/8in Standoff2-56_3/16x3/8in
DGND
StandOffs
M10
<2>
AM335X_GPIO_LED1
<2>
<2>
AM335X_GPIO_LED3
<2>
M11
M12
M13
AM335X_GPIO_LED4
AM335X_GPIO_LED2
Standoff2-56_3/16x5/8in Standoff2-56_3/16x5/8in Standoff2-56_3/16x5/8in Standoff2-56_3/16x5/8in
R100
100K
R98
100K
B
R105
100K
R104
100K
B
GND Probe points
DGND
DGND
DGND
DGND
TP13
TP2
Boot Configuration
DGND
AM335X_LCD_DATA[15.0]
0100XXXXXXXX110111b
MMC0, SPI0, UART0, USB0
R153
R152
R151
R150
R149
DNI
DNI
100K
DNI
R157
R154
R158
DNI
DNI
R159
DNI
DNI
R160
100K
R155
R161
100K
R156
R162
DNI
DNI
R163
100K
DNI
R164
100K
AM335X_LCD_DATA[23..0]
R39
A
R46
AM335X_LCD_DATA15
R45
AM335X_LCD_DATA8
R44
AM335X_LCD_DATA14
AM335X_LCD_DATA7
R43
AM335X_LCD_DATA9
R42
AM335X_LCD_DATA13
AM335X_LCD_DATA6
R41
AM335X_LCD_DATA12
AM335X_LCD_DATA10
R40
AM335X_LCD_DATA11
CLKOUT1 enabled
R38
R37
R36
R35
AM335X_LCD_DATA0
R34
AM335X_LCD_DATA1
R33
AM335X_LCD_DATA5
R32
AM335X_LCD_DATA4
AM335X_LCD_DATA2
Texas Instruments, Inc.
10K
DNI
10K
10K
10K
10K
10K
10K
10K
10K
DNI
DNI
10K
ARM MPU Business Unit
12500 TI Blvd
Dallas, TX 75243
DNI
A
AM335X_LCD_DATA3
R31
AM335X_LCD_DATA0
AM335X_LCD_DATA1
AM335X_LCD_DATA2
AM335X_LCD_DATA3
AM335X_LCD_DATA4
AM335X_LCD_DATA5
AM335X_LCD_DATA6
AM335X_LCD_DATA7
AM335X_LCD_DATA8
AM335X_LCD_DATA9
AM335X_LCD_DATA10
AM335X_LCD_DATA11
AM335X_LCD_DATA12
AM335X_LCD_DATA13
AM335X_LCD_DATA14
AM335X_LCD_DATA15
DNI
AM335X_LCD_DATA[23..0]
DNI
<2,3,9>
VDDSHV6
100K
VDDSHV6
TMDSSK3358
SysBoot_LEDs_Mech
Size
DGND
5
4
DGND
3
2
Document Number
C
TMDSSK3358_1.2A.dsn
Date:
Friday, March 22, 2013
Sheet: 6
1
Modified By:
Rev
Radha
1.2B
of 17
5
4
3
2
1
D
D
DDR3 SDRAM
DDR_A[14..0]
VDDS_DDR
R242
10K, 1%
<2>
DGND
<2>
<2>
<2>
<2>
DDR_CKE
DDR_CKE
<2>
<2>
<2>
<2>
DDR_D[15..0]
DDR_D[15..0]
<2>
<2>
DDR_CLK
DDR_CLKn
DDR_CSn
DDR_RASn
DDR_CASn
DDR_WEn
DDR_DQS1
DDR_DQSN1
<2> DDR_DQS0
<2> DDR_DQSN0
C
<2>
<2>
DDR_DQM1
DDR_DQM0
DDR_RESETn
T2
DDR_CLK
DDR_CLKn
DDR_CSN0
DDR_RASN
DDR_CASN
DDR_WEn
J7
K7
K9
L2
J3
K3
L3
DDR_D3
DDR_D6
DDR_D5
DDR_D7
DDR_D2
DDR_D0
DDR_D4
DDR_D1
DDR_D11
DDR_D8
DDR_D14
DDR_D12
DDR_D15
DDR_D10
DDR_D13
DDR_D9
E3
F7
F2
F8
H3
H8
G2
H7
D7
C3
C8
C2
A7
A2
B8
A3
DDR_DQS1
DDR_DQSN1
C7
B7
DDR_DQS0
DDR_DQSN0
F3
G3
DDR_DQM1
DDR_DQM0
D3
E7
VDDS_DDR
A1
A8
C1
C9
D2
E9
F1
H2
H9
J1
J9
L1
L9
M7
<2,7>
DDR_A[14..0]
U32
DDR_RESETn
DDR_VREF
DDR_VREF
M8
H1
Terminations
<2>
RESET#
CK
CKn
CKE
CSn
RASn
CASn
WEn
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
BA0
BA1
BA2
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
ODT
VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9
UDQS
UDQSn
LDQS
LDQSn
UDM
LDM
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ7
VDDQ8
VDDQ9
VDDQ10
NC1
NC2
NC3
NC4
NC5
VSSQ1
VSSQ2
VSSQ3
VSSQ4
VSSQ5
VSSQ6
VSSQ7
VSSQ8
VSSQ9
VREF_CA
VREF_DQ
ZQ
N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M2
N8
M3
DDR_A0
DDR_A1
DDR_A2
DDR_A3
DDR_A4
DDR_A5
DDR_A6
DDR_A7
DDR_A8
DDR_A9
DDR_A10
DDR_A11
DDR_A12
DDR_A13
DDR_A14
DDR_BA0
DDR_BA1
DDR_BA2
K1
DDR_ODT
B2
G7
R9
K2
K8
N1
N9
R1
D9
DDR_CLK
R89
33
DDR_CLKn
R88
33
DDR_BA[2..0]
DDR_BA[2..0]
DDR_ODT
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
DDR_CASN
DDR_RASN
DDR_A10
DDR_A12
DDR_A1
DDR_BA1
DDR_A4
DDR_A6
DDR_ODT
DDR_CSN0
DDR_A5
DDR_A3
DDR_BA0
DDR_WEn
DDR_A0
DDR_BA2
<2>
<2>
DDR_A8
DDR_A14
DDR_A11
DDR_A2
DDR_A9
DDR_A13
DDR_A7
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
16
15
14
13
12
11
10
9
16
15
14
13
12
11
10
9
16
15
14
13
12
11
10
9
DDR_RESETn
RP6
33x8
RP5
33x8
RP7
33x8
C
R241
DNI
DGND
VTT Regulator
VAUX33
U14
VDDS_DDR
L8
R94
R93
REFIN_DDR
10K, 1%
R95
10K, 1%
C171
0.001uF
MT41J128M16JT-125
VTT_DDR
DGND
DGND
0.75V
3
4
5
REFIN
VIN
VLDOIN
PGOOD
VO
GND
PGND
VOSNS
11
DGND
1
2
VDDS_DDR
240, 1%
C145
0.1uF
B
VDDS_DDR
VTT_DDR
VDDS_DDR
B1
B9
D1
D8
E2
E8
F9
G1
G9
C167
0.1uF
PWRPD
R237
10K, 1%
EN
REFOUT
10
R96
10K, 1%
VAUX33
9
TP23
8
DGND
7
6
TP25
R245
DDR_VTT_EN
10K, 1%
<15>
TPS51200
C187
0.1uF
DDR_VREF
DGND
<2,7>
B
DGND
DGND
DGND
VTT REG. DECAPS
DDR3 DECAPS
VTT_DDR
VDDS_DDR
VAUX33
VDDS_DDR
C277
10uF
C158
10uF
C175
0.1uF, 6.3V
C173
0.1uF, 6.3V
C174
0.1uF, 6.3V
C172
0.1uF, 6.3V
C165
0.1uF, 6.3V
C142
0.1uF, 6.3V
C148
0.1uF, 6.3V
C169
0.1uF, 6.3V
C147
0.1uF, 6.3V
C168
0.1uF, 6.3V
C143
0.1uF, 6.3V
C144
0.1uF, 6.3V
C182
10uF
C141
10uF
DGND
C186
10uF
C140
10uF
C273
10uF
DGND
C176
4.7uF
DGND
DGND
A
A
Texas Instruments, Inc.
ARM MPU Business Unit
12500 TI Blvd
Dallas, TX 75243
TMDSSK3358
DDR3_Memory
Size
5
4
3
2
Document Number
C
TMDSSK3358_1.2A.dsn
Date:
Friday, March 22, 2013
Sheet: 7
1
Modified By:
Rev
Radha
1.2B
of 17
5
4
D
3
2
1
VOLTAGE TRANSLATORS
WLAN MODULE
D
V1_8D
R182
R185
R183
R58
R184
R57
COMWL_RST
AM335X_MCASP0_AHCLKR
V3_3D
V1_8D
V1_8D
L7
2.2uH
VCOM_BAT
2.2uH
L12
3.3V
U12
10K
10K
10K
10K
DNI
10K
16
MMC1_CMD
MMC1_CLK
MMC1_D0
MMC1_D1
MMC1_D2
MMC1_D3
C230
0.01uF
C136
0.01uF
VBAT_WLAN
C70
0.01uF
C
VIO
NC1
NC2
NC3
NC4
GND
VDD
NC8
NC7
NC6
NC5
OUT
12
11
10
9
8
7
32.768Khz,5+/-23ppm
MMC1_CMD
MMC1_CLK
MMC1_D0
MMC1_D1
MMC1_D2
MMC1_D3
15
16
17
18
14
19
COM_SLOW_CLK_XO
0
R187
COM_SLOW_CLK
DNI
R188
21
40
DGND
1
4
13
20
22
31
4
OUT
IN
LDA312G7313F-237
5
L13
5.1nH
1
0
15
14
UART_DBG
WLAN_EN
RS232_RX
RS232_TX
WLAN_IRQ
SDIO_CMD/SPI_D
SDIO_CLK/SPI_C
SDIO_D0/SPI_DOUT
SDIO_D1
SDIO_D2
SDIO_D3/SPI_CS
AUD_CLK
AUD_FSYNC
AUD_IN
AUD_OUT
SLEEP_CLK
UART_RTS
UART_CTS
UART_TX
UART_RX
BT_EN
BT_TX_DBG
BT_FUNC1
BT_FUNC5
BT_FUNC6
26
25
23
24
COMAUD_CLK
COMAUD_FSYNC
COMAUD_IN
COMAUD_OUT
27
28
29
30
COMBTUARTRTS
COMBTUARTCTS
COMBTUARTTX
COMBTUARTRX
10
32
11
34
33
COM_BTRST
COM_BTUARTDEBUG
R239
VCCA
1B1
1B2
1A1
1A2
2B1
2B2
2A1
2A2
1OE
2OE
1DIR
2DIR
GND
4
5
AM335X_COM_WL_IRQ
<2>
AM335X_MCASP0_AXR1 <3>
6
7
AM335X_MCASP0_FSX <3>
AM335X_MCASP0_AHCLKX <3>
V3_3D
V1_8D
2
3
8
GND
C170
0.01uF
SN74AVC4T245
LBEE5ZSTNC-523
DGND
TP12
C
V1_8D
GND
GND
GND
GND
GND
GND
C180
0.01uF
DGND
DGND
2.4G_ANT
GND
GND
GND
GND
GND
GND
1
DGND
57
58
59
60
61
62
V3_3D
U29
16
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
L14
11
10
COMAUD_CLK
COMAUD_IN
13
12
COM_SLOW_CLK
11
10
VCCB
15
14
35
36
37
38
39
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
0
G
2
1.3nH
G
1
G
1
FEED
1
NC
J10
G
L15
2
2
DGND
6
ANT1
3
Antenna Matching
COMAUD_FSYNC
COM_BTRST
VCCB
9
VIO
VBAT
VBAT
5
6
7
8
9
<2> MMC1_CMD
<2> MMC1_CLK
<2> MMC1_D0
<2> MMC1_D1
<2> MMC1_D2
<2> MMC1_D3
Y2
1
2
3
4
5
6
COM_WL_UART_DBG
COMWL_RST
COM_WL_RS232_RX
COM_WL_RS232_TX
COMWL_IRQ
WLAN
TP15
TP19
13
12
DGND
BLUETOOTH
TP17
COMWL_IRQ
COMAUD_OUT
12
3
2
DGND
A1
VBAT_WLAN
<3>
9
MM8130-2600
VCCA
1B1
1B2
1A1
1A2
2B1
2B2
2A1
2A2
1OE
2OE
1DIR
2DIR
GND
GND
1
4
5
AM335X_MCASP0_ACLKX
AM335X_MCASP0_AXR0
6
7
<3>
<3>
DGND
AM335X_XDMA_EVENT_INTR1
2
3
<2>
V3_3D
V1_8D
8
C264
0.01uF
SN74AVC4T245
DGND
DGND
C259
0.01uF
2
DGND
DGND
DGND
DGND
DGND
V3_3D
V1_8D
B
WLAN POWER
VCOM_BAT
VBAT_WLAN_OUT
L6
VBAT_WLAN
13
COMBTUARTRX
COMBTUARTCTS 12
200mA max
1
2
VIN
VOUT
15
14
VBAT
U27
2
U22
C252
1uF
DGND
VSS
3
DGND
C69
0.01uF
11
COMBTUARTTX
COMBTUARTRTS 10
3.3V@500mA max
VCOM_BAT
2.2uH
VBAT
C215
0.01uF
1
VMMC
IN
OUT
EN
FB
6
XC6218P182HR-G
B
U11
16
DGND
GND
GND
4
9
5
3
VCCB
VCCA
1B1
1B2
1A1
1A2
2B1
2B2
2A1
2A2
1OE
2OE
1DIR
2DIR
GND
GND
1
4
5
AM335X_UART1_TXD <3>
AM335X_UART1_RTSn <3>
6
7
AM335X_UART1_RXD <3>
AM335X_UART1_CTSn <3>
2
3
V1_8D
R224
51K
C257
15pF
DGND
DGND
C149
0.01uF
C151
0.01uF
VCOM_BATFB
TPS79501
DGND
DGND
C135
2.2uF
DGND
DGND
V3_3D
8
SN74AVC4T245
R222
30.1K
DGND
A
A
Frost Byte 1
Texas Instruments, Inc.
ARM MPU Business Unit
12500 TI Blvd
Dallas, TX 75243
TMDSSK3358
WLAN_Module
Size
5
4
3
2
Document Number
C
TMDSSK3358_1.2A.dsn
Date:
Friday, March 22, 2013
Sheet: 8
1
Modified By:
Rev
Radha
1.2B
of 17
5
4
3
2
1
LCD
CAPACITIVE TOUCH OPTION
V3_3D
DGND
<3,5,6,15> AM335X_I2C0_SCL
<3,5,6,15> AM335X_I2C0_SDA
<14>
CAP_TOUCH_INT
<5> LCD_CAP_TOUCH_WAKE
D
V3_3D
R80
R84
0
0
R225
DNI
J2
1
2
3
4
5
6
D
7
8
0522070685
A2
LCD TFT 480X272
RGB Display
with Cap TouchScreen
V3_3D
NHD-4.3-480272MF-ATXI#-CTP
<2,3,6>
C231
0.01uF
AM335X_LCD_DATA[23..0]
AM335X_LCD_DATA[23..0]
J1
AM335X_LCD_AC_BIAS_EN
<3> AM335X_LCD_VSYNC
<3> AM335X_LCD_HSYNC
<2> AM335X_LCD_DISEN
<3> AM335X_LCD_PCLK
<3> AM335X_XRight
<3> AM335X_YDown
<3> AM335X_XLeft
<3> AM335X_YUp
CCLK
DISEN
CHSYNC
CVSYNC
CDEN
RP4
33x8
CDEN
CVSYNC
CHSYNC
DISEN
CCLK
BKLT_L
4.7uH BKLT_SW
L9
C
PAD
C33
4.7uF
1
Q1
L
2
DGND
R48
10, 1%
VIN
VMMC
SS
FB
LCD_BACKLIGHTEN
7
G
S
R50
44.2K, 1%
10
LED Backlight pwr 32mA @ 20V
9
LED+
5
LED-
EN
3
SS
SW
OUT
6
D
DGND
TPAD
U7
<2>
FSW
C64
DNI
BSS138
C75
4.7uF
TPS61081DRC
R63
10, 1%
DGND
DGND
41
Touch Screen Interface
VBAT
PGND
RP1
33x8
BackLight Driver
GND
RP2
33x8
CBR0
CBR1
CBR2
CBR3
CBR4
CBR5
CBR6
CBR7
CBG0
CBG1
CBG2
CBG3
CBG4
CBG5
CBG6
CBG7
CBB0
CBB1
CBB2
CBB3
CBB4
CBB5
CBB6
CBB7
8
<3>
AM335X_LCD_AC_BIAS_EN
AM335X_LCD_VSYNC
AM335X_LCD_HSYNC
AM335X_LCD_DISEN
AM335X_LCD_PCLK
AM335X_XRight
AM335X_YDown
AM335X_XLeft
AM335X_YUp
CBB7
CBB6
CBB5
CBB4
CBB3
CBB2
CBB1
CBB0
CBG7
CBG6
CBG5
CBG4
CBG3
CBG2
CBG1
CBG0
CBR7
CBR6
CBR5
CBR4
CBR3
CBR2
CBR1
CBR0
RP3
33x8
4
C
16
15
14
13
12
11
10
9
16
15
14
13
12
11
10
9
16
15
14
13
12
11
10
9
16
15
14
13
12
11
10
9
54132-4097
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
AM335X_LCD_DATA15
AM335X_LCD_DATA14
AM335X_LCD_DATA13
AM335X_LCD_DATA12
AM335X_LCD_DATA11
AM335X_LCD_DATA17
AM335X_LCD_DATA20
AM335X_LCD_DATA23
AM335X_LCD_DATA10
AM335X_LCD_DATA9
AM335X_LCD_DATA8
AM335X_LCD_DATA7
AM335X_LCD_DATA6
AM335X_LCD_DATA5
AM335X_LCD_DATA19
AM335X_LCD_DATA22
AM335X_LCD_DATA4
AM335X_LCD_DATA3
AM335X_LCD_DATA2
AM335X_LCD_DATA1
AM335X_LCD_DATA0
AM335X_LCD_DATA16
AM335X_LCD_DATA18
AM335X_LCD_DATA21
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
42
LEDLED+
DGND
54132-4097
DGND
DGND
DGND
B
B
1.8V LDO
3.3V LDO
VBAT
V1_8D
VBAT
V3_3D
U13
2
1
VMMC
IN
4
OUT
EN
5
FB
6
GND
3
GND
1
VMMC
C162
0.01uF
IN
4
OUT
EN
5
FB
C152
2.2uF
6
VBAT
TPS79518
VBAT
1500mA MAX
U3
2
GND
3
GND
C19
0.01uF
C26
4.7uF
C20
0.01uF
TPS78633
DGND
C154
1uF
DGND
DGND
C25
2.2uF, 10V
DGND
DGND
DGND
A
A
Texas Instruments, Inc.
ARM MPU Business Unit
12500 TI Blvd
Dallas, TX 75243
Final
TMDSSK3358
LCD_Power
Size
5
4
3
2
Document Number
C
TMDSSK3358_1.2A.dsn
Date:
Friday, March 22, 2013
Sheet: 9
1
Modified By:
Rev
Radha
1.2B
of 17
5
4
3
2
1
D
D
SD/MMC Connector
VDDSHV4
R4
10K
R3
10K
R1
10K
R2
10K
R5
10K
C
C
VDDSHV6
R11
470K
SCHA5B0200
VCC
DGND
CHASSIS_SD
FB12
2
1
1
<3>
VDDSHV4
3
5
2
AM335X_MMC0_D0
AM335X_MMC0_D1
AM335X_SPI0_CS1
C1
0.1uF
IO1
IO2
NC
<2>
<2>
AM335X_MMC0_CLK
DGND
GND
<2>
9
10
11
12
13
14
15
16
GND
CD
GND3
GND4
GND5
GND6
GND7
GND8
C3
4.7uF
U2
TPD2E001
DGND
4
VDDSHV4
DAT2
CD/DAT3
CMD
VDD
CLOCK
VSS
DAT0
DAT1
microSD
J4
1
2
3
4
5
6
7
8
<2> AM335X_MMC0_D2
<2> AM335X_MMC0_D3
<2> AM335X_MMC0_CMD
150OHM800mA
DGND
CHASSIS_SD
VDDSHV6
DGND
B
B
U1
AM335X_MMC0_D0
AM335X_MMC0_D1
AM335X_MMC0_D2
AM335X_MMC0_D3
AM335X_MMC0_CMD
AM335X_MMC0_CLK
8
7
6
3
2
1
IO6
IO5
IO4
IO3
IO2
IO1
NC2
NC1
GND
VCC
9
4
5
DGND
10
VDDSHV4
TPD6E001
A
A
Texas Instruments, Inc.
ARM MPU Business Unit
12500 TI Blvd
Dallas, TX 75243
TMDSSK3358
SDMMC Interface
Size
5
4
3
2
Document Number
C
TMDSSK3358_1.2A.dsn
Date:
Friday, March 22, 2013
Modified By:
Rev
Radha
1.2B
Sheet: 10
1
of 17
5
4
3
D
2
1
D
USB1 Port
VUSB_VBUS1
C193
4.7uF
DGND
J5
4
3
2
1
L2
<3>
USB1_DP
<3>
USB1_DM
1
4
2
USB1_CONN_DP
USB1_CONN_DM
3
S1
GND
DP
DM
VBUS
S2
ACM2012
V5_0D
S1
S2
USB A
U18
2
3
<3>
4
USB1_VBUS_EN
AM335X_USB1_DRVVBUS
1
IN
IN
OUT
OUT
OUT
EN
OC
6
7
8
5
AM335X_USB1_OC
1
<3>
GND
2
R102
10K
TPS2051BD
C
VUSB_VBUS1
DGND
CHASSIS_USB1
U17
R127
10K
3
D+
VBUS
DNC
ID
GND
DGND
6
C190
0.01uF
FB1
150OHM800mA
5
C
4
DGND
CHASSIS_USB1
TPD4S012
VDDSHV6
DGND
DGND
USB1 Power
B
B
L4
VMMC
VBAT
A1
A2
C24
DNI
C23
4.7uF
4.7uH
U20
B1
B2
VBAT
B3
A3
R120
100K
A4
V5_0D_EN
C4
D4
DGND
B4
C198
0.1uF
L1
L1
L2
L2
VIN
VIN
VOUT
VOUT
VINA1
VINA
EN
FB
PGND
PGND
PS
VSEL
SYNC
GND
GND
GND
D1
D2
V5_0D
E1
E2
E3
USB5V_FB
C207
2.2uF, 10V
R19
1.62M
C1
C2
C3
D3
E4
C21
22uF
C22
22uF
DGND
R18
180K
TPS63010
DGND
DGND
DGND
DGND
A
A
Texas Instruments, Inc.
ARM MPU Business Unit
12500 TI Blvd
Dallas, TX 75243
TMDSSK3358
USB1
Size
5
4
3
2
Document Number
C
TMDSSK3358_1.2A.dsn
Date:
Friday, March 22, 2013
Modified By:
Rev
Radha
1.2B
Sheet: 11
1
of 17
5
4
3
2
1
+1.1V
3.3V POWER INPUT
VDDL_PHY
VETH_VDDIO
DGND
VDDH_PHY
C48
C216
10uF
29
C66
0.1uF
VETH_LX
4.7uH L5
C205
0.1uF
10
C54
0.1uF
600mAFB10ohm
C224
0.1uF
V3_3D
C40
C219
10uF
0.1uF
C222
0.1uF
D
FB17
VETH_AVDD_3_3
VADDL_PHY
600mAFB10ohm
16
VETH_AVDD_3_3
FB16
0.1uF
V3_3D
D
DGND
<3>
AM335X_RGMII1_RXDV
<3>
AM335X_RGMII1_RXCLK
<3>
22
ETH1_RXDV
32
R208
22
ETH1_RXCLK
33
35
AM335X_RGMII1_TXCLK
<13>
CLK_25M_R
TP7
C201
34
R206
25
R190
22
CLK_25M
R176
22
PHY_PPS/GPIO 22
27pF
2
2
ETH_RESETn
7
6
Y4
25MHz
DGND
1
C
C202
<3,13>
27pF
<2>
RGMII1_INT
AM335X_EXT_WAKEUP
<2,6,13>
AM335x_EXTINT
ETH1_RBIAS
9
0
R122
ETH1_INTn
5
DNI
R173
WOL_INT_1
40
DNI
R124
3
LX
VDDH_REG
4
VDD33
AVDD33
44
19
47
DVDDL
AVDDL
13
AVDDL
AVDDL
TRXP2
TRXN2
TRXP3
TRXN3
TX_EN
RX_DV
SIP
SIN
RX_CLK
GTX_CLK
SOP
SON
CLK_25M
SD
PPS
MDC
MDIO
ETHER_D0P
ETHER_D0N
14
15
ETHER_D1P
ETHER_D1N
17
18
ETHER_D2P
ETHER_D2N
20
21
ETHER_D3P
ETHER_D3N
LED_ACT
LED_LINK1000
RBIAS
LED_LINK10_100
ETHER_D1P
ETHER_D1N
J6
10
9
8
7
6
5
4
3
2
1
ETHER_D2P
ETHER_D2N
ETHER_D3N
ETHER_D3P
46
45
D1
D2
VDDL_PHY
43
42
41
R170
PHY_LED_ACTn
R6
220
PHY_LED_1000n R7
220
D3
D4
DNI
RJ-45 Gigabit
1
48
AM335X_RGMII1_MDIO_CLK
<3,13>
AM335X_RGMII1_MDIO_DATA
<3,13>
RST
XTLI
XTLO
ETHER_D0P
ETHER_D0N
23
PHY_LED_ACTn
24
PHY_LED_1000n
26
PHY_LED_10/100n
SHLD1
SHLD2
AM335X_RGMII1_TXEN
TRXP1
TRXN1
11
12
M1
M2
<3>
RXD0
RXD1
RXD2
RXD3
VDDIO_REG
AM335X_RGMII1_RXD0
AM335X_RGMII1_RXD1
AM335X_RGMII1_RXD2
AM335X_RGMII1_RXD3
31
30
28
27
ETH1_RXD0
ETH1_RXD1
ETH1_RXD2
ETH1_RXD3
22
22
22
22
TRXP0
TRXN0
DGND
CHASSIS_ETH1
C
INT
WOL_INT
AR8031_AL1A
C240
DNI
EP
<3>
<3>
<3>
<3>
R204
R203
R69
R71
TXD0
TXD1
TXD2
TXD3
C229
DNI
C226
DNI
49
See
errata
document
36
37
38
39
AM335X_RGMII1_TXD0
AM335X_RGMII1_TXD1
AM335X_RGMII1_TXD2
AM335X_RGMII1_TXD3
AVDDL
U23
<3>
<3>
<3>
<3>
8
DGND
R146
2.37K
C9
0.1uF
C10
0.1uF
DGND
DGND
DGND
DGND
CHASSIS_ETH1
B
B
Power SEL
R55
Bootstrapping
Reset
MODE SELECTION
0
Mode "0000" = 1000 BASE-T, RGMII
PHYADDRESS = 00000
C39
1uF
ANA_MOD (IPU)
PHY_LED_ACTn
R53
10K
MODE2[0]
ETH1_RXDV
R207
10K
PHYADDRESS LSB
ETH1_RXD0
R205
10K
MODE2[1]
ETH1_RXD2
R68
10K
PHYADDRESS
ETH1_RXD1
R202
10K
MODE2[2]
ETH1_RXCLK
R209
10K
AM335X_RGMII1_MDIO_CLK
MODE2[3]
ETH1_RXD3
R70
10K
AM335X_RGMII1_MDIO_DATA
SEL_GPIO_INT PHY_LED_1000n
R60
10K
C41
1uF
R25
DNI
DGND
R30
1.5K
5
VDDSHV6
C73
0.1uF
DGND DGND
<2,6,14,17>
DGND
WOL_INT_1
R178
10K
ETH1_INTn
R123
10K
ETH_RESETn
R26
100K
SYS_WARMRESETn
VDDSHV6
U6
2
4
1
3
C38
0.1uF
PHY Address
VDDSHV1
VDDH_PHY
VDDH_PHY
V3_3D
VRTC
VETH_VDDIO
Pull ups
VETH_VDDIO
Decaps
ETH_RESETn
ETH_RESETn
<13>
C206
0.01uF
SN74LVC1G07
DGND
DGND
DGND
DGND
A
A
Texas Instruments, Inc.
ARM MPU Business Unit
12500 TI Blvd
Dallas, TX 75243
TMDSSK3358
RGMII1
Size
5
4
3
2
Document Number
C
TMDSSK3358_1.2A.dsn
Date:
Friday, March 22, 2013
Modified By:
Rev
Radha
1.2B
Sheet: 12
1
of 17
5
4
3
2
1
+1.1V
VDDL_PHY2
VADDL_PHY2
C65
C47
C36
C58
0.1uF
0.1uF
0.1uF
0.1uF
600mAFB10ohm
VETH2_LX
4.7uH L3
VETH2_AVDD_3_3
D
AM335X_RGMII2_TXCLK
R200
22
ETH2_RXDV
CLK_25M_R
R24
<12>
ETH_RESETn
DNI
ETH_RESETn
2
XTALIN_2
XTALOUT_2
7
6
<3>
1
DGND
C209
DNI
RGMII2_INT
<3,12> AM335X_EXT_WAKEUP
R20
0
ETH2_INTn
5
R189
DNI
WOL_INT2
40
R21
DNI
AM335x_EXTINT
VETH2_VDDIO
3
LX
VDD33
44
47
SD
PPS
MDC
MDIO
ETHER2_D0P
ETHER2_D0N
ETHER2_D1P
ETHER2_D1N
ETHER2_D1P
ETHER2_D1N
17
18
ETHER2_D2P
ETHER2_D2N
ETHER2_D2P
ETHER2_D2N
20
21
ETHER2_D3P
ETHER2_D3N
J7
10
9
8
7
6
5
4
3
2
1
ETHER2_D3N
ETHER2_D3P
46
45
D1
D2
VDDL_PHY2
43
42
41
R169
1
48
ETH_MDIO_CLK
ETH_MDIO_DATA
23
PHY2_LED_ACTn
24
PHY2_LED_1000n
26
PHY2_LED_10/100n
DNI
R147
R148
22
22
PHY2_LED_ACTn
R8
220
PHY2_LED_1000n
R9
220
D3
D4
C
RJ-45 Gigabit
AM335X_RGMII1_MDIO_CLK
<3,12>
AM335X_RGMII1_MDIO_DATA
<3,12>
RST
XTLI
XTLO
LED_ACT
LED_LINK1000
RBIAS
LED_LINK10_100
DGND
CHASSIS_ETH2
INT
WOL_INT
AR8031_AL1A
<2,6,12>
SOP
SON
CLK_25M
ETH2_RBIAS 9
Y1
DNI
19
GTX_CLK
22
PHY_PPS2/GPIO
22
2
C208
R181
SIP
SIN
RX_CLK
35
22
TP8
13
RX_DV
25
<12>
TRXP3
TRXN3
TX_EN
32
ETH2_RXCLK 33
C
TRXP2
TRXN2
ETHER2_D0P
ETHER2_D0N
14
15
SHLD1
SHLD2
AM335X_RGMII2_RXCLK
<2>
22
TRXP1
TRXN1
11
12
M1
M2
<2>
RXD0
RXD1
RXD2
RXD3
34
R197
AVDD33
AM335X_RGMII2_RXDV
31
30
28
27
DVDDL
<2>
ETH2_RXD0
ETH2_RXD1
ETH2_RXD2
ETH2_RXD3
TRXP0
TRXN0
EP
AM335X_RGMII2_TXEN
22
22
22
22
AVDDL
<2>
R195
R194
R65
R67
AVDDL
AM335X_RGMII2_RXD0
AM335X_RGMII2_RXD1
AM335X_RGMII2_RXD2
AM335X_RGMII2_RXD3
TXD0
TXD1
TXD2
TXD3
AVDDL
<2>
<2>
<2>
<2>
36
37
38
39
C237
DNI
49
See
errata
document
AM335X_RGMII2_TXD0
AM335X_RGMII2_TXD1
AM335X_RGMII2_TXD2
AM335X_RGMII2_TXD3
AVDDL
U24
<2>
<2>
<2>
<2>
8
DGND
VDDH_PHY2
DGND
29
DGND
10
C200
10uF
VDDH_REG
C204
10uF
C199
0.1uF
VDDIO_REG
C218
0.1uF
C223
0.1uF
V3_3D
600mAFB10ohm
VETH2_AVDD_3_3
FB15
4
D
16
V3_3D
FB14
C81
DNI
C68
DNI
R145
2.37K
C8
0.1uF
C17
0.1uF
DGND
DGND
DGND
CHASSIS_ETH2
DGND
B
B
VDDH_PHY2
V3_3D
PHY Address
VDDH_PHY2
VETH2_VDDIO
Pull ups
VDDSHV3
Power SEL
VRTC
Decaps
BootStrapping
PHYADDRESS = 00001
MODE SELECTION
VETH2_AVDD_3_3
Mode "0000" = 1000 BASE-T, RGMII
C34
0.1uF
C35
1uF
DGND DGND
R54
C71
0.1uF
0
C37
1uF
DGND
DGND
ETH2_INTn
R22
10K
WOL_INT2
R175
10K
ETH_RESETn
R47
DNI
PHYADDRESS0 (IPD)
ETH2_RXD0
R196
10K
MODE2[0]
ETH2_RXDV
R198
PHYADDRESS2
PHY2_LED_ACTn
R62
10K
MODE2[1]
ETH2_RXD2
R64
10K
PHYADDRESS1 (IPD)
ETH2_RXD1
R193
10K
MODE2[2]
ETH2_RXCLK
R199
10K
MODE2[3]
ETH2_RXD3
R66
10K
R61
10K
SEL_GPIO_INT PHY2_LED_1000n
10K
DGND
DGND
A
A
Texas Instruments, Inc.
ARM MPU Business Unit
12500 TI Blvd
Dallas, TX 75243
TMDSSK3358
RGMII2
Size
5
4
3
2
Document Number
C
TMDSSK3358_1.2A.dsn
Date:
Friday, March 22, 2013
Modified By:
Rev
Radha
1.2B
Sheet: 13
1
of 17
5
4
3
2
1
D
D
Audio Codec
U31
<2,6,12,17>
<14>
<14>
<2>
0 AUD_RESETn
R87
SYS_WARMRESETn
I2C_SCL_AUDIO
I2C_SDA_AUDIO
AUD_MCLK
AUD_FSX
AUD_BCLK
AUD_DIN
AUD_DOUT
AM335X_XDMA_EVENT_INTR0
<3> AM335X_AUDA_FSX
<3> AM335X_AUDA_BCLK
<3> AM335X_AUDA_DIN
<3> AM335X_AUDA_DOUT
TP14
TP16
V3_3AUD
C177
10uF
33
I2C_SCL_AUDIO 1
I2C_SDA_AUDIO 2
V3_3D
C278
0.1uF
37
39
38
40
41
48
35
34
45
46
47
25
RESETn
RIGHT_ROP
SCL
SDA
RIGHT_ROM
LEFT_LOP
MCLK
WCLK
BCLK
DIN
DOUT
LEFT_LOM
HPROUT
HPLOUT
MFP3
GPIO1
GPIO2
HPRCOM
HPLCOM
MFP0
MFP1
MFP2
MIC3R
MICDET
MICBIAS
MIC3L
LINE2LP
LINE2LM
AVDD_DAC
AGND_AUD
44
V3_3D
36
V1_8D
43
42
C178
10uF
C179
10uF
C281
0.1uF
C139
10uF
C280
0.1uF
C270
10uF
C272
0.1uF
C276
0.1uF
15
26
20
21
DRVDD
DRVDD
DRVDD
LINE1LP
LINE1LM
LINE1RP
LINE1RM
IOVDD
DVDD
MONO_LOP
MONO_LOM
SELECT
DVSS
LINE2RP
LINE2RM
29
30
23
18
HD_SPKRP
HS_SPKRP
22
19
HD_SPKRM
HS_SPKRM
TP21
TP24
14
12
13
11
7
8
3
4
C
5
6
27
28
9
10
AVSS_ADC
AVSS_DAC
TPAD
V3_3AUD
DRVSS
DRVSS
TLV320AIC3106
C163
0.01uF
TPAD
16
17
24
V3_3AUD
C
31
32
C160
0.01uF
C157
0.01uF
C161
0.01uF
C155
0.1uF
C153
0.1uF
C150
0.1uF
C146
0.1uF
C159
0.01uF
C156
0.01uF
C164
0.01uF
C166
0.01uF
AGND_AUD
DGND
AGND_AUD
AGND_AUD
AGND_AUD
B
B
J13
HS_SPKRP
C181
47uF
1
3
47uF
10
2
V3_3D
FB10
V3_3AUD
150OHM800mA
HD_SPKRP
C185
FB11
AGND_AUD
DGND
150OHM800mA
3.5mm SJ3524
AGND_AUD
A
A
Texas Instruments, Inc.
ARM MPU Business Unit
12500 TI Blvd
Dallas, TX 75243
TMDSSK3358
Audio
Size
5
4
3
2
Document Number
C
TMDSSK3358_1.2A.dsn
Date:
Friday, March 22, 2013
Modified By:
Rev
Radha
1.2B
Sheet: 14
1
of 17
5
4
3
2
1
D
D
Keypad Switches
VDDSHV3
VDDSHV1
4
3
SW4
B3SL
4
3
SW2
B3SL
4
3
SW1
B3SL
4
3
SW3
B3SL
0
2
1
R115
2
1
2
1
2
1
KEYPAD_PWRA
KEYPAD_SCN0
KEYPAD_SCN1
KEYPAD_SCN2
KEYPAD_SCN3
R215
2.2K
C
R165
2.2K
C243
1uF
R172
2.2K
C220
1uF
DGND
<2>
GPIO_KEY2
<2>
GPIO_KEY3
<2>
GPIO_KEY4
<2>
R231
2.2K
C228
1uF
DGND
GPIO_KEY1
C
C263
1uF
DGND
DGND
Accelerometer
B
B
V3_3D
V3_3D
U10
<3,5,6>
<3,5,6>
4
6
AM335X_I2C0_SCL
AM335X_I2C0_SDA
V3_3D
<3>
<3>
ACC_INT1
ACC_INT2
R86
10K
7
8
11
9
R244
DNI
10
R85
0
SCL/SPC
VDD_IO
SDA/SDI/SDO
VDD
SDO/SA0
CS
NC0
NC1
INT1
RSV1
INT2
GND
GND
GND
RSV0
GND
V3_3D
1
14
C274
0.01uF
2
3
15
DGND
C275
0.01uF
DGND
5
12
13
16
LIS331DLH
DGND
DGND
DGND
A
A
Texas Instruments, Inc.
ARM MPU Business Unit
12500 TI Blvd
Dallas, TX 75243
TMDSSK3358
Keypad_Gyro
Size
5
4
3
2
Document Number
C
TMDSSK3358_1.2A.dsn
Date:
Friday, March 22, 2013
Modified By:
Rev
Radha
1.2B
Sheet: 15
1
of 17
5
4
3
2
1
USB HUB
D
D
USB CONNECTOR
USB_DC
J3
1
2
3
4
5
L1
HUB_USBDP_UP
1
4
HUB_USBDM_UP
2
3
USBDP_UP
USBDM_UP
USBDP_UP
USBDM_UP
ACM2012
USB_DC
U15
1
2
USB_DC
3
D+
S4
S3
S4
S3
VBUS
DM
DP
ID
GND
USB_DC
CHASSIS_USB0
S2
S1
S2
S1
USB_MicroAB
C2
4.7uF
DGND
DGND
VBUS
6
FB13
DNC
ID
GND
5
C188
0.01uF
4
150OHM800mA
TPD4S012
DGND
CHASSIS_USB0
DGND
R103
100K
U16
Upstream
18
VBUS_DET
R101
100K
USBDP_UP
USBDM_UP
VBUS_DET
Downstream 1USBDP_DN1
8
C
USBDM_DN1
OCS1
PRTPWR1
DGND
22
21
HUB_USBDP_UP
HUB_USBDM_UP
V5_0D
1
28
7
FT_DP
<17>
FT_DM
<17>
FT_VBUS
R15
4.7K
U5B
3
DownstreamUSBDP_DN2
2
12
OCS2
USBDM_DN2
V3_3D
PRTPWR2
NON_REM[0:1]/nc NC
R106
100K
NON_REM1
SUSP_IND/NON_REM0
17
RESETn
6
C189
0.1uF
RESET
RBIAS
3
2
11
<3>
USB0_DM
<3>
V3_3D
R118
DNI
5
13
19
NON_REM1
NON_REM2
26
HUB_BIAS R99
XTALIN
24
C4
18pF, 10V, 2%
B
DGND
C16
0.1uF
VDD33
VDD33
VDDPLLREF/VDD33
2
4
20
27
R14
100K
R109
C12
4.7uF
DGND
1
4
DGND
R119
10K, 1%
23
HS_IND
16
0
rsvd3
15
29
R12
100K
DGND
C15
0.1uF
DGND
C13
0.1uF
XTALOUT
SN74LVC2G07
14
10
XTALIN/CLKIN
3
Y3
24MHz
R10
DNI
<3>
R13
DNI
DGND
C6
DGND
18pF, 10V, 2%
USB0_VBUS
TP1
12.1K, 1%
V3_3D
VDD33
VDDCRREF/VDD33
DGND
USB0_DP
4
USB0_VBUS_PWR
Common
TEST
C
<17>
C11
0.1uF
DGND
C5
0.1uF
C14
1uF
XTALOUT
CRFILT
9
CRFILT
B
HS_IND
VSS
DGND
PLLFILT
25
PLLFILT
VSS(FLAG)
USB2412_QFN28
C7
1uF
C195
1uF
DGND DGND
DGND
DGND
A
A
Texas Instruments, Inc.
ARM MPU Business Unit
12500 TI Blvd
Dallas, TX 75243
TMDSSK3358
USB_HUB
Size
5
4
3
2
Document Number
C
TMDSSK3358_1.2A.dsn
Date:
Friday, March 22, 2013
Modified By:
Rev
Radha
1.2B
Sheet: 16
1
of 17
5
4
3
2
USB - UART
D
1
(Optional)
D
VDD_1V8FT
V3_3D
VDD_FTVPLL
VDD_FTVPHY
<16>
<16>
R221
V3_3D
12.1K, 1% FT_REF
6
14
FT_RESETn
2.2K
C234
DGND
FT_DM
FT_DP
R214
DGND
7
8
2
3
Y5
12MHz,+/-50ppm
C233
V3_3D
20
31
42
56
12
37
64
DM
DP
ACBUS0
ACBUS1
ACBUS2
ACBUS3
ACBUS4
ACBUS5
ACBUS6
ACBUS7
REF
RESET#
XTIN
27pF
C
DGND
VREGOUT
XTIN
BDBUS0
BDBUS1
BDBUS2
BDBUS3
BDBUS4
BDBUS5
BDBUS6
BDBUS7
XTOUT
XTOUT
27pF
10K, 1%
R76
F_EECS
63
10K, 1%
R82
F_EESK
62
10K, 1%
R83 F_EEDOUT
R81
F_EEDATA 61
2.2K
EECS
BCBUS0
BCBUS1
BCBUS2
BCBUS3
BCBUS4
BCBUS5
BCBUS6
BCBUS7
EESK
EEDATA
TEST
AGND
13
ADBUS0
ADBUS1
ADBUS2
ADBUS3
ADBUS4
ADBUS5
ADBUS6
ADBUS7
FT2232HL
10
DGND
PWREN#
SUSPEND#
16
17
18
19
21
22
23
24
F_ADBUS0
F_ADBUS1
F_ADBUS2
F_ADBUS3
F_ADBUS4
R75
R227
R228
R79
R229
0
0
0
0
0
F_ADBUS6
R230
0
26
27
28
29
30
32
33
34
F_ADBUS5
R78
0
V3_3D
JTAG_TCK <2>
R16
JTAG_TDI <2>
DNI
JTAG_TDO <2>
JTAG_TMS <2>
JTAG_TRSTn <2>
JTAG_EMU0
V3_3D
C196
C194
0.1uF
<2>
DGND
U4
DGND
1
FT_SRESETn
6
FT_SRESETB
R17
0
FT_VBUS 2
V3_3D
R77
0
JTAG_EMU1
<2>
4.75K, 1%
DGND
38
39
40
41
43
44
45
46
U5A
1
FT_SRESET
4
F_ADBUS7
0.1uF
5
49
VREGIN
DGND
SN74LVC1G00DCK
2
50
VDD_FTREGIN
5
150OHM800mA
VCCIO.1
VCCIO.2
VCCIO.3
VCCIO.4
VPHY
VPLL
FB18
V3_3D
VCORE.1
VCORE.2
VCORE.3
U28
DGND
V3_3D
3
C253
0.1uF
GND.1
GND.2
GND.3
GND.4
GND.5
GND.6
GND.7
GND.8
C251
0.1uF
4
9
C241
0.1uF
SYS_WARMRESETn
<2,6,12,14>
SN74LVC2G07
DGND
AM335X_UART0_RXD <3>
AM335X_UART0_TXD <3>
AM335X_UART0_CTSn <3>
AM335X_UART0_RTSn <3,5>
DGND
C
V3_3D
48
52
53
54
55
57
58
59
R110
10K, 1%
FT_VBUS
<16>
60
36
1
5
11
15
25
35
47
51
C134
4.7uF
DGND
FILTERS
B
B
V3_3D
FB20
150OHM800mA
VDD_FTVPLL
FB19
150OHM800mA
VDD_FTVPHY
JTAG
J12
C242
0.1uF
C248
0.1uF
DGND
DNI
JTAG_TCK
DGND
EEPROM
V3_3D
<6,12,14,17>
SYS_WARMRESETn
R97
V3_3D
DNI
U9
6
2
VCC
GND
CS
SK
DIN
DOUT
5
4
3
1
R90
TP20
TP22
F_EECS
F_EESK
F_EEDATA
F_EEDOUT
C183
DNI
R92
R91
DNI
1
3
5
JTAG_TDO 7
9
RTCK
11
TCK
JTAG_EMU013
EMU_RSTn 15
17
EMU2
19
EMU4
JTAG_TMS
JTAG_TDI
V3_3D
C184
DNI
DNI
TMS
TRSTn
TDI
TDIS
TVDD
NC
TDO
GND
TCKRTN GND
TCK
GND
EMU0
EMU1
SRST
GND
EMU2
EMU3
EMU4
GND
2
4
6
8
10
12
14
16
18
20
JTAG_TRSTn
TDIS
R235
R236
DNI
DNI
DGND
DGND
JTAG_EMU1 R234
EMU3
DNI
V3_3D
TP18
DNI
DGND
DGND
93LC56B
DGND
FT2232 DECAPS
V3_3D
A
A
Frost Byte 1
C265
0.1uF
C133
0.1uF
C266
0.1uF
Texas Instruments, Inc.
C246
0.1uF
ARM MPU Business Unit
12500 TI Blvd
Dallas, TX 75243
TMDSSK3358
DGND
USB_UART
Size
5
4
3
2
Document Number
C
TMDSSK3358_1.2A.dsn
Date:
Friday, March 22, 2013
Modified By:
Rev
Radha
1.2B
Sheet: 17
1
of 17