NXP NPIC shift register based LED drivers

NXP NPIC shift
register based LED
drivers
High-voltage serial-in, parallel-out shift
register devices
Designed for I/O expansion, these shift register based LED drivers allow the use of lower
pin-count (and lower-cost) controllers. Serial outputs support cascading, so just three controller
I/Os can control the states of 16, 24 or more LEDs.
KEY FEATURES
` 33 V, 100 mA open-drain outputs
` Simple control interface
` 5.0 and 3.3 V supply options
` Cascadable
` Overvoltage-tolerant inputs
` Inherent current limiting and thermal protection
` Integrated voltage clamps
` Fully specified (-40 to +125 °C)
` AEC-Q100 options
` Pb-free, RoHS-compliant and Dark Green
KEY BENEFITS
` Reduced component count and footprint
` Self-protecting outputs (overcurrent)
` Suitable for driving inductive loads
` Low power consumption
APPLICATIONS
` GPIO expansion
` LED drivers
` Displays
` Industrial
` Automotive
The NXP NPIC family of shift register based LED drivers
integrates the MOSFET drivers used in traditional low-power
shift register applications. This integration greatly reduces the
component count, layout complexity, and footprint of LED
driving applications.
Integrated voltage clamps in the outputs provide protection
against inductive transients. This protection makes the NPIC
devices suitable for power driver applications such as relay,
solenoids, and other low-current, medium-voltage loads.
8-bit and 12-bit shift registers are available in the NPIC family.
These are made available in the industry’s standard and
smallest packages.
INHERENT PROTECTION FEATURES
The open-drain outputs include circuitry that limits the maximum current each output can sink. As the drain voltage increases,
the drain source current decreases. This feature protects the outputs and the components they are driving. At 25 °C, the output
clamp is typically activated when the drain source current is 250 mA.
Thermal protection is also included in the open-drain outputs. As the temperature increases, so does the output resistance. This
limits drain source current and prevents damage to the output and the components it is driving. At 25°C, the output typically
limits the drain source current to 120 mA.
Output current limiting as a function of drain source voltage
Output current limiting as a function of temperature
NPIC portfolio
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SOT763 (BQ)
•
Power logic 12-bit shift registrer; open-drain outputs
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SOT360 (PW) Power logic 8-bit shift registrer; open-drain outputs
NPIC6C4894
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SOT403 (PW)
NPIC6C596A
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SOT163 (D)
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SOT109 (D)
Power logic 8-bit shift registrer; open-drain outputs
Master reset
Power logic 8-bit shift registrer; open-drain outputs
NPIC6C596
Open-drain
output
NPIC6C595
Packages
Overvoltagetolerant I/Os
Features
3.3 V supply
Description
5 V supply
Type number
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•
•
•
•
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•
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Packages
Package suffix
D
D
PW
PW
BQ
16-pin
20-pin
16-pin
20-pin
16-pin
NPIC devices are available in industry standard SO and TSSOP
packages, as well as the innovative leadless DQFN packages.
The smaller footprint leadless DQFN provides a 76% footprint
reduction compared to TSSOP. This enables NPIC solutions to
Package
Width (mm)
SOT109
SOT163
SOT403
SOT360
SOT763
6.00
10.30
6.40
6.40
2.50
Length (mm)
9.90
12.80
5.00
6.50
3.50
Height (mm)
1.75
2.65
1.10
1.10
1.00
Pitch (mm)
1.27
1.27
0.65
0.65
0.50
provide considerable footprint reduction compared to traditional
solutions with external MOSFET drivers.
NPIC family
AEC-Q100 compliant shift registers
www.nxp.com/products/logic/family/NPIC/
www.nxp.com/products/automotive/logic/shift_registers/
www.nxp.com
© 2015 NXP Semiconductors N.V.
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Date of release: April 2015
information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and
Document order number: 9397 750 17648
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