TISP6NTP2A

CO
M
PL
IA
N
T
TISP6NTP2A
*R
oH
S
QUAD FORWARD-CONDUCTING BUFFERED P-GATE THYRISTORS
LE
AD
FR
EE
This model is currently available, but not
recommended for new designs. The
Model TISP6NTP2C is functionally
similar and pin-to-pin compatible.
TISP6NTP2A Programmable Protector
Ro VE LEA
HS RS D
CO ION FRE
M SA E
PL R
IA E
NT
*
Independent Overvoltage Protection for Two SLICs in Short
Loop Applications:
– Wide 0 to -90 V Programming Range
– Low 5 mA max. Gate Triggering Current
– High 150 mA min. (85 °C) Holding Current
– Full -40 °C to 85 °C Temperature Range
D Package (Top View)
K1
1
8
K2
G1,G2
2
7
A
G3,G4
3
6
A
K3
4
5
K4
Rated for Common Impulse Waveforms
Voltage Impulse
Form
Current Impulse
Shape
10/1000 s
10/700 s
1.2/50 s
2/10 s
10/1000 s
5/310 s
8/20 s
2/10 s
ITSP
MDRXAM
Device Symbol
A
20
25
75
85
K1
G1,G2
................................................ UL Recognized Component
Description
The TISP6NTP2A has been designed for short loop systems
such as:
– WILL (Wireless In the Local Loop)
– FITL (Fibre In The Loop)
– DAML (Digital Added Main Line, Pair Gain)
– ISDN-TA (Integrated Services Digital Network Terminal Adaptors)
K2
A
A
K3
Typical TISP6NTP2A Router Application
G3,G4
TERMINAL ADAPTOR
SLIC 1
POTS 1
TISP6
NTP2A
PROCESSOR
SLIC 2
LINE
TRANSCEIVER
TRANSCEIVER
K4
SDRXAI
POTS 2
LAN
How to Order
Device
TISP6NTP2A
Package
Carrier
D, Small-Outline Tape and Reel
Order As
TISP6NTP2ADR-S
*RoHS Directive 2002/95/EC Jan. 27, 2003 including annex and RoHS Recast 2011/65/EU June 8, 2011.
JUNE 1998 - REVISED JANUARY 2016
Specifications are subject to change without notice.
The device characteristics and parameters in this data sheet can and do vary in different applications and actual device performance may vary over time.
Users should verify actual device performance in their specific applications.
TISP6NTP2A Programmable Protector
Description (continued)
These systems often have the need to source two POTS (Plain Old Telephone Service) lines, one for a telephone and the other for a facsimile
machine. In a single surface mount package, the TISP6NTP2A protects the two POTS line SLICs (Subscriber Line Interface Circuits) against
overvoltages caused by lightning, a.c. power contact and induction.
The TISP6NTP2A has an array of four buffered P-gate forward conducting thyristors with twin commoned gates and a common anode
connection. Each thyristor cathode has a separate terminal connection. An antiparallel anode-cathode diode is connected across each
thyristor. The buffer transistors reduce the gate supply current.
In use, the cathodes of an TISP6NTP2A thyristor are connected to the four conductors of two POTS lines (see applications information). Each
gate is connected to the appropriate negative voltage battery feed of the SLIC driving that line pair. By having separate gates, each SLIC can
be protected at a voltage level related to the negative supply voltage of that individual SLIC. The anode of the TISP6NTP2A is connected to the
SLIC common.
Positive overvoltages are clipped to common by forward conduction of the TISP6NTP2A antiparallel diode. Negative overvoltages are initially
clipped close to the SLIC negative supply by emitter follower action of the TISP6NTP2A buffer transistor. If sufficient clipping current flows, the
TISP6NTP2A thyristor will regenerate and switch into a low voltage on-state condition. As the overvoltage subsides, the high holding current of
the TISP6NTP2A helps prevent d.c. latchup.
Absolute Maximum Ratings, TA = 25 °C (Unless Otherwise Noted)
Symbol
Value
Unit
Repetitive peak off-state voltage, IG = 0,- 40 °C ≤ TJ ≤ 85 °C
Rating
VDRM
-100
V
Repetitive peak gate-cathode voltage, VKA = 0, - 40 °C ≤ TJ ≤ 85 °C
VGKRM
-90
V
Non-repetitive peak on-state pulse current, -40 °C ≤ TJ ≤ 85 °C, (see Notes 1 and 2)
10/1000 µs (Bellcore GR-1089-CORE, Issue 1, November 1994, Section 4)
20
0.2/310 µs (I3124, open-circuit voltage wave shape 0.5/700 µs)
5/310 µs (ITU-T K.20 & K.21, open-circuit voltage wave shape 10/700 µs)
8/20 µs (IEC 61000-4-5:1995, open-circuit voltage wave shape 1.2/50 µs)
25
25
75
ITSP
2/10 µs (Bellcore GR-1089-CORE, Issue 1, November 1994, Section 4)
A
85
Non-repetitive peak on-state current, 50/60 Hz, -40 °C ≤ TJ ≤ 85 °C, (see Notes 1 and 2)
100 ms
7
1s
5s
300 s
900 s
ITSM
Non-repetitive peak gate current, 1/2 µs pulse, cathodes commoned (see Note 1)
Operating free-air temperature range
Junction temperature
Storage temperature range
2.7
1.5
0.45
0.43
A
IGSM
25
A
TA
-40 to +85
°C
TJ
-40 to +150
°C
Tstg
-65 to +150
°C
NOTES: 1. Initially, the protector must be in thermal equilibrium with -40 °C ≤ TJ ≤ 85 °C. The surge may be repeated after the device returns
to its initial conditions.
2. These non-repetitive rated currents are peak values for either polarity. The rated current values may be applied to any cathodeanode terminal pair. Additionally, all cathode-anode terminal pairs may have their rated current values applied simultaneously (in
this case the anode terminal current will be four times the rated current value of an individual terminal pair). Above 85 °C, derate
linearly to zero at 150 °C lead temperature.
JUNE 1998 - REVISED JAN 2016
Specifications are subject to change without notice.
Customers should verify actual device performance in their specific applications.
TISP6NTP2A Programmable Protector
Recommended Operating Conditions
Min.
Typ.
220
CG
Gate decoupling capacitor
100
R1, R2
Series resistor for GR-1089-CORE first-level surge survival
Series resistor for ITU-T recommendation K.20
Series resistor for ITU-T recommendation K.21
Series resistor for IEC 61000-4-5:1995, class 5, 1.2/50 or 10/700
40
12
20
4
Max.
Unit
nF
Ω
Electrical Characteristics for any Section, TA = 25 °C (Unless Otherwise Noted)
Parameter
ID
V(BO)
Test Conditions
Max.
Unit
TJ = 25 °C
Min.
-5
µA
TJ = 85 °C
-50
µA
Off-state current
VD = VDRM, IG = 0
Breakover voltage
IT = -20 A, IEC 61000-4-5:1995 combination impulse generator,
VGG = -50 V
IT = -18 A, I3124 impulse generator, VGG = -50 V
Typ.
-70
V
-70
Breakdown time
IT = -18 A, I3124 impulse generator, V(BR) < -50 V
2
µs
VF
Forward voltage
IF = 0.6 A, tw = 500 µs, VGG = -50 V
IF = 18 A, tw = 500 µs, VGG = -50 V
3
5
V
Peak forward recovery
voltage
IF = 20 A, IEC 61000-4-5:1995 combination impulse generator,
VGG = -50 V
IF = 18 A, I3124 impulse generator, VGG = -50 V
15
VFRM
tFR
Forward recovery time
IF = 18 A, I3124 impulse generator,
VGG = -50 V
2
4
IH
Holding current
IT = -1 A, di/dt = 1A/ms, VGG = -50 V, TJ = 85 °C
t(BR)
V
15
VF > 10 V
VF > 5 V
-150
µs
mA
TJ = 25 °C
-5
µA
TJ = 85 °C
-50
µA
IGKS
Gate reverse current
VGG = VGKRM, VAK = 0
IGAT
Gate reverse current,
on state
IT = -0.6 A, tw = 500 µs, VGG = -50 V
-1
mA
IGAF
Gate reverse current,
forward conducting
state
IF = 0.6 A, tw = 500 µs, VGG = -50 V
-40
mA
mA
IGT
Gate trigger current
IT = -5 A, tp(g) ≥ 20 µs, VGG = -50 V
5
VGT
Gate trigger voltage
IT = -5 A, tp(g) ≥ 20 µs, VGG = -50 V
2.5
V
CAK
Anode-cathode offstate capacitance
VD = -3 V
100
pF
VD = -50 V
60
pF
NOTE
f = 1 MHz, Vd = 1 V, IG = 0, (see Note 3)
3: These capacitance measurements employ a three terminal capacitance bridge incorporating a guard circuit. The unmeasured
device terminals are a.c. connected to the guard terminal of the bridge.
Thermal Characteristics
Parameter
RθJA
Junction to free air thermal resistance
Test Conditions
Ptot = 0.52 W, TA = 85 °C, 5 cm2, FR4 PCB
JUNE 1998 - REVISED JAN 2016
Specifications are subject to change without notice.
Customers should verify actual device performance in their specific applications.
Min.
Typ.
Max.
Unit
160
°C/W
TISP6NTP2A Programmable Protector
Parameter Measurement Information
PR IN C IPA L TER MIN A L V-I C H AR A C TER ISTIC
G AT E TR AN SFER
C H AR A C TER ISTIC
+i
+i K
Q uadran t I
I FSP (= |I TSP |)
Forw ard
C onduc tion
C haracteristic
I FSM (= |I TSM |)
IF
IF
VF
V G K (B O )
V GG
-v
IG T
VD
+v
ID
I (B O )
VS
+i G
IG A F
IH
IS
V (BO)
-i G
VT
IG A T
IT
IT
I TSM
IG
Q uadran t III
Sw itchin g
C haracteristic
IK
I TSP
-i
P M6X AIA
-i K
Figure 1. Principal Terminal And Gate Transfer Characteristics
JUNE 1998 - REVISED JAN 2016
Specifications are subject to change without notice.
Customers should verify actual device performance in their specific applications.
TISP6NTP2A Programmable Protector
APPLICATIONS INFORMATION
Operation of Gated Protectors
Figure 2 and Figure 3 show how the TISP6NTP2A limits overvoltages. The TISP6NTP2A thyristor sections limit negative overvoltages and the
diode sections limit positive overvoltages.
SLIC
PROTECTOR
SLIC
PROTECTOR
R1A
R1A
SLIC 1
R1B
SLIC 1
R1B
VBAT1
VBAT1
C1
100 nF
0V
C1
100 nF
TISP6NTP2A
0V
TISP6NTP2A
R2A
R2A
SLIC 2
SLIC 2
IK
IF
R2B
VBAT2
AI6XBN
R2B
IG
C2
100 nF
VBAT2
0V
Figure 2. Negative Overvoltage Condition
AI6XBO
IG
C2
100 nF
0V
Figure 3. Positive Overvoltage Condition
Negative overvoltages (Figure 2) are initially clipped close to the SLIC negative supply rail value (VBAT) by the conduction of the transistor
base-emitter and the thyristor gate-cathode junctions. If sufficient current is available from the overvoltage, then the thyristor will crowbar into
a low voltage ground referenced on-state condition. As the overvoltage subsides, the high holding current of the crowbar thyristor prevents
d.c. latchup. The common gate of each thyristor pair is connected the appropriate SLIC battery feed voltage (VBAT1 or VBAT2).
The negative protection voltage, V(BO), will be the sum of the gate supply (VBAT) and the peak gate (terminal)-cathode voltage (VGT ). Under
a.c. overvoltage conditions VGT will be less than 2.5 V. The integrated transistor buffer in the TISP6NTP2A greatly reduces protectors source
and sink current loading on the VBAT supply. Without the transistor, the thyristor gate current would charge the VBAT supply. An electronic
power supply is not usually designed to be charged like a battery. As a result, the electronic supply would switch off and the thyristor gate
current would provide the SLIC supply current. Normally the SLIC current would be less than the gate current, which would cause the supply
voltage to increase and destroy the SLIC by a supply overvoltage. The integrated transistor buffer removes this problem.
Fast rising impulses will cause short term overshoots in gate-cathode voltage. The negative protection voltage under impulse conditions will
also be increased if there is a long connection between the gate decoupling capacitor and the gate terminal. During the initial rise of a fast
impulse, the gate current (IG ) is the same as the cathode current (IK ). Rates of 60 A/µs can cause inductive voltages of 0.6 V in 2.5 cm of
printed wiring track. To minimize this inductive voltage increase of protection voltage, the length of the capacitor to gate terminal tracking
should be minimized.
JUNE 1998 - REVISED JAN 2016
Specifications are subject to change without notice.
Customers should verify actual device performance in their specific applications.
TISP6NTP2A Programmable Protector
APPLICATIONS INFORMATION
Operation of Gated Protectors (continued)
Positive overvoltages (Figure 3) are clipped to ground by forward conduction of the diode section in the TISP6NTP2A. Fast rising impulses will
cause short term overshoots in forward voltage (V FRM).
Central Office Application to Bellcore GR-1089-Core Issue 1
The most stressful impulse for first-level surge testing (section 4.5.7) is the 1000 V, 10/1000 impulse. To limit the circuit current to the
TISP6NTP2A rating of 20 A requires the total circuit resistance to be 1000/20 = 50 Ω. Subtracting the generator fictive source impedance of
10 Ω gives 40 Ω as the required series resistor value for the TISP6NTP2A (R1A, R1B, R2A and R2B). The various first level impulse current
levels are shown in table 1. The maximum 1.2/50 and 2/10 current levels of 56 A are below the TISP6NTP2A ratings of 60 A and 85 A. In table
1, the designation 2x20 means that each conductor has a simultaneous peak current of 20 A and 2x20 = 40 A flows in the anode (ground)
connection.
Ta ble 1. First-level Surge Currents
Total Series
Resistance
Ω
IT
Both
22.5
2x56
Single
45
56
Both
28.5
2x53
Single
50
20
Both
25
2x20
Open-circuit Voltage
V
Short-c ircuit Current
A
Generator Resistance
Ω
Wires Tested
2/10
2500
500
5
1.2/50
8/20
2500
500
2 + 3/Wire
10/1000
1000
Waveshape
100
A
10
Central Office Application to ITU-T Recommendation K.20
The test level of 1000 V 10/700 delivers a peak short-circuit current level of 25 A, which is equal to the TISP6NTP2A rated value. A series
resistor (R1A, R1B, R2A and R2B) is required to ensure coordinated operation with the primary protector at the 4000 V test level. The resistor
value will be set by the sparkover voltage of the primary protector. A sparkover voltage of 300 V will give a 300/25 = 12 Ω series resistor.
Local Subscribers Line Equipment to ITU-T Recommendation K.21
The test level of 1500 V 10/700 delivers a peak short-circuit current level of 37.5 A. To limit the circuit current to the TISP6NTP2A rating of 25 A
requires the total circuit resistance to be 1500/25 = 60 Ω. Subtracting the generator fictive source impedance of 40 Ω gives 20 Ω as the
required series resistor value for the TISP6NTP2A. Even at the 1500 V test level, this resistor develops 25x20 = 500 V, which should ensure the
coordination with the primary protector sparkover.
JUNE 1998 - REVISED JAN 2016
Specifications are subject to change without notice.
Customers should verify actual device performance in their specific applications.
TISP6NTP2A Programmable Protector
APPLICATIONS INFORMATION
Indoor POTS Lines to ITU-T Recommendation K.21. K.22 and IEC 61000-4-5: 1995
Internal POTS lines from WILL and ISDN-TA equipment are in a relatively unexposed environment. If these lines are galvanically isolated
(floating), the return path for any induced surges can only be through equipment capacitance or insulation breakdown.
The most stressful condition would be when the POTS lines are not galvanically isolated. Such a case is when an ISDN-TA has a common
connection between the incoming ISDN line and the internal POTS lines. The ISDN line is likely to be ground referenced and may have primary
protection at the subscriber connection. If the primary protection operates, it provides a direct return to ground.
ITU-T recommendation K.22 for a floating 4-conductor T/S bus uses a 1 kV 1.2/50 or 2/10 impulse, capacitively coupled via 8 nF to the bus
conductors. Very little circulating current is likely to flow during K.22 testing. If the T/S bus has a ground return, then the testing changes to
ITU-T recommendation K.21. The required series resistor values for K.21 and the TISP6NTP2A have been calculated earlier.
In IEC 61000-4-5: 1995 the highest specified test level is class 5. For unshielded symmetrically operated lines, class 5 testing uses a 4000 V
combination wave (1.2/50, 8/20) generator to apply a simultaneous impulse to all conductors. For the four conductors of the two POTS lines,
the currents are equalized by the use of specified 160 Ω feed resistors. As the generator fictive source impedance is 2 Ω, the peak current in
each conductor is 4000/(2x4 + 160) = 24 A. This is less than the 60 A TISP6NTP2A rating.
If the lines are long and exit the building, testing is done with a 10/700 generator. In this case the feed resistors are 100 Ω and the fictive
impedance is 15 Ω. The peak current in each conductor will be 4000/(15x4 + 100) = 25 A. This value is the same as the TISP6NTP2A rating.
As the equipment connected to the POTS line may have uncoordinated protection, it is desirable to provided the ring-tip pair current sharing to
the TISP6NTP2A by series resistors (R1A, R1B, R2A and R2B). A value of 4 Ω should be sufficient to ensure sharing.
“TISP” is a trademark of Bourns, Ltd., a Bourns Company, and is Registered in U.S. Patent and Trademark Office.
“Bourns” is a registered trademark of Bourns, Inc. in the U.S. and other countries.
JUNE 1998 - REVISED JAN 2016
Specifications are subject to change without notice.
Customers should verify actual device performance in their specific applications.