Data Sheet

IP4251/52/53/54
Integrated 4-, 6- and 8-channel passive filter network with
ESD protection to IEC 61000-4-2, level 4
Rev. 03 — 6 May 2009
Product data sheet
1. Product profile
1.1 General description
The IP425x family consists of 4-, 6- and 8-channel RC low-pass filter arrays which are
designed to provide filtering of undesired RF signals on the I/O ports of portable
communication or computing devices. In addition, the IP425x family incorporates diodes
to provide protection to downstream components from ElectroStatic Discharge (ESD)
voltages as high as ±30 kV.
The IP425x family is fabricated using monolithic silicon technology and integrates up to 8
resistors and 16 diodes in a 0.4 mm pitch 8-, 12- or 16-pin MicroPak (compatible with
QFN) lead-free plastic package with a height of 0.5 mm only.
1.2 Features
n Pb-free, Restriction of the use of certain Hazardous Substances (RoHS) and dark
green compliant
n 4-, 6- and 8-channel integrated π-type RC filter network
n IP4251CZ8/CZ12/CZ16: 100 Ω channel series resistance, 10 pF (at 2.5 V DC)
channel capacitance
n IP4252CZ8/CZ12/CZ16: 40 Ω channel series resistance, 12 pF (at 2.5 V DC) channel
capacitance
n IP4253CZ8/CZ12/CZ16: 200 Ω channel series resistance, 30 pF (at 2.5 V DC)
channel capacitance
n IP4254CZ8/CZ12/CZ16: 100 Ω channel series resistance, 30 pF (at 2.5 V DC)
channel capacitance
n ESD protection to ±30 kV contact discharge according to IEC 61000-4-2 standard far
exceeding level 4
n MicroPak (QFN compatible) plastic package with 0.4 mm pitch
1.3 Applications
n General purpose ElectroMagnetic Interference (EMI) and Radio-Frequency
Interference (RFI) filtering and downstream ESD protection for:
u Cellular and Personal Communication System (PCS) mobile handsets
u Cordless telephones
u Wireless data (WAN/LAN) systems
u PDAs
IP4251/52/53/54
NXP Semiconductors
Integrated 4-, 6- and 8-channel passive filter network
2. Pinning information
Table 1.
Pin
Pinning IP425xCZx
Description
Simplified outline
Symbol
CZ8
1 and 8
filter channel 1
2 and 7
filter channel 2
3 and 6
filter channel 3
4 and 5
filter channel 4
ground pad
ground
8
Rs(ch)
5
1, 2, 3, 4
5, 6, 7, 8
Cch
2
1
4
Transparent
top view
Cch
2
GND
001aaf978
CZ12
1 and 12
filter channel 1
2 and 11
filter channel 2
3 and 10
filter channel 3
4 and 9
filter channel 4
5 and 8
filter channel 5
6 and 7
filter channel 6
ground pad
ground
12
Rs(ch)
7
1, 2, 3,
4, 5, 6
1
Cch
2
Cch
2
7, 8, 9,
10, 11, 12
6
Transparent
top view
GND
001aaf979
CZ16
1 and 16
filter channel 1
2 and 15
filter channel 2
3 and 14
filter channel 3
4 and 13
filter channel 4
5 and 12
filter channel 5
6 and 11
filter channel 6
7 and 10
filter channel 7
8 and 9
filter channel 8
ground pad
ground
16
1, 2, 3, 4,
5, 6, 7, 8
1
Cch
2
Cch
2
9, 10, 11, 12,
13, 14, 15, 16
8
Transparent
top view
IP4251_52_53_54_3
Product data sheet
Rs(ch)
9
GND
001aaf980
© NXP B.V. 2009. All rights reserved.
Rev. 03 — 6 May 2009
2 of 16
IP4251/52/53/54
NXP Semiconductors
Integrated 4-, 6- and 8-channel passive filter network
3. Ordering information
Table 2.
Ordering information
Type number
Package
Name
Description
Version
HXSON8U
plastic thermal enhanced extremely thin small outline package; no leads;
8 terminals; UTLP based; body 1.35 × 1.7 × 0.5 mm
SOT983-1
IP4251CZ12-6 HXSON12U plastic thermal enhanced extremely thin small outline package; no leads;
12 terminals; UTLP based; body 1.35 × 2.5 × 0.5 mm
SOT984-1
IP4251CZ16-8 HXSON16U plastic thermal enhanced extremely thin small outline package; no leads;
16 terminals; UTLP based; body 1.35 × 3.3 × 0.5 mm
SOT985-1
IP4252CZ8-4
plastic thermal enhanced extremely thin small outline package; no leads;
8 terminals; UTLP based; body 1.35 × 1.7 × 0.5 mm
SOT983-1
IP4252CZ12-6 HXSON12U plastic thermal enhanced extremely thin small outline package; no leads;
12 terminals; UTLP based; body 1.35 × 2.5 × 0.5 mm
SOT984-1
IP4252CZ16-8 HXSON16U plastic thermal enhanced extremely thin small outline package; no leads;
16 terminals; UTLP based; body 1.35 × 3.3 × 0.5 mm
SOT985-1
IP4253CZ8-4
plastic thermal enhanced extremely thin small outline package; no leads;
8 terminals; UTLP based; body 1.35 × 1.7 × 0.5 mm
SOT983-1
IP4253CZ12-6 HXSON12U plastic thermal enhanced extremely thin small outline package; no leads;
12 terminals; UTLP based; body 1.35 × 2.5 × 0.5 mm
SOT984-1
IP4253CZ16-8 HXSON16U plastic thermal enhanced extremely thin small outline package; no leads;
16 terminals; UTLP based; body 1.35 × 3.3 × 0.5 mm
SOT985-1
IP4254CZ8-4
plastic thermal enhanced extremely thin small outline package; no leads;
8 terminals; UTLP based; body 1.35 × 1.7 × 0.5 mm
SOT983-1
IP4254CZ12-6 HXSON12U plastic thermal enhanced extremely thin small outline package; no leads;
12 terminals; UTLP based; body 1.35 × 2.5 × 0.5 mm
SOT984-1
IP4254CZ16-8 HXSON16U plastic thermal enhanced extremely thin small outline package; no leads;
16 terminals; UTLP based; body 1.35 × 3.3 × 0.5 mm
SOT985-1
IP4251CZ8-4
HXSON8U
HXSON8U
HXSON8U
IP4251_52_53_54_3
Product data sheet
© NXP B.V. 2009. All rights reserved.
Rev. 03 — 6 May 2009
3 of 16
IP4251/52/53/54
NXP Semiconductors
Integrated 4-, 6- and 8-channel passive filter network
4. Limiting values
Table 3.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
Parameter
Conditions
VCC
supply voltage
Vesd
electrostatic discharge
voltage
Min
Max
Unit
−0.5
+5.6
V
all pins to ground
contact discharge
IP4251 and IP4252
[1][3]
−15
+15
kV
IP4253 and IP4254
[2][3]
−30
+30
kV
[2][3]
−30
+30
kV
contact discharge
−8
+8
kV
air discharge
−15
+15
kV
air discharge
IP4253 and IP4254
IEC 61000-4-2, level 4; all
pins to ground
Pch
channel power dissipation Tamb = 85 °C
-
60
mW
Ptot
total power dissipation
Tamb = 85 °C
-
200
mW
Tstg
storage temperature
−55
+150
°C
Tamb
ambient temperature
−40
+85
°C
[1]
Device is qualified using contact discharges at ±15 kV according IEC 61000-4-2 model, far exceeding
level 4.
[2]
Device is qualified using contact discharges at ±30 kV according IEC 61000-4-2 model, far exceeding
level 4.
[3]
A special robust test is performed stressing the devices with ≥ 1000 contact discharges according
IEC 61000-4-2 model. All devices far exceed IEC 61000-4-2, level 4.
5. Thermal characteristics
Table 4.
Thermal characteristics
Symbol
Parameter
Rth(j-pcb)
[1]
Conditions
thermal resistance from junction to 2 layer printed-circuit
printed-circuit board
board
Unit
120[1]
K/W
Depends on layout details.
IP4251_52_53_54_3
Product data sheet
Typ
© NXP B.V. 2009. All rights reserved.
Rev. 03 — 6 May 2009
4 of 16
IP4251/52/53/54
NXP Semiconductors
Integrated 4-, 6- and 8-channel passive filter network
6. Characteristics
Table 5.
Channel resistance
Tamb = 25 °C unless otherwise specified.
Symbol
Parameter
Rs(ch)
Conditions
Min
Typ
Max
Unit
channel series resistance IP4251CZ8/CZ12/CZ16
80
100
120
Ω
IP4252CZ8/CZ12/CZ16
32
40
48
Ω
IP4253CZ8/CZ12/CZ16
160
200
240
Ω
IP4254CZ8/CZ12/CZ16
80
100
120
Ω
Min
Typ
Max
Unit
IP4251
-
10
-
pF
IP4252
-
12
-
pF
IP4253 and IP4254
-
30
-
pF
Table 6.
Channel characteristics
Tamb = 25 °C unless otherwise specified.
Symbol
Parameter
Conditions
Cch
channel capacitance
for the total channel;
f = 100 kHz
Vbias(DC) = 2.5 V
Vbias(DC) = 0 V
IP4251
[1]
-
15
-
pF
IP4252
[1]
-
18
-
pF
IP4253 and IP4254
[1]
-
45
-
pF
ILR
reverse leakage current
per channel; VI = 3.5 V
-
-
0.1
µA
VBR
breakdown voltage
positive clamp; II = 1 mA
5.8
-
9
V
VF
forward voltage
negative clamp; IF = 1 mA
0.4
-
1.5
V
[1]
Guaranteed by design.
IP4251_52_53_54_3
Product data sheet
© NXP B.V. 2009. All rights reserved.
Rev. 03 — 6 May 2009
5 of 16
IP4251/52/53/54
NXP Semiconductors
Integrated 4-, 6- and 8-channel passive filter network
Table 7.
Frequency characteristics
Tamb = 25 °C unless otherwise specified.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
800 MHz < f < 3 GHz
-
16
-
dB
f = 1 GHz
-
20
-
dB
-
30
-
dB
IP4251CZ8/CZ12/CZ16
αil
αct
Rsource = 50 Ω; RL = 50 Ω
insertion loss
crosstalk attenuation
Rsource = 50 Ω; RL = 50 Ω;
800 MHz < f < 3 GHz
IP4252CZ8/CZ12/CZ16
αil
αct
Rsource = 50 Ω; RL = 50 Ω
insertion loss
crosstalk attenuation
800 MHz < f < 3 GHz
-
12
-
dB
f = 1 GHz
-
14
-
dB
-
40
-
dB
800 MHz < f < 3 GHz
-
33
-
dB
f = 1 GHz
35
-
-
dB
-
30
-
dB
Rsource = 50 Ω; RL = 50 Ω;
800 MHz < f < 3 GHz
IP4253CZ8/CZ12/CZ16
αil
αct
Rsource = 50 Ω; RL = 50 Ω
insertion loss
crosstalk attenuation
Rsource = 50 Ω; RL = 50 Ω;
800 MHz < f < 3 GHz
IP4254CZ8/CZ12/CZ16
αil
αct
Rsource = 50 Ω; RL = 50 Ω
insertion loss
crosstalk attenuation
800 MHz < f < 3 GHz
-
28
-
dB
f = 1 GHz
30
-
-
dB
-
30
-
dB
Rsource = 50 Ω; RL = 50 Ω;
800 MHz < f < 3 GHz
7. Application information
7.1 Insertion loss
The IP425x family is mainly designed as EMI/RFI filters for multi-channel interfaces. The
measured insertion loss in a 50 Ω system for IP4251, IP4253 and IP4254 and the
simulated insertion loss for IP4252 is depicted in Figure 2.
The insertion loss was measured using the test set-up as depicted in Figure 1.
IP4251_52_53_54_3
Product data sheet
© NXP B.V. 2009. All rights reserved.
Rev. 03 — 6 May 2009
6 of 16
IP4251/52/53/54
NXP Semiconductors
Integrated 4-, 6- and 8-channel passive filter network
001aaj308
0
S21
(dB)
−10
(1)
(2)
(3)
(4)
−20
−30
IN
OUT
DUT
50 Ω
50 Ω
−40
Vgen
−50
10−1
1
10
102
001aag218
103
104
f (MHz)
(1) IP4252CZ16 - ch1 to ch16
(2) IP4251CZ16 - ch1 to ch16
(3) IP4254CZ16 - ch1 to ch16
(4) IP4253CZ16 - ch1 to ch16
Fig 1.
Frequency response set-up
Fig 2.
001aaj608
0
IP425x family frequency response curves
001aaj609
0
S21
(dB)
S21
(dB)
−10
−10
(1)
(2)
−20
−20
−30
−30
−40
−40
−50
10−1
1
10
102
103
104
f (MHz)
(1)
(2)
−50
10−1
1
10
102
(1) IP4251CZ16 - ch1 to ch16
(1) IP4252CZ16 - ch1 to ch16
(2) IP4251CZ16 - ch4 to ch13
(2) IP4252CZ16 - ch4 to ch13
Fig 3.
IP4251 frequency response curves
Fig 4.
IP4251_52_53_54_3
Product data sheet
103
104
f (MHz)
IP4252 frequency response curves
© NXP B.V. 2009. All rights reserved.
Rev. 03 — 6 May 2009
7 of 16
IP4251/52/53/54
NXP Semiconductors
Integrated 4-, 6- and 8-channel passive filter network
001aaj610
0
001aaj611
0
S21
(dB)
S21
(dB)
−10
−10
−20
−20
−30
(1)
(2)
−30
(1)
(2)
−40
−40
−50
10−1
1
10
102
103
104
f (MHz)
−50
10−1
1
10
102
(1) IP4253CZ16 - ch1 to ch16
(1) IP4254CZ16 - ch4 to ch13
(2) IP4253CZ16 - ch4 to ch13
(2) IP4254CZ16 - ch1 to ch16
Fig 5.
IP4253 frequency response curves
Fig 6.
103
104
f (MHz)
IP4254 frequency response curves
Due to the optimized silicon dice and package design, all channels in a single package
show a very good matching performance as the insertion loss for a channel at the
package side (e.g. ch1 to ch16) is nearly identical with the center channels (e.g. ch4 to
ch13). Typical measurements results are shown in Figure 3 to Figure 6 for the different
devices.
7.2 Selection
The IP425x family is mainly designed as EMI/RFI filters for multi-channel interfaces. The
selection of one of the filter devices has to be performed dependent on the maximum
clock frequency, driver strength, capacitive load of the sink, and also the maximum
applicable rise and fall times.
7.2.1 SD(HC) and MMC memory interface
The Secure Digital High Capacity (SDHC) memory card interface standard specification
and the MultiMediaCard (MMC) (JESD 84A43) standard specification recommend a rise
and fall time of 25 % to 62.5 % (62.5 % to 25 % respectively) of 3 ns or less for the input
signal of the receiving interface side.
Assuming a typical capacitance of about 20 pF for the SDHC memory card itself, and
approximately 4 pF to 7 pF for the PCB and the card holder, IP4252CZ12-6 (6 channels,
Rs(ch) = 40 Ω, Cch = 12 pF at Vbias(DC) = 2.5 V) is a matching selection to filter and protect
all relevant interface pins such as CLK, CMD, and DAT0 to DAT3/CD. Please refer to
Figure 7 for a general example of the implementation of the IP4252 in an SD(HC) card
interface.
In case additional channels such as write-protect or a mechanical card detection switch
are used, the IP4252CZ16-8 (8 channels, Rs(ch) = 40 Ω, Cch = 12 pF at Vbias(DC) = 2.5 V)
offers two additional channels.
IP4251_52_53_54_3
Product data sheet
© NXP B.V. 2009. All rights reserved.
Rev. 03 — 6 May 2009
8 of 16
IP4251/52/53/54
NXP Semiconductors
Integrated 4-, 6- and 8-channel passive filter network
to HOST
INTERFACE
VCC(VSD)
DAT3/CD pull-up
10 kΩ − 100 kΩ
pull-up resistors
10 kΩ − 100 kΩ
IP4252CZ12-6
(IP4252CZ16-8)
DAT1
DAT1
DAT0
DAT0
CLK
GND
CMD
CLK
VCC(VSD)
DAT3/CD
CMD
DAT2
DAT3/CD pull-up
>270 kΩ
exact value
depends on
required
logic levels
CD
DAT3/CD
WP
DAT2
SD MEMORY
CARD
SET_CLR_
CARD_DETECT
(ACMD42)
10 kΩ − 90 kΩ
optional:
2-additional channels
of IP4252CZ16-8
optional:
electrical card detect
CD
WP
optional:
card detect switch
optional:
write protect switch
Fig 7.
001aaj310
Example of IP4252 in an SD(HC) card interface
The capacitance values specified for the signal channels of the MMC interface differ from
the SD(HC) specification. The MMC card side interface is specified to have an intrinsic
capacitance of 12 pF to 18 pF and the total channel is limited according the specification
to 30 pF only. Therefore, any filter device capacitance is limited to a maximum of up to
18 pF, including the card holder and PCB traces.
Please refer to Figure 8 for a general example of the implementation of the IP4252 in a
MultiMediaCard interface application.
IP4251_52_53_54_3
Product data sheet
© NXP B.V. 2009. All rights reserved.
Rev. 03 — 6 May 2009
9 of 16
IP4251/52/53/54
NXP Semiconductors
Integrated 4-, 6- and 8-channel passive filter network
VCC(VMMC)
CMD pull-up
4.7 kΩ - 100 kΩ
pull-up resistors
50 kΩ - 100 kΩ
IP4252CZ12-6
DAT1
DAT1
DAT0
DAT0
DAT7
DAT7
DAT6
VSS2
CLK
DAT6
C7
C13
C6
C12
CLK
C5
VCC(VMMC)
C4
DAT5
HOST
INTERFACE
VSS1
DAT5
CMD
CMD
DAT4
DAT4
DAT3
DAT3
DAT2
DAT2
IP4252CZ8-4
Fig 8.
C8
e.g.
RSMMC
C3
C11
C2
C10
C1
C9
001aaj309
Example of IP4252 in an MMC interface
To generate SDHC- and MMC-compliant digital signals, the driver strength should not
significantly undercut 8 mA.
7.2.2 LCD interfaces, medium-speed interfaces
For digital interfaces such as LCD display interfaces running at clock speeds between
10 MHz and 25 MHz or more, IP4251, IP4252, or IP4254 can be used in dependency of
the sink load, clock speed, driver strength and rise and fall time requirements. Also the
minimum EMI filter requirements may be a decision-making factor.
7.2.3 Keypad, low-speed interfaces
Especially for lower-speed interfaces such as keypads, low-speed serial interfaces (e.g.
RS232) and low-speed control signals, IP4253 (Rs(ch) = 200 Ω, Cch = 30 pF at
Vbias(DC) = 2.5 V) offers a very robust ESD protection and strong suppression of unwanted
frequencies (EMI-filtering).
IP4251_52_53_54_3
Product data sheet
© NXP B.V. 2009. All rights reserved.
Rev. 03 — 6 May 2009
10 of 16
IP4251/52/53/54
NXP Semiconductors
Integrated 4-, 6- and 8-channel passive filter network
8. Package outline
HXSON8U: plastic thermal enhanced extremely thin small outline package; no leads;
8 terminals; UTLP based; body 1.35 x 1.7 x 0.5 mm
SOT983-1
X
B
D
A
A
E
A1
terminal 1
index area
detail X
e1
1/2 e
terminal 1
index area
v
w
b
e
1
L1
M
M
C
C A B
C
y
y1 C
4
L
Eh
8
5
Dh
0
0.5
1 mm
scale
DIMENSIONS (mm are the original dimensions)
UNIT
A
max
A1
b
D
Dh
E
Eh
e
e1
L
L1
v
w
y
y1
mm
0.5
0.05
0.00
0.25
0.15
1.75
1.65
1.5
1.3
1.4
1.3
0.5
0.3
0.4
1.2
0.35
0.15
0.09
0.00
0.1
0.05
0.05
0.1
Fig 9.
REFERENCES
OUTLINE
VERSION
IEC
SOT983-1
---
JEDEC
JEITA
---
EUROPEAN
PROJECTION
ISSUE DATE
07-01-12
07-11-14
Package outline SOT983-1 (HXSON8U)
IP4251_52_53_54_3
Product data sheet
© NXP B.V. 2009. All rights reserved.
Rev. 03 — 6 May 2009
11 of 16
IP4251/52/53/54
NXP Semiconductors
Integrated 4-, 6- and 8-channel passive filter network
HXSON12U: plastic thermal enhanced extremely thin small outline package; no leads;
12 terminals; UTLP based; body 1.35 x 2.5 x 0.5 mm
SOT984-1
X
B
D
A
A
E
A1
terminal 1
index area
detail X
e1
terminal 1
index area
e
v
w
b
1/2 e
1
L1
M
M
C
C A B
C
y
y1 C
6
L
Eh
12
7
Dh
0
0.5
1 mm
scale
DIMENSIONS (mm are the original dimensions)
UNIT
A
max
A1
b
D
Dh
E
Eh
e
e1
L
L1
v
w
y
y1
mm
0.5
0.05
0.00
0.25
0.15
2.55
2.45
2.3
2.1
1.4
1.3
0.5
0.3
0.4
2
0.35
0.15
0.09
0.00
0.1
0.05
0.05
0.1
REFERENCES
OUTLINE
VERSION
IEC
SOT984-1
---
JEDEC
JEITA
---
EUROPEAN
PROJECTION
ISSUE DATE
07-01-12
07-11-14
Fig 10. Package outline SOT984-1 (HXSON12U)
IP4251_52_53_54_3
Product data sheet
© NXP B.V. 2009. All rights reserved.
Rev. 03 — 6 May 2009
12 of 16
IP4251/52/53/54
NXP Semiconductors
Integrated 4-, 6- and 8-channel passive filter network
HXSON16U: plastic thermal enhanced extremely thin small outline package; no leads;
16 terminals; UTLP based; body 1.35 x 3.3 x 0.5 mm
SOT985-1
X
B
D
A
A
E
A1
terminal 1
index area
detail X
e1
terminal 1
index area
e
v
w
b
1/2 e
1
L1
M
M
C
C A B
C
y
y1 C
8
L
Eh
16
9
Dh
0
0.5
1 mm
scale
DIMENSIONS (mm are the original dimensions)
UNIT
A
max
A1
b
D
Dh
E
Eh
e
e1
L
L1
v
w
y
y1
mm
0.5
0.05
0.00
0.25
0.15
3.35
3.25
3.1
2.9
1.4
1.3
0.5
0.3
0.4
2.8
0.35
0.15
0.09
0.00
0.1
0.05
0.05
0.1
REFERENCES
OUTLINE
VERSION
IEC
SOT985-1
---
JEDEC
JEITA
---
EUROPEAN
PROJECTION
ISSUE DATE
07-01-12
07-11-14
Fig 11. Package outline SOT985-1 (HXSON16U)
IP4251_52_53_54_3
Product data sheet
© NXP B.V. 2009. All rights reserved.
Rev. 03 — 6 May 2009
13 of 16
IP4251/52/53/54
NXP Semiconductors
Integrated 4-, 6- and 8-channel passive filter network
9. Revision history
Table 8.
Revision history
Document ID
Release date
Data sheet status
Change
notice
Supersedes
IP4251_52_53_54_3
20090506
Product data sheet
-
IP4253_54_CZ8_CZ12_CZ16_2
Modifications:
•
•
Added product types IP4251x and IP4252x.
Added chapter Section 7 “Application information”.
IP4253_54_CZ8_CZ12_CZ16_2
20071108
Product data sheet
IP4253_54_CZ8_CZ12_CZ16_1
20070209
Objective data sheet -
IP4251_52_53_54_3
Product data sheet
-
IP4253_54_CZ8_CZ12_CZ16_1
-
© NXP B.V. 2009. All rights reserved.
Rev. 03 — 6 May 2009
14 of 16
IP4251/52/53/54
NXP Semiconductors
Integrated 4-, 6- and 8-channel passive filter network
10. Legal information
10.1 Data sheet status
Document status[1][2]
Product status[3]
Definition
Objective [short] data sheet
Development
This document contains data from the objective specification for product development.
Preliminary [short] data sheet
Qualification
This document contains data from the preliminary specification.
Product [short] data sheet
Production
This document contains the product specification.
[1]
Please consult the most recently issued document before initiating or completing a design.
[2]
The term ‘short data sheet’ is explained in section “Definitions”.
[3]
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.nxp.com.
10.2 Definitions
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences of
use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is intended
for quick reference only and should not be relied upon to contain detailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semiconductors sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
10.3 Disclaimers
General — Information in this document is believed to be accurate and
reliable. However, NXP Semiconductors does not give any representations or
warranties, expressed or implied, as to the accuracy or completeness of such
information and shall have no liability for the consequences of use of such
information.
Right to make changes — NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
Suitability for use — NXP Semiconductors products are not designed,
authorized or warranted to be suitable for use in medical, military, aircraft,
space or life support equipment, nor in applications where failure or
malfunction of an NXP Semiconductors product can reasonably be expected
to result in personal injury, death or severe property or environmental
damage. NXP Semiconductors accepts no liability for inclusion and/or use of
NXP Semiconductors products in such equipment or applications and
therefore such inclusion and/or use is at the customer’s own risk.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) may cause permanent
damage to the device. Limiting values are stress ratings only and operation of
the device at these or any other conditions above those given in the
Characteristics sections of this document is not implied. Exposure to limiting
values for extended periods may affect device reliability.
Terms and conditions of sale — NXP Semiconductors products are sold
subject to the general terms and conditions of commercial sale, as published
at http://www.nxp.com/profile/terms, including those pertaining to warranty,
intellectual property rights infringement and limitation of liability, unless
explicitly otherwise agreed to in writing by NXP Semiconductors. In case of
any inconsistency or conflict between information in this document and such
terms and conditions, the latter will prevail.
No offer to sell or license — Nothing in this document may be interpreted
or construed as an offer to sell products that is open for acceptance or the
grant, conveyance or implication of any license under any copyrights, patents
or other industrial or intellectual property rights.
Export control — This document as well as the item(s) described herein
may be subject to export control regulations. Export might require a prior
authorization from national authorities.
10.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks
are the property of their respective owners.
11. Contact information
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: [email protected]
IP4251_52_53_54_3
Product data sheet
© NXP B.V. 2009. All rights reserved.
Rev. 03 — 6 May 2009
15 of 16
IP4251/52/53/54
NXP Semiconductors
Integrated 4-, 6- and 8-channel passive filter network
12. Contents
1
1.1
1.2
1.3
2
3
4
5
6
7
7.1
7.2
7.2.1
7.2.2
7.2.3
8
9
10
10.1
10.2
10.3
10.4
11
12
Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . 1
General description. . . . . . . . . . . . . . . . . . . . . . 1
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Pinning information . . . . . . . . . . . . . . . . . . . . . . 2
Ordering information . . . . . . . . . . . . . . . . . . . . . 3
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 4
Thermal characteristics. . . . . . . . . . . . . . . . . . . 4
Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Application information. . . . . . . . . . . . . . . . . . . 6
Insertion loss . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
SD(HC) and MMC memory interface . . . . . . . . 8
LCD interfaces, medium-speed interfaces . . . 10
Keypad, low-speed interfaces . . . . . . . . . . . . . 10
Package outline . . . . . . . . . . . . . . . . . . . . . . . . 11
Revision history . . . . . . . . . . . . . . . . . . . . . . . . 14
Legal information. . . . . . . . . . . . . . . . . . . . . . . 15
Data sheet status . . . . . . . . . . . . . . . . . . . . . . 15
Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Contact information. . . . . . . . . . . . . . . . . . . . . 15
Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
© NXP B.V. 2009.
All rights reserved.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: [email protected]
Date of release: 6 May 2009
Document identifier: IP4251_52_53_54_3
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