Freescale Semiconductor Advance Information Document Number: CM0902 Rev. 4.0, 4/2015 Dual High-speed CAN Transceiver CM0902 The CM0902 is a SMARTMOS dual high-speed (up to 1 Mbit/s) CAN transceiver device, providing the physical interface between the CAN protocol controller of an MCU and the physical dual wire CAN bus. Both channels are completely independent, featuring CAN bus wake-up on each CAN interface, and TXD dominant timeout functionality (33CM0902 only). The CM0902 is packaged in a 14-pin SOIC, with industry standard pin out, and offers excellent EMC and ESD performance without the need for external filter components.The CM0902 comes in two variants: 33CM0902 and 34CM0902 for Automotive and Industrial applications respectively. Features • Very low-current consumption in standby mode • Compatible with +3.3 V or +5.0 V MCU interface • Standby mode with remote CAN wake-up • Pin and function compatible with market standard Cost efficient robustness: . CAN HIGH-SPEED TRANSCEIVER EF SUFFIX (PB-FREE) 98ASB42565B 14-PIN SOICN • High system level ESD performance • Very high electromagnetic immunity and low electromagnetic emission without common mode choke or other external components. Fail-safe behaviors: • TXD Dominant timeout (33CM0902 only) • Ideal passive behavior when unpowered, CAN bus leakage current <10 A. • VDD and VIO monitoring Automotive Applications (33CM0902) • Supports automotive CAN high-speed applications • Body electronics • Power train • Chassis and safety • Infotainment • Diagnostic equipment • Accessories Industrial Applications (34CM0902) • Transportation • Backplanes • Lift/elevators • Factory automation • Industrial process control CM0902 VREG 5.0 V 5.0 V 3.3 V VPWR VDD VIO CAN H1 MCU 3.3 V CAN1 BUS VCC CAN1 protocol controller CAN2 protocol controller I/O STB1 TX TXD1 RX RXD1 I/O STB2 TX TXD2 RX RXD2 CAN L1 CAN H2 CAN2 BUS CAN L2 GND Figure 1. Simplified Application Diagram * This document contains certain information on a new product. Specifications and information herein are subject to change without notice. © Freescale Semiconductor, Inc., 2015. All rights reserved. Table of Contents 1 2 3 4 5 6 7 8 9 Orderable Parts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Internal Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Pin Connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 3.1 Pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 3.2 Pin Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 General Product Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 4.1 Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 4.2 Thermal Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 4.3 Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 4.4 Operating Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 General IC Functional Description and Application Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 5.1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 5.2 Functional Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 5.3 Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Functional Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 6.1 Operating Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 6.2 Fail-safe Mechanisms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 6.3 Device Operation Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Typical Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 7.1 Application Diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Packaging . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 8.1 Package Mechanical Dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 CM0902 Analog Integrated Circuit Device Data Freescale Semiconductor 2 1 Orderable Parts This section describes the part numbers available to be purchased along with their differences. Table 1. Orderable Part Variations Part Number (1) MC33CM0902WEF MC34CM0902WEF Temperature (TA) -40 °C to 125 °C -40 °C to 85 °C Package SOIC 14 pins TXD dominant protection Available Not Available Notes 1. To Order parts in Tape & Reel, add the R2 suffix to the part number. Valid orderable part numbers are provided on the web. To determine the orderable part numbers for this device, go to http:// www.freescale.com and perform a part number search. CM0902 3 Analog Integrated Circuit Device Data Freescale Semiconductor 2 Internal Block Diagram VDD VIO VDD VDD Bus Biasing Timeout TXD1 Input Predriver 33CM0902 only 2.5 V 50 k RXD1 VDD Mode Buffer VIO and Predriver RIN CANL1 Highimpedance Control STB1 CANH1 RIN VIO VDD Overtemperature VDD VDD VDD Monitor Differential Receiver VIO Wake-up Receiver VIO VIO Monitor VIO VIO VDD VDD VDD Bus Biasing Timeout TXD2 Input 33CM0902 only VIO Predriver 2.5 V RIN VDD 50 k RXD2 Buffer VIO STB2 GND1 GND2 Predriver RIN Highimpedance CANH2 CANL2 VDD Overtemperature VIO Differential Receiver Wake-up Receiver Figure 2. Internal Block Diagram CM0902 Analog Integrated Circuit Device Data Freescale Semiconductor 4 3 Pin Connections 3.1 Pinout TXD1 1 14 STB1 GND1 2 13 CANH1 VDD 3 12 CANL1 RXD1 4 11 VIO GND2 5 10 CANH2 TXD2 6 9 CANL2 RXD2 7 8 STB2 Figure 1. 14-Pin SOIC Pinout 3.2 Pin Definitions A functional description of each pin can be found in the Functional Pin Description section beginning on page 15. Table 2. CM0902 Pin Definitions Pin Number Pin Name Pin Function Definition 1 TXD1 Input 2 GND1 Ground 3 VDD Input 4 RXD1 Output CAN1 bus receive data pin 5 GND2 Ground Ground 2 6 TXD2 Input CAN2 bus transmit data pin 7 RXD2 Output CAN2 bus receive data pin 8 STB2 Input 9 CANL2 Input/Output CAN2 low pin 10 CANH2 Input/Output CAN2 high pin 11 VIO Input 12 CAN L1 Input/Output CAN1 low pin 13 CAN H1 Input/Output CAN1 high pin 14 STB1 Input CAN1 bus transmit data pin Ground 1 5.0 V input supply for CAN driver and receiver Standby input for CAN2 mode selection Input supply for the digital input output pins Standby input for CAN1 mode selection CM0902 5 Analog Integrated Circuit Device Data Freescale Semiconductor 4 General Product Characteristics 4.1 Maximum Ratings Table 3. Maximum Ratings All voltages are with respect to ground unless otherwise noted. Exceeding these ratings may cause a malfunction or permanent damage to the device. Symbol Description (Rating) Min. Max. Unit Notes ELECTRICAL RATINGS VDD VDD Logic Supply Voltage 7.0 V VIO Input/Output Logic Voltage 7.0 V VSTB1 VSTB2 Standby pin Input Voltage 7.0 V VTXD1 VTXD2 TXD Maximum Voltage Range 7.0 V VRXD1 VRXD2 RXD Maximum Voltage Range 7.0 V VCANH1 VCANH2 CANH Bus Pin Maximum Range -40 40 V VCANL1 VCANL2 CANL Bus Pin Maximum Range -40 40 V VESD ESD Voltage • Human Body Model (HBM) (all pins except CANHx and CANLx pins) • Human Body Model (HBM) (CANHx, CANLx pins) • Machine Model (MM) • Charge Device Model (CDM) (corner pins) • System level ESD • 330 / 150 pF unpowered according to IEC61000-4-2: • 330 / 150 pF unpowered according to OEM LIN, CAN, FLexray Conformance • 2.0 k / 150 pF unpowered according to ISO10605.2008 • 2.0 k / 330 pF powered according to ISO10605.2008 V ±2000 ±8000 ±200 ±500(±750) (2) kV 10 10 10 8.0 Notes 2. ESD testing is performed in accordance with the Human Body Model (HBM) (CZAP = 100 pF, RZAP = 1500 ), the Machine Model (MM) (CZAP = 200 pF, RZAP = 0 ), and the Charge Device Model. CM0902 Analog Integrated Circuit Device Data Freescale Semiconductor 6 4.2 Thermal Characteristics Table 4. Thermal Ratings Symbol Description (Rating) Min. Typ. Max. Unit Notes THERMAL RATINGS Operating Temperature • Ambient • Junction -40 -40 125 150 °C TSTG Storage Temperature -55 150 °C TPPRT Peak Package Reflow Temperature During Reflow – – °C – 140 °C/W – °C TA TJ THERMAL RESISTANCE AND PACKAGE DISSIPATION RATINGS RJA Junction-to-Ambient, Natural Convection, Single-layer Board TSD Thermal Shutdown TSDH Thermal Shutdown Hysteresis 185 – 10 °C CM0902 7 Analog Integrated Circuit Device Data Freescale Semiconductor 4.3 Electrical Characteristics 4.3.1 Static Electrical Characteristics Table 5. Static Electrical Characteristics Characteristics noted under conditions 4.5 V VDD 5.5 V, 2.8 V VIO 5.5 V, - 40 C TA 125 C, GND = 0.0 V, R on CANx bus (RL) = 60 , unless otherwise noted. Typical values noted reflect the approximate parameter at TA = 25 °C under nominal conditions, unless otherwise noted. Symbol Characteristic Min. Typ. Max. Unit 4.5 – 5.5 V – 4.5 V – – – – 80 – 8.0 130 10 mA mA µA Notes POWER INPUT VDD VDD VDD_UV IVDD VDD Supply Voltage Range • Nominal operation VDD Undervoltage Threshold VDD Supply Current • Normal mode, TXD1 and TXD2 High • Normal mode, TXD1 and TXD2 Low • Standby mode (3) POWER INPUT VIO VIO VIO Supply Voltage Range • Nominal operation 2.8 – 5.5 V VIO_UV VIO Undervoltage threshold – – 2.8 V – – – – – 5 400 2.0 20 µA mA µA – – 300 µA 0.7 x VIO – 200 – – – – 0.3 – V V mV – 100 – k 0.7 x VIO – 200 – – 300 – 0.3 – V V mV Pull-up Resistor to VIO 5.0 – 50 k Output Current • RXD1 high, VRXD1 high = VIO - 0.4 V • RXD1 low, VRXD1 high = 0.4 V -5.0 1.0 -2.5 2.5 -1.0 5.0 mA 25 50 90 k IVIO VIO Supply Current • Normal Mode (TXD1/TXD2 high CAN1/2 bus in recessive state) • Normal Mode (TXD1, TXD2 high, CAN1/2 bus in dominant state) • Standby mode (STB1 and STB2 high, BUS in recessive state, wake-up filter and wake-up time out not active) • Standby mode (STB1 and STB2 high, BUS in recessive state, wake- up filter and wake-up time out active) Notes 3. IVDD for CAN1 or CAN2 operation STB1 INPUT VSTB1 RPU-STB1 Input Voltages • High level input voltage • Low level input voltage • Input threshold hysteresis Pull-up resistor to VIO TXD1 INPUT VTXD1 RPU-TXD1 Input Voltages • High level input voltage • Low level input voltage • Input threshold hysteresis RXD1 OUTPUT IRXD1 RPU-RXD1 Pull-up Resistor to VIO (in Standby mode, without toggling - no wake-up report) CM0902 Analog Integrated Circuit Device Data Freescale Semiconductor 8 Table 5. Static Electrical Characteristics (continued) Characteristics noted under conditions 4.5 V VDD 5.5 V, 2.8 V VIO 5.5 V, - 40 C TA 125 C, GND = 0.0 V, R on CANx bus (RL) = 60 , unless otherwise noted. Typical values noted reflect the approximate parameter at TA = 25 °C under nominal conditions, unless otherwise noted. Symbol Characteristic Min. Typ. Max. Unit Recessive Voltage, TXD1 high, no load • CANL1 recessive voltage • CANH1 recessive voltage 2.0 2.0 2.5 2.5 3.0 3.0 V VDIFF_REC1 CANH1 - CANL1 Differential Recessive Voltage, TXD1 high, no load -50 – 50 mV VREC_SM1 Recessive voltage, sleep mode, no load • CANL1 recessive voltage • CANH1 recessive voltage -0.1 -0.1 – 0.1 0.1 V Dominant Voltage, TXD1 low (t < TXDOM), RL = 45 to 65 • CANL1 dominant voltage • CANH1 dominant voltage 0.5 2.75 – – 2.25 4.5 V CANH1 - CANL1 Differential Dominant Voltage, RL = 45 to 65 TxD1LOW 1.5 2.0 3.0 V Driver symmetry CANH1 + CANL1 0.9 1.0 1.1 VDD 40 -100 – – 100 -40 mA Notes CANL1 and CANH1 Pins VREC1 VDOM1 VDIFF_DOM1 VSYM1 ILIM1 Current limitation, TXD1 low (t < TXDOM) • CANL1 current limitation, CANL1 5.0 V to 28 V • CANH1 current limitation, CANH1 = 0 V VDIFF_THR1 CANH1 - CANL1 Differential Input Threshold 0.5 – 0.9 V VDIFF_HYS1 CANH1 - CANL1 Differential Input Voltage Hysteresis 50 – 400 mV CANH1 - CANL1 Differential Input Threshold, in Standby mode 0.4 – 1.15 V VCM1 Common Mode Voltage -15 – 20 V RIN1 Input Resistance • CANL1 input resistance • CANH1 input resistance 5.0 5.0 – – 50 50 k CANH1, CANL1 Differential Input Resistance 10 – 100 k Input Resistance Matching -3.0 – 3.0 % CANL1 or CANH1 input current, device unpowered, VDD = VIO = 0 V , VCANL1 and VCANH1 0.0 to 5.0 V range • VDD connected with R=0.0 K to GND • VDD connected with R=47 K to GND -10 -10 – 10 10 µA VDIFF_THR_S1 RIN_DIFF1 RIN_MATCH1 IIN_UPWR1 CM0902 9 Analog Integrated Circuit Device Data Freescale Semiconductor Table 5. Static Electrical Characteristics (continued) Characteristics noted under conditions 4.5 V VDD 5.5 V, 2.8 V VIO 5.5 V, - 40 C TA 125 C, GND = 0.0 V, R on CANx bus (RL) = 60 , unless otherwise noted. Typical values noted reflect the approximate parameter at TA = 25 °C under nominal conditions, unless otherwise noted. Symbol Characteristic Min. Typ. Max. Unit Notes CANL1 and CANH1 Pins (Continued) RIN_UPWR1 CANL1, CANH1 Input Resistance, VCANL1 = VCANH1 = 12 V 10 – – k CCAN_CAP1 CANL1, CANH1 Input Capacitance – 20 – pF (4) CDIF_CAP1 CANL1, CANH1 Differential Input Capacitance – 10 – pF (4) 0.7 x VIO – 200 – – – – 0.3 – V V mV – 100 – k 0.7 x VIO – 200 – – 300 – 0.3 – V V mV 5.0 – 50 k -5.0 1.0 -2.5 2.5 -1.0 5.0 mA 25 50 90 k Recessive Voltage, TXD2 high, no load • CANL2 recessive voltage • CANH2 recessive voltage 2.0 2.0 2.5 2.5 3.0 3.0 V VDIFF_REC2 CANH2 - CANL2 Differential Recessive Voltage, TXD2 high, no load -50 – 50 mV VREC_SM2 Recessive voltage, sleep mode, no load • CANL2 recessive voltage • CANH2 recessive voltage -0.1 -0.1 – – 1.0 1.0 V Dominant Voltage, TXD2 low (t < TXDOM), RL = 45 to 65 • CANL2 dominant voltage • CANH2 dominant voltage 0.5 2.75 – – 2.25 4.5 V CANH2 - CANL2 Differential Dominant Voltage, RL = 45 to 65 TxD2LOW 1.5 2.0 3.0 V Driver symmetry CANH2 + CANL2 0.9 1.0 1.1 VDD 40 -100 – – 100 -40 mA STB2 INPUT VSTB2 RPU-STB2 Input Voltages • High level Input voltage • Low level input voltage • Input threshold hysteresis Pull-up Resistor to VIO TXD2 INPUT VTXD2 RPU-TXD2 Input Voltages • High level Input voltage • Low level input voltage • Input threshold hysteresis Pull-up Resistor to VIO RXD2 OUTPUT IRXD2 RPU-RXD2 Output Current • RXD2 high, VRXD2 high = VIO - 0.4 V • RXD2 low, VRXD2 high = 0.4 V Pull-up Resistor to VIO (in Standby mode, without toggling - no wake-up report) CANL2 and CANH2 Pins VREC2 VDOM2 VDIFF_DOM2 VSYM2 ILIM2 Current Limitation, TXD2 low (t < TXDOM) • CANL2 current limitation, CANL2 5.0 V to 28 V • CANH2 current limitation, CANH2 = 0.0 V VDIFF_THR2 CANH2 - CANL2 Differential Input Threshold 0.5 – 0.9 V VDIFF_HYS2 CANH2 - CANL2 Differential Input Voltage Hysteresis 50 – 400 mV CANH2 - CANL2 Differential Input Threshold, in Standby mode 0.4 – 1.15 V Common Mode Voltage -15 – 20 V VDIFF_THR_S2 VCM2 CM0902 Analog Integrated Circuit Device Data Freescale Semiconductor 10 Table 5. Static Electrical Characteristics (continued) Characteristics noted under conditions 4.5 V VDD 5.5 V, 2.8 V VIO 5.5 V, - 40 C TA 125 C, GND = 0.0 V, R on CANx bus (RL) = 60 , unless otherwise noted. Typical values noted reflect the approximate parameter at TA = 25 °C under nominal conditions, unless otherwise noted. Symbol Characteristic Min. Typ. Max. Unit Input Resistance • CANL2 input resistance • CANH2 input resistance 5.0 5.0 – – 50 50 k CANH2, CANL2 Differential Input Resistance Notes CANL2 and CANH2 Pins RIN2 10 – 100 k Input Resistance Matching -3.0 – 3.0 % IIN_UPWR2 CANL2 or CANH2 input current, device unpowered, VDD = VIO = 0 V , VCANL2 and VCANH2 0.0 to 5.0 V range • VDD connected with R=0KOhm to GND • VDD connected with R=47KOhm to GND -10 -10 – – 10 10 µA RIN_UPWR2 CANL2, CANH2 Input Resistance, VCANL2 = VCANH2= 12 V 10 – – k CCAN_CAP2 CANL2, CANH2 Input Capacitance (guaranteed by design and characterization) – 20 – pF CDIF_CAP2 CANL2, CANH2 Differential Input Capacitance – 10 – pF 150 185 – °C RIN_DIFF2 RIN_MATCH2 Thermal Shutdown TSD (4) Notes 4. Guaranteed by design and characterization 4.3.2 Dynamic Electrical Characteristic Table 6. Dynamic Electrical Characteristics Characteristics noted under conditions 4.5 V VDD 5.5 V, 2.8 V VIO 5.5 V, - 40 C TA 125 C, GND = 0 V, R on CANx bus (RL) = 60 , unless otherwise noted. Typical values noted reflect the approximate parameter at TA = 25 °C under nominal conditions, unless otherwise noted. Symbol Characteristic Min. Typ. Max. Unit Notes 2.5 – 16 ms (5) – – 255 ns TIMING PARAMETERS (Continued) tXDOM TXD DOM tLOOP T Loop tWU_FLT1 TWU Filter1 0.5 – 5.0 µs tWU_FLT2 TWU Filter2 0.08 – 1.0 µs – – 1.5 µs 1.5 – 7.0 ms Delay Between Power-up and Device Ready – 120 300 µs Transition Time from Standby to Normal mode (STB high to low) – – 40 µs tTGLT tWU_TO tDELAY_PWR tDELAY_SN Tdelay During Toggling Twake-up Timeout Notes 5. 33CM0902 version only CM0902 11 Analog Integrated Circuit Device Data Freescale Semiconductor 5.0 V 1.0 F 100 nF CM0902 VDD VIO CANHx STBx 60 TXDx 100 pF CANLx RXDx 15 pF GND Figure 3. Timing Test Circuit high TXD low CANH CANL dominant 0.9 V VDIFF (CANH - CANL) 0.5 V recessive high 0.7 VIO RXD 0.3 VIO low tLOOP (R-D) tLOOP (D-R) Figure 4. CAN Timing Diagram recessive dominant dominant recessive dominant recessive BUS tWU_FLT1 tWU_FLT2 1st event 2nd event tWU_FLT2 3rd event tTGLT tTGLT tTGLT tTGLT high RXD low tWU_TO note: 1st, 2nd, and 3rd event must occurs within tWU_TO timing. Figure 5. Wake-up Pattern Timing Illustration CM0902 Analog Integrated Circuit Device Data Freescale Semiconductor 12 dominant recessive dominant recessive BUS tWU_FLT1 1st event tWU_FLT1 tWU_FLT2 2nd event 1st event tWU_FLT2 2nd event tWU_TO (expired) high RXD note: only the 1st and the 2nd event occurred within tWU_TO timing. Figure 6. Timeout Wake-up Timing Illustration recovery condition: TXD high high TXD low dominant recessive dominant dominant BUS TXD_dom timeout TXD_dom timeout TXD_dom timeout TXD dom timeout expired RXD high low Figure 7. TXD Dominant Timeout Detection Illustration CM0902 13 Analog Integrated Circuit Device Data Freescale Semiconductor 4.4 Operating Conditions This section describes the operating conditions of the device. Conditions apply to all the following data, unless otherwise noted. Table 7. Operating Conditions All voltages are with respect to ground unless otherwise noted. Exceeding these ratings may cause a malfunction or permanent damage to the device. Symbol Ratings Min. Max. Unit Notes (6) VDD_F Functional Operating VDD voltage VDD_UV 7.0 V VDD_OP Parametric Operating VDD voltage 4.5 5.5 V VIO_F Functional Operating VIO voltage VIO_UV 7.0 V VIO_OP Parametric Operating VIO voltage 2.8 5.5 V (6) Notes 6. Functional operating voltage is defined as device functional or CAN in recessive state VDD 7.0 V 5.5 V 5.0 V 4.5 V VDD UV 0V VIO Max rating exceeded 7.0 V Device functional (7) VDD_F VDD operating range VDD_OP Device functional or CAN bus recessive state (8) Device in Standby mode 5.5 V 5.0 V 3.3 V 2.8 V VIO UV 0V Max rating exceeded Device functional (7) VIO operating range VIO_F VIO_OP Device functional or CAN bus recessive state (8) Device in Unpowered mode Figure 8. Supply Voltage Operating Range Notes 7. Device functional: Device can operate in this voltage range without damage. Electrical characteristics are not fully guaranteed in this range. 8. Device functional or CAN bus recessive state: Device is either functional (see Note 1), or is maintained in recessive state. No false dominant state on CAN bus; dominant state is only controlled by TXDx low level. CM0902 Analog Integrated Circuit Device Data Freescale Semiconductor 14 5 General IC Functional Description and Application Information The CM0902 is a SMARTMOS two channel high-speed CAN transceiver, providing the physical interface between the CAN protocol controller of an MCU and the physical two-wire CAN bus, featuring CAN bus wake-up on each CAN channel and TXD dominant timeout (33CM0902 version only). The two CAN physical layers are packaged in a 14-pin SOIC with market standard pin out, and offer excellent EMC and ESD performance without the need for external filter components. These meet the ISO 11898-2 and ISO11898-5 standards, and provide low leakage on CAN bus while unpowered. The device is supplied from VDD, while VIO allows automatic operation with 5.0 V and 3.3 V microcontrollers interface. 5.1 Features • • • • • Very low current consumption in standby mode Automatic adaptation to 3.3 V or 5.0 V MCU communication Standby mode with remote CAN wake-up Pin and function compatible with market standard Cost efficient robustness: • High system level ESD performance • Very high electromagnetic Immunity and low electromagnetic emission without common mode choke or other external components. • Fail-safe behaviors: • TXD Dominant timeout (33CM0902 only) • Ideal passive behavior when unpowered, CAN bus leakage current <10 A. • VDD and VIO monitoring CM0902 15 Analog Integrated Circuit Device Data Freescale Semiconductor 5.2 Functional Block Diagram CM0902 - Functional Block Diagram CAN Physical Layer Input Power Supply VDD Logic Power Supply Channel 1 Channel 2 VIO Digital I/O Power Supply CANH1/CANL1 Differential receiver CANH2/CANL2 Differential receiver Ideal Passive Behavior When Unpowered Ideal Passive Behavior When Unpowered Choke-less Operation With high emissions/ immunity performance Choke-less Operation With high emissions/ immunity performance Logic and Control Dual Channel TXD/RXD MCU Interface Dual Channel STANDBY Enable Pin Remote CAN Wake-up Mechanism Fail-safe Mechanisms TXD Dominant Timeout detection CAN Bus Current Limit Overtemperature Protection Bus Dominant Wake-up Protection VDD and VIO Voltage Monitoring Input Power Supply Logic and Control CAN Physical Layer Fail-safe Mechanisms Figure 9. Functional Block Diagram 5.3 Functional Description 5.3.1 VDD Power Supply This is the supply for the CANHx and CANLx bus drivers, the bus differential receiver and the bus biasing voltage circuitry. VDD is monitored for undervoltage conditions. See Fail-safe Mechanisms. When the device is in standby mode, the consumption on VDD is extremely low (Refer to IVDD). 5.3.2 VIO Digital I/O Power Supply This is the supply for the TXDx, RXDx, and STBx digital input outputs pins. VIO also supplies the low power differential wake-up receivers and filter circuitry. This allows detecting and reporting bus wake-up events with device supplied only from VIO. VIO is monitored for undervoltage conditions. See Fail-safe Mechanisms. When the device is in Standby mode, the consumption on VIO is extremely low (Refer to IVIO). 5.3.3 STB1 and STB2 STBx are the input pins to control the CANx interface mode. When STBx is high or floating, the respective CANx interface is in Standby mode. When STBx is low, the CANx interface is set in Normal mode. STBx has an internal pull-up to the VIO pin, so if STBx is left open, the CANx is set to the predetermined Standby mode. CM0902 Analog Integrated Circuit Device Data Freescale Semiconductor 16 5.3.4 TXD1 and TXD2 TXDx is the device input pin to control the CANx bus level. In the application, this pin is connected to one of the microcontroller’s transmit pins. When TXDx is high or floating, the CANHx and CANLx drivers are OFF in Normal mode, setting the bus in a recessive state. When TXDx is low, the CANHx and CANLx drivers are activated and the bus is set to a dominant state. TXDx has a built-in timing protection on the 33CM0902 version, which disables the bus when TXDx is dominant for more than tXDOM. In Standby mode, TXDx has no effect on the respective CANx interface. 5.3.5 RXD1 and RXD2 RXDx is the bus output level report pin. This pin connects to one of the microcontroller’s receive pins in the application. RXDx is a pushpull structure in Normal mode. When the respective CANx bus is in a recessive state, RXDx is high, and low when the bus is dominant. In Standby mode, the push-pull structure is disabled, RXDx is pulled up to VIO via a resistor (RPU-RXD1), and is in a high level. When the bus wake-up is detected, the push-pull structure resumes and RXDx reports a wake-up via a toggling mechanism (refer to Figure 5). 5.3.6 CANH1 / CANL1 and CANH2 / CANL2 These are the CAN bus pins and each channel 1 or 2 is fully independent from each other. CANLx is a low-side driver to GND, and CANHx is a high-side driver to VDD. In Normal mode and TXDx high, the CANHx and CANLx drivers are OFF, and the voltage at CANHx and CANLx is approx. 2.5 V, provided by the internal bus biasing circuitry. When TXDx is low, CANLx is pulled to GND and CANHx to VDD, creating a differential voltage on the CAN bus. CANHx and CANLx drivers are OFF in Standby mode, and pulled to GND via the CANx interface RIN resistors (ref to parameter Input Resistance). CANHx and CANLx are high-impedance with extremely low leakage to GND in device unpowered mode, making the device ideally passive when unpowered. CANHx and CANLx have integrated ESD protection and extremely high robustness versus external disturbance, such as EMC and electrical transients. These pins have current limitation and thermal protection. CM0902 17 Analog Integrated Circuit Device Data Freescale Semiconductor 6 Functional Operation 6.1 Operating Modes The CM0902 provides two CAN, each one capable of independently operating in two modes: Standby and Normal. 6.1.1 Normal Mode This mode is selected when the STBx pin is low. In this mode, the device is able to transmit information from TXDx to the bus and report the bus level on the RXDx pin. When TXDx is high, CANHx and CANLx drivers are off and the bus is in the recessive state (unless it is in an application where another device drives the bus to the dominant state). When TXDx is low, CANHx and CANLx drivers are ON and the bus is in the dominant state. 6.1.2 Standby Mode This mode is selected when the STBx pin is high or floating. The device is not able to transmit information from TXDx to the bus and it cannot report accurate bus information in this mode. The device can only report bus wake-up events via the RXDx toggling mechanism. When both CAN interfaces are in Standby mode, the power consumption from VDD and VIO is extremely low. The CANHx and CANLx pins are pulled to GND via the internal RIN resistors in this mode. 6.1.2.1 Wake-up Mechanism The CM0902 includes bus monitoring circuitry to detect and report bus wake-ups. To activate a wake-up report, three events must occur on the CAN bus: - event 1: a dominant level for a time longer than tWU_FLT1 followed by - event 2: a recessive level (event 2) longer than tWU_FLT2 followed by - event 3: a dominant level (event 3) longer than tWU_FLT2. The RXD pin reports the bus state (bus dominant => RXD low, bus recessive => RXD high). The delay between bus dominant and RXD low, and bus recessive and RXD high is longer than in Normal mode (refer to tTGLT). The three events must occur within the tWU_TO timeout. Figure 5 “Wake-up Pattern Timing Illustration” illustrates the wake-up detection and reporting (toggling) mechanism. If the three events do not occur within the TWU_TO timeout, the wake-up and toggling mechanism are not activated. This is illustrated in Figure 6. The three events and the timeout function avoid a permanent dominant state on the bus which would generate a permanent wake-up situation, and prevent the system from entering into Low-power mode. 6.1.3 Unpowered Mode When VIO is below VIO UV, the device is in unpowered mode. Both CAN buses is in high-impedance and not able to transmit, receive, or report bus wake-up events through any of the buses. 6.2 Fail-safe Mechanisms The device implements various protection, detection, and predictable fail-safe mechanisms explained below. 6.2.1 STB and TXD Input Pins The STBx input pin has an internal integrated pull-up structure to the VIO supply pin. If STBx is open, the respective CANx interface is set to Standby mode to ensure predictable behavior and minimize system current consumption. The TXDx input pin also has an internal integrated pull-up structure to the VIO supply pin. If TXDx is open, the CANx driver is set to the recessive state to minimize current consumption and ensure no false dominant bit is transmitted on the bus. CM0902 Analog Integrated Circuit Device Data Freescale Semiconductor 18 6.2.2 TXD Dominant Timeout Detection The 33CM0902 device implements a TXD dominant timeout detection and protection mechanism. If TXDx is set low for a time longer than the tXDOM parameter, the CANx drivers are disabled and the CANx bus returns to the recessive state. This prevents the bus from being set to the dominant state permanently in case a fault sets the TXDx input to low level permanently. The device recovers when a high level is detected on TXDx (Refer to Figure 7). 6.2.3 CAN Current Limitation The current flowing in and out of the CANHx and CANLx driver is limited to a maximum of 100 mA, in case of a short-circuit (parameter for ILIM1). 6.2.4 CAN Overtemperature If the driver temperature exceeds TSD, the driver turns off to protect the device. A hysteresis is implemented in this protection feature. The device overtemperature and recovery conditions are shown in Figure 10. The driver remains disabled until the temperature has fallen below the OT threshold minus the hysteresis and a TXD high to low transition is detected. Since both CAN interfaces are fully independent, each driver requires a high to low transition of its own TXDx pin to re-enable the CAN driver. Overtemperature Threshold Temperature Hysteresis Hysteresis Event 1 Event 1 Event 2 Event 2 Event 4 Event 3 TXD Event 3 high low dominant recessive dominant dominant BUS Event 1: overtemperature detection. CAN driver disabled. Event 2: temperature falls below “overtemperature. threshold minus hysteresis” => CAN driver remains disabled. Event 3: temperature below “overtemperature. threshold minus hysteresis” and TxD high to low transition => CAN driver enabled. Event 4: temperature above “overtemperature. threshold minus hysteresis” and TxD high to low transition => CAN driver remains disabled. Figure 10. Overtemperature Behavior 6.2.5 VDD and VIO Supply Voltage Monitoring The device monitors the VDD and VIO supply inputs. The device is set in Standby mode if VDD falls below VDD UV (VDD_UV). This ensures a predictable behavior due to the loss of VDD. CAN drivers, receiver, or bus biasing cannot operate any longer. In this case, the bus wake-up is available as VIO remains active. If VIO falls below VIO UV (VIO_UV), the device is set to an unpowered condition. This ensures a predictable behavior due to the loss of VIO, CAN drivers, receivers, or bus biasing cannot operate any longer. This sets the bus in high-impedance and in ideal passive condition. 6.2.6 Bus Dominant State Behavior in Standby Mode When the CAN interface is in Standby mode, a bus dominant condition due to a short-circuit or a fault in any of the CAN nodes, does not generate a permanent wake-up event, since the specific wake-up sequence and timeout protect the device from waking-up with an unwanted event. CM0902 19 Analog Integrated Circuit Device Data Freescale Semiconductor 6.3 Device Operation Summary The following table summarizes the CAN interface operation and the state of the input/output pins, depending on the operating mode and power supply conditions. STANDBY and NORMAL MODES MODE Description Normal Nominal supply and normal mode Standby Nominal supply and standby mode VDD Range VIO Range from 4.5 V from 2.8 V to 5.5 V to 5.5 V from 0.0 V from 2.8 V to 5.5 V to 5.5 V STBx TXDx Low TXD High => bus recessive TXD Low => bus dominant RXDx CANx Wake-up CANH and CANL drivers controlled by TXD input. Differential receiver reports the bus state on RXD pin. Biasing circuitry provides approx 2.5 V in recessive state. Disabled CAN driver and differential receiver High or No effect. on floating CAN bus. Report bus wake up disabled. via toggling Bus biased to GND via internal RIN mechanism. resistors. Enabled Report CAN state (bus recessive => RXD high, bus dominant => RXD low). UNDERVOLTAGE and LOSS OF POWER CONDITIONS Standby due Device in from 0.0 to from 2.8 V to VDD loss standby mode to 5.5 V VDD_UV. due to loss of (11) (10) VDD (VDD falls below VDD UV) Unpowered Device in due to VIO unpowered state due to low loss VIO. CAN bus highimpedance. (10) from 0.0 V to VIO_UV X X (9) X CAN driver and differential receiver Report bus wake up disabled. via toggling Bus biased to GND via internal RIN mechanism. resistors. X Pulled up to VIO down to VIO approx = 1.5 V, then released. CAN driver and differential receiver disabled. High-impedance, with ideal passive behavior. Enabled Not available. Notes 9. STBx pin has no effect. CANx Interface enters in Standby mode. 10. VDD consumption < 10 uA down to VDD approx 1.5 V. 11. VIO consumption < 10 uA down to VIO approx 1.5 V. If STB is high or floating. CM0902 Analog Integrated Circuit Device Data Freescale Semiconductor 20 7 Typical Applications 7.1 Application Diagrams VPWR D 5.0 V Reg. 5.0 V MCU C1: 1.0 µF R1 & R2: application dependant (ex: 60, 120 or other value) CM0902 VCC C1 Port_xx VDD VIO STB1 CANH1 TXD1 CANL1 R1 CAN TXD1 controller RXD1 RXD1 STB2 Port_xy CANH2 TXD2 CAN TXD2 controller RXD2 R2 CANL2 RXD2 GND Figure 11. Single Supply Typical Application Schematic 5.0 V Reg VPWR D 5.0 V C2 C1: 1.0 µF C2: 1.0 µF R1 & R2: application dependant (ex: 60, 120 or other value) 3.3-5.0 V Reg 3.3 - 5.0 V MCU CM0902 VCC Port_xx C1 VIO VDD STB1 CANH1 TXD1 CANL1 R1 CAN TXD1 controller RXD1 RXD1 Port_xy STB2 TXD2 TXD2 CAN controller RXD2 RXD2 CANH2 R2 CANL2 GND Figure 12. Dual Supply Typical Application Schematic CM0902 21 Analog Integrated Circuit Device Data Freescale Semiconductor CANH C3 R2 R2, R3: application dependant (ex: 60 ohm or other value): R3 C3: application dependant (ex: 4.7 nF or other value): CANL Figure 13. Example of Bus Termination Options CM0902 Analog Integrated Circuit Device Data Freescale Semiconductor 22 8 Packaging 8.1 Package Mechanical Dimensions Package dimensions are provided in package drawings. To find the most current package outline drawing, go to www.freescale.com and perform a keyword search for the drawing’s document number. Table 8. Packaging Information Package Suffix 14-Pin SOICN EF Package Outline Drawing Number 98ASB42565B . CM0902 23 Analog Integrated Circuit Device Data Freescale Semiconductor . CM0902 Analog Integrated Circuit Device Data Freescale Semiconductor 24 9 Revision History Revision Date 1.0 6/2014 • Initial release 2.0 11/2014 • Data adjusted to match latest silicon 3.0 1/2015 • Changed ordering information from PC to MC • Added information for dual speed (up to 1 Mbit/s) 4.0 4/2015 Description of Changes • Added VREC_SM1 & VREC_SM2 (CANH, CANL recessive voltage, sleep mode) to Table 5 • Added driver symmetry VSYM1 & VSYM2 to Table 5 • Updated IIN_UPWR1 & IIN_UPWR2 in Table 5 CM0902 25 Analog Integrated Circuit Device Data Freescale Semiconductor How to Reach Us: Information in this document is provided solely to enable system and software implementers to use Freescale products. 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