5 4 3 2 1 D D LAN9252-HBI&SPI+GPIO-EVB LAN9252(Config 3 & Config 5) Page No. C B Schematic Page 1 Title 2 Block Diagram 3 Power Supply & RST 4 LAN9252 5 Copper Mode Interface 6 SFP Interface 7 STRAP,GPIO,I2C & FXLOS 8 B2B Interface 9 ON-Board-PIC32MX 10 16GPIO(Config5) C B A A Chennai India Part Number: Size: Date: 5 4 3 2 B Page: Board Project LAN9252-HBI&SPI+GPIO-EVB Name: Name: LAN9252-HBI&SPI+GPIO-EVB TITLE EVB2-9252-HBI&SPI+GPIO-RevB Sheet Monday, December 08, 2014 1 1 of Rev B 10 5 4 3 2 1 D D LAN9252-HBI&SPI+GPIO-EVB Block Diagram SoC B2B Conn PIM 100 pin conn SOC EEPROM 5V 3V3 SoC OnBoard PIC32MX POWER GND C C SoC B2B Conn RST 16 GPIO CKT Selection Switches STRAPS GPIO/LED's LAN9252 Crystal EEPROM B B FIBER(SFP) PORT0: INT PHY PORT0: CU INT PHY PORT1: CU FIBER(SFP) PORT1: A A Chennai India Part Number: Size: Date: 5 4 3 2 B Page: Board Project LAN9252-HBI&SPI+GPIO-EVB Name: Name: LAN9252-HBI&SPI+GPIO-EVB Block Diagram EVB2-9252-HBI&SPI+GPIO-RevB Sheet Monday, December 08, 2014 1 2 of Rev B 10 5 4 3 2 1 POWER SUPPLY 3 U1 FB1 2 5V_SW 3 EN12_1 2A/0.05DCR 2 R1 Switch, SPDT, Slide P/N:1101M2S3CQE2 J1 2 1 VIN ENABLE VOUT TRIM 3_Amp GND 0E C2 10uF 25V C3 R2 4 5 3 0.1uF OKR-T/3-W12-C DNP C1 R3 3.30K 1% (Ra) R4 470E 1% R4A 33E 1% C4 C5 10uF 0.1uF 1K 4.7uF 1 1 A 5V_EXT 3V3 3V3 (Rb) "3V3 Present" SW1 1 TP2 ORANGE 3 V REGULATOR, 3A ( 3V3 fixed when Rb=470E) 5V D1 GRN C TP1 RED D 2 D C C RESET Options 3V3 3V3 3V3 Reset Generator 2 B RESET# RESET 1 NDS355AN_NMOS D RST# Q1 3 R8 1K 1 G 5 MR# 2 3V3 VDD 4 5 U2 2 1/10W 1% 3 sw_pb_2P 1 R7 100 GND SW2 R5 4.75K 1% 0.1uF 2 1 C6 R6 10.0K 1/10W 1% Note: 1.POR -> Reset to ASIC & SOC (Default) 2.RESET O/P from ASIC -> Reset to EX-PHY (PORT2) & SOC :Only Ethercat sku 3.RESET from SOC (GPIO/RST-O/P) -> Reset to ASIC 4.RESET from Push Botton -> Reset to ASIC & SOC Br_Red-RA U3 S 2 4 TPS3125 1 74LVC1G14 2.2K A C 2 B D2 "Reset" 1 3 SOT23_5 Threshold = 2.64V Delay = 180ms R9 A A TP3 BLACK TP4 BLACK Chennai India Part Number: Size: Date: 5 4 3 2 B Page: Board Project LAN9252-HBI&SPI+GPIO-EVB Name: Name: LAN9252-HBI&SPI+GPIO-EVB Power Supply & RST EVB2-9252-HBI&SPI+GPIO-RevB Sheet Monday, December 08, 2014 1 3 of Rev B 10 5 4 3 2 1 Power Supply Filtering 3V3 VDD33TXRX1 D FB2 D 3V3 2A/0.05DCR VDDCR C25 0.1uF C21 C22 0.1uF C18 0.1uF C20 C17 0.1uF 0.1uF C16 0.1uF C19 C15 0.1uF 1uF C14 0.1uF 470pF C13 0.1uF FB5 2A/0.05DCR BLM18EG221SN1D VDD12TX1 VDD12TX2 0.1uF Low ESR VDD33TXRX1 VDD33TXRX2 BLM18EG221SN1D C24 1.0uF 2A/0.05DCR 2A/0.05DCR DNP C23 1.0uF C12 VDDCR C11 3V3 0.1uF FB3 FB4 C10 3V3 VDD33TXRX2 0.1uF 3V3 0.1uF DNP C9 C8 1.0uF DNP C7 1.0uF DNP VDD12TX1 VDD12TX2 18pF REG_EN R10 12.1K 1% RBIAS RST# 11 IRQ 44 ATEST/FXLOSEN B 7 57 8 41 I2C2_SCL I2C2_SDA 43 42 GPIO0 GPIO1 GPIO2 48 46 45 56 59 VDD12TX1 VDD12TX2 6 24 38 VDDCR1 VDDCR2 VDDCR3 14 20 32 37 47 VDDIO1 VDDIO2 VDDIO3 VDDIO4 VDDIO5 VDD33BIAS VDD33 FXSDENA/FXSDA/FXLOSA INT PORT0 C27 OSCVDD12 OSCI OSCO OSCVSS REG_EN RBIAS RST# TXNA TXPA RXNA RXPA 9 FXSDA/FXLOSA 52 53 54 55 TXNA TXPA RXNA RXPA 63 62 61 60 TXNB TXPB RXNB RXPB 10 FXSDB/FXLOSB IRQ ATEST/FXLOSEN TESTMODE I2CSCL/EESCL/TCK I2CSDA/EESDA/TMS B INT PORT1 (Only for Lan9252) 1 3V3 3 1 2 4 OTHER SIGNALS OSCI OSCO I2C 25.000MHz 25ppm Y1 OSC POWER 18pF 2 C26 VDD33TXRX1 VDD33TXRX2 Note: OSCVSS need to connect to Chip gnd. 58 5 C U4A 51 64 C TXNB TXPB RXNB RXPB FXSDENB/FXSDB/FXLOSB LINKACTLED0/TDO/LEDPOL0/CHIP_MODE0 LINKACTLED1/TDI/LEDPOL1/CHIP_MODE1 RUNLED/LEDPOL2/E2PSIZE GND GPIO 65 LAN9252 A A Chennai India Part Number: Size: Date: 5 4 3 2 B Page: Board Project LAN9252-HBI&SPI+GPIO-EVB Name: Name: LAN9252-HBI&SPI+GPIO-EVB LAN9252 EVB2-9252-HBI&SPI+GPIO-RevB Sheet Tuesday, February 24, 2015 1 4 of Rev B 10 5 4 3 2 1 VDD33TXRX1 Port 0 FX_SFP-RXPA DNP R22 R23 0E 0E RXNA COP-RXPA 3 9 A 1 75 4&5 TD- 2 RCV RD+ 5 FX_SFP-RXNA 75 TXCT 6 COP-RXNA DNP C29 10pF 50V 5% DNP C30 10pF 50V 5% DNP C31 10pF 50V 5% 1000 pF NC 8 50V 10% 6 RD- 7 3 75 7&8 CHS GND 13 C 14 GND DNP C28 10pF 50V 5% C32 0.022uF 75 RXCT Note: Capacitors C28 through C31 are optional for EMI purposes and are not populated on the LAN9252 evaluation board. These capacitors are required for operation in an EMI constrained environment. 2 kV YEL R24 C A1 0E 0E 2 D 12 DNP R20 R21 RXPA TD+ 4 COP-TXNA RJ45 C1 FX_SFP-TXNA 1 COP-TXPA 11 0E 0E GRN XMIT MTG1 TXNA DNP R18 R19 FX_SFP-TXPA R15 0E MTG 0E 0E R14 49.9 1/10W 1% 16 DNP R16 R17 R13 49.9 1/10W 1% 15 TXPA R12 49.9 1/10W 1% C R11 49.9 1/10W 1% GND1 D 10 T1 Pulse J0011D01BNL 0E RES1210 VDD33TXRX2 Port 1 FX_SFP-RXPB DNP R36 R37 0E 0E FX_SFP-RXNB 3 9 A C COP-RXPB B 75 75 1 TXCT 4&5 TD- 2 RCV RD+ 5 6 COP-RXNB DNP C34 10pF 50V 5% DNP C35 10pF 50V 5% DNP C36 10pF 50V 5% 50V 10% 75 6 1000 pF NC 8 CHS GND 13 A 3 7&8 RD- 7 GND DNP C33 10pF 50V 5% C37 0.022uF 75 RXCT 2 kV YEL A A1 0E 0E 2 RJ45 12 DNP R34 R35 4 COP-TXNB C1 FX_SFP-TXNB TD+ 11 0E 0E 1 COP-TXPB MTG1 DNP R32 R33 GRN XMIT MTG RXNB FX_SFP-TXPB R29 0E 16 RXPB 0E 0E R28 49.9 1/10W 1% 15 TXNB DNP R30 R31 R27 49.9 1/10W 1% GND1 TXPB R26 49.9 1/10W 1% 14 B R25 49.9 1/10W 1% 10 T2 Pulse J0011D01BNL Chennai India Note: Capacitors C33 through C36 are optional for EMI purposes and are not populated on the LAN9252 evaluation board. These capacitors are required for operation in an EMI constrained environment. R38 0E Part Number: RES1210 Size: Date: 5 4 3 2 B Page: Board Project LAN9252-HBI&SPI+GPIO-EVB Name: Name: LAN9252-HBI&SPI+GPIO-EVB Copper Mode Interface EVB2-9252-HBI&SPI+GPIO-RevB Sheet Tuesday, February 24, 2015 1 5 of Rev B 10 4 3V3 R39 82 R41 49.9 R42 49.9 3V3 Fiber Port 0 :SFP Interface R43 82 FX_SFP-RXNA C38 FX_SFP-RXPA C40 0.1uF FX_SFP-TXPA C42 0.1uF 0.1uF L2 SFP_VCCR DNP C46 10uF 16V SFP_RD+ SFP_RD- SFP_TDSFP_TD+ R50 130 Note:Place capacitors, and resistors close to FOT Fiber Port 1 :SFP Interface R46 49.9 FX_SFP-RXNB C39 0.1uF FX_SFP-RXPB C41 0.1uF FX_SFP-TXPB C43 0.1uF + D 3V3 R48 100 SFP_VCCT2 L1 1uH 1uH C45 FX_SFP-TXNB R49 130 1 3V3 SFP_VCCT 100 C44 R45 49.9 0.1uF R47 FX_SFP-TXNA R44 82 2 C47 C48 10uF 16V 0.1uF + 0.1uF C49 0.1uF R51 130 SFP_VCCR2 SFP_TD2SFP_TD2+ D R40 82 Note:Place capacitors, and resistors close to FOT 3 R52 130 SFP_RD2+ SFP_RD2- 5 DNP C50 10uF 16V + C51 C52 10uF 16V 0.1uF L3 L4 B R53 4.7K R54 4.7K C55 VeeT1 TDTD+ VeeT2 VccT VccR VeeR2 RD+ RDVeeR3 + Note:Place resistors close to 0.1uF ASIC J3 FTLF1217P2 R55 4.7K VeeT TXFault TX Disable MOD-DEF(2) MOD-DEF (1) MOD-DEF (0) Rate Select LOS VeeR VeeR1 C54 10uF 16V 31 30 29 28 27 26 25 24 23 22 21 31 30 29 28 27 26 25 24 23 22 21 C56 10uF 16V + C57 0.1uF SFP_VCCT2 1 2 3 4 5 6 7 8 9 10 SFP_VCCT 31 30 29 28 27 26 25 24 23 22 21 1uH 1 2 3 4 5 6 7 8 9 10 J2 FTLF1217P2 VeeT TXFault TX Disable MOD-DEF(2) MOD-DEF (1) MOD-DEF (0) Rate Select LOS VeeR VeeR1 ASIC 31 30 29 28 27 26 25 24 23 22 21 0.1uF C 20 19 18 17 16 15 14 13 12 11 VeeT1 TDTD+ VeeT2 VccT VccR VeeR2 RD+ RDVeeR3 Note:Place resistors close to C53 1uH 20 19 18 17 16 15 14 13 12 11 C + R56 4.7K R57 4.7K R58 4.7K R59 4.7K B R60 4.7K FXSDB/FXLOSB FXSDA/FXLOSA A A Chennai India Part Number: Size: Date: 5 4 3 2 B Page: Board Project LAN9252-HBI&SPI+GPIO-EVB Name: Name: LAN9252-HBI&SPI+GPIO-EVB SFP Interface EVB2-9252-HBI&SPI+GPIO-RevB Sheet Monday, December 08, 2014 1 6 of Rev B 10 5 4 3 2 1 GPIO [0:2] & LED_POL_Strap I2C EEPROM 3V3 GPIO0 GPIO2 3V3 GPIO1 3V3 R67 R66 R73 1K Default : All 4 signals ON J9 GPIO2 3 LED1_CATHODE LED2_CATHODE CHIP_MODE[1:0] Strap Details 2 C CHIP_MODE[1:0] D5 1 GRN A Port Description Port 0 = PHY A, Port 1 = PHY B 00[Default] RUNLED LED2_ANODE 2K GPIO2 = RUNLED/LEDPOL2/E2PSIZE C D4 1 GRN A C I2C EEPROM Higher size Above 16K(2K X 8) GPIO1 =LINKACTLED1/TDI/LEDPOL1/CHIP_MODE1 2 LINK/ACT LED1_ANODE TH IC. Different sizes can be mounted GPIO0 = LINKACTLED0/TDO/LEDPOL0/CHIP_MODE0 LINK/ACT LED0_CATHODE I2C2_SCL Signals Functions GPIO1 D3 1 GRN A LED0_ANODE 6 I2C EEPROM Lower size Below 16K(2K X 8) C GPIO0 I2C2_SDA *(2-3) 1 3 *(1-2) 1 3 1 J8 *(2-3) 5 2 2 2 24FC512 J7 SDA SCL WP SW DIP-4/SM R74 1K 8 VCC A0 A1 A2 GND 4.7K 1 2 3 I2C2_1 I2C2_2 I2C2_3 I2C2_7 7 R72 1K D 0.1uF 4 2 1 2 3 4 4.7K 8 7 6 5 4.7K SW3 LED1_CATHODE 2 R65 U5 R71 10.0K LED0_CATHODE LED2_CATHODE 2 R64 GPIO2 LED1_ANODE 1 1 R70 10.0K R63 GPIO1 *(2-3) 2 2 1 LED0_ANODE LED2_ANODE R69 10.0K 3 1 J6 *(1-2) 4.7K J5 *(2-3) 3V3 C58 GPIO0 2 J4 3 1 3 1 D R68 3V3 2K 3V3 FX_Los_Strap_1 & 2 MODE 3V3 2 C 01 10 B 11 FX_Mode_Strap_1 & 2 3V3 2 PORT MODE RESERVED RESERVED Port 0 = PHY A, Port 1 = PHY B, Port 2 = MII Port 0 = MII, Port 1 = PHY B, Port 2 = PHY A 3 PORT DOWNSTREAM MODE R77 10K DNP FXSDA/FXLOSA R75 DNP 10K R76 10K R78 DNP 10K R80 10K ATEST/FXLOSEN 3V3 R79 10K 3 PORT UPSTREAM MODE FXSDB/FXLOSB B Strap Details Signal Name CHIP_MODE0 CHIP_MODE1 E2PSIZE A LED Polarity Strap 0 Connector J4,J7 (2&3) Default 1 J4,J7 (1&2) 0 J6,J9 (2&3) Default The LED is set as active high. 1 J6,J9 (1&2) The LED is set as active low, 0 J5,J8 (2&3) 1 J5,J8 (1&2) Default Logic The LED is set as active high. R77 R79 Poupulate DNP The LED is set as active low, The LED is set as active high. EEPROM Size=1K bits (128 x 8) through 16K bits (2K x 8) The LED is set as active low, EEPROM Size=32K bits (4K x 8) through 512K bits (64K x 8) or 4Mbits (512K x 8) (LAN9252 only) [Default] Poupulate Poupulate DNP Poupulate (Default) (Default) Ref.Voltage 3V3 1V5 0 (Default) Function PORT MODE PORT0 Copper (Default) Fiber Above 2 V selects FX-LOS for ports 0 and 1 Level of 1.5 V selects FX-LOS for port 0 and FX-SD/copper twisted pair for port 1 further determined by FXSDB Level of 0V Selects FX-SD / copper twisted pair for ports A and B further determined by FXSDA and FXSDB. PORT1 Copper (Default) Fiber DNP Poupulate R76 R75 R75 R76 R80 R78 R78 R80 Note: --To use GPIOs as LED * Short 2-3 of both jumpers (ex. for GPIO0 short 2-3 of J4 & J7) A Chennai India Part Number: Size: Date: 5 4 3 2 B Page: Board Project LAN9252-HBI&SPI+GPIO-EVB Name: Name: LAN9252-HBI&SPI+GPIO-EVB STRAP,GPIO,I2C & FXLOS EVB2-9252-HBI&SPI+GPIO-RevB Sheet Tuesday, February 24, 2015 1 7 of Rev B 10 5 4 1 2 3 7 A0 A1 A2 SDA SCL WP SW DIP-4/SM 24FC512 R86 31 30 28 RD_RDWR WR_ENB CS 5 I2C1_SDA 6 I2C1_SCL I2C EEPROM Only for Host SOC PME_LATCH1 18 FIFOSEL_LATCH0 34 4 Default : All 4 signals OFF R83 8 4.7K I2C3_1 I2C3_2 I2C3_3 I2C3_7 C AD5_CONFIG3 AD1_CONFIG3 CS_CONFIG3 PME_LATCH1 FIFOSEL_LATCH0 A3_CONFIG3 A1_CONFIG3 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 27 26 29 25 A4 A3 ALEHI_A2 ALELO_A1 33 15 16 21 22 23 19 40 39 36 50 49 35 12 13 17 A0_AD15 AD14 AD13 AD12 AD11 AD10 AD9_SCK AD8 AD7 AD6 AD5_SCS# AD4 AD3_SIO3 AD2_SIO2 AD1_SIO1 AD0_SIO0 RD/RD_WR/DIGIO15/GPI15/GPO15/MII_RXD3 WR/ENB/DIGIO14/GPI14/GPO14/MII_RXD2 CS/DIGIO13/GPI13/GPO13/MII_RXD1 A0/D15/AD15/DIGIO9/GPI9/GPO9/MII_RXER D14/AD14/DIGIO8/GPI8/GPO8/MII_TXD3/TX_SHIFT1 D13/AD13/DIGIO7/GPI7/GPO7/MII_TXD2/TX_SHIFT0 D12/AD12/DIGIO6/GPI6/GPO6/MII_TXD1 D11/AD11/DIGIO5/GPI5/GPO5/MII_TXD0 D10/AD10/DIGIO4/GPI4/GPO4/MII_TXEN D9/AD9/LATCH_IN/SCK D8/AD8/DIGIO2/GPI2/GPO2/MII_MDIO D7/AD7/DIGIO1/GPI1/GPO1/MII_MDC D6/AD6/DIGIO0/GPI0/GPO0/MII_RXCLK D5/AD5/OUTVALID/SCS# D4/AD4/DIGIO3/GPI3/GPO3/MII_LINK D3/AD3/WD_TRIG/SIO3 D2/AD2/SOF/SIO2 D1/AD1/EOF/SO/SIO1 D0/AD0/WD_STATE/SI/SIO0 SYNC/LATCH1 SYNC/LATCH0 P1 AD7_CONFIG3 AD3_CONFIG3 GPMC_OEN_REN GPMC_WEN AD12_CONFIG3 AD10_CONFIG3 AD14_CONFIG3 1 A4/DIGIO12/GPI12/GPO12/MII_RXD0 A3/DIGIO11/GPI11/GPO11/MII_RXDV A2/ALEHI/DIGIO10/GPI10/GPO10/LINKACTLED2/MII_LINKPOL/LEDPOL6 A1/ALELO/OE_EXT/MII_CLK25 U6 VCC 1 2 3 4 2K C59 0.1uF 2K 3V3 GND 8 7 6 5 4.7K D 4.7K 4.7K SW4 2 U4B R82 R85 Host SOC EEPROM R84 R81 3V3 3 D LAN9252 AD6_CONFIG3 AD2_CONFIG3 ALELO_CONFIG3 GPMC_BE0N_CLE AD13_CONFIG3 AD9_CONFIG3 AD15_CONFIG3 AD11_CONFIG3 AD8_CONFIG3 AD15_CONFIG3 2 A0_CONFIG3 3 ALELO_CONFIG3 2 A1_CONFIG3 3 ALEHI_CONFIG3 2 A2_CONFIG3 3 AD4_CONFIG3 AD0_CONFIG3 SW5 *(1-2) 1 GPMC_DIR 2 GPMC_OEN_REN 3 GPMC_WEN 2 GPMC_BE0N_CLE 3 A0_AD15_CONFIG3 JS102011CQN SW7 *(1-2) 1 ALELO_A1 JS102011CQN 1 2 1 D6 SYS_RESETN 2 3 RD_RDWR_CONFIG3 JS102011CQN C SW8 *(1-2) 1 RST_GPIO ALEHI_A2_CONFIG3 WR_ENB_CONFIG3 JS102011CQN SW10 *(1-3) 1 RST# JS102011CQN DIODE SW5 to 10 Short 1-2 = Knob position 1-3 Short 1-3 = Knob position 1-2 A4_CONFIG3 A2_CONFIG3 A0_CONFIG3 1 SW9 *(1-2) JS102011CQN SW6 *(1-3) Short 1 -2 = To Reset ASIC from SoC-GPIO Short 1-3 = To Reset SoC from ASIC *Default short SW11 AD4_CONFIG3 HEADER 23x2 AD4 GPIO3_CONFIG5 1 2 3 4 5 6 AD8 AD8_CONFIG3 HBI or SPI+GPIO Config selection GPIO2_CONFIG5 Short 1-2 & 4-5 for HBI Config (2-3 & 5-6 open) [Default] SW12 TP5 ORANGE B AD7_CONFIG3 P2 VDD3V3EXP VDD_5V SYS_RESETN GPMC_DIR I2C1_SDA SIO3_CONFIG5 SCS#_CONFIG5 SIO1_CONFIG5 A IRQ 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 AD7 GPIO1_CONFIG5 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 VDD3V3EXP VDD_5V C60 DNP 2 Short 2-3 & 5-6 for SPI+GPIO Config (1-2 & 4-5 open) AD6 AD6_CONFIG3 B SW19 GPIO0_CONFIG5 AD3_SIO3 SW13 5V power to HOST SOC board from EVB Board 0.1uF 4 5 6 AD3_CONFIG3 5V J10 1 1 2 3 A0_AD15_CONFIG3 A0_AD15 GPIO9_CONFIG5 SIO3_CONFIG5 4RD_RDWR_CONFIG3 5 RD_RDWR 6 GPIO15_CONFIG5 GPIO14_CONFIG5 1 2 3 AD0_CONFIG3 ALEHI_CONFIG3 4 5 6 ALEHI_A2_CONFIG3 ALEHI_A2 CS GPIO13_CONFIG5 1 2 3 A3_CONFIG3 A3 GPIO11_CONFIG5 1 2 3 AD2_SIO2 AD2_CONFIG3 SIO2_CONFIG5 1 2 3 4 5 6 AD1_SIO1 AD1_CONFIG3 SIO1_CONFIG5 GPIO10_CONFIG5 SW21 4 5 6 A4 4 5 6 AD10 4 5 6 AD12 4 5 6 AD14 AD9_CONFIG3 A4_CONFIG3 AD9_SCK SCK_CONFIG5 GPIO12_CONFIG5 SW16 1 2 3 4 5 6 AD5_SCS# AD5_CONFIG3 SCS#_CONFIG5 SW19,SW20 & SW21 = HBI or SPI/SQI selection AD10_CONFIG3 GPIO4_CONFIG5 RST_GPIO A SW17 AD11_CONFIG3 AD11 1 2 3 AD13 1 2 3 GPIO5_CONFIG5 HEADER 23x2 AD12_CONFIG3 GPIO6_CONFIG5 Chennai India SW18 AD13_CONFIG3 Board to Board Connectors for SoC GPIO7_CONFIG5 AD14_CONFIG3 Part Number: GPIO8_CONFIG5 Size: Date: 5 AD0_SIO0 SIO0_CONFIG5 SW15 CS_CONFIG3 SIO2_CONFIG5 SIO0_CONFIG5 SCK_CONFIG5 4 5 6 SW20 SW14 WR_ENB_CONFIG3 WR_ENB I2C1_SCL 1 2 3 1 2 3 4 3 2 B Page: Board Project LAN9252-HBI&SPI+GPIO-EVB Name: Name: LAN9252-HBI&SPI+GPIO-EVB LAN9252 (Part2) EVB2-9252-HBI&SPI+GPIO-RevB Sheet Tuesday, February 24, 2015 1 8 of Rev B 10 2 AD13_CONFIG3 AD12_CONFIG3 AD15_CONFIG3 AD14_CONFIG3 3 AD8_CONFIG3 AD9_CONFIG3 AD10_CONFIG3 AD11_CONFIG3 4 AD4_CONFIG3 AD3_CONFIG3 AD2_CONFIG3 SIO2_CONFIG5 SIO3_CONFIG5 RST_GPIO AD1_CONFIG3 AD0_CONFIG3 5 R140 1K D23 1 A C 1 SW22 to 25 Short 1-2 = Knob position 1-3 Short 1-3 = Knob position 1-2 *(1-3) SW22 2 2 GPMC_DIR 3 GPMC_OEN_REN 1 PMRD JS102011CQN GRN SW23 D C61 PMRD PMWR 3V3 JS102011CQN C62 100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76 ID_SELECT_RC1 ID_SELECT_RC2 ID_SELECT_RC3 ID_SELECT_RC4 C A4_CONFIG3 A3_CONFIG3 PIC_MCLR PIM_MCLR A2_CONFIG3 ID_SELECT_RB5 ID_SELECT_RB4 ID_SELECT_RB3 ID_SELECT_RB2 ID_SELECT_RB1 ID_SELECT_RB0 AERXERR VDD PMD5 PMD6 PMD7 RC1 RC2 RC3 RC4 PMA5 PMA4 AERXDV MCLR AERXCLK/AEREFCLK VSS VDD1 TMS/RA0 AERXD0 AERXD1 AN5/C1IN+/VBUSON/CN7/RB5 RB4 RB3 RB2 RB1 RB0 A0_CONFIG3 3 ALELO_CONFIG3 *(1-3) SW25 2 A1_CONFIG3 3 ALEHI_CONFIG3 GPMC_A1_ALEHI 1 VSS4 SOSCO/T1CK/CN0/RC14 SOSCI/CN1/RC13 INT0 EMDC PMCS2 SS1/IC2/RD9 EMDIO AETXEN AETXCLK VSS3 OSC2/CLKO/RC15 OSC1/CLKI/RC12 VDD4 PIM CONN TDO/RA5 PIC32MX795F512L-80I/PT TDI/RA4 SDA2 SCL2 D+/RG2 D-/RG3 VUSB VBUS SCL3/SDO3/U1TX/RF8 SDA3/SDI3/U1RX/RF2 USBID/RF3 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51 JS102011CQN C63 D 11pF DNP 32Khz Y2 IRQ CS_CONFIG3 C64 Aardvark / SPI Storm- Connector 11pF DNP C65 20pF SIO1_CONFIG5 SCK_CONFIG5 SCS#_CONFIG5 Y3 8 Mhz I2C1_SDA I2C1_SCL C66 J11 I2C2_SCL I2C2_SDA R62 R122 0 0 1 3 5 7 9 2 4 6 8 10 C R61 0 SIO0_CONFIG5 20pF J12 SIO2_CONFIG5 SIO3_CONFIG5 0E R139 DNP 3 4 1 2 J73 - SPI AARDVAR HEADER J73+J74 - SPI STROM HEADER 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 FIFOSEL_LATCH0 PME_LATCH1 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 2 1 JS102011CQN PGEC2/AN6/RB6 PGED2/AN7/RB7 AERXD2 AERXD3 AVDD AVSS RB8 RB9 RB10 AETXERR VSS1 VDD2 TCK/RA1 SCK4 SS4 AECRS MII2_COL PMA1/AETXD3/PMALH PMALL/PMA0/AETXD2 VSS2 VDD3 AETXD0 AETXD1 SDI4 SDO4 AD5_CONFIG3 AD6_CONFIG3 AD7_CONFIG3 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 GPMC_BE0N_CLE *(1-3) SW24 100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76 U7 GPMC_WEN 3 10uF GPMC_A0_ALE PMD4 PMD3 PMD2 RG13 RG12 TRD2/RG14 PMD1 PMD0 RA7 RA6 PMD8 PMD9 PMD10 PMD11 VDD5 VCAP/VDDCORE PMD15 PMD14 PMRD PMWR PMD13 PMD12 OC4/RD3 OC3/RD2 OC2/RD1 PIM1 2 *(1-2) 1 PMWR 0.1uF 3V3 3V3 ID SELECT 3V3 B 3V3 R88 4.7K PIC_MCLR SW26 JS202011CQN 1 4 2 5 3 6 PIM_MCLR 10K 10K 10K 10K 10K 10K 10K 10K 10K 10K 10K 10K 10K 10K 10K 10K SIO1_CONFIG5 SIO0_CONFIG5 DNP DBG ICSP Header SCK_CONFIG5 SCS#_CONFIG5 PGD2 PGC2 R87 OE ID_SELECT_RB12 ID_SELECT_RB13 GPMC_A1_ALEHI GPMC_A0_ALE MCLR ID_SELECT_RB8 ID_SELECT_RB9 ID_SELECT_RB10 ID_SELECT_RB11 1 2 3 4 5 6 R123 R124 R126 R125 R127 R128 R129 R130 J13 R131 R133 R134 R132 R135 R136 R137 R138 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 B SW46 1 2 3 4 5 6 7 8 ID_SELECT_RB0 ID_SELECT_RB1 ID_SELECT_RB2 ID_SELECT_RB3 ID_SELECT_RB4 ID_SELECT_RB5 ID_SELECT_RB8 ID_SELECT_RB9 16 15 14 13 12 11 10 9 SW DIP-8 16 15 14 13 12 11 10 9 SW DIP-8 Default : All 8 signals ON Default : RB0 & RB2 = OFF RB1,RB3,RB4,RB5,RB8 &RB9 = ON 3V3 SW47 1 2 3 4 5 6 7 8 ID_SELECT_RB10 ID_SELECT_RB11 ID_SELECT_RB12 ID_SELECT_RB13 ID_SELECT_RC1 ID_SELECT_RC2 ID_SELECT_RC3 ID_SELECT_RC4 C68 C69 C70 C71 C72 C73 C74 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF MCLR SW Position 1-2 & 4-5 = PIM ON SW Position 2-3 & 5-6 = PIC ON(Default) 0.1uF 1K 0.1uF C75 0.1uF RESET C67 R89 sw_pb_2P 0.1uF SW27 A A Chennai India SYS_RESETN Decap for U3 Part Number: Size: Date: 5 4 3 2 B Page: Board Project LAN9252-HBI&SPI+GPIO-EVB Name: Name: LAN9252-HBI&SPI+GPIO-EVB ON-Board-PIC32MX EVB2-9252-HBI&SPI+GPIO-RevB Sheet Tuesday, February 24, 2015 1 9 of Rev B 10 5 4 SW28 GPIO1_CONFIG5 GPIO2_CONFIG5 GPIO3_CONFIG5 GPIO4_CONFIG5 GPIO5_CONFIG5 C GPIO6_CONFIG5 GPIO7_CONFIG5 GPI0 3 GPO0 JS102011CQN 2 SW29 GPI1 1 3 GPO1 Digital INPUTS Default SW34 & SW40 are in OFF position (Pullup active) 3V3 JS102011CQN 2 SW31 GPI3 1 3 GPO3 JS102011CQN 2 SW33 GPI5 1 3 GPO5 JS102011CQN 2 SW35 GPI6 1 3 GPO6 D For Pull Down, move SW34 & SW40 to ON position JS102011CQN 2 SW30 GPI2 1 3 GPO2 JS102011CQN 2 SW32 GPI4 1 3 GPO4 1 R90 R91 R92 R93 R94 R95 R96 R97 D 2 1 2 10K 10K 10K 10K 10K 10K 10K 10K GPIO0_CONFIG5 3 SW34 1 2 3 4 5 6 7 8 GPI0 GPI1 GPI2 GPI3 GPI4 GPI5 GPI6 GPI7 Digital OUTPUTS 16 15 14 13 12 11 10 9 GPO0 GPO1 GPO2 GPO3 GPO4 SW DIP-8 Default : All 8 signals OFF JS102011CQN 2 SW36 GPI7 1 3 GPO7 GPO5 GPO7 GPIO8_CONFIG5 3V3 GPO8 GPO9 GPIO10_CONFIG5 JS102011CQN 2 SW39 GPI10 1 3 GPO10 B GPIO11_CONFIG5 GPIO12_CONFIG5 GPIO13_CONFIG5 GPIO14_CONFIG5 GPIO15_CONFIG5 A JS102011CQN 2 SW41 GPI11 1 3 GPO11 JS102011CQN 2 SW42 GPI12 1 3 GPO12 R98 R99 R100 R101 R102 R103 R104 R105 GPO10 GPO11 10K 10K 10K 10K 10K 10K 10K 10K GPIO9_CONFIG5 JS102011CQN 2 SW38 GPI9 1 3 GPO9 GPO12 SW40 1 2 3 4 5 6 7 8 GPI8 GPI9 GPI10 GPI11 GPI12 GPI13 GPI14 GPI15 GPO13 16 15 14 13 12 11 10 9 1K R107 1K R108 1K R109 1K R110 1K R111 1K R112 GPO6 JS102011CQN 2 SW37 GPI8 1 3 GPO8 R106 R113 1K R114 1K R115 1K R116 1K R117 1K R118 1K R119 1K R120 GPO14 R121 GPO15 1K 1K 1K D7 1 D8 1 D9 1 D10 1 D11 1 D12 1 D13 1 D14 1 D15 1 D16 1 D17 1 D18 1 D19 1 D20 1 D21 1 D22 1 A C A C A C A C A C A C A C A C A C A C A C A C A C A C A C A C 2 2 2 C 2 2 2 2 2 2 2 2 2 2 2 B 2 2 SW DIP-8 Default : All 8 signals OFF JS102011CQN 2 SW43 GPI13 1 3 GPO13 JS102011CQN 2 SW44 GPI14 1 3 GPO14 JS102011CQN 2 SW45 GPI15 1 3 GPO15 A JS102011CQN Default KNOB position SW28-SW33,SW35-SW39,SW41-SW45- (1-3) Chennai India Part Number: Size: Date: 5 4 3 2 B Page: Board Project LAN9252-HBI&SPI+GPIO-EVB Name: Name: LAN9252-HBI&SPI+GPIO-EVB 16GPIO(Config5) EVB2-9252-HBI&SPI+GPIO-RevB Sheet Tuesday, February 24, 2015 1 10 of Rev B 10