Data Sheet

TJA1057
High-speed CAN transceiver
Rev. 5 — 28 January 2016
Product data sheet
1. General description
The TJA1057 is part of the Mantis family of high-speed CAN transceivers. It provides an
interface between a Controller Area Network (CAN) protocol controller and the physical
two-wire CAN bus. The transceiver is designed for high-speed CAN applications in the
automotive industry, providing the differential transmit and receive capability to (a
microcontroller with) a CAN protocol controller.
The TJA1057 offers a feature set optimized for 12 V automotive applications, with
significant improvements over first- and second-generation CAN transceivers from NXP,
such as the TJA1050, and excellent ElectroMagnetic Compatibility (EMC) performance.
The TJA1057 also displays ideal passive behavior to the CAN bus when the supply
voltage is off.
A VIO pin on the TJA1057GT(K)/3 variants allows for direct interfacing with 3.3 V and
5 V-supplied microcontrollers.
The TJA1057 implements the CAN physical layer as defined in the current
ISO11898-2:2003 standard and the pending updated version of ISO11898-2:201x. The
TJA1057T variant is specified for data rates up to 1 Mbit/s. Pending the release of
ISO11898-2:201x including CAN FD, additional timing parameters are specified for the
TJA1057GT(/3) and TJA1057GTK(/3) variants. This implementation enables reliable
communication in the CAN FD fast phase at data rates up to 5 Mbit/s.
These features make the TJA1057 an excellent choice for HS-CAN networks that only
require basic CAN functionality.
2. Features and benefits
2.1 General
 Fully ISO 11898-2:2003 compliant
 Optimized for use in 12 V automotive systems
 EMC performance satisfies 'Hardware Requirements for LIN, CAN and FlexRay
Interfaces in Automotive Applications’, Version 1.3, May 2012.
 VIO option allows for direct interfacing with 3.3 V and 5 V-supplied microcontrollers
 Non-VIO variants can interface with 3.3 V and 5 V-supplied microcontrollers, provided
the microcontroller I/Os are 5 V tolerant.
 AEC-Q100 qualified
 Dark green product (halogen free and Restriction of Hazardous Substances (RoHS)
compliant)
 Available in SO8 package and leadless HVSON8 package (3.0 mm  3.0 mm) with
improved Automated Optical Inspection (AOI) capability
TJA1057
NXP Semiconductors
High-speed CAN transceiver
2.2 Predictable and fail-safe behavior




Functional behavior predictable under all supply conditions
Transceiver disengages from bus when not powered (zero load)
Transmit Data (TXD) dominant time-out function
Internal biasing of TXD and S input pins
2.3 Protection




High ESD handling capability on the bus pins (8 kV IEC and HBM)
Bus pins protected against transients in automotive environments
Undervoltage detection on pins VCC and VIO
Thermally protected
2.4 TJA1057GT(/3)/TJA1057GTK(/3)
 Timing guaranteed for data rates up to 5 Mbit/s
 Improved TXD to RXD propagation delay of 210 ns
3. Quick reference data
Table 1.
Quick reference data
Symbol
Parameter
VCC
Min
Typ
Max
Unit
supply voltage
4.75
-
5.25
V
VIO
supply voltage on pin VIO
2.95
-
5.25
V
Vuvd(VCC)
undervoltage detection voltage
on pin VCC
3.5
4
4.3
V
Vuvd(VIO)
undervoltage detection voltage
on pin VIO
2.1
-
2.8
V
ICC
supply current
IIO
Conditions
supply current on pin VIO
Silent mode
0.1
-
1.2
mA
Normal mode; bus recessive
2
5
10
mA
Normal mode; bus dominant
20
45
70
mA
Silent mode
-
3
16
A
recessive; VTXD = VIO
-
7
30
A
dominant; VTXD = 0 V
-
110
320
A
Normal mode
VESD
electrostatic discharge voltage
IEC 61000-4-2 at pins CANH and CANL
8
-
+8
kV
VCANH
voltage on pin CANH
limiting value according to IEC60134
42
-
+42
V
VCANL
voltage on pin CANL
limiting value according to IEC60134
42
-
+42
V
Tvj
virtual junction temperature
40
-
+150
C
TJA1057
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 5 — 28 January 2016
© NXP Semiconductors N.V. 2016. All rights reserved.
2 of 25
TJA1057
NXP Semiconductors
High-speed CAN transceiver
4. Ordering information
Table 2.
Ordering information
Type number
TJA1057T
Package
Name
Description
Version
SO8
plastic small outline package; 8 leads; body width 3.9 mm
SOT96-1
HVSON8
plastic thermal enhanced very thin small outline package; no leads;
8 terminals; body 3  3  0.85 mm
SOT782-1
TJA1057GT
TJA1057GT/3[1]
TJA1057GTK
TJA1057GTK/3[1]
[1]
TJA1057GT/3 and TJA1057GTK/3 variants have a VIO pin.
5. Block diagram
9,2
9&&
9&&
9,2
7;'
7-$
7(03(5$785(
3527(&7,21
7,0(287
6/23(
&21752/
$1'
'5,9(5
&$1+
&$1/
9,2
6
5;'
02'(
&21752/
'5,9(5
*1'
DDD
(1) VIO = VCC in non-VIO product variants TJA1057(G)T(K)
Fig 1.
TJA1057
Product data sheet
Block diagram
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Rev. 5 — 28 January 2016
© NXP Semiconductors N.V. 2016. All rights reserved.
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TJA1057
NXP Semiconductors
High-speed CAN transceiver
6. Pinning information
6.1 Pinning
7-$7
7-$*7
7-$*7
7;'
6
7;'
6
*1'
&$1+
*1'
&$1+
9&&
&$1/
9&&
&$1/
5;'
QF
5;'
9,2
DDD
DDD
a. SO8
b. SO8 with VIO
7-$*7.
WHUPLQDO
LQGH[DUHD
WHUPLQDO
LQGH[DUHD
7-$*7.
7;' 6
7;' 6
*1' &$1+
*1' &$1+
9&& &$1/
9&& &$1/
5;' QF
5;' 9,2
DDD
DDD
7UDQVSDUHQWWRSYLHZ
c. HVSON8
Fig 2.
7UDQVSDUHQWWRSYLHZ
d. HVSON8 with VIO
Pin configuration diagrams
6.2 Pin description
Table 3.
Symbol
Pin
Description
TXD
1
transmit data input
GND[1]
2
ground
VCC
3
supply voltage
RXD
4
receive data output; reads out data from the bus lines
n.c.
5
not connected in TJA1057T, TJA1057GT and TJA1057GTK
VIO
5
supply voltage for I/O level adapter in TJA1057GT/3 and TJA1057GTK/3
CANL
6
LOW-level CAN bus line
CANH
7
HIGH-level CAN bus line
S
8
Silent mode control input
[1]
TJA1057
Product data sheet
Pin description
HVSON8 package die supply ground is connected to both the GND pin and the exposed center pad. The
GND pin must be soldered to board ground. For enhanced thermal and electrical performance, it is
recommended that the exposed center pad also be soldered to board ground.
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Rev. 5 — 28 January 2016
© NXP Semiconductors N.V. 2016. All rights reserved.
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TJA1057
NXP Semiconductors
High-speed CAN transceiver
7. Functional description
7.1 Operating modes
The TJA1057 supports two operating modes, Normal and Silent. The operating mode is
selected via pin S. See Table 4 for a description of the operating modes under normal
supply conditions.
Table 4.
Operating modes
Mode
Normal
Inputs
Outputs
Pin S
Pin TXD
CAN driver
Pin RXD
LOW
LOW
dominant
LOW
HIGH
recessive
LOW when bus dominant
x[1]
biased to recessive
LOW when bus dominant
HIGH when bus recessive
Silent
HIGH
HIGH when bus recessive
[1]
‘x’ = don’t care.
7.1.1 Normal mode
A LOW level on pin S selects Normal mode. In this mode, the transceiver can transmit and
receive data via the bus lines, CANH and CANL (see Figure 1 for the block diagram). The
differential receiver converts the analog data on the bus lines into digital data which is
output on pin RXD. The slopes of the output signals on the bus lines are controlled
internally and are optimized in a way that guarantees the lowest possible EME.
7.1.2 Silent mode
A HIGH level on pin S selects Silent mode. The transmitter is disabled in Silent mode,
releasing the bus pins to recessive state. All other IC functions, including the receiver,
continue to operate as in Normal mode. Silent mode can be used to prevent a faulty CAN
controller disrupting all network communications.
7.2 Fail-safe features
7.2.1 TXD dominant time-out function
A 'TXD dominant time-out' timer is started when pin TXD is set LOW. If the LOW state on
this pin persists for longer than tto(dom)TXD, the transmitter is disabled, releasing the bus
lines to recessive state. This function prevents a hardware and/or software application
failure from driving the bus lines to a permanent dominant state (blocking all network
communications). The TXD dominant time-out timer is reset when pin TXD is set HIGH.
The TXD dominant time-out time also defines the minimum possible bit rate of
approximately 25 kbit/s.
7.2.2 Internal biasing of TXD and S input pins
Pins TXD and S have internal pull-ups to VCC (or VIO in TJA1057GT(K)/3 variants) to
ensure a safe, defined state in case one or both of these pins are left floating. Pull-up
currents flow in these pins in all states; both pins should be held HIGH in Silent mode to
minimize supply current.
TJA1057
Product data sheet
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Rev. 5 — 28 January 2016
© NXP Semiconductors N.V. 2016. All rights reserved.
5 of 25
TJA1057
NXP Semiconductors
High-speed CAN transceiver
7.2.3 Undervoltage detection on pins VCC and VIO (TJA1057GT(K)/3)
If VCC or VIO drops below the undervoltage detection level, Vuvd(VCC)/Vuvd(VIO), the
transceiver switches off and disengages from the bus (zero load; bus pins floating) until
the supply voltage has recovered. The output drivers are enabled once both VCC and VIO
are again within their operating ranges and TXD has been reset to HIGH.
7.2.4 Overtemperature protection
The output drivers are protected against overtemperature conditions. If the virtual junction
temperature exceeds the shutdown junction temperature, Tj(sd), both output drivers are
disabled. When the virtual junction temperature drops below Tj(sd) again, the output
drivers recover once TXD has been reset to HIGH (waiting for TXD to go HIGH prevents
output driver oscillation due to small variations in temperature).
7.2.5 VIO supply pin (TJA1057GT(K)/3 variants only)
Pin VIO should be connected to the microcontroller supply voltage (see Figure 6). The
signal levels on pins TXD, RXD and S will then be adjusted to the I/O levels of the
microcontroller, allowing for direct interfacing without additional glue logic.
For versions of the TJA1057 without a VIO pin, the VIO input is internally connected to VCC.
The signal levels of pins TXD, RXD and S are set to levels compatible with 5 V
microcontrollers.
TJA1057
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 5 — 28 January 2016
© NXP Semiconductors N.V. 2016. All rights reserved.
6 of 25
TJA1057
NXP Semiconductors
High-speed CAN transceiver
8. Limiting values
Table 5.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). All voltages are referenced to GND.
Symbol
Parameter
Conditions
Min
Max
Unit
Vx
voltage on pin x
on pins CANH, CANL
42
+42
V
on pins VCC, VIO
0.3
+7
V
0.3
VIO[2]
15
+15
on any other pin
[1]
V(CANH-CANL) voltage between pin CANH
and pin CANL
transient voltage
Vtrt
VESD
on pins CANH, CANL
[3]
V
pulse 2a
-
V
150 -
V
pulse 3b
-
100
V
8
+8
kV
8
+8
kV
4
+4
kV
[4]
on pins CANH and CANL
[5]
on any other pin
Machine Model (MM); 200 pF, 0.75 H, 10 
[6]
on any pin
Charged Device Model (CDM); field Induced
charge; 4 pF
on any other pin
storage temperature
[1]
200 +200
V
750 +750
V
[7]
on corner pins
Tstg
75
pulse 3a
on pins CANH and CANL
virtual junction temperature
V
100 -
Human Body Model (HBM); 100 pF, 1.5 k
Tvj
V
pulse 1
IEC 61000-4-2 (150 pF, 330 )
electrostatic discharge
voltage
+ 0.3
[8]
500 +500
V
40
+150
C
55
+150
C
Maximum voltage should never exceed 7 V.
[2]
VIO + 0.3 = VCC + 0.3 in the non-VIO product variants TJA1057(G)T(K).
[3]
According to IEC TS 62228 (2007), Section 4.2.4; parameters for standard pulses defined in ISO7637 part 2: 2004-06.
[4]
According to IEC TS 62228 (2007), Section 4.3; DIN EN 61000-4-2.
[5]
According to AEC-Q100-002.
[6]
According to AEC-Q100-003.
[7]
According to AEC-Q100-011; grade C3B.
[8]
In accordance with IEC 60747-1. An alternative definition of virtual junction temperature is: Tvj = Tamb + P  Rth(vj-a), where Rth(vj-a) is a
fixed value to be used for the calculation of Tvj. The rating for Tvj limits the allowable combinations of power dissipation (P) and ambient
temperature (Tamb).
TJA1057
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 5 — 28 January 2016
© NXP Semiconductors N.V. 2016. All rights reserved.
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TJA1057
NXP Semiconductors
High-speed CAN transceiver
9. Thermal characteristics
Table 6.
Thermal characteristics
According to IEC 60747-1.
Symbol Parameter
Rth(vj-a)
thermal resistance from virtual junction
to ambient
Conditions
Value
Unit
SO8 package; in free air
97
K/W
HVSON8 package; in free air
dual-layer board
[1]
91
K/W
four-layer board
[2]
52
K/W
[1]
According to JEDEC JESD51-2, JESD51-3 and JESD51-5 at natural convection on 1s board with thermal via array under the exposed
pad connected to the second copper layer.
[2]
According to JEDEC JESD51-2, JESD51-5 and JESD51-7 at natural convection on 2s2p board. Board with two inner copper layers
(thickness: 35 m) and thermal via array under the exposed pad connected to the first inner copper layer.
10. Static characteristics
Table 7.
Static characteristics
Tvj = 40 C to +150 C; VCC = 4.75 V to 5.25 V; VIO = 2.95 V to 5.25 V[1]; RL = 60 ; CL = 100 pF unless specified otherwise;
All voltages are defined with respect to ground. Positive currents flow into the IC.[2]
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
Supply; pin VCC
VCC
supply voltage
4.75
-
5.25
V
Vuvd(VCC)
undervoltage detection
voltage on pin VCC
3.5
4
4.3
V
ICC
supply current
0.1
-
1.2
mA
recessive; VTXD = VIO[3]
2
5
10
mA
dominant; VTXD = 0 V
20
45
70
mA
Silent mode; VTXD = VIO[3]
Normal mode
I/O level adapter supply; pin
VIO[1]
VIO
supply voltage on pin VIO
2.95
-
5.25
V
Vuvd(VIO)
undervoltage detection
voltage on pin VIO
2.1
-
2.8
V
IIO
supply current on pin VIO
-
3
16
A
recessive; VTXD = VIO
-
7
30
A
dominant; VTXD = 0 V
-
110
320
A
2
-
VIO[3] + 0.3
V
0.3
-
0.8
V
1
-
+1
A
15
-
1
A
2
-
VIO[3] + 0.3
V
0.3
-
0.8
V
5
-
+5
A
Silent mode
Normal mode
Silent mode control input; pin S
VIH
HIGH-level input voltage
VIL
LOW-level input voltage
[3]
IIH
HIGH-level input current
VS = VIO
IIL
LOW-level input current
VS = 0 V
CAN transmit data input; pin TXD
VIH
HIGH-level input voltage
VIL
LOW-level input voltage
IIH
HIGH-level input current
TJA1057
Product data sheet
VTXD =
VIO[3]
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Rev. 5 — 28 January 2016
© NXP Semiconductors N.V. 2016. All rights reserved.
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TJA1057
NXP Semiconductors
High-speed CAN transceiver
Table 7.
Static characteristics …continued
Tvj = 40 C to +150 C; VCC = 4.75 V to 5.25 V; VIO = 2.95 V to 5.25 V[1]; RL = 60 ; CL = 100 pF unless specified otherwise;
All voltages are defined with respect to ground. Positive currents flow into the IC.[2]
Symbol
Parameter
Conditions
IIL
LOW-level input current
VTXD = 0 V
Ci
input capacitance
[4]
Min
Typ
Max
Unit
260
-
30
A
-
5
10
pF
CAN receive data output; pin RXD
IOH
HIGH-level output current
VRXD = VIO[3]  0.4 V
8
3
1
mA
IOL
LOW-level output current
VRXD = 0.4 V; bus dominant
1
-
12
mA
pin CANH; RL = 50  to 65 
2.75
3.5
4.5
V
pin CANL; RL = 50  to 65 
0.5
1.5
2.25
V
400
-
+400
mV
0.9VCC -
1.1VCC
V
Bus lines; pins CANH and CANL
VO(dom)
dominant output voltage
VTXD = 0 V; t < tto(dom)TXD
Vdom(TX)sym
transmitter dominant voltage Vdom(TX)sym = VCC  VCANH  VCANL
symmetry
VTXsym
transmitter voltage
symmetry
VTXsym = VCANH + VCANL;
fTXD = 250 kHz; CSPLIT = 4.7 nF
differential output voltage
VTXD = 0 V; t < tto(dom)TXD;
RL = 50  to 65 
1.5
-
3
V
VTXD = 0 V; t < tto(dom)TXD;
RL = 45  to 70 
1.4
-
3
V
VTXD = 0 V; t < tto(dom)TXD;
RL = 2240 
1.5
-
5
V
VTXD = VIO[3] recessive; no load
50
-
+50
mV
VO(dif)
VIO[3];
no load
[4]
[5]
VO(rec)
recessive output voltage
VTXD =
2
0.5VCC
3
V
Vth(RX)dif
differential receiver
threshold voltage
Normal/Silent mode;
12 V  VCANL  +12 V;
12 V  VCANH  +12 V
0.5
-
0.9
V
Vrec(RX)
receiver recessive voltage
Normal/Silent mode;
12 V  VCANL  +12 V;
12 V  VCANH  +12 V
3
-
0.5
V
Vdom(RX)
receiver dominant voltage
Normal/Silent mode;
12 V  VCANL  +12 V;
12 V v VCANH  +12 V
0.9
-
8.0
V
Vhys(RX)dif
differential receiver
hysteresis voltage
Normal mode;
12 V  VCANL  +12 V;
12 V v VCANH  +12 V
50
-
300
mV
IO(sc)dom
dominant short-circuit output VTXD = 0 V; t < tto(dom)TXD; VCC = 5 V
current
pin CANH; VCANH = 3 V to 18 V
100
70
40
mA
40
70
100
mA
pin CANL; VCANL = 3 V to 40 V
IO(sc)rec
recessive short-circuit output Normal mode; VTXD = VCC
current
VCANH = VCANL = 27 V to +32 V
5
-
+5
mA
IL
leakage current
5
-
+5
A
9
15
28
k
3
-
+3
%
19
30
52
k
Ri
input resistance
Ri
input resistance deviation
Ri(dif)
differential input resistance
TJA1057
Product data sheet
VCC = 0 V or VCC shorted to GND
via 47 k; VCANH = VCANL = 5 V
between VCANH and VCANL
All information provided in this document is subject to legal disclaimers.
Rev. 5 — 28 January 2016
© NXP Semiconductors N.V. 2016. All rights reserved.
9 of 25
TJA1057
NXP Semiconductors
High-speed CAN transceiver
Table 7.
Static characteristics …continued
Tvj = 40 C to +150 C; VCC = 4.75 V to 5.25 V; VIO = 2.95 V to 5.25 V[1]; RL = 60 ; CL = 100 pF unless specified otherwise;
All voltages are defined with respect to ground. Positive currents flow into the IC.[2]
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
-
-
20
pF
Ci(cm)
common-mode input
capacitance
[4]
Ci(dif)
differential input capacitance
[4]
-
-
10
pF
[4]
-
185
-
C
Temperature detection
Tj(sd)
[1]
shutdown junction
temperature
Only TJA1057GT/3 and TJA1057GTK/3 have a VIO pin; the VIO input is internally connected to VCC in the other variants.
[2]
Factory testing uses correlated test conditions to cover the specified temperature and power supply voltage range.
[3]
VIO = VCC in non-VIO product variants TJA1057(G)T(K).
[4]
Not tested in production; guaranteed by design.
[5]
The test circuit used to measure the bus output voltage symmetry (which includes CSPLIT) is shown in Figure 8.
TJA1057
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 5 — 28 January 2016
© NXP Semiconductors N.V. 2016. All rights reserved.
10 of 25
TJA1057
NXP Semiconductors
High-speed CAN transceiver
11. Dynamic characteristics
Table 8.
Dynamic characteristics
Tvj = 40 C to +150 C; VCC = 4.75 V to 5.25 V; VIO = 2.95 V to 5.25 V[1]; RL = 60 ; CL = 100 pF unless specified otherwise.
All voltages are defined with respect to ground.[2]
Symbol
Parameter
Conditions
Min
Typ Max Unit
Transceiver timing; pins CANH, CANL, TXD and RXD; see Figure 7 and Figure 3
td(TXD-busdom)
delay time from TXD to bus dominant
Normal mode
-
65
-
ns
td(TXD-busrec)
delay time from TXD to bus recessive
Normal mode
-
90
-
ns
td(busdom-RXD) delay time from bus dominant to RXD
Normal mode
-
60
-
ns
td(busrec-RXD)
delay time from bus recessive to RXD
Normal mode
-
65
-
ns
td(TXDL-RXDL)
delay time from TXD LOW to RXD LOW
TJA1057T; Normal mode
50
-
230
ns
TJA1057GT(/3), TJA1057GTK(/3);
Normal mode
50
-
210
ns
50
-
230
ns
50
-
210
ns
tbit(TXD) = 500 ns
435
-
530
ns
tbit(TXD) = 200 ns
155
-
210
ns
td(TXDH-RXDH)
delay time from TXD HIGH to RXD HIGH TJA1057T; Normal mode
TJA1057GT(/3), TJA1057GTK(/3);
Normal mode
tbit(bus)
tbit(RXD)
trec
tto(dom)TXD
[1]
transmitted recessive bit width
bit time on pin RXD
TJA1057GT(/3), TJA1057GTK(/3)
TJA1057GT(/3), TJA1057GTK(/3)
receiver timing symmetry
tbit(TXD) = 500 ns
[3]
400
-
550
ns
tbit(TXD) = 200 ns
[3]
120
-
220
ns
tbit(TXD) = 500 ns
65
-
+40
ns
tbit(TXD) = 200 ns
45
-
+15
ns
0.8
3
6.5
ms
TJA1057GT(/3), TJA1057GTK(/3)
TXD dominant time-out time
VTXD = 0 V; Normal mode
Only TJA1057GT/3 and TJA1057GTK/3 have a VIO pin; the VIO input is internally connected to VCC in the other variants.
[2]
Factory testing uses correlated test conditions to cover the specified temperature and power supply voltage range.
[3]
See Figure 4.
TJA1057
Product data sheet
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Rev. 5 — 28 January 2016
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11 of 25
TJA1057
NXP Semiconductors
High-speed CAN transceiver
+,*+
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WG7;'/5;'/
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(1) VIO = VCC in non-VIO product variants TJA1057(G)T(K)
Fig 3.
CAN transceiver timing diagram
7;'
[WELW7;'
WELW7;'
9
92GLI
9
WELWEXV
5;'
WELW5;'
DDD
Fig 4.
TJA1057
Product data sheet
Loop delay symmetry timing diagram (TJA1057GT(K)(/3) only)
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High-speed CAN transceiver
12. Application information
12.1 Application diagram
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Fig 5.
Typical application with a 5 V microcontroller.
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(1) Optional, depends on regulator.
Fig 6.
Typical TJA1057 application with a 3 V microcontroller.
12.2 Application hints
Further information on the application of the TJA1057 can be found in NXP application
hints AH1308 Application Hints - Standalone high speed CAN transceiver Mantis-GT
TJA1044G/TJA1057G.
TJA1057
Product data sheet
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Rev. 5 — 28 January 2016
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13 of 25
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NXP Semiconductors
High-speed CAN transceiver
13. Test information
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(1) The VIO pin is internally connected to pin VCC in the non-VIO product variants TJA1057(G)T(K).
Fig 7.
CAN transceiver timing test circuit
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(1) The VCC pin is used in the non-VIO product variants TJA1057(G)T(K).
Fig 8.
Test circuit for measuring transceiver driver symmetry
13.1 Quality information
This product has been qualified in accordance with the Automotive Electronics Council
(AEC) standard Q100 Rev-G - Failure mechanism based stress test qualification for
integrated circuits, and is suitable for use in automotive applications.
TJA1057
Product data sheet
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Rev. 5 — 28 January 2016
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High-speed CAN transceiver
14. Package outline
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TJA1057
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 5 — 28 January 2016
© NXP Semiconductors N.V. 2016. All rights reserved.
15 of 25
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NXP Semiconductors
High-speed CAN transceiver
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TJA1057
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 5 — 28 January 2016
© NXP Semiconductors N.V. 2016. All rights reserved.
16 of 25
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High-speed CAN transceiver
15. Handling information
All input and output pins are protected against ElectroStatic Discharge (ESD) under
normal handling. When handling ensure that the appropriate precautions are taken as
described in JESD625-A or equivalent standards.
16. Soldering of SMD packages
This text provides a very brief insight into a complex technology. A more in-depth account
of soldering ICs can be found in Application Note AN10365 “Surface mount reflow
soldering description”.
16.1 Introduction to soldering
Soldering is one of the most common methods through which packages are attached to
Printed Circuit Boards (PCBs), to form electrical circuits. The soldered joint provides both
the mechanical and the electrical connection. There is no single soldering method that is
ideal for all IC packages. Wave soldering is often preferred when through-hole and
Surface Mount Devices (SMDs) are mixed on one printed wiring board; however, it is not
suitable for fine pitch SMDs. Reflow soldering is ideal for the small pitches and high
densities that come with increased miniaturization.
16.2 Wave and reflow soldering
Wave soldering is a joining technology in which the joints are made by solder coming from
a standing wave of liquid solder. The wave soldering process is suitable for the following:
• Through-hole components
• Leaded or leadless SMDs, which are glued to the surface of the printed circuit board
Not all SMDs can be wave soldered. Packages with solder balls, and some leadless
packages which have solder lands underneath the body, cannot be wave soldered. Also,
leaded SMDs with leads having a pitch smaller than ~0.6 mm cannot be wave soldered,
due to an increased probability of bridging.
The reflow soldering process involves applying solder paste to a board, followed by
component placement and exposure to a temperature profile. Leaded packages,
packages with solder balls, and leadless packages are all reflow solderable.
Key characteristics in both wave and reflow soldering are:
•
•
•
•
•
•
Board specifications, including the board finish, solder masks and vias
Package footprints, including solder thieves and orientation
The moisture sensitivity level of the packages
Package placement
Inspection and repair
Lead-free soldering versus SnPb soldering
16.3 Wave soldering
Key characteristics in wave soldering are:
TJA1057
Product data sheet
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• Process issues, such as application of adhesive and flux, clinching of leads, board
transport, the solder wave parameters, and the time during which components are
exposed to the wave
• Solder bath specifications, including temperature and impurities
16.4 Reflow soldering
Key characteristics in reflow soldering are:
• Lead-free versus SnPb soldering; note that a lead-free reflow process usually leads to
higher minimum peak temperatures (see Figure 11) than a SnPb process, thus
reducing the process window
• Solder paste printing issues including smearing, release, and adjusting the process
window for a mix of large and small components on one board
• Reflow temperature profile; this profile includes preheat, reflow (in which the board is
heated to the peak temperature) and cooling down. It is imperative that the peak
temperature is high enough for the solder to make reliable solder joints (a solder paste
characteristic). In addition, the peak temperature must be low enough that the
packages and/or boards are not damaged. The peak temperature of the package
depends on package thickness and volume and is classified in accordance with
Table 9 and 10
Table 9.
SnPb eutectic process (from J-STD-020D)
Package thickness (mm)
Package reflow temperature (C)
Volume (mm3)
 350
< 350
< 2.5
235
220
 2.5
220
220
Table 10.
Lead-free process (from J-STD-020D)
Package thickness (mm)
Package reflow temperature (C)
Volume (mm3)
< 350
350 to 2000
> 2000
< 1.6
260
260
260
1.6 to 2.5
260
250
245
> 2.5
250
245
245
Moisture sensitivity precautions, as indicated on the packing, must be respected at all
times.
Studies have shown that small packages reach higher temperatures during reflow
soldering, see Figure 11.
TJA1057
Product data sheet
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Rev. 5 — 28 January 2016
© NXP Semiconductors N.V. 2016. All rights reserved.
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High-speed CAN transceiver
temperature
maximum peak temperature
= MSL limit, damage level
minimum peak temperature
= minimum soldering temperature
peak
temperature
time
001aac844
MSL: Moisture Sensitivity Level
Fig 11. Temperature profiles for large and small components
For further information on temperature profiles, refer to Application Note AN10365
“Surface mount reflow soldering description”.
TJA1057
Product data sheet
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Rev. 5 — 28 January 2016
© NXP Semiconductors N.V. 2016. All rights reserved.
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17. Appendix: ISO 11898-2:201x parameter cross-reference list
Table 11.
ISO 11898-2:201x to NXP data sheet parameter conversion
ISO 11898-2:201x
NXP data sheet
Parameter
Notation
Symbol
Parameter
Single ended voltage on CAN_H
VCAN_H
VO(dom)
dominant output voltage
Single ended voltage on CAN_L
VCAN_L
Differential voltage on normal bus load
VDiff
VO(dif)
differential output voltage
VSYM
VTXsym
transmitter voltage symmetry
Absolute current on CAN_H
ICAN_H
IO(sc)dom
Absolute current on CAN_L
ICAN_L
dominant short-circuit output
current
HS-PMA dominant output characteristics
Differential voltage on effective resistance during arbitration
Optional: Differential voltage on extended bus load range
HS-PMA driver symmetry
Driver symmetry
Maximum HS-PMA driver output current
HS-PMA recessive output characteristics, bus biasing active/inactive
VO(rec)
recessive output voltage
VDiff
VO(dif)
differential output voltage
tdom
tto(dom)TXD
TXD dominant time-out time
Single ended output voltage on CAN_H
VCAN_H
Single ended output voltage on CAN_L
VCAN_L
Differential output voltage
Optional HS-PMA transmit dominant timeout
Transmit dominant timeout, long
Transmit dominant timeout, short
HS-PMA static receiver input characteristics, bus biasing active/inactive
Recessive state differential input voltage range
VDiff
Vth(RX)dif
differential receiver threshold
voltage
Vrec(RX)
receiver recessive voltage
Vdom(RX)
receiver dominant voltage
Dominant state differential input voltage range
HS-PMA receiver input resistance (matching)
Differential internal resistance
RDiff
Ri(dif)
differential input resistance
Single ended internal resistance
RCAN_H
RCAN_L
Ri
input resistance
Matching of internal resistance
MR
Ri
input resistance deviation
tLoop
td(TXDH-RXDH)
delay time from TXD HIGH to
RXD HIGH
td(TXDL-RXDL)
delay time from TXD LOW to RXD
LOW
HS-PMA implementation loop delay requirement
Loop delay
Optional HS-PMA implementation data signal timing requirements for use with bit rates above 1 Mbit/s up to
2 Mbit/s and above 2 Mbit/s up to 5 Mbit/s
Transmitted recessive bit width @ 2 Mbit/s / @ 5 Mbit/s,
intended
tBit(Bus)
tbit(bus)
transmitted recessive bit width
Received recessive bit width @ 2 Mbit/s / @ 5 Mbit/s
tBit(RXD)
tbit(RXD)
bit time on pin RXD
Receiver timing symmetry @ 2 Mbit/s / @ 5 Mbit/s
tRec
trec
receiver timing symmetry
TJA1057
Product data sheet
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High-speed CAN transceiver
Table 11.
ISO 11898-2:201x to NXP data sheet parameter conversion
ISO 11898-2:201x
NXP data sheet
Parameter
Notation
Symbol
Parameter
VDiff
V(CANH-CANL)
voltage between pin CANH and
pin CANL
Vx
voltage on pin x
HS-PMA maximum ratings of VCAN_H, VCAN_L and VDiff
Maximum rating VDiff
General maximum rating VCAN_H and VCAN_L
VCAN_H
Optional: Extended maximum rating VCAN_H and VCAN_L VCAN_L
HS-PMA maximum leakage currents on CAN_H and CAN_L, unpowered
Leakage current on CAN_H, CAN_L
ICAN_H
ICAN_L
IL
leakage current
tFilter
twake(busdom)[1] bus dominant wake-up time
HS-PMA bus biasing control timings
CAN activity filter time, long
twake(busrec)[1]
bus recessive wake-up time
tWake
tto(wake)bus
bus wake-up time-out time
Timeout for bus inactivity
tSilence
tto(silence)
bus silence time-out time
Bus Bias reaction time
tBias
td(busact-bias)
delay time from bus active to bias
CAN activity filter time, short
Wake-up timeout, short
Wake-up timeout, long
[1]
tfltr(wake)bus - bus wake-up filter time, in devices with basic wake-up functionality
TJA1057
Product data sheet
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Rev. 5 — 28 January 2016
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High-speed CAN transceiver
18. Revision history
Table 12.
Revision history
Document ID
Release date
Data sheet status
Change notice
Supersedes
TJA1057 v.5
20160128
Product data sheet
-
TJA1057 v.4
•
Modifications:
TJA1057GT/3 and TJA1057GTK/3 variants added:
– Section 1: 3rd paragraph added
– Section 2.1: feature added
– Section 2.3: feature amended to include VIO
– Section 2.4: heading amended to include TJA1057GT/3 and TJA1057GTK/3; text of 1st feature
amended
– Table 1, Table 7: parameters VIO, Vuvd(VIO) and IIO added
– Table 2: ordering information updated
– Figure 1, Figure 2, Figure 3 and Table 3 amended; Figure 6 added
– Section 7.2.2 and Section 7.2.3: text amended
– Section 7.2.5 added
– Table 5, Table 7, Table 8: measurement conditions revised to include new variants
•
ISO 11898-2:201x compliance:
– Section 1: text amended (4th paragraph)
– Table 5: parameter V(CANH-CANL) added
– Table 7:
- measurement conditions changed for parameters VO(dom), Vth(RX)dif (associated table note
removed), Vhys(RX)dif, IO(sc)dom and IL
- parameters VTXsym (and associated table note), Vrec(RX) and Vdom(RX) added
- additional measurement included for parameter VO(dif) (RL = 2240  )
– Table 8: parameters tbit(bus) and trec added
– Figure 4 amended and Figure 8 added
– Section 17 added
•
•
•
•
•
•
Table 3, Table note 1revised
Table 4 revised (RXD in Silent mode)
Section 7.2.4: text amended
Table 5, Table note 1 added
Table 7: parameters IO(dom) and IO(rec) renamed as IO(sc)dom and IO(sc)rec
Specification status changed to Product data sheet
TJA1057 v.4
20150710
Product data sheet
-
TJA1057 v.3
TJA1057 v.3
20141119
Product data sheet
-
TJA1057 v.2
TJA1057 v.2
20131030
Product data sheet
-
TJA1057 v.1
TJA1057 v.1
20130530
Preliminary data sheet
-
-
TJA1057
Product data sheet
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Rev. 5 — 28 January 2016
© NXP Semiconductors N.V. 2016. All rights reserved.
22 of 25
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NXP Semiconductors
High-speed CAN transceiver
19. Legal information
19.1 Data sheet status
Document status[1][2]
Product status[3]
Definition
Objective [short] data sheet
Development
This document contains data from the objective specification for product development.
Preliminary [short] data sheet
Qualification
This document contains data from the preliminary specification.
Product [short] data sheet
Production
This document contains the product specification.
[1]
Please consult the most recently issued document before initiating or completing a design.
[2]
The term ‘short data sheet’ is explained in section “Definitions”.
[3]
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.nxp.com.
19.2 Definitions
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences of
use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is intended
for quick reference only and should not be relied upon to contain detailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semiconductors sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
Product specification — The information and data provided in a Product
data sheet shall define the specification of the product as agreed between
NXP Semiconductors and its customer, unless NXP Semiconductors and
customer have explicitly agreed otherwise in writing. In no event however,
shall an agreement be valid in which the NXP Semiconductors product is
deemed to offer functions and qualities beyond those described in the
Product data sheet.
19.3 Disclaimers
Limited warranty and liability — Information in this document is believed to
be accurate and reliable. However, NXP Semiconductors does not give any
representations or warranties, expressed or implied, as to the accuracy or
completeness of such information and shall have no liability for the
consequences of use of such information. NXP Semiconductors takes no
responsibility for the content in this document if provided by an information
source outside of NXP Semiconductors.
In no event shall NXP Semiconductors be liable for any indirect, incidental,
punitive, special or consequential damages (including - without limitation - lost
profits, lost savings, business interruption, costs related to the removal or
replacement of any products or rework charges) whether or not such
damages are based on tort (including negligence), warranty, breach of
contract or any other legal theory.
Notwithstanding any damages that customer might incur for any reason
whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards
customer for the products described herein shall be limited in accordance
with the Terms and conditions of commercial sale of NXP Semiconductors.
Right to make changes — NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
TJA1057
Product data sheet
Suitability for use in automotive applications — This NXP
Semiconductors product has been qualified for use in automotive
applications. Unless otherwise agreed in writing, the product is not designed,
authorized or warranted to be suitable for use in life support, life-critical or
safety-critical systems or equipment, nor in applications where failure or
malfunction of an NXP Semiconductors product can reasonably be expected
to result in personal injury, death or severe property or environmental
damage. NXP Semiconductors and its suppliers accept no liability for
inclusion and/or use of NXP Semiconductors products in such equipment or
applications and therefore such inclusion and/or use is at the customer's own
risk.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
Customers are responsible for the design and operation of their applications
and products using NXP Semiconductors products, and NXP Semiconductors
accepts no liability for any assistance with applications or customer product
design. It is customer’s sole responsibility to determine whether the NXP
Semiconductors product is suitable and fit for the customer’s applications and
products planned, as well as for the planned application and use of
customer’s third party customer(s). Customers should provide appropriate
design and operating safeguards to minimize the risks associated with their
applications and products.
NXP Semiconductors does not accept any liability related to any default,
damage, costs or problem which is based on any weakness or default in the
customer’s applications or products, or the application or use by customer’s
third party customer(s). Customer is responsible for doing all necessary
testing for the customer’s applications and products using NXP
Semiconductors products in order to avoid a default of the applications and
the products or of the application or use by customer’s third party
customer(s). NXP does not accept any liability in this respect.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
damage to the device. Limiting values are stress ratings only and (proper)
operation of the device at these or any other conditions above those given in
the Recommended operating conditions section (if present) or the
Characteristics sections of this document is not warranted. Constant or
repeated exposure to limiting values will permanently and irreversibly affect
the quality and reliability of the device.
Terms and conditions of commercial sale — NXP Semiconductors
products are sold subject to the general terms and conditions of commercial
sale, as published at http://www.nxp.com/profile/terms, unless otherwise
agreed in a valid written individual agreement. In case an individual
agreement is concluded only the terms and conditions of the respective
agreement shall apply. NXP Semiconductors hereby expressly objects to
applying the customer’s general terms and conditions with regard to the
purchase of NXP Semiconductors products by customer.
All information provided in this document is subject to legal disclaimers.
Rev. 5 — 28 January 2016
© NXP Semiconductors N.V. 2016. All rights reserved.
23 of 25
TJA1057
NXP Semiconductors
High-speed CAN transceiver
No offer to sell or license — Nothing in this document may be interpreted or
construed as an offer to sell products that is open for acceptance or the grant,
conveyance or implication of any license under any copyrights, patents or
other industrial or intellectual property rights.
Translations — A non-English (translated) version of a document is for
reference only. The English version shall prevail in case of any discrepancy
between the translated and English versions.
Export control — This document as well as the item(s) described herein
may be subject to export control regulations. Export might require a prior
authorization from competent authorities.
19.4 Trademarks
Quick reference data — The Quick reference data is an extract of the
product data given in the Limiting values and Characteristics sections of this
document, and as such is not complete, exhaustive or legally binding.
Notice: All referenced brands, product names, service names and trademarks
are the property of their respective owners.
Mantis — is a trademark of NXP B.V.
20. Contact information
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
TJA1057
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 5 — 28 January 2016
© NXP Semiconductors N.V. 2016. All rights reserved.
24 of 25
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NXP Semiconductors
High-speed CAN transceiver
21. Contents
1
2
2.1
2.2
2.3
2.4
3
4
5
6
6.1
6.2
7
7.1
7.1.1
7.1.2
7.2
7.2.1
7.2.2
7.2.3
7.2.4
7.2.5
8
9
10
11
12
12.1
12.2
13
13.1
14
15
16
16.1
16.2
16.3
16.4
17
18
19
19.1
General description . . . . . . . . . . . . . . . . . . . . . . 1
Features and benefits . . . . . . . . . . . . . . . . . . . . 1
General . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Predictable and fail-safe behavior . . . . . . . . . . 2
Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
TJA1057GT(/3)/TJA1057GTK(/3). . . . . . . . . . . 2
Quick reference data . . . . . . . . . . . . . . . . . . . . . 2
Ordering information . . . . . . . . . . . . . . . . . . . . . 3
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Pinning information . . . . . . . . . . . . . . . . . . . . . . 4
Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4
Functional description . . . . . . . . . . . . . . . . . . . 5
Operating modes . . . . . . . . . . . . . . . . . . . . . . . 5
Normal mode . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Silent mode. . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Fail-safe features . . . . . . . . . . . . . . . . . . . . . . . 5
TXD dominant time-out function . . . . . . . . . . . . 5
Internal biasing of TXD and S input pins . . . . . 5
Undervoltage detection on pins VCC and VIO
(TJA1057GT(K)/3) . . . . . . . . . . . . . . . . . . . . . . 6
Overtemperature protection . . . . . . . . . . . . . . . 6
VIO supply pin (TJA1057GT(K)/3 variants only) 6
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 7
Thermal characteristics . . . . . . . . . . . . . . . . . . 8
Static characteristics. . . . . . . . . . . . . . . . . . . . . 8
Dynamic characteristics . . . . . . . . . . . . . . . . . 11
Application information. . . . . . . . . . . . . . . . . . 13
Application diagram . . . . . . . . . . . . . . . . . . . . 13
Application hints . . . . . . . . . . . . . . . . . . . . . . . 13
Test information . . . . . . . . . . . . . . . . . . . . . . . . 14
Quality information . . . . . . . . . . . . . . . . . . . . . 14
Package outline . . . . . . . . . . . . . . . . . . . . . . . . 15
Handling information. . . . . . . . . . . . . . . . . . . . 17
Soldering of SMD packages . . . . . . . . . . . . . . 17
Introduction to soldering . . . . . . . . . . . . . . . . . 17
Wave and reflow soldering . . . . . . . . . . . . . . . 17
Wave soldering . . . . . . . . . . . . . . . . . . . . . . . . 17
Reflow soldering . . . . . . . . . . . . . . . . . . . . . . . 18
Appendix: ISO 11898-2:201x parameter
cross-reference list . . . . . . . . . . . . . . . . . . . . . 20
Revision history . . . . . . . . . . . . . . . . . . . . . . . . 22
Legal information. . . . . . . . . . . . . . . . . . . . . . . 23
Data sheet status . . . . . . . . . . . . . . . . . . . . . . 23
19.2
19.3
19.4
20
21
Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . .
Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . .
Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . .
Contact information . . . . . . . . . . . . . . . . . . . .
Contents. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
23
23
24
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25
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
© NXP Semiconductors N.V. 2016.
All rights reserved.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
Date of release: 28 January 2016
Document identifier: TJA1057