Data Sheet

UJA1162
Self-supplied high-speed CAN transceiver with Sleep mode
Rev. 2 — 17 April 2014
Product data sheet
1. General description
The UJA1162 is a ‘self-supplied’ high-speed CAN transceiver integrating an
ISO 11898-2/5 compliant HS-CAN transceiver and an internal 5 V CAN supply. The only
supply input is a battery connection. The UJA1162 can be operated in a very low-current
Sleep mode with local and bus wake-up capability.
The UJA1162 implements the standard CAN physical layer as defined in the current
ISO11898 standard (-2 and -5). Pending the release of the updated version of ISO11898
including CAN FD, additional timing parameters defining loop delay symmetry are
included. This implementation enables reliable communication in the CAN FD fast phase
at data rates up to 2 Mbit/s.
2. Features and benefits
2.1 General
 Self-supplied high-speed CAN transceiver
 Loop delay symmetry timing enables reliable communication at data rates up to
2 Mbit/s in the CAN FD fast phase
 ISO 11898-2 and ISO 11898-5 compliant
 Autonomous bus biasing according to ISO 11898-6
 Fully integrated 5 V supply (VBUF) for the CAN transmitter/receiver
 VIO input allows for direct interfacing with 3.3 V to 5 V microcontrollers
 Bus connections are truly floating when power to pin BAT is off
2.2 Designed for automotive applications
 8 kV ElectroStatic Discharge (ESD) protection, according to the Human Body Model
(HBM) on the CAN bus pins
 6 kV ESD protection, according to IEC 61000-4-2 on the CAN bus pins and on pins
BAT and WAKE
 CAN bus pins short-circuit proof to 58 V
 Battery and CAN bus pins are protected against automotive transients according to
ISO 7637-3
 Very low quiescent current in Sleep mode
 Leadless HVSON14 package (3 mm  4.5 mm) with improved Automated Optical
Inspection (AOI) capability
 Dark green product (halogen free and Restriction of Hazardous Substances (RoHS)
compliant)
UJA1162
NXP Semiconductors
Self-supplied high-speed CAN transceiver with Sleep mode
2.3 Integrated supply voltage for the CAN transceiver (VBUF)




5 V nominal output; 2 % accuracy
Undervoltage detection at 90 % of nominal value
Excellent response with a 4.7 F ceramic output load capacitor
Turned off in Sleep mode
2.4 Power Management




Sleep mode featuring very low supply current
Remote wake-up capability via standard CAN wake-up pattern
Local wake-up capability via the WAKE pin
Entire node can be powered down via the inhibit output, INH
2.5 System control and diagnostic features
 Mode control via SLPN pin
 Overtemperature shutdown
 Transmit data (TXD) dominant time-out function
3. Ordering information
Table 1.
Ordering information
Type number
UJA1162TK
UJA1162
Product data sheet
Package
Name
Description
Version
HVSON14
plastic thermal enhanced very thin small outline package; no leads;
14 terminals; body 3  4.5  0.85 mm
SOT1086-2
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Rev. 2 — 17 April 2014
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UJA1162
NXP Semiconductors
Self-supplied high-speed CAN transceiver with Sleep mode
4. Block diagram
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UJA1162
Product data sheet
DDD
Block diagram of UJA1162
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Rev. 2 — 17 April 2014
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UJA1162
NXP Semiconductors
Self-supplied high-speed CAN transceiver with Sleep mode
5. Pinning information
5.1 Pinning
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Fig 2.
Pin configuration diagram
5.2 Pin description
Table 2.
Pin
Description
TXD
1
transmit data input
GND
2[1]
ground
BUF
3
5 V transceiver supply voltage
RXD
4
receive data output; reads out data from the bus lines
VIO
5
supply voltage for I/O level adaptor
CTS
6
CAN transceiver status output
INH
7
inhibit output for switching external voltage regulators
i.c.
8
internally connected; should be left floating or connected to GND
WAKE
9
local wake-up input
BAT
10
battery supply voltage
i.c.
11
internally connected; should be left floating or connected to GND
CANL
12
LOW-level CAN bus line
CANH
13
HIGH-level CAN bus line
SLPN
14
Sleep mode control input (active LOW)
[1]
UJA1162
Product data sheet
Pin description
Symbol
The exposed die pad at the bottom of the package allows for better heat dissipation and grounding from the
transceiver via the printed circuit board. For enhanced thermal and electrical performance, it is
recommended to solder the exposed die pad to GND.
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Rev. 2 — 17 April 2014
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UJA1162
NXP Semiconductors
Self-supplied high-speed CAN transceiver with Sleep mode
6. Functional description
The UJA1162 is a self-supplied high-speed CAN transceiver incorporating a 5 V CAN
supply. A variety of fail-safe and diagnostic features offer enhanced system reliability and
advanced power management.
6.1 System controller
The system controller is a state machine that manages register configuration and controls
the internal functions of the UJA1162. UJA1162 operating modes and state transitions are
illustrated in Figure 3. These modes are discussed in more detail in the following sections.
6.1.1 Operating modes
The UJA1162 supports five operating modes: Normal, Standby, Sleep, Overtemp and Off.
6.1.1.1
Normal mode
Normal mode is the active operating mode. In this mode, the UJA1162 is fully operational.
Normal mode can be selected from Standby and Sleep (via Standby) modes by setting pin
SLPN HIGH, provided VIO > Vuvd(VIO). The UJA1162 exits Normal mode:
• if the microcontroller selects Standby mode by setting pin SLPN LOW
• if the UJA1162 detects an undervoltage on VIO, causing the UJA1162 to switch to
Standby mode
• if the chip temperature rises above Tth(act)otp, causing the UJA1162 to switch to
Overtemp mode
• if the battery supply voltage drops below Vth(det)poff, causing the UJA1162 to switch to
Off mode
All pending wake-up events (power-on, CAN bus wake-up, local wake-up via the WAKE
pin) are cleared when the UJA1162 enters Normal mode.
UJA1162
Product data sheet
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Rev. 2 — 17 April 2014
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UJA1162
NXP Semiconductors
Self-supplied high-speed CAN transceiver with Sleep mode
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(1) SLPN = HIGH is only possible in Sleep mode if a valid VIO supply voltage is connected
Fig 3.
UJA1162 system controller state diagram
6.1.1.2
Standby mode
Standby mode is a transitional mode between Normal and Sleep modes. The transceiver
is unable to transmit or receive data in Standby mode, but pin INH is active.
The receiver monitors bus activity for a wake-up request in Standby mode. The bus pins
are biased at GND level (via Ri(cm)) when the bus is inactive for t > tto(silence) and at
approximately 2.5 V when there is activity on the bus (autonomous biasing). Wake-up can
be triggered remotely via a standard wake-up pattern on the CAN bus (see Section 6.3.2)
or locally via the WAKE pin. Pin RXD is forced LOW when a bus or local wake-up event is
detected.
The UJA1162 switches to Standby mode:
• from Normal mode if pin SLPN goes LOW or and undervoltage is detected on VIO
• from Sleep mode in the event of a local or remote wake-up event or if SLPN = HIGH
(with a valid voltage on VIO)
UJA1162
Product data sheet
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Rev. 2 — 17 April 2014
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UJA1162
NXP Semiconductors
Self-supplied high-speed CAN transceiver with Sleep mode
6.1.1.3
Sleep mode
Sleep mode is the UJA1162’s power saving mode. In Sleep mode, the transceiver
behaves like in Standby Mode with the exception that pin INH is set floating. Voltage
regulators controlled by this pin will be switched off, and the current into pin BAT will be
reduced to a minimum.
A HIGH level on SLPN (provided a valid voltage is present on VIO), a local wake-up via
the WAKE pin or a remote CAN bus wake-up will cause the UJA1162 to wake up from
Sleep mode and switch to Standby mode. Pin RXD is forced LOW when a local wake-up
via WAKE or a remote bus wake-up is detected.
The UJA1162 can be set to Sleep mode by holding pin SLPN LOW for t > tsleep (provided
there are no wake-up events pending). If one or more wake-up events is pending, the
UJA1162 will remain in Standby mode. The UJA1162 must be switched to Normal mode to
clear pending wake-up events.
The UJA1162 will also be forced to Sleep mode if an undervoltage lasting longer than
td(uvd-slp) is detected on VIO (VIO < Vuvd(VIO)). In this event, all pending wake-up events will
be cleared automatically.
6.1.1.4
Off mode
The UJA1162 switches to Off mode from any mode when VBAT < Vth(det)poff. Only power-on
detection is enabled; all other modules are inactive. The UJA1162 starts to boot up when
the battery voltage rises above the power-on detection threshold Vth(det)pon (triggering an
initialization process) and switches to Standby mode after tstartup. Pin RXD is driven LOW
when the UJA1162 switches from Off mode to Standby mode, to indicate a power-on
event has occurred.
In Off mode, the CAN pins disengage from the bus (zero load; high-ohmic).
6.1.1.5
Overtemp mode
Overtemp mode is provided to prevent the UJA1162 being damaged by excessive
temperatures. The UJA1162 switches immediately to Overtemp mode from Normal mode
when the global chip temperature rises above the overtemperature protection activation
threshold, Tth(act)otp.
In Overtemp mode, the CAN transmitter and receiver are disabled and the CAN pins are
in a high-ohmic state. No wake-up event will be detected, but a pending wake-up will still
be signalled by a LOW level on pin RXD, which will persist after the overtemperature
event has been cleared. VBUF is off in Overtemp mode.
The UJA1162 exits Overtemp mode:
• and switches to Standby mode if the chip temperature falls below the overtemperature
protection release threshold, Tth(rel)otp
• if the device is forced to switch to Off mode (VBAT < Vth(det)poff)
UJA1162
Product data sheet
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Rev. 2 — 17 April 2014
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UJA1162
NXP Semiconductors
Self-supplied high-speed CAN transceiver with Sleep mode
6.1.1.6
Hardware characterization for the UJA1162 operating modes
Table 3.
Hardware characterization by functional block
Block
Operating mode
Off
Standby
Normal
Overtemp
Sleep
VBUF
off
on/off[1]
on
off
off
CAN
off
Offline
Active
off
Offline
RXD
VIO level
VIO level/LOW if
wake-up detected
CAN bit stream
VIO level/LOW if
wake-up detected
VIO level/LOW if
wake-up detected
INH
off
VBAT level
VBAT level
VBAT level
off
[1]
VBUF is switched on in Standby mode if a CAN wake-up pattern is detected on the bus; if pin SLPN does not go HIGH within tto(silence),
VBUF is switched off again. VBUF is also switched on in Standby mode if SLPN goes HIGH to select Normal mode.
6.1.2 Mode control via pin SLPN
The UJA1162 can be switched between Normal and Standby/Sleep modes via the SLPN
control input (see Figure 3). When SLPN goes LOW, the UJA1162 switches to Standby
mode. If SLPN remains low for tsleep, the UJA1162 then switches to Sleep mode (if no
wake-up is pending). When SLPN goes HIGH, the UJA1162 switches to Normal mode.
6.2 Power supplies
6.2.1 Battery supply voltage (VBAT)
The internal circuitry is supplied from the battery via pin BAT. The device needs to be
protected against negative supply voltages, e.g. by using an external series diode. If VBAT
falls below the power-off detection threshold, Vth(det)poff, the UJA1162 switches to Off
mode, which means that the internal 5 V CAN supply and other internal logic (except for
power-on detection) are shut down.
The UJA1162 switches from Off mode to Standby mode tstartup after the battery voltage
rises above the power-on detection threshold, Vth(det)pon. A power-on event is indicated by
a LOW level on pin RXD. RXD remains LOW from the moment UJA1162 exits Off mode
until it switches to Normal mode.
6.2.2 CAN supply voltage (VBUF)
VBUF provides the internal CAN transceiver with a 5 V supply. The output voltage on BUF
is monitored. If VBUF falls below the 90 % undervoltage threshold (90 % of the nominal
VBUF output voltage), the CAN transceiver switches to (or remains in) Offline mode.
6.3 High-speed CAN transceiver
The integrated high-speed CAN transceiver is designed for active communication at bit
rates up to 1 Mbit/s, providing differential transmit and receive capability to a CAN protocol
controller. The transceiver is ISO 11898-2 and ISO 11898-5 compliant. The CAN
transmitter is supplied from VBUF. The UJA1162 includes additional timing parameters on
loop delay symmetry to ensure reliable communication in fast phase at data rates up to
2 Mbit/s, as used in CAN FD networks.
The CAN transceiver supports autonomous CAN biasing as defined in ISO 11898-6,
which helps to minimize RF emissions. CANH and CANL are always biased to 2.5 V when
the UJA1162 is in Normal mode with VBUF > 90 % threshold. Autonomous biasing is active
UJA1162
Product data sheet
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Rev. 2 — 17 April 2014
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UJA1162
NXP Semiconductors
Self-supplied high-speed CAN transceiver with Sleep mode
when the UJA1162 is in Standby or Sleep mode with the CAN transceiver in CAN Offline
mode - to 2.5 V if there is activity on the bus (CAN Offline Bias mode) and to GND if there
is no activity on the bus for t > tto(silence) (CAN Offline mode). This is useful when the node
is disabled due to a malfunction in the microcontroller. The transceiver ensures that the
CAN bus is correctly biased to avoid disturbing ongoing communication between other
nodes. The autonomous CAN bias voltage is derived directly from VBAT.
6.3.1 CAN operating modes
The integrated CAN transceiver supports three operating modes: Active, Offline and
Offline Bias (see Figure 5). The CAN transceiver operating mode depends on the
UJA1162 operating mode and the output voltage on pin BUF.
6.3.1.1
CAN Active mode
In CAN Active mode, the transceiver can transmit and receive data via CANH and CANL.
The differential receiver converts the analog data on the bus lines into digital data, which
is output on pin RXD. The transmitter converts digital data generated by the CAN
controller (input on pin TXD) into analog signals suitable for transmission over the CANH
and CANL bus lines.
The CAN transceiver is in Active mode when:
• the UJA1162 is in Normal mode (SLPN = 1) AND
• VBUF > Vuvd(BUF) AND
• VIO > Vuvd(VIO)
In CAN Active mode, the CAN bias voltage is derived from VBUF. If VBUF falls below
Vuvd(BUF), the UJA1162 exits CAN Active mode and enters CAN Offline Bias mode with
autonomous CAN voltage biasing via pin BAT.
If pin TXD is LOW when the transceiver switches to CAN Active mode (UJA1162 in
Normal mode; VBUF and VIO ok), the transmitter and receiver will remain disabled until
TXD goes HIGH. This prevents network traffic being blocked for tto(dom)TXD (i.e. while the
TXD dominant time-out timer is running; see Section 6.7.1) every time the transceiver
enters Active mode, if the TXD pin is clamped permanently LOW.
6.3.1.2
CAN Offline and Offline Bias modes
In CAN Offline mode, the transceiver monitors the CAN bus for a wake-up event. CANH
and CANL are biased to GND.
CAN Offline Bias mode is the same as CAN Offline mode, with the exception that the CAN
bus is biased to 2.5 V. This mode is activated automatically when activity is detected on
the CAN bus while the transceiver is in CAN Offline mode. The transceiver will return to
CAN Offline mode if the CAN bus is silent (no CAN bus edges) for longer than tto(silence).
The CAN transceiver switches to CAN Offline mode from CAN Active mode when:
• the UJA1162 switches to Standby or Sleep mode
provided the CAN-bus has been inactive for at least tto(silence). If the CAN-bus has been
inactive for less than tto(silence), the CAN transceiver switches first to CAN Offline Bias
mode and then to CAN Offline mode once the bus has been silent for tto(silence).
The CAN transceiver switches to CAN Offline Bias mode from CAN Active mode if:
UJA1162
Product data sheet
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Rev. 2 — 17 April 2014
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UJA1162
NXP Semiconductors
Self-supplied high-speed CAN transceiver with Sleep mode
• VBUF < Vuvd(BUF) OR VIO < Vuvd(VIO)
The CAN transceiver switches to CAN Offline mode:
• from CAN Offline Bias mode when the UJA1162 is in Standby or Sleep mode and no
activity has been detected on the bus (no CAN edges) for t > tto(silence) OR
• when the UJA1162 switches from Off or Overtemp mode to Standby mode
The CAN transceiver switches from CAN Offline mode to CAN Offline Bias mode if:
• a standard wake-up pattern (according to ISO11898-5) is detected on the CAN bus
OR
• the UJA1162 switches to Normal mode while VBUF < Vuvd(BUF) OR VIO < Vuvd(VIO)
6.3.1.3
CAN Off mode
The CAN transceiver is switched off completely with the bus lines floating when:
• the UJA1162 switches to Off or Overtemp mode OR
• VBAT falls below the CAN receiver undervoltage detection threshold, Vuvd(CAN)
It will be switched on again on entering CAN Offline mode when VBAT rises above the
undervoltage recovery threshold (Vuvr(CAN)) and the UJA1162 is no longer in Off/Overtemp
mode. CAN Off mode prevents reverse currents flowing from the bus when the battery
supply to the UJA1162 is lost.
6.3.2 CAN standard wake-up
The UJA1162 monitors the bus for a wake-up pattern when the CAN transceiver is in
Offline mode.
A filter at the receiver input prevents unwanted wake-up events occurring due to
automotive transients or EMI. A dominant-recessive-dominant wake-up pattern must be
transmitted on the CAN bus within the wake-up timeout time (tto(wake)) to pass the wake-up
filter and trigger a wake-up event (see Figure 4; note that additional pulses may occur
between the recessive/dominant phases). The recessive and dominant phases must last
at least twake(busrec) and twake(busdom), respectively.
Pin RXD is driven LOW when a valid CAN wake-up pattern is detected on the bus.
dominant
tdom ≥ twake(busdom)
recessive
dominant
trec ≥ twake(busrec)
tdom ≥ twake(busdom)
twake < tto(wake)
CAN wake-up
015aaa267
Fig 4.
CAN wake-up timing
UJA1162
Product data sheet
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Rev. 2 — 17 April 2014
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10 of 29
UJA1162
NXP Semiconductors
Self-supplied high-speed CAN transceiver with Sleep mode
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Fig 5.
CAN transceiver state machine
6.4 WAKE pin
In Standby and Sleep modes, a local wake-up event is triggered by a LOW-to-HIGH or a
HIGH-to-LOW transition on the WAKE pin. In applications that don’t make use of the local
wake-up facility, the WAKE pin should be connected to GND for optimal EMI performance.
Pin RXD is driven LOW when a valid edge is detected on pin WAKE.
6.5 VIO supply pin
Pin VIO should be connected to the microcontroller supply voltage. This will cause the
signal levels on TXD, RXD, SLPN and CTS to be adjusted to the I/O levels of the
microcontroller, enabling direct interfacing without the need for glue logic.
UJA1162
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Rev. 2 — 17 April 2014
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UJA1162
NXP Semiconductors
Self-supplied high-speed CAN transceiver with Sleep mode
6.6 CAN transceiver status pin (CTS)
Pin CTS is driven HIGH to indicate to microcontroller that the transceiver is fully enabled
and data can be transmitted and received via the TXD/RXD pins.
Pin CTS is actively driven LOW:
• while the transceiver is starting up (e.g. during a transition from Standby to Normal
mode) or
• if pin TXD is clamped LOW for t > tto(dom)TXD or
• if an undervoltage is detected on VIO or BUF
6.7 CAN fail-safe features
6.7.1 TXD dominant timeout
A TXD dominant time-out timer is started when pin TXD is forced LOW while the
transceiver is in CAN Active Mode. If the LOW state on pin TXD persists for longer than
the TXD dominant time-out time (tto(dom)TXD), the transmitter is disabled, releasing the bus
lines to recessive state. This function prevents a hardware and/or software application
failure from driving the bus lines to a permanent dominant state (blocking all network
traffic). The TXD dominant time-out timer is reset when pin TXD goes HIGH. The TXD
dominant time-out time also defines the minimum possible bit rate of 15 kbit/s.
6.7.2 Pull-up on TXD pin
Pin TXD has an internal pull-up (towards VIO) to ensure a safe defined recessive driver
state in case the pin is left floating.
6.7.3 Pull-down on SLPN pin
Pin SLPN has an internal pull-down (to GND) to ensure the UJA1162 switches to Sleep
mode if SLPN is left floating.
6.7.4 Loss of power at pin BAT
A loss of power at pin BAT has no impact on the bus lines or on the microcontroller. No
reverse currents flow from the bus.
UJA1162
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Rev. 2 — 17 April 2014
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UJA1162
NXP Semiconductors
Self-supplied high-speed CAN transceiver with Sleep mode
7. Limiting values
Table 4.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
Parameter
Conditions
Vx
voltage on pin x
DC value
V(CANH-CANL)
voltage between pin CANH
and pin CANL
Vtrt
transient voltage
Min
Max
pins BUF[1], VIO
0.2
+6
V
pins TXD, RXD, SLPN, CTS
0.2
VIO + 0.2
V
pins WAKE, INH
18
+40
V
pin BAT
0.2
+40
V
pins CANH and CANL with respect to any
other pin
58
+58
V
40
+40
V
150
+100
V
6
+6
kV
8
+8
kV
4
+4
kV
2
+2
kV
100
+100
V
750
+750
V
500
+500
V
on pins
[2]
Unit
BAT: via reverse polarity diode and capacitor
to ground
CANL, CANH, WAKE: coupling via 1 nF
capacitors
VESD
electrostatic discharge
voltage
IEC 61000-4-2
[3]
on pins CANH and CANL; pin BAT with
capacitor; pin WAKE with 10 nF capacitor
and 10 k resistor
[4]
HBM
on pins CANH, CANL
[5]
on pins BAT, WAKE
on any other pin
[6]
MM
on any pin
[7]
CDM
on corner pins
on any other pin
Tvj
virtual junction temperature
Tstg
storage temperature
[8]
[1]
When the device is not powered up, IBUF(max) = 25 mA.
40
+150
C
55
+175
C
[2]
Verified by an external test house to ensure pins can withstand ISO 7637 part 2 automotive transient test pulses 1, 2a, 3a and 3b.
[3]
ESD performance according to IEC 61000-4-2 (150 pF, 330 ) has been verified by an external test house; the result was equal to or
better than 6 kV.
[4]
Human Body Model (HBM): according to AEC-Q100-002 (100 pF, 1.5 k).
[5]
Pins BUF, VIO and BAT connected to GND, emulating the application circuit.
[6]
Machine Model (MM): according to AEC-Q100-003 (200 pF, 0.75 H, 10 ).
[7]
Charged Device Model (CDM): according to AEC-Q100-011 (field Induced charge; 4 pF).
[8]
In accordance with IEC 60747-1. An alternative definition of virtual junction temperature is: Tvj = Tamb + P  Rth(j-a), where Rth(j-a) is a
fixed value used in the calculation of Tvj. The rating for Tvj limits the allowable combinations of power dissipation (P) and ambient
temperature (Tamb).
UJA1162
Product data sheet
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Self-supplied high-speed CAN transceiver with Sleep mode
8. Thermal characteristics
Table 5.
Symbol
Rth(vj-a)
[1]
Thermal characteristics
Parameter
Conditions
[1]
thermal resistance from virtual junction to ambient
Typ
Unit
60
K/W
According to JEDEC JESD51-2, JESD51-5 and JESD51-7 at natural convection on 2s2p board. Board with two inner copper layers
(thickness: 35 m) and thermal via array under the exposed pad connected to the first inner copper layer (thickness: 70 m).
9. Static characteristics
Table 6.
Static characteristics
Tvj = 40 C to +150 C; VBAT = 4.5 V to 28 V; VIO = 2.85 V to 5.5 V; R(CANH-CANL) =60 ; all voltages are defined with respect
to ground; positive currents flow into the IC; typical values are given at VBAT = 13 V; unless otherwise specified.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
Supply; pin BAT
Vth(det)pon
power-on detection threshold
voltage
VBAT rising
4.2
-
4.55
V
Vth(det)poff
power-off detection threshold
voltage
VBAT falling
2.8
-
3
V
Vuvr(CAN)
CAN undervoltage recovery
voltage
VBAT rising
4.5
-
5
V
Vuvd(CAN)
CAN undervoltage detection
voltage
VBAT falling
4.2
-
4.55
V
IBAT
battery supply current
Standby mode; CAN Offline
mode; 40 C < Tvj < +85 C;
VBAT = 7 V to 18 V
-
58
81
A
Sleep mode; CAN Offline mode;
40 C < Tvj < +85 C;
VBAT = 7 V to 18 V
-
44
62
A
additional current in CAN Offline
Bias mode; 40 C < Tvj < 85 C
-
46
63
A
Normal mode; CAN Active
mode; CAN recessive;
VTXD = VIO
-
4
7.5
mA
Normal mode; CAN Active
mode; CAN dominant;
VTXD = 0 V
-
46
67
mA
VBAT = 5.5 V to 18 V
4.9
5
5.1
V
Voltage source; pin BUF
VO
output voltage
Vuvd
undervoltage detection voltage
4.5
-
4.75
V
IO(sc)
short-circuit output current
300
-
150
mA
2.7
-
2.85
V
Standby/Normal mode;
40 C < Tvj < 85 C
-
7.1
11
A
Sleep mode;
40 C < Tvj < 85 C
-
5.9
9.5
A
Supply; pin VIO
Vuvd
undervoltage detection voltage
II(VIO)
input current on pin VIO
UJA1162
Product data sheet
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NXP Semiconductors
Self-supplied high-speed CAN transceiver with Sleep mode
Table 6.
Static characteristics …continued
Tvj = 40 C to +150 C; VBAT = 4.5 V to 28 V; VIO = 2.85 V to 5.5 V; R(CANH-CANL) =60 ; all voltages are defined with respect
to ground; positive currents flow into the IC; typical values are given at VBAT = 13 V; unless otherwise specified.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
Sleep mode control input; pin SLPN
Vth(sw)
switching threshold voltage
0.25VIO
-
0.75VIO
V
Rpd
pull-down resistance
40
60
80
k
Inhibit output: pin INH
VO
output voltage
IINH = 180 A
VBAT  0.8 -
VBAT
V
Rpd
pull-down resistance
Sleep mode
3
4
5
M
CAN transmit data input; pin TXD
Vth(sw)
switching threshold voltage
0.25VIO
-
0.75VIO
V
Rpu
pull-up resistance
40
60
80
k
CAN transmitter status; pin CTS
IOH
HIGH-level output current
VCTS = VIO  0.4 V;
transmitter on
-
-
4
mA
IOL
LOW-level output current
VCTS = 0.4 V;
transmitter off
4
-
-
mA
CAN receive data output; pin RXD
VOH
HIGH-level output voltage
IOH = 4 mA
VIO  0.4
-
-
V
VOL
LOW-level output voltage
IOL = 4 mA
-
-
0.4
V
Rpu
pull-up resistance
CAN Offline mode
40
60
80
k
Local wake input; pin WAKE
Vth(sw)r
rising switching threshold
voltage
2.8
-
4.1
V
Vth(sw)f
falling switching threshold
voltage
2.4
-
3.75
V
Vhys(i)
input hysteresis voltage
250
-
800
mV
Ii
input current
-
-
1.5
A
2.75
3.5
4.5
V
0.5
1.5
2.25
V
0.9VBUF
-
1.1VBUF V
Tvj = 40 C to +85 C
High-speed CAN bus lines; pins CANH and CANL
VO(dom)
dominant output voltage
CAN Active mode;
VTXD = 0 V; VBAT > 5.5 V
pin CANH
pin CANL
VTXsym
transmitter voltage symmetry
VTXsym = VCANH + VCANL;
fTXD = 250 kHz; CSPLIT = 4.7 nF
[1]
[2]
Vdom(TX)sym
transmitter dominant voltage
symmetry
Vdom(TX)sym =
VBUF  VCANH  VCANL;
VBAT > 5.5 V
400
-
+400
mV
VO(dif)bus
bus differential output voltage
CAN Active mode (dominant);
VTXD = 0 V; VBAT > 5.5 V
R(CANH-CANL) = 45  to 65 ;
1.5
-
3.0
V
CAN Active mode (recessive);
CAN Offline mode; VTXD = VIO;
R(CANH-CANL) = no load;
VBAT > 5.5 V; Tvj < 150 C
50
-
+50
mV
UJA1162
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NXP Semiconductors
Self-supplied high-speed CAN transceiver with Sleep mode
Table 6.
Static characteristics …continued
Tvj = 40 C to +150 C; VBAT = 4.5 V to 28 V; VIO = 2.85 V to 5.5 V; R(CANH-CANL) =60 ; all voltages are defined with respect
to ground; positive currents flow into the IC; typical values are given at VBAT = 13 V; unless otherwise specified.
Symbol
Parameter
Conditions
Min
Typ
VO(rec)
recessive output voltage
CAN Active mode;
VTXD = VIO; VBAT > 5.5 V;
R(CANH-CANL) = no load
2
0.5VBUF 3
V
CAN Offline mode;
VBAT > 5.5 V;
R(CANH-CANL) = no load
0.1
-
+0.1
V
CAN Offline Bias mode;
R(CANH-CANL) = no load
2
2.5
3
V
pin CANH; VCANH = 0 V
50
-
-
mA
pin CANL; VCANL = 5 V
-
-
52
mA
IO(dom)
dominant output current
Max
Unit
CAN Active mode;
VBAT > 5.5 V; VTXD = 0 V
IO(rec)
recessive output current
VCANL = VCANH = 27 V to
+32 V; VTXD = VIO
3
-
+3
mA
Vth(RX)dif
differential receiver threshold
voltage
CAN Active mode;
VCANL = VCANH = 12 V to
+12 V; VBAT > 5.5 V
0.5
0.7
0.9
V
CAN Offline mode;
VCANL = VCANH = 12 V to
+12 V; VBAT > 5.5 V
0.4
0.7
1.15
V
CAN Active mode;
VCANL = VCANH = 12 V to
+12 V; VBAT > 5.5 V
50
200
400
mV
Vhys(RX)dif
differential receiver hysteresis
voltage
Ri(cm)
common-mode input resistance
9
15
28
k
Ri
input resistance deviation
1
-
+1
%
Ri(dif)
differential input resistance
19
30
52
k
Ci(cm)
common-mode input
capacitance
[1]
-
-
20
pF
Ci(dif)
differential input capacitance
[1]
-
-
10
pF
ILI
input leakage current
5
-
+5
A
VBAT = VBUF = 0 V or
VBAT = VBUF = shorted to ground
via 47 k; VCANH = VCANL = 5 V
Temperature protection
Tth(act)otp
overtemperature protection
activation threshold temperature
167
177
187
C
Tth(rel)otp
overtemperature protection
release threshold temperature
127
137
147
C
[1]
Not tested in production; guaranteed by design.
[2]
The test circuit used to measure the bus output voltage symmetry (which includes CSPLIT) is shown in Figure 10.
UJA1162
Product data sheet
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Self-supplied high-speed CAN transceiver with Sleep mode
10. Dynamic characteristics
Table 7.
Dynamic characteristics
Tvj = 40 C to +150 C; VBAT = 4.5 V to 28 V; VIO = 2.85 V to 5.5 V; R(CANH-CANL) = 60 ; C(CANH-CANL) = 100 pF; all voltages
are defined with respect to ground; positive currents flow into the IC; typical values are given at VBAT = 13 V; unless otherwise
specified.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
from VBAT exceeding the power-on
detection threshold until VBUF >
90 % undervoltage threshold;
CBUF = 4.7 F
-
2.8
4.7
ms
6
-
54
s
200
-
400
ms
2.5
-
13.5
s
21
-
36
s
7
-
42
s
-
-
255
ns
-
-
350
ns
Voltage sources; pins BUF and VIO
tstartup
start-up time
td(uvd)
undervoltage detection delay time
td(uvd-sleep)
delay time from undervoltage
detection to sleep mode
from undervoltage detection on
VIO until UJA1162 forced to Sleep
mode
Mode control: pin SLPN
tfltr(sleep)
sleep filter time
td(sleep)
sleep delay time
minimum LOW time to trigger a
transition to Sleep mode
Pin WAKE
tdet(wake)
wake-up detection time
CAN transceiver timing; pins CANH, CANL, TXD and RXD
td(TXD-RXD)
RL = 60 ; CL = 100 pF;
delay time from TXD to RXD
50 % VTXD to 50 % VRXD;
CRXD = 15 pF;
fTXD = 250 kHz
RL = 120 ; CL = 200 pF;
50 % VTXD to 50 % VRXD;
CRXD = 15 pF;
fTXD = 250 kHz
[1]
td(TXD-busdom)
delay time from TXD to bus dominant
-
80
-
ns
td(TXD-busrec)
delay time from TXD to bus recessive
-
80
-
ns
td(busdom-RXD)
delay time from bus dominant to RXD CRXD = 15 pF
-
105
-
ns
td(busrec-RXD)
delay time from bus recessive to RXD CRXD = 15 pF
-
120
-
ns
400
-
550
ns
[2]
tbit(RXD)
bit time on pin RXD
tbit(TXD) = 500 ns
twake(busdom)
bus dominant wake-up time
first pulse (after first recessive) for
wake-up on pins CANH and
CANL;
CAN Offline mode
0.5
-
3.0
s
second pulse for wake-up on pins
CANH and CANL
0.5
-
3.0
s
first pulse for wake-up on pins
CANH and CANL;
CAN Offline mode
0.5
-
3.0
s
second pulse (after first dominant)
for wake-up on pins CANH and
CANL
0.5
-
3.0
s
twake(busrec)
bus recessive wake-up time
UJA1162
Product data sheet
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Rev. 2 — 17 April 2014
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Self-supplied high-speed CAN transceiver with Sleep mode
Table 7.
Dynamic characteristics …continued
Tvj = 40 C to +150 C; VBAT = 4.5 V to 28 V; VIO = 2.85 V to 5.5 V; R(CANH-CANL) = 60 ; C(CANH-CANL) = 100 pF; all voltages
are defined with respect to ground; positive currents flow into the IC; typical values are given at VBAT = 13 V; unless otherwise
specified.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
tto(wake)
wake-up time-out time
between first and second
dominant pulses; CAN Offline
mode
570
-
1200
s
tto(dom)TXD
TXD dominant time-out time
CAN Active mode;
VTXD = 0 V
2.7
-
3.3
ms
tto(silence)
bus silence time-out time
recessive time measurement
started in all CAN modes;
RL = 120 
0.95
-
1.17
s
td(busact-bias)
delay time from bus active to bias
-
-
200
s
tstartup(CAN)
CAN start-up time
-
-
220
s
[1]
Guaranteed by design.
[2]
See Figure 7.
when switching to Active mode
(CTS = HIGH)
+,*+
7;'
/2:
&$1+
&$1/
GRPLQDQW
9
92GLIEXV
9
UHFHVVLYH
+,*+
5;'
/2:
WG7;'EXVGRP
WG7;'EXVUHF
WGEXVGRP5;'
WG7;'5;'
Fig 6.
UJA1162
Product data sheet
WGEXVUHF5;'
WG7;'5;'
DDD
CAN transceiver timing diagram
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Rev. 2 — 17 April 2014
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UJA1162
NXP Semiconductors
Self-supplied high-speed CAN transceiver with Sleep mode
7;'
[WELW7;'
WELW7;'
5;'
WELW5;'
DDD
Fig 7.
UJA1162
Product data sheet
Loop delay symmetry timing diagram
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Rev. 2 — 17 April 2014
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UJA1162
NXP Semiconductors
Self-supplied high-speed CAN transceiver with Sleep mode
11. Application information
11.1 Application diagram
9
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(1) Actual capacitance value must be a least 1.76 F with 5 V DC offset (recommended capacitor value is 4.7 F)
(2) For bus line end nodes, RT = 60  in order to support the ‘split termination concept’. For sub-nodes, an optional ‘weak’
termination of e.g. RT = 1.3 k can be used, if required by the OEM.
Fig 8.
Typical application using the UJA1162
UJA1162
Product data sheet
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20 of 29
UJA1162
NXP Semiconductors
Self-supplied high-speed CAN transceiver with Sleep mode
12. Test information
%$7
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Fig 9.
Timing test circuit for CAN transceiver
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Fig 10. Test circuit for measuring transceiver driver symmetry
12.1 Quality information
This product has been qualified in accordance with the Automotive Electronics Council
(AEC) standard Q100 Rev-G - Failure mechanism based stress test qualification for
integrated circuits, and is suitable for use in automotive applications.
UJA1162
Product data sheet
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Self-supplied high-speed CAN transceiver with Sleep mode
13. Package outline
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Fig 11. Package outline SOT1086-2 (HVSON14)
UJA1162
Product data sheet
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Self-supplied high-speed CAN transceiver with Sleep mode
14. Handling information
All input and output pins are protected against ElectroStatic Discharge (ESD) under
normal handling. When handling ensure that the appropriate precautions are taken as
described in JESD625-A or equivalent standards.
15. Soldering of SMD packages
This text provides a very brief insight into a complex technology. A more in-depth account
of soldering ICs can be found in Application Note AN10365 “Surface mount reflow
soldering description”.
15.1 Introduction to soldering
Soldering is one of the most common methods through which packages are attached to
Printed Circuit Boards (PCBs), to form electrical circuits. The soldered joint provides both
the mechanical and the electrical connection. There is no single soldering method that is
ideal for all IC packages. Wave soldering is often preferred when through-hole and
Surface Mount Devices (SMDs) are mixed on one printed wiring board; however, it is not
suitable for fine pitch SMDs. Reflow soldering is ideal for the small pitches and high
densities that come with increased miniaturization.
15.2 Wave and reflow soldering
Wave soldering is a joining technology in which the joints are made by solder coming from
a standing wave of liquid solder. The wave soldering process is suitable for the following:
• Through-hole components
• Leaded or leadless SMDs, which are glued to the surface of the printed circuit board
Not all SMDs can be wave soldered. Packages with solder balls, and some leadless
packages which have solder lands underneath the body, cannot be wave soldered. Also,
leaded SMDs with leads having a pitch smaller than ~0.6 mm cannot be wave soldered,
due to an increased probability of bridging.
The reflow soldering process involves applying solder paste to a board, followed by
component placement and exposure to a temperature profile. Leaded packages,
packages with solder balls, and leadless packages are all reflow solderable.
Key characteristics in both wave and reflow soldering are:
•
•
•
•
•
•
Board specifications, including the board finish, solder masks and vias
Package footprints, including solder thieves and orientation
The moisture sensitivity level of the packages
Package placement
Inspection and repair
Lead-free soldering versus SnPb soldering
15.3 Wave soldering
Key characteristics in wave soldering are:
UJA1162
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Self-supplied high-speed CAN transceiver with Sleep mode
• Process issues, such as application of adhesive and flux, clinching of leads, board
transport, the solder wave parameters, and the time during which components are
exposed to the wave
• Solder bath specifications, including temperature and impurities
15.4 Reflow soldering
Key characteristics in reflow soldering are:
• Lead-free versus SnPb soldering; note that a lead-free reflow process usually leads to
higher minimum peak temperatures (see Figure 12) than a SnPb process, thus
reducing the process window
• Solder paste printing issues including smearing, release, and adjusting the process
window for a mix of large and small components on one board
• Reflow temperature profile; this profile includes preheat, reflow (in which the board is
heated to the peak temperature) and cooling down. It is imperative that the peak
temperature is high enough for the solder to make reliable solder joints (a solder paste
characteristic). In addition, the peak temperature must be low enough that the
packages and/or boards are not damaged. The peak temperature of the package
depends on package thickness and volume and is classified in accordance with
Table 8 and 9
Table 8.
SnPb eutectic process (from J-STD-020D)
Package thickness (mm)
Package reflow temperature (C)
Volume (mm3)
< 350
 350
< 2.5
235
220
 2.5
220
220
Table 9.
Lead-free process (from J-STD-020D)
Package thickness (mm)
Package reflow temperature (C)
Volume (mm3)
< 350
350 to 2000
> 2000
< 1.6
260
260
260
1.6 to 2.5
260
250
245
> 2.5
250
245
245
Moisture sensitivity precautions, as indicated on the packing, must be respected at all
times.
Studies have shown that small packages reach higher temperatures during reflow
soldering, see Figure 12.
UJA1162
Product data sheet
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Self-supplied high-speed CAN transceiver with Sleep mode
maximum peak temperature
= MSL limit, damage level
temperature
minimum peak temperature
= minimum soldering temperature
peak
temperature
time
001aac844
MSL: Moisture Sensitivity Level
Fig 12. Temperature profiles for large and small components
For further information on temperature profiles, refer to Application Note AN10365
“Surface mount reflow soldering description”.
16. Soldering of HVSON packages
Section 15 contains a brief introduction to the techniques most commonly used to solder
Surface Mounted Devices (SMD). A more detailed discussion on soldering HVSON
leadless package ICs can found in the following application notes:
• AN10365 ‘Surface mount reflow soldering description”
• AN10366 “HVQFN application information”
UJA1162
Product data sheet
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Rev. 2 — 17 April 2014
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Self-supplied high-speed CAN transceiver with Sleep mode
17. Revision history
Table 10.
Revision history
Document ID
Release date
Data sheet status
Change notice
Supersedes
UJA1162 v.2
20140417
Product data sheet
-
UJA1162 v.1
Modifications:
UJA1162 v.1
UJA1162
Product data sheet
•
•
•
•
•
•
•
•
•
Section 1: text revised (2nd paragraph added)
•
•
Figure 7: added
Section 2.1: feature added (loop delay symmetry)
Figure 1: amended
Table 2: CTS pin description changed; table note amended
Table 3: row CAN revised
Section 6.3: text revised
Section 6.4: text revised (2nd paragraph added)
Section 6.6: text revised
Table 7: conditions revised for symbol tstartup; parameter values changed: td(uvd); parameter tbit(RXD)
added; additional measurement for parameter td(TXD-RXD)
Section 12.1: text updated
20130926
Product data sheet
-
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 17 April 2014
-
© NXP Semiconductors N.V. 2014. All rights reserved.
26 of 29
UJA1162
NXP Semiconductors
Self-supplied high-speed CAN transceiver with Sleep mode
18. Legal information
18.1 Data sheet status
Document status[1][2]
Product status[3]
Definition
Objective [short] data sheet
Development
This document contains data from the objective specification for product development.
Preliminary [short] data sheet
Qualification
This document contains data from the preliminary specification.
Product [short] data sheet
Production
This document contains the product specification.
[1]
Please consult the most recently issued document before initiating or completing a design.
[2]
The term ‘short data sheet’ is explained in section “Definitions”.
[3]
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.nxp.com.
18.2 Definitions
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences of
use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is intended
for quick reference only and should not be relied upon to contain detailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semiconductors sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
Product specification — The information and data provided in a Product
data sheet shall define the specification of the product as agreed between
NXP Semiconductors and its customer, unless NXP Semiconductors and
customer have explicitly agreed otherwise in writing. In no event however,
shall an agreement be valid in which the NXP Semiconductors product is
deemed to offer functions and qualities beyond those described in the
Product data sheet.
18.3 Disclaimers
Limited warranty and liability — Information in this document is believed to
be accurate and reliable. However, NXP Semiconductors does not give any
representations or warranties, expressed or implied, as to the accuracy or
completeness of such information and shall have no liability for the
consequences of use of such information. NXP Semiconductors takes no
responsibility for the content in this document if provided by an information
source outside of NXP Semiconductors.
In no event shall NXP Semiconductors be liable for any indirect, incidental,
punitive, special or consequential damages (including - without limitation - lost
profits, lost savings, business interruption, costs related to the removal or
replacement of any products or rework charges) whether or not such
damages are based on tort (including negligence), warranty, breach of
contract or any other legal theory.
Notwithstanding any damages that customer might incur for any reason
whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards
customer for the products described herein shall be limited in accordance
with the Terms and conditions of commercial sale of NXP Semiconductors.
Right to make changes — NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
UJA1162
Product data sheet
Suitability for use in automotive applications — This NXP
Semiconductors product has been qualified for use in automotive
applications. Unless otherwise agreed in writing, the product is not designed,
authorized or warranted to be suitable for use in life support, life-critical or
safety-critical systems or equipment, nor in applications where failure or
malfunction of an NXP Semiconductors product can reasonably be expected
to result in personal injury, death or severe property or environmental
damage. NXP Semiconductors and its suppliers accept no liability for
inclusion and/or use of NXP Semiconductors products in such equipment or
applications and therefore such inclusion and/or use is at the customer's own
risk.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
Customers are responsible for the design and operation of their applications
and products using NXP Semiconductors products, and NXP Semiconductors
accepts no liability for any assistance with applications or customer product
design. It is customer’s sole responsibility to determine whether the NXP
Semiconductors product is suitable and fit for the customer’s applications and
products planned, as well as for the planned application and use of
customer’s third party customer(s). Customers should provide appropriate
design and operating safeguards to minimize the risks associated with their
applications and products.
NXP Semiconductors does not accept any liability related to any default,
damage, costs or problem which is based on any weakness or default in the
customer’s applications or products, or the application or use by customer’s
third party customer(s). Customer is responsible for doing all necessary
testing for the customer’s applications and products using NXP
Semiconductors products in order to avoid a default of the applications and
the products or of the application or use by customer’s third party
customer(s). NXP does not accept any liability in this respect.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
damage to the device. Limiting values are stress ratings only and (proper)
operation of the device at these or any other conditions above those given in
the Recommended operating conditions section (if present) or the
Characteristics sections of this document is not warranted. Constant or
repeated exposure to limiting values will permanently and irreversibly affect
the quality and reliability of the device.
Terms and conditions of commercial sale — NXP Semiconductors
products are sold subject to the general terms and conditions of commercial
sale, as published at http://www.nxp.com/profile/terms, unless otherwise
agreed in a valid written individual agreement. In case an individual
agreement is concluded only the terms and conditions of the respective
agreement shall apply. NXP Semiconductors hereby expressly objects to
applying the customer’s general terms and conditions with regard to the
purchase of NXP Semiconductors products by customer.
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 17 April 2014
© NXP Semiconductors N.V. 2014. All rights reserved.
27 of 29
UJA1162
NXP Semiconductors
Self-supplied high-speed CAN transceiver with Sleep mode
No offer to sell or license — Nothing in this document may be interpreted or
construed as an offer to sell products that is open for acceptance or the grant,
conveyance or implication of any license under any copyrights, patents or
other industrial or intellectual property rights.
Translations — A non-English (translated) version of a document is for
reference only. The English version shall prevail in case of any discrepancy
between the translated and English versions.
Export control — This document as well as the item(s) described herein
may be subject to export control regulations. Export might require a prior
authorization from competent authorities.
18.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks
are the property of their respective owners.
19. Contact information
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: [email protected]
UJA1162
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 17 April 2014
© NXP Semiconductors N.V. 2014. All rights reserved.
28 of 29
UJA1162
NXP Semiconductors
Self-supplied high-speed CAN transceiver with Sleep mode
20. Contents
1
2
2.1
2.2
2.3
2.4
2.5
3
4
5
5.1
5.2
6
6.1
6.1.1
6.1.1.1
6.1.1.2
6.1.1.3
6.1.1.4
6.1.1.5
6.1.1.6
6.1.2
6.2
6.2.1
6.2.2
6.3
6.3.1
6.3.1.1
6.3.1.2
6.3.1.3
6.3.2
6.4
6.5
6.6
6.7
6.7.1
6.7.2
6.7.3
6.7.4
7
8
9
10
11
General description . . . . . . . . . . . . . . . . . . . . . . 1
Features and benefits . . . . . . . . . . . . . . . . . . . . 1
General . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Designed for automotive applications. . . . . . . . 1
Integrated supply voltage for the CAN
transceiver (VBUF) . . . . . . . . . . . . . . . . . . . . . . . 2
Power Management . . . . . . . . . . . . . . . . . . . . . 2
System control and diagnostic features . . . . . . 2
Ordering information . . . . . . . . . . . . . . . . . . . . . 2
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Pinning information . . . . . . . . . . . . . . . . . . . . . . 4
Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4
Functional description . . . . . . . . . . . . . . . . . . . 5
System controller . . . . . . . . . . . . . . . . . . . . . . . 5
Operating modes . . . . . . . . . . . . . . . . . . . . . . . 5
Normal mode . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Standby mode. . . . . . . . . . . . . . . . . . . . . . . . . . 6
Sleep mode . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Off mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Overtemp mode . . . . . . . . . . . . . . . . . . . . . . . . 7
Hardware characterization for the UJA1162
operating modes . . . . . . . . . . . . . . . . . . . . . . . . 8
Mode control via pin SLPN . . . . . . . . . . . . . . . . 8
Power supplies . . . . . . . . . . . . . . . . . . . . . . . . . 8
Battery supply voltage (VBAT) . . . . . . . . . . . . . . 8
CAN supply voltage (VBUF) . . . . . . . . . . . . . . . . 8
High-speed CAN transceiver . . . . . . . . . . . . . . 8
CAN operating modes . . . . . . . . . . . . . . . . . . . 9
CAN Active mode . . . . . . . . . . . . . . . . . . . . . . . 9
CAN Offline and Offline Bias modes. . . . . . . . . 9
CAN Off mode . . . . . . . . . . . . . . . . . . . . . . . . 10
CAN standard wake-up. . . . . . . . . . . . . . . . . . 10
WAKE pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
VIO supply pin . . . . . . . . . . . . . . . . . . . . . . . . 11
CAN transceiver status pin (CTS). . . . . . . . . . 12
CAN fail-safe features . . . . . . . . . . . . . . . . . . 12
TXD dominant timeout . . . . . . . . . . . . . . . . . . 12
Pull-up on TXD pin . . . . . . . . . . . . . . . . . . . . . 12
Pull-down on SLPN pin. . . . . . . . . . . . . . . . . . 12
Loss of power at pin BAT . . . . . . . . . . . . . . . . 12
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . 13
Thermal characteristics . . . . . . . . . . . . . . . . . 14
Static characteristics. . . . . . . . . . . . . . . . . . . . 14
Dynamic characteristics . . . . . . . . . . . . . . . . . 17
Application information. . . . . . . . . . . . . . . . . . 20
11.1
12
12.1
13
14
15
15.1
15.2
15.3
15.4
16
17
18
18.1
18.2
18.3
18.4
19
20
Application diagram . . . . . . . . . . . . . . . . . . . .
Test information . . . . . . . . . . . . . . . . . . . . . . .
Quality information . . . . . . . . . . . . . . . . . . . . .
Package outline. . . . . . . . . . . . . . . . . . . . . . . .
Handling information . . . . . . . . . . . . . . . . . . .
Soldering of SMD packages . . . . . . . . . . . . . .
Introduction to soldering. . . . . . . . . . . . . . . . .
Wave and reflow soldering. . . . . . . . . . . . . . .
Wave soldering . . . . . . . . . . . . . . . . . . . . . . .
Reflow soldering . . . . . . . . . . . . . . . . . . . . . .
Soldering of HVSON packages . . . . . . . . . . .
Revision history . . . . . . . . . . . . . . . . . . . . . . .
Legal information . . . . . . . . . . . . . . . . . . . . . .
Data sheet status . . . . . . . . . . . . . . . . . . . . . .
Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . .
Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . .
Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . .
Contact information . . . . . . . . . . . . . . . . . . . .
Contents. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
20
21
21
22
23
23
23
23
23
24
25
26
27
27
27
27
28
28
29
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
© NXP Semiconductors N.V. 2014.
All rights reserved.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: [email protected]
Date of release: 17 April 2014
Document identifier: UJA1162