EVB-USB5537_E Evaluation Board Schematics, PDF

5
4
3
Ranger
Evaluation Board for USB5537B-A3
Revision Date
00A
Self-powered platform from 12 VDC
Can supply maximum USB current to all ports simultaneously
4 Down Stream USB 3.0 ports + 3 USB 2.0 ports
Crystal or Oscillator Inputs for clock generation
Optional SPI programming and configuration
Battery Charging on all ports
Over 5 A (total) Port Power down stream at any one time!
2.5 A (max.) Port Power per any port.
Ext. 12V supply
1
Revision History
A USB5537 EVB that supports:
D
2
Revision Summary
Author
20110303 From Mountie and Flatfoot
C. Johnson
A
20110307 Renumber and release.
C. Johnson
B
20110311 Revise power supply and regulators.
C. Johnson
C
20110525 Release
C. Johnson
C1
20110928 Replaced ATEST with 0 Ohm, populated 6pF caps on XTAL1 and XTAL2,
changed 1.3V regulator to 1.25V.
J. Hancock
C2
20111219 Added 220uF cap on 12V input to 5V regulator.
J. Hancock
C3
20120322 Added SMP header for SMBus. Added 0.1uF caps on OCS pins.
J. Hancock
D
20130301 Replaced Upstream connector with u-B, add BC support on all 7 ports.
C. Johnson
E
20140220 Added support for USB5537_A3-6080 including new strapping options.
C. Johnson
D
Functional Block Diagram
C
C
5V Regulator
Down Stream
3V3 Regulator
1V2 Regulator
VDD33
VDD12
USB5537B-A3
(QFN72)
HS
SS-Tx
SS-Rx
HS
Up Stream
B
USB
3.0
Port 0
HS
SS-Tx
SS-Rx
SS-Tx
SS-Rx
HS
SS-Tx
SS-Rx
HS
SPI Flash
Option
A
SMBus
I/F
SS-Tx
SS-Rx
USB
3.0
Port 1
USB
3.0
Port 2
B
USB
3.0
Port 3
USB
3.0
Port 4
HS
USB 2.0
Port 5
HS
USB 2.0
Port 6
A
Microchip Technology, Inc.
USB/Networking Group - UNG
www.Microchip.com
Description:
HS
USB 2.0
Port 7
Evaluation Board for USB5537B-A3, QFN72
Page
Content: Title Page
Project
PN:
EVB-USB5537
Name: Ranger
Size:
Date:
Sheet 1 of
Thursday, March 13, 2014
B
5
4
3
2
1
4
Rev.:
E
5
4
Note:
Default selections are marked with an asterisk (*) .
3
2
1
R14 100K
VBUS_DET 3
D
R15
330
C56
0.1uF
J0
USB 3.0
microB
REC
smt &
th tabs
11
13
14
15
16
12
2.2uF
Vbus
DD+
id
GND1
ShL
ShP1 SSTX+
ShP2 SSTXShP3 GND2
ShP4 SSRX+
ShR
SSRX-
1
2
3
4
5
VBUS_UP
USB_DM_UP
USB_DP_UP
7
6
8
10
9
SSTXM_C_UP
SSTXP_C_UP
C50
C53
R12
100K
U3A
0.01uF
52
62
61
1.0nF
C48
0.1uF
C49
0.1uF
64
63
USB_SSTXM_UP
USB_SSTXP_UP
67
66
USB_SSRXM_UP
USB_SSRXP_UP
Upstream
USB2DM_UP
USB2DP_UP
USB3DM_TXUP
USB3DP_TXUP
Downstream
USB2DM_DN1
USB2DP_DN1
USB3DM_RXDN1
USB3DP_RXDN1
USB3DM_TXDN1
USB3DP_TXDN1
C5
150uF
9
8
USB_SSRXM_DN1
USB_SSRXP_DN1
6
5
USB_SSTXM_DN1
USB_SSTXP_DN1
C7
0.1uF
C6
0.1uF
5
6
7
8
9
SSTXM_C_DN1
SSTXP_C_DN1
Reset
RESET
USB 3.0
Vbus A-REC
DTHRU
D+
GND1
SSRXSSRX+
GND2
SSTXSSTX+
Sh1
Sh2
Port 1
R1
330
C1
0.1uF
D
12
13
GND_EARTH1
12
11
1
2
3
4
3,4 PWR2
USBDN_DM2
USBDN_DP2
C8
150uF
+
54
3,4 RESETn
USBDN_DM1
USBDN_DP1
J2
USB2DM_DN2
USB2DP_DN2
*Note:
System should supply
nRESET in an embedded
hub implementation.
4
3
1
2
3
4
3,4 PWR1
USB3DM_RXUP
USB3DP_RXUP
GND_EARTH0
*Note that the SS signal pair Tx+/- is polarity
swapped on J0 for improved routing.
The same is true for the SS pair Rx+/-.
This is allowed per USB 3.0 Spec.
J1
USB5537B-A3_QFN72
VBUS_DET
+
C52
USB3DM_RXDN2
USB3DP_RXDN2
USB3DM_TXDN2
USB3DP_TXDN2
17
16
USB_SSRXM_DN2
USB_SSRXP_DN2
14
13
USB_SSTXM_DN2
USB_SSTXP_DN2
C10
0.1uF
C9
0.1uF
5
6
7
8
9
SSTXM_C_DN2
SSTXP_C_DN2
USB 3.0
Vbus A-REC
DTHRU
D+
GND1
SSRXSSRX+
GND2
SSTXSSTX+
Sh1
Sh2
Port 2
R2
330
C2
0.1uF
12
13
GND_EARTH2
J3
72
53
68
C
R5
12.0K
1%
R10
10K
RBIAS
TEST
ATEST
USB2DM_DN3
USB2DP_DN3
USB3DM_RXDN3
USB3DP_RXDN3
R6
ZERO
20
19
1
2
3
4
3,4 PWR3
USBDN_DM3
USBDN_DP3
C11
150uF
+
RBIAS
TEST
ATEST
Bias/Test
USB3DM_TXDN3
USB3DP_TXDN3
25
24
USB_SSRXM_DN3
USB_SSRXP_DN3
22
21
USB_SSTXM_DN3
USB_SSTXP_DN3
C13
0.1uF
C12
0.1uF
5
6
7
8
9
SSTXM_C_DN3
SSTXP_C_DN3
USB 3.0
Vbus A-REC
DTHRU
D+
GND1
SSRXSSRX+
GND2
SSTXSSTX+
Sh1
Sh2
Port 3
R3
330
C3
0.1uF
C
12
13
GND_EARTH3
J4
27
26
1
2
3
4
3,4 PWR4
USBDN_DM4
USBDN_DP4
C14
150uF
+
USB2DM_DN4
USB2DP_DN4
Clock
XTALI/CLK_IN
Y1
25MHz
XTAL2
USB3DM_TXDN4
USB3DP_TXDN4
3
C30
6pF
USB3DM_RXDN4
USB3DP_RXDN4
69
32
31
USB_SSRXM_DN4
USB_SSRXP_DN4
29
28
USB_SSTXM_DN4
USB_SSTXP_DN4
C16
0.1uF
C15
0.1uF
5
6
7
8
9
SSTXM_C_DN4
SSTXP_C_DN4
33
34
1
3
2
USB2DN_DP5
USB2DN_DM5
C55
+
150uF
3V3
8
VCC
C82
>60 MHz
SCK
SI
SO
CS
0.1uF
4
GND
WP
HOLD
6
5
2
1
nCE
3
7
nWP
nHOLD
SPI_FLASH-Dual_Read_SO8
1
2
SPI_SCK
SPI_MOSI
SPI_MISO
SPI_nCE
J13 (*short)
SPI Flash Enable
SHUNT1
44
45
46
43
SPI/I2C
1
3
2
USB2DN_DP6
USB2DN_DM6
C54
SPI_CLK/SCL
SPI_DO/SPI_SPD_SEL/SDA
SPI_DI
SPI_CE
(Fill the GND Flag
with at least
20 GND vias.)
60
59
4
5
6
7
8
J7
3 PWR7
USB2DP_DN7
USB2DM_DN7
150uF
+
U11
USB2DP_DN6
USB2DM_DN6
58
57
1
3
2
USB2DN_DP7
USB2DN_DM7
+
C45
150uF
4
5
6
7
8
VCC
D+
DGND
SH1
SH2
SH3
SH4
VCC
D+
DGND
SH1
SH2
SH3
SH4
USB_A-REC-Upright
R83
10K
USB_A-REC-Upright
R74
10K
4
5
6
7
8
J6
3 PWR6
R75
10K
R4
330
C4
0.1uF
12
13
J5
3 PWR5
B
R13
10K
Sh1
Sh2
Port 4
GND_EARTH4
XTALO
USB2DP_DN5
USB2DM_DN5
SPI Option
SSRXSSRX+
GND2
SSTXSSTX+
VCC
D+
DGND
SH1
SH2
SH3
SH4
USB_A-REC-Upright
TP5
70
XTAL1
1
C27
6pF
USB 3.0
Vbus A-REC
DTHRU
D+
GND1
Port 5
B
R11
330
C51
0.1uF
GND_EARTH5
Port 6
R70
330
C78
0.1uF
GND_EARTH6
Port 7
R68
330
C76
0.1uF
A
A
Microchip Technology, Inc.
USB/Networking Group - UNG
www.Microchip.com
GND_EARTH7
Description:
Evaluation Board for USB5537B-A3, QFN72
Page
Content: USB5537
Project
PN:
EVB-USB5537
Name: Ranger
Size:
Date:
Sheet 2 of
Thursday, March 13, 2014
B
5
4
3
2
1
4
Rev.:
E
5
4
C22
C39
1.0nF 1.0nF
C20
DNP
4.7uF
(Fill the GND
at least 20 GND vias.)
73
GND(FLAG)
SM_CLK
U6 2.5A
2
3
4
5
IN1
IN2
OUT1
OUT2
nc
EN
GND
FLAG
EP
6
7
8
1
9
PWR2
AP2511_MSOP8-EP
Manual SMBus EN
(*open)
3V3
C
2
J14
R60
10K
SMBus I/F
C67
1 (ss2/scl) SM_CLK
3 (ss3/sda) PCTRL5/SM_DAT
5 (miso)
RESETn 2,4
7 (sclk)
VBUS_DET 2
9 (ss1)
Aardvark_I/F
OCS2
0.1uF
U7 2.5A
1
2
3
R65
10K
4
5
J15
(gnd) 2
(nc/5V) 4
(nc/5V) 6
(mosi) 8
(gnd) 10
330
SM_CLK
0.1uF
330
42
C66
2,4
2,4
2,4
2,4
Optional
C36
OCS1
R17
C46
AP2511_MSOP8-EP
GRN
C43
4
5
PWR1
PWR2
PWR3
PWR4
D1
C38
PPWR1
PPWR2
PPWR3
PPWR4
PCTRL5/SM_DAT
PCTRL6
PCTRL7
OUT1
OUT2
nc
EN
GND
FLAG
EP
PWR1
"PPWR1"
C32
40
39
37
36
41
2
1
IN1
IN2
6
7
8
1
9
R19
C28
PRT_CTL1
PRT_CTL2
PRT_CTL3
PRT_CTL4
PRT_CTL5/SM_DAT
PRT_CTL6
Flag with PRT_CTL7
D
U5 2.5A
2
3
150uF
GRN
C25
0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF
Port Control/SMBus
(Opt. Prt Dis/BC Straps)
4
4
4
4
+
D2
C24
VDD12
VDD12
VDD12
VDD12
VDD12
VDD12
VDD12
VDD12
VDD12
C17
"PPWR2"
VDD12
65
55
35
30
23
15
10
7
4
4
4
4
330
1.0nF 1.0nF
PPWR1
PPWR2
PPWR3
PPWR4
R21
C26
0.1uF
GRN
0.1uF 0.1uF 0.1uF 0.1uF
C18
C65
5V
OCS4
OCS3
OCS2
OCS1
D3
C31
OCS4
OCS3
OCS2
OCS1
"PPWR3"
C42
47
48
51
50
330
C47
TDO/OCS4
TDI/OCS3
TMS/OCS2
TCK/OCS1
DYNBC 4
R23
C29
Power
VDD33
VDD33
VDD33
VDD33
DYNBC
GRN
D
C19
DNP
4.7uF
JTAG/OCS
(Opt. Non-Rem Straps)
49
D4
VDD33
18
38
56
71
1
"PPWR4"
TRST/SMBAlert/DYNCPDIS
VDD33
2
USB5537B-A3_QFN72
U3B
Note:
Default selections are marked with an asterisk (*) .
3
IN1
IN2
OUT1
OUT2
nc
EN
GND
FLAG
EP
C
6
7
8
1
9
PWR3
AP2511_MSOP8-EP
R58
100K
C68
OCS3
0.1uF
U8 2.5A
4
5
SHUNT2
6
7
8
1
9
AP2511_MSOP8-EP
5V
OCS5 4
OCS6 4
OCS7 4
U13 2.5A
4
5
R72
ZERO
Pctl
6
7
8
1
9
R71
ZERO
GangOCS
AP2511_MSOP8-EP
R81
Ppwr
R86
ZERO
Pctl
OCS6
5V
A
C80
0.1uF
R69
Ppwr
ZERO
GRN
D22
R82
ZERO
GangOCS
AP2511_MSOP8-EP
ZERO
GRN
4
5
6
7
8
1
9
D21
R76
10K
PPEN
OUT1
OUT2
nc
EN
GND
FLAG
EP
GRN
0.1uF
3V3
IN1
IN2
"PPWR7"
C77
U12 2.5A
2
3
D20
R80
OCS5
5V
U10 2.5A
2
3
3V3
R73
10K
PPEN
4
5
R67
ZERO
Pctl
IN1
IN2
OUT1
OUT2
nc
EN
GND
FLAG
EP
6
7
8
1
9
A
Microchip Technology, Inc.
USB/Networking Group - UNG
www.Microchip.com
R66
ZERO
GangOCS
AP2511_MSOP8-EP
OCS7
*Note: AP5111 device has auto-discharge function
Description:
Evaluation Board for USB5537B-A3, QFN72
Page
Content: Port Power Control
Project
PN:
EVB-USB5537
Name: Ranger
Size:
Date:
Sheet 3 of
Thursday, March 13, 2014
B
5
4
3
B
PWR5 2
PWR6 2
PWR7 2
Optional
R64
10K
PPEN
OUT1
OUT2
nc
EN
GND
FLAG
EP
330
0.1uF
3V3
IN1
IN2
R85
+ C79
2
3
"PPWR5"
150uF
OCS4
330
C40
PWR4
R84
B
OUT1
OUT2
nc
EN
GND
FLAG
EP
"PPWR6"
Note: Population Option Defaults are:
No
DNP
Yes
Ppwr
Yes
PPEN
Yes
Pctl
No
GangOCS
Unmarked Yes
IN1
IN2
330
PPwr5
(*short)
J9
2
1
2
3
2
1
4
Rev.:
E
5
4
3
Note:
Default selections are marked with an asterisk (*) .
2
Dynamic BC Select Strap Option
Ext DYNBC
2
1
Note: Population Option Defaults are:
DNP
No
Unmarked Yes
4.7K
2
J12
R62
3 DYNBC
4
6
3V3
4.7K
Regulators
5.25V Regulator, 6A
J11
5V
U2
1
1
2
2
TP6
Ext. 12V
DNP
3
2
1
12V_EXT
J10
2.5 mm
C74
VIN
ENABLE
VOUT
TRIM
10uF
6_Amp
GND
R59
255
1%
3V3
5
R61
*Green = BC ON for all BC-Enabled Ports
Red = BC OFF for all DS Ports
330
3
D19B
2
D19A
1
GREEN
4
RED
LED_PWR
D24
MMBD914
D
Port Power Strap Options: BC_EN and Port Disable Select
*Note when PPWR Switches are left in the middle "OFF" position the associated
port power acts as a standard PPC.
4
5
3
1
3
SW10
Slide-Top
ON-ON
D
3V3
(*1-2, "Enabled"
2-3, "Disabled")
Dynamic BC Select
R53
1
C72
C71
10uF
0.1uF
(*1-2, High - BC Enabled
OFF, Z - BC Disabled, Port Enabled
2-3, Low - Port Disabled)
TP7
3 PPWR1
3V3
3V3
ON-OFF-ON
SW1
1
2
OFF
3
4
5
OFF
6
R28
10K
R32
R33
1K
330
R48
1K
3V3
Grn
D10
"Port 1 BC_EN"
Red
D9
"Port 1 Disabled"
Slide-Top
SW9
1
2
U9
2
"Reset"
R55
4
3
4
D18
Red
1K
74LVC1G14
3 PPWR2
3V3
2
J8
1
RESETn 2,3
Ext_Rst
3 PPWR3
C73
5V
1.0nF
3V3 Regulator, >200 mA
with PwrGood
3V3
U4
MCP1725-ADJ_SOIC8
8
500mA
VIN1
VOUT
VIN2
7
Shdn
ADJ 5
Cdelay
PWRGD
FB4
EN3
R9
47K
C37
C44
4.7uF
C41
1.0uF
R8
1%
1.0nF
FB2
2A/0.05DCR
DNP
10K
R30
R34
1K
330
Grn
D12
R39
1K
Red
D11
3V3
"Port 2 BC_EN"
C
"Port 2 Disabled"
3V3
TP2
C34
ON-OFF-ON
SW7
1
2
OFF
3
4
5
OFF
6
3 PPWR4
R51
330
C35
3V3
C33
D17
Red
4.7uF 0.1uF 1.0nF
ON-OFF-ON
SW5
1
2
OFF
3
4
5
OFF
6
R49
10K
R35
R36
1K
330
Grn
D14
R43
1K
Red
D13
3V3
"Port 3 BC_EN"
"Port 3 Disabled"
Slide-Top
TP4
150K
R7
21.0K
1%
4
2A/0.05DCR
VDD33
3V3
GND
1
2
3
6
5V_REG_3V3
R40
Slide-Top
3
C
5
R63
100K
-RESET-
ON-OFF-ON
SW3
1
2
OFF
3
4
5
OFF
6
R46
10K
R37
R45
1K
330
Grn
D16
R50
1K
Red
D15
3V3
"Port 4 BC_EN"
"Port 4 Disabled"
Slide-Top
"3V3 Present"
3V3
B
1V25 Regulator, >1 A
FB3
2A/0.05DCR
C70
10uF
2
5V_REG_1V2
R57
EN12 1
ZERO
C69
VIN
ENABLE
VOUT
TRIM
(3 Amp)
GND
0.1uF DNP
4
5
3
R56
1.91K
1%
R54
29.4K
1%
C23
C21
10uF
0.1uF
LED_PWR1
TP3
Green = Port is "Removable"
Yellow = Port is "Non-Removable"
1
Grn
4
Yel
3
R26
SW2
3 OCS1
330
D5B
2
D5A
1
Grn
4
Yel
Place near DS connectors - DNP
R77
1K
C81
A
OCS1
OCS2
OCS3
OCS4
C64
0.1uF
2,3 PWR3
0.1uF
R22
1K
C60
0.1uF
C63
0.1uF
C62
0.1uF
C61
0.1uF
C75
0.1uF
C86
0.1uF
2,3 PWR6
R78
1K
C83
0.1uF
R20
1
Grn
4
Yel
1K
0.1uF
R18
1K
C58
0.1uF
0.1uF
R79
1K
C85
0.1uF
2,3 PWR1
330
R16
1K
C57
0.1uF
3
R27
330
D7B
2
D7A
3
D8B
2
D8A
10K
1K
3V3
1
3
4
6
R42
R41
10K
1K
3V3
5
1
3
4
6
R31
R44
10K
1K
3V3
2
5
MT1
R25
330
2
5
A
1
3
4
6
R38
R47
10K
1K
Microchip Technology, Inc.
USB/Networking Group - UNG
www.Microchip.com
3V3
Description:
Evaluation Board for USB5537B-A3, QFN72
Page
Content: Regulators & Configuration
Project
PN:
EVB-USB5537
Name: Ranger
Size:
Date:
Sheet 4 of
Thursday, March 13, 2014
Slide-Top
ON-ON
B
5
4
3
MT2
Slide-Top
ON-ON
3 OCS4
1
Grn
4
Yel
R29
R52
Slide-Top
ON-ON
SW8
C84
2,3 PWR5
R24
3 OCS3
C59
2,3 PWR2
3
D6B
2
D6A
2
SW6
Test - DNP
OCS7 3
OCS6 3
OCS5 3
5
1
3
4
6
Slide-Top
ON-ON
3 OCS2
2,3 PWR7
2
SW4
2,3 PWR4
B
(*1-2, High - Port is "Removable"
2-3, Low - Port is "Non-Removable")
D23
MMBD914
VDD12
FB1
2A/0.05DCR
TP1
DNP
U1
OCS Strap Options: Non-Removable Select
2
1
4
Rev.:
E