A1442 Datasheet

A1442
Low Voltage Full Bridge Brushless DC Motor Driver with Hall Commutation and
Soft Switching, and Reverse Battery, Short Circuit, and Thermal Shutdown Protection
Discontinued Product
This device is no longer in production. The device should not be
purchased for new design applications. Samples are no longer available.
Date of status change: March 4, 2013
Recommended Substitutions:
For existing customer transition, and for new customers or new applications, contact Allegro Sales.
NOTE: For detailed information on purchasing options, contact your
local Allegro field applications engineer or sales representative.
Allegro MicroSystems, Inc. reserves the right to make, from time to time, revisions to the anticipated product life cycle plan
for a product to accommodate changes in production capabilities, alternative product availabilities, or market demand. The
information included herein is believed to be accurate and reliable. However, Allegro MicroSystems, Inc. assumes no responsibility for its use; nor for any infringements of patents or other rights of third parties which may result from its use.
A1442
Low Voltage Full Bridge Brushless DC Motor Driver with Hall Commutation and
Soft Switching, and Reverse Battery, Short Circuit, and Thermal Shutdown Protection
Features and Benefits
Description
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▪
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▪
The A1442 is a full-bridge motor driver designed to drive lowvoltage, brushless DC motors. Commutation of the motor is
achieved by use of a single Hall element to detect the rotational
position of an alternating-pole ring magnet. A high-density
CMOS semiconductor process allows the integration of all
the necessary electronics. This includes the Hall element, the
motor control circuitry, and the full output bridge. Low-voltage
design techniques have been employed to achieve full device
functionality down to low VDD values. This fully integrated
single chip solution provides enhanced reliability (including
reverse battery protection and output short circuit protection)
and eliminates the need for any external support components.
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Low voltage operation
¯Ē
¯Ē
¯P̄¯ pins
Reverse voltage protection on VDD and S̄L̄
Output short circuit and thermal shutdown protections
Soft switching algorithm to reduce audible switching
noise and EMI interference
Unidirectional working mode provides motor rotation in
one direction
Hall chopper stabilization technique for precise signal
response over operating range
Sleep mode pin allowing external logic signal enable/
disable to reduce average power consumption
Antistall feature guarantees continuous rotation
Low current consumption sleep mode
Single-chip solution for high reliability
Miniature MLP/DFN package
Package: 6 pin MLP/DFN (suffix EW)
The A1442 employs a soft-switching algorithm to reduce audible
switching noise and EMI interference. A micropower sleep
mode can be enabled by an external signal, to reduce current
consumption for battery management in portable electronic
devices. This feature allows the removal of a FET transistor
for switching the device on and off.
The A1442 is optimized for vibration motor applications in
cellular phones, pagers, electronic toothbrushes, hand-held
video game controllers, and low power fan motors.
1.5 mm × 2 mm, 0.40 mm maximum overall height
The small package outline and low profile make this device
ideally suited for use in applications where printed circuit board
area and component headroom are at a premium. It is available
in a lead (Pb) free, 6 pin MLP/DFN microleadframe package,
with an exposed pad for enhanced thermal dissipation.
Approximate scale
Functional Block Diagram
VDD
Output
Full Bridge
Reverse Battery
SLEEP
0.1 μF
Power and Sleep
Mode Control
Active Braking
Control
Stall Detection
Hall
Element
Q1
Q3
Drive Logic
and
Soft Switching
Control
VOUT1
VOUT2
Q2
Amp
M
Q4
Thermal Shutdown
Protection
GND
A1442-DSW, Rev. 2
Low Voltage Full Bridge Brushless DC Motor Driver
with Hall Commutation and Soft Switching,
and Reverse Battery, Short Circuit, and Thermal Shutdown Protection
A1442
Selection Guide
Package1
Packing
MLP/DFN 1.5 mm × 2 mm, 0.4 mm maximum overall height
3000 pieces / 7 in. reel
Part Number
A1442EEWLT-P2
1Contact Allegro®
for additional packing options.
2Allegro products sold in DFN package types are not intended for automotive applications.
Absolute Maximum Ratings
Characteristic
Symbol
Forward Supply Voltage
VDD
Notes
Reverse Supply Voltage
VRDD
Output Voltage
VOUT
VDD > 0 V
Reverse Output Voltage
VROUT
VDD > 0 V
S̄¯L̄¯Ē¯Ē¯P̄¯ Input Voltage
VIN
Peak Output Current
IOUTpk
Operating Ambient Temperature
Units
5.0
V
–5.0
V
0 to VDD + 0.3
V
–0.3
V
0 to VDD + 0.3
V
±400
mA
< 1 ms
TA
Rating
–40 to 85
ºC
Junction Temperature
TJ(max)
165
ºC
StorageTemperature
Tstg
–65 to 165
ºC
Pin-out Diagram
Range E
Terminal List Table
Pin
VDD 1
SLEEP 2
NC 3
6 VOUT2
PAD
5 VOUT1
4 GND
Name
1
VDD
2
S̄¯L̄¯Ē¯Ē¯P̄¯
Function
Supply voltage
Toggle sleep/enabled modes
3
NC
4
GND
No connection
5
VOUT1
First output
6
VOUT2
Second output
Ground
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
2
Low Voltage Full Bridge Brushless DC Motor Driver
with Hall Commutation and Soft Switching,
and Reverse Battery, Short Circuit, and Thermal Shutdown Protection
A1442
OPERATING CHARACTERISTICS valid over the full VDD and TA range unless otherwise noted
Characteristic
Symbol
Supply Voltage1
VDD
Supply Current
IDD(ON)
Total Output On Resistance2,3
RDS(on)
Reverse Battery Current
Sleep Input Threshold
IRDD
Test Conditions
Min.
Typ.
Max.
Units
2.0
–
4.2
V
VIN >VINHI, , TA = 25°C, no load
–
4
6
mA
VIN < VINLO , TA = 25°C
–
–
10
A
VDD = 2 V, IOUT = 70 mA, TA = 25°C
–
3.9
–
Ω
VDD = 3 V, IOUT = 70 mA, TA = 25°C
–
2.6
–
Ω
VDD = 4 V, IOUT = 70 mA, TA = 25°C
–
2.2
–
Ω
VRDD = –4.2 V
–
–
–10
mA
Operating, TJ < TJ(max); CBYP = 0.1 μF
VINHI
0.7×VDD
–
VINLO
–
–
V
0.2×VDD
V
Sleep Input Current
IIN
VIN = 3.0 V
–
1.0
5
A
Reverse Sleep Current
IRIN
VRIN = –4.2 V
–
–
–10
mA
tRS
–
120
–
ms
tS(CHOP)
–
80
–
s
Restart Delay4
Hall Chopping Settling Time
Magnetic Switchpoints2
BOP
–
35
75
G
BRP
–75
-35
–
G
BHYS
–
70
–
G
B < BRP
–
LOW
–
V
B > BOP
–
HIGH
–
V
B < BRP
–
HIGH
–
V
B > BOP
–
LOW
–
1 A bypass capacitor of 0.1 μF is required between VDD and GND for proper device operation through the full specified voltage range.
V
VOUT1
Output Polarity
VOUT2
2 Extended V
DD range affects RDS(on) and Bx.
3 Total On Resistance equals either R
Q1 + R
DS(on)
DS(on)Q4 or RDS(on)Q2 + RDS(on)Q3.
4 The Restart Delay is the time the outputs are on or off when the device is attempting a restart.
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
3
Low Voltage Full Bridge Brushless DC Motor Driver
with Hall Commutation and Soft Switching,
and Reverse Battery, Short Circuit, and Thermal Shutdown Protection
A1442
Characteristic Performance
Total Output On-Resistance versus Supply Voltage
ILOAD = 150 mA
5.0
4.5
4.0
RDS(on) (Ω)
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
VDD (V)
Functional Description
Soft Switching The A1442 device includes a soft-switching algorithm that controls the output switching slew rate for
both output pins. As a result the A1442 device is ideal for use in
applications requiring low audible switching noise and low EMI
interference.
¯Ē
¯Ē
¯P̄¯ pin accepts an external signal that
Sleep Mode The S̄L̄
enables sleep mode. In sleep mode, the current consumption is
reduced to an extremely low level, conserving battery power in
portable electronics.
Antistall Algorithm If a stall condition occurs, the device will
execute an antistall algorithm.
Device Start-up The start-up behavior of the device output
is determined by the applied magnetic field, as specified in the
Operating Characteristics table.
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
4
Low Voltage Full Bridge Brushless DC Motor Driver
with Hall Commutation and Soft Switching,
and Reverse Battery, Short Circuit, and Thermal Shutdown Protection
A1442
Application Information
Two typical application circuits are shown in figures 4 and 5. The
¯Ē
¯Ē
¯P̄¯ pin controlled
first application circuit shows the device S̄L̄
by the user. Figure 5 illustrates an application circuit where the
¯Ē
¯Ē
¯P̄¯ pin are connected together.
device VDD and S̄L̄
A bypass capacitor of 0.1 μF is required between VDD and GND
for proper device operation through the full specified supply voltage range.
Note that:
 No external diode is required for reverse battery protection
because the protection is fully integrated into the IC.
 Thermal shutdown is integrated also.
VBATT
+
VDD
System Logic
Control
CBYP
VOUT1
A1442
SLEEP
I/O
VOUT2
M
NC
GND
Figure 4. Application circuit showing user-controlled sleep/enable mode, while the
A1442 remains powered at all times
+
VBATT
VDD
System Logic
Control
VOUT1
A1442
SLEEP
I/O
VOUT2
CBYP
M
NC
GND
Figure 4. Application circuit showing simultaneous user control of power supply and
sleep mode.
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
5
A1442
Low Voltage Full Bridge Brushless DC Motor Driver
with Hall Commutation and Soft Switching,
and Reverse Battery, Short Circuit, and Thermal Shutdown Protection
Power Derating
The device must be operated below the maximum junction temperature of the device, TJ(max). Under certain combinations of
peak conditions, reliable operation may require derating supplied
power or improving the heat dissipation properties of the application. This section presents a procedure for correlating factors
affecting operating TJ. (Thermal data is also available on the
Allegro MicroSystems Web site.) The package thermal resistance,
RθJA, is a figure of merit summarizing the ability of the application and the device to dissipate heat from the junction (die),
through all paths to the ambient air. Its primary component is the
effective thermal conductivity, K, of the printed circuit board,
including adjacent devices and traces. Radiation from the die
through the device case, RθJC, is relatively small component of
RθJA. Ambient air temperature, TA, and air motion are significant
external factors, damped by overmolding. The effect of varying
power levels (power dissipation, PD) can be estimated. The following formulas represent the fundamental relationships used to
estimate TJ at given levels of PD.
Given:
PD = VIN × IIN ,
(1)
ΔT = PD × RθJA , and
(2)
TJ = TA + ΔT
(3)
For a load of 30 Ω, given common conditions such as: TA= 25°C,
VDD = 3 V, IDD = 83 mA, VL = 2.43 V, IL = 81 mA and RθJA =
250 °C/W, then:
PD = VDD × IDD – VLIL
= 3 V × 83 mA – 2.43 V × 81 mA = 52.17 mW ,
ΔT = PD × RθJA
= 52.17 mW × 250 °C/W = 13°C , and
TJ = TA + ΔT = 25°C + 13°C = 38°C
A worst-case estimate, PD(max), represents the maximum allowable power level, without exceeding TJ(max), at a selected RθJA
and TA.
VBATT
+
IDD
IL
VDD
System Logic
Control
CBYP
0.1 μF
I/O
VOUT1
A1442
SLEEP
VOUT2
M
NC
GND
Figure 4. Typical application showing current paths
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
6
Low Voltage Full Bridge Brushless DC Motor Driver
with Hall Commutation and Soft Switching,
and Reverse Battery, Short Circuit, and Thermal Shutdown Protection
A1442
Package EW, 6 pin MLP/DFN
1.50 ±0.15
0.89 F
E
6
F
0.50
0.30
6
0.99 F
2.00 ±0.15
0.70
1.575
A
1
1
0.325
1.10
7X
D
SEATING
PLANE
0.08 C
C
C
PCB Layout Reference View
0.38 ±0.02
0.50 BSC
B
+0.055
0.325 –0.045
0.70 ±0.10
NN
YWW
0.25 ±0.05
1
1
1.25 ±0.05
G
Standard Branding Reference View
N = Last two digits of device part number
Y = Last digit of year of manufacture
W = Week of manufacture
6
1.10 ±0.10
For Reference Only, not for tooling use (refernce DWG-2856; similar to
JEDEC Type 1, MO-229X2BCD)
Dimensions in millimeters
Exact case and lead configuration at supplier discretion within limits shown
A Terminal #1 mark area
B Exposed thermal pad (reference only, terminal #1
identifier appearance at supplier discretion)
C Reference land pattern layout (reference IPC7351
SON50P200X200X100-9M);
All pads a minimum of 0.20 mm from all adjacent pads; adjust as
necessary to meet application process requirements and PCB layout
tolerances; when mounting on a multilayer PCB, thermal vias at the
exposed thermal pad land can improve thermal dissipation (reference
EIA/JEDEC Standard JESD51-5)
D Coplanarity includes exposed thermal pad and terminals
E Active Area Depth 0.15 mm REF
F Hall Element (not to scale)
G Branding scale and appearance at supplier discretion
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
7
Low Voltage Full Bridge Brushless DC Motor Driver
with Hall Commutation and Soft Switching,
and Reverse Battery, Short Circuit, and Thermal Shutdown Protection
A1442
Revision History
Revision
Revision Date
Rev. 2
October 26, 2011
Description of Revision
Update Selection Guide
Copyright ©2006-2011, Allegro MicroSystems, Inc.
Allegro MicroSystems, Inc. reserves the right to make, from time to time, such departures from the detail specifications as may be required to permit improvements in the performance, reliability, or manufacturability of its products. Before placing an order, the user is cautioned to verify that the
information being relied upon is current.
Allegro’s products are not to be used in life support devices or systems, if a failure of an Allegro product can reasonably be expected to cause the
failure of that life support device or system, or to affect the safety or effectiveness of that device or system.
The information included herein is believed to be accurate and reliable. However, Allegro MicroSystems, Inc. assumes no responsibility for its use;
nor for any infringement of patents or other rights of third parties which may result from its use.
For the latest version of this document, visit our website:
www.allegromicro.com
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
8
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