A3953 Datasheet

A3953
Full-Bridge PWM Motor Driver
Discontinued Product
This device is no longer in production. The device should not be
purchased for new design applications. Samples are no longer available.
Date of status change: January 30, 2012
Recommended Substitutions:
For existing customer transition, and for new customers or new applications, refer to the A4973.
NOTE: For detailed information on purchasing options, contact your
local Allegro field applications engineer or sales representative.
Allegro MicroSystems, Inc. reserves the right to make, from time to time, revisions to the anticipated product life cycle plan
for a product to accommodate changes in production capabilities, alternative product availabilities, or market demand. The
information included herein is believed to be accurate and reliable. However, Allegro MicroSystems, Inc. assumes no responsibility for its use; nor for any infringements of patents or other rights of third parties which may result from its use.
A3953
Full-Bridge PWM Motor Driver
Features and Benefits
Description
▪ ±1.3 A continuous output current
▪ 50 V output voltage rating
▪ 3 V to 5.5 V logic supply voltage
▪ Internal PWM current control
▪ Saturated sink drivers (below 1 A)
▪ Fast and slow current-decay modes
▪ Automotive capable
▪ Sleep (low current consumption) mode
▪ Internal transient-suppression diodes
▪ Internal thermal shutdown circuitry
▪ Crossover current and UVLO protection
Designed for bidirectional pulse width modulated (PWM)
current control of inductive loads, the A3953 is capable of
continuous output currents to ±1.3 A and operating voltages
to 50 V. Internal fixed off-time PWM current-control circuitry
can be used to regulate the maximum load current to a desired
value. The peak load current limit is set by the user’s selection
of an input reference voltage and external sensing resistor. The
fixed off-time pulse duration is set by a user- selected external
RC timing network. Internal circuit protection includes thermal
shutdown with hysteresis, transient-suppression diodes, and
crossover current protection. Special power-up sequencing is
not required.
Packages:
Package B, 16-pin DIP
with exposed tabs
Package LB, 16-pin SOIC
with internally fused pins
Not to scale
With the ENABLE input held low, the PHASE input controls
load current polarity by selecting the appropriate source and
sink driver pair. The MODE input determines whether the
PWM current-control circuitry operates in a slow current-decay
mode (only the selected source driver switching) or in a fast
current-decay mode (selected source and sink switching). A
user-selectable blanking window prevents false triggering of
the PWM current-control circuitry. With the ENABLE input
held high, all output drivers are disabled. A sleep mode is
provided to reduce power consumption.
Continued on the next page…
6 V CC
15
10
LOAD
SUPPLY
OUT A
9
OUT B
LOGIC
SUPPLY
LOAD
SUPPLY
Functional Block Diagram
16
SLEEP &
STANDBY MODES
MODE
14
PHASE
7
V BB
BRAKE
1
PWM LATCH
R
11
–
8
+
ENABLE
INPUT LOGIC
UVLO
& TSD
SENSE
Q
S
BLANKING
GROUND
4
V CC
RS
RC
3
5
12
+ –
2
REF
RT
CT
13
GROUND
V TH
Dwg. FP-036-2A
29319.8I
A3953
Full-Bridge PWM Motor Driver
Description (continued)
When a logic low is applied to the BRAKE input, the braking
function is enabled. This overrides ENABLE and PHASE to turn
off both source drivers and turn on both sink drivers. The brake
function can be used to dynamically brake brush DC motors.
and a 16-pin plastic SOIC with copper heat-sink tabs. For both
package styles, the power tab is at ground potential and needs no
electrical isolation. Each package type is available in a lead (Pb)
free version (100% matte tin plated leadframe).
The A3953 is supplied in a choice of two power packages; a
16-pin dual-in-line plastic package with copper heat-sink tabs,
Selection Guide
Part Number
A3953SB-T
A3953SLBTR-T
Package
16-pin DIP with exposed thermal tabs
16-pin SOICW with internally-fused pins
Packing
25 pieces per tube
1000 pieces per reel
Absolute Maximum Ratings
Characteristic
Symbol
Rating
Units
50
V
VCC
7.0
V
VIN
–0.3 to VCC + 0.3
V
VCC = 5.0 V
1.0
V
VCC = 3.3 V
0.4
V
Output current rating may be limited by duty cycle, ambient
temperature, and heat sinking. Under any set of conditions, do
not exceed the specified current rating or a junction temperature of 150°C.
±1.3
A
Load Supply Voltage
VBB
Logic Supply Voltage
Logic/Reference Input Voltage Range
Sense Voltage
Notes
VSENSE
Output Current, Continuous
IOUT
Package Power Dissipation
PD
Operating Ambient Temperature
TA
Maximum Junction Temperature
TJ(max)
Storage Temperature
Range S
See graph
W
–20 to 85
ºC
150
ºC
–55 to 150
ºC
Value
Units
43
ºC/W
67
ºC/W
6
ºC/W
Fault conditions that produce excessive junction temperature
will activate the device’s thermal shutdown circuitry. These
conditions can be tolerated but should be avoided.
Tstg
Thermal Characteristics
Characteristic
Symbol
Test Conditions*
B Package, single-layer PCB, 1 in.2 2-oz. exposed copper
Package Thermal Resistance, Junction
to Ambient
RθJA
Package Thermal Resistance, Junction
to Tab
RθJT
LB Package, 2-layer PCB, 0.3
side
in.2
2-oz. exposed copper each
Note the A3953SB (DIP) and
the A3953SLB (SOIC) are
electrically identical and share
a common terminal number
assignment.
16
LOAD
SUPPLY
2
15
OUTB
RC
3
14
MODE
GROUND
4
13
GROUND
BRAKE
1
REF
VBB
LOGIC
GROUND
5
LOGIC
SUPPLY
6
PHASE
7
ENABLE
8
VCC
VBB
12
GROUND
11
SENSE
10
OUTA
9
LOAD
SUPPLY
ALLOWABLE PACKAGE POWER DISSIPATION (W)
*Additional thermal information available on Allegro website.
4
R θJT = 6.0°C/W
3
SUFFIX 'B', R θJA = 43°C/W
2
1
SUFFIX 'LB', R θJA = 67°C/W
0
25
50
75
100
TEMPERATURE IN °C
125
150
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
2
A3953
Full-Bridge PWM Motor Driver
ELECTRICAL CHARACTERISTICS at TJ = 25°C, VBB = 5 V to 50 V, VCC = 3.0 V to 5.5 V
(unless otherwise noted.)
Limits
Characteristic
Symbol
Test Conditions
Min.
Typ.
Max.
Units
VCC
—
50
V
Power Outputs
Load Supply Voltage Range
VBB
Operating, IOUT = ±1.3 A, L = 3 mH
Output Leakage Current
ICEX
VOUT = VBB
—
<1.0
50
μA
VOUT = 0 V
—
<-1.0
-50
μA
ISO
ISENSE - IOUT1, IOUT = 850 mA,
VSENSE = 0 V, VCC = 5 V
22
33
38
mA
VCE(SAT)
VSENSE = 0.4 V, VCC = 3.0 V:
Sense Current Offset
Output Saturation Voltage
BRAKE = H
Source Driver, IOUT = -0.85 A
—
1.0
1.1
V
(Forward/Reverse Mode)
Source Driver, IOUT = -1.3 A
—
1.7
1.9
V
Sink Driver, IOUT = 0.85 A
—
0.4
0.5
V
Sink Driver, IOUT = 1.3 A
—
1.1
1.3
V
Output Saturation Voltage
VCE(SAT)
VSENSE = 0.4 V, VCC = 3.0 V:
BRAKE = L
Sink Driver, IOUT = 0.85 A
—
1.0
1.2
V
(Brake Mode)
Sink Driver, IOUT = 1.3 A
—
1.3
1.5
V
IF = 0.85 A
—
1.2
1.4
V
IF = 1.3 A
—
1.4
1.6
V
Clamp Diode Forward Voltage
VF
(Sink or Source)
Continued next page…
TRUTH TABLE
BRAKE
ENABLE
PHASE
MODE
OUTA
OUTB
DESCRIPTION
H
H
X
H
Off
Off
H
H
X
L
Off
Off
H
L
H
H
H
L
H
L
H
L
H
L
Forward, Slow Current-Decay Mode
H
L
L
H
L
H
Reverse, Fast Current-Decay Mode
H
L
L
L
L
H
Reverse, Slow Current-Decay Mode
L
X
X
H
L
L
Brake, Fast Current-Decay Mode
L
X
X
L
L
L
Brake, No Current Control
Sleep Mode
Standby
Forward, Fast Current-Decay Mode
X = Irrelevant
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
3
A3953
Full-Bridge PWM Motor Driver
ELECTRICAL CHARACTERISTICS (continued) at TJ = 25°C, VBB = 5 V to 50 V, VCC = 3.0 V to
5.5 V (unless otherwise noted.)
Limits
Characteristic
Symbol
Test Conditions
Min.
Typ.
Max.
Units
CT = 680 pF, RT= 30 kΩ, VCC = 3.3 V
18.3
20.4
22.5
μs
Comparator Trip to Source Off,
IOUT = 25 mA
Comparator Trip to Source Off,
IOUT = 1.3 A
—
1.0
1.5
μs
—
1.8
2.6
μs
IRC Charge On to Source On,
IOUT = 25 mA
IRC Charge On to Source On,
IOUT = 1.3 A
—
0.4
0.7
μs
—
0.55
0.85
μs
VCC = 3.3 V, RT ≥ 12 kΩ, CT = 680 pF
0.8
1.4
1.9
μs
VCC = 5.0 V, RT ≥ 12 kΩ, CT = 470 pF
0.8
1.6
2.0
μs
ENABLE On to Source On
—
1.0
—
μs
ENABLE Off to Source Off
—
1.0
—
μs
ENABLE On to Sink On
—
1.0
—
μs
ENABLE Off to Sink Off (MODE = L)
—
0.8
—
μs
PHASE Change to Sink On
—
2.4
—
μs
PHASE Change to Sink Off
—
0.8
—
μs
PHASE Change to Source On
—
2.0
—
μs
PHASE Change to Source Off
—
1.7
—
μs
1 kΩ Load to 25 V, VBB = 50 V
0.3
1.5
3.0
μs
IOUT = 1.3 A
70
—
—
kHz
AC Timing
PWM RC Fixed Off-time
PWM Turn-Off Time
PWM Turn-On Time
PWM Minimum On Time
Propagation Delay Times
Crossover Dead Time
Maximum PWM Frequency
tOFF RC
tPWM(OFF)
tPWM(ON)
tON(min)
tpd
tCODT
fPWM(max)
IOUT = ±1.3 A, 50% to 90%:
Continued next page…
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
4
A3953
Full-Bridge PWM Motor Driver
ELECTRICAL CHARACTERISTICS (continued) at TJ = 25°C, VBB = 5 V to 50 V, VCC = 3.0 V to
5.5 V (unless otherwise noted. )
Limits
Characteristic
Symbol
Test Conditions
Min.
Typ.
Max.
Units
TJ
—
165
—
°C
∆TJ
—
8.0
—
°C
UVLO Enable Threshold
2.5
2.75
3.0
V
UVLO Hysteresis
0.12
0.17
0.25
V
Control Circuitry
Thermal Shutdown Temp.
Thermal Shutdown Hysteresis
Logic Supply Current
ICC(ON)
VENABLE = 0.8 V, VBRAKE = 2.0 V
—
42
50
mA
ICC(OFF)
VENABLE = 2.0 V, VMODE = 0.8 V
—
12
15
mA
ICC(Brake)
VBRAKE = 0.8 V
—
42
50
mA
ICC(Sleep)
VENABLE = VMODE = VBRAKE = 2.0 V
—
500
800
μA
Motor Supply Current
IBB(ON)
VENABLE = 0.8 V
—
2.5
4.0
mA
(No Load)
IBB(OFF)
VENABLE = 2.0 V, VMODE = 0.8 V
—
1.0
50
μA
IBB(Brake)
VBRAKE = 0.8 V
—
1.0
50
μA
IBB(Sleep)
VENABLE = VMODE = 2.0 V
—
1.0
50
μA
Operating
3.0
5.0
5.5
V
Logic Supply Voltage Range
VCC
Logic Input Voltage
VIN(1)
2.0
—
—
V
VIN(0)
—
—
0.8
V
Logic Input Current
VSENSE Voltage Range
IIN(1)
VIN = 2.0 V
—
<1.0
20
μA
IIN(0)
VIN = 0.8 V
—
<-2.0
-200
μA
VSENSE(3.3)
VCC = 3.0 V to 3.6 V
0
—
0.4
V
VSENSE(5.0)
VCC = 4.5 V to 5.5 V
0
—
1.0
V
Reference Input Current
IREF
VREF = 0 V to 1 V
—
—
±5.0
μA
Comparator Input Offset Volt.
VIO
VREF = 0 V
—
±2.0
±5.0
mV
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
5
A3953
Full-Bridge PWM Motor Driver
FUNCTIONAL DESCRIPTION
Internal PWM Current Control During Forward
and Reverse Operation. The A3953 contains a fixed
off-time pulse width modulated (PWM) current-control circuit
that can be used to limit the load current to a desired value. The
peak value of the current limiting (ITRIP) is set by the selection
of an external current sensing resistor (RS) and reference input
voltage (VREF). The internal circuitry compares the voltage
across the external sense resistor to the voltage on the reference
input terminal (REF) resulting in a transconductance function
approximated by:
VREF
ITRIP ≈
– ISO
RS
The user selects an external resistor (RT) and capacitor (CT) to
determine the time period (tOFF = RT x CT) during which the
drivers remain disabled (see RC Fixed Off-Time section, below).
At the end of the RC interval, the drivers are enabled allowing
the load current to increase again. The PWM cycle repeats,
maintaining the peak load current at the desired value (figure 2).
Figure 2
Fast and Slow Current-Decay Waveforms
ENABLE
MODE
where ISO is the offset due to base drive current.
In forward or reverse mode the current-control circuitry limits
the load current as follows: when the load current reaches ITRIP,
the comparator resets a latch that turns off the selected source
driver or selected sink and source driver pair depending on
whether the device is operating in slow or fast current-decay
mode, respectively.
In slow current-decay mode, the selected source driver is
disabled; the load inductance causes the current to recirculate
through the sink driver and ground clamp diode. In fast currentdecay mode, the selected sink and source driver pair are
disabled; the load inductance causes the current to flow from
ground to the load supply via the ground clamp and flyback
diodes.
Figure 1 — Load-Current Paths
V
BB
DRIVE CURRENT
RECIRCULATION (SLOW-DECAY MODE)
RECIRCULATION (FAST-DECAY MODE)
RS
I
TRIP
RC
LOAD
CURRENT
RC
Dwg. WP-015-1
INTERNAL PWM CURRENT CONTROL
DURING BRAKE-MODE OPERATION
Brake Operation - MODE Input High. The brake circuit
turns off both source drivers and turns on both sink drivers. For
dc motor applications, this has the effect of shorting the motor
back-EMF voltage resulting in current flow that dynamically
brakes the motor. If the back-EMF voltage is large, and there
is no PWM current limiting, the load current can increase to a
value that approaches that of a locked rotor condition. To limit
the current, when the ITRIP level is reached, the PWM circuit
disables the conducting sink drivers. The energy stored in the
motor inductance is discharged into the load supply causing the
motor current to decay.
As in the case of forward/reverse operation, the drivers are
enabled after a time given by tOFF = RT x CT (see RC Fixed
Off-Time section, below). Depending on the back-EMF voltage
(proportional to the motor decreasing speed), the load current
again may increase to ITRIP. If so, the PWM cycle will repeat,
limiting the peak load current to the desired value.
Dwg. EP-006-13A
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115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
6
A3953
Full-Bridge PWM Motor Driver
During braking, when the MODE input is high, the peak current
limit can be approximated by:
ITRIP BRAKE MH
≈
VREF
RS
CAUTION: Because the kinetic energy stored in the motor
and load inertia is being converted into current, which charges
the VBB supply bulk capacitance (power supply output and
decoupling capacitance), care must be taken to ensure the
capacitance is sufficient to absorb the energy without exceeding
the voltage rating of any devices connected to the motor supply.
Brake Operation - MODE Input Low. During braking,
with the MODE input low, the internal current-control circuitry
is disabled. Therefore, care should be taken to ensure that the
motor’s current does not exceed the ratings of the device. The
braking current can be measured by using an oscilloscope with
a current probe connected to one of the motor’s leads, or if the
back-EMF voltage of the motor is known, approximated by:
VBEMF – 1V
IPEAK BRAKE ML ≈
RLOAD
RC Fixed Off-Time. The internal PWM current-control
circuitry uses a one shot to control the time the driver(s)
remain(s) off. The one-shot time, tOFF (fixed off-time), is
determined by the selection of an external resistor (RT) and
capacitor (CT) connected in parallel from the RC timing terminal
to ground. The fixed off-time, over a range of values of CT = 470
pF to 1500 pF and RT = 12 kΩ to 100 kΩ, is approximated by:
tOFF ≈ RT x CT
The operation of the circuit is as follows: when the PWM latch is
reset by the current comparator, the voltage on the RC terminal
will begin to decay from approximately 0.60VCC. When the
voltage on the RC terminal reaches approximately 0.22VCC, the
PWM latch is set, thereby enabling the driver(s).
RC Blanking. In addition to determining the fixed off-time of
the PWM control circuit, the CT component sets the comparator
blanking time. This function blanks the output of the comparator
when the outputs are switched by the internal current-control
circuitry (or by the PHASE, BRAKE, or ENABLE inputs).
The comparator output is blanked to prevent false over-current
detections due to reverse recovery currents of the clamp diodes,
and/or switching transients related to distributed capacitance in
the load.
During internal PWM operation, at the end of the tOFF time, the
comparator’s output is blanked and CT begins to be charged
from approximately 0.22VCC by an internal current source of
approximately 1 mA. The comparator output remains blanked
until the voltage on CT reaches approximately 0.60VCC.
When a transition of the PHASE input occurs, CT is discharged
to near ground during the crossover delay time (the crossover
delay time is present to prevent simultaneous conduction of
the source and sink drivers). After the crossover delay, CT is
charged by an internal current source of approximately 1 mA.
The comparator output remains blanked until the voltage on CT
reaches approximately 0.60VCC.
When the device is disabled, via the ENABLE input, CT is
discharged to near ground. When the device is re-enabled, CT is
charged by an internal current source of approximately 1 mA.
The comparator output remains blanked until the voltage on CT
reaches approximately 0.60VCC.
For 3.3 V operation, the minimum recommended value
for CT is 680 pF ± 5 %. For 5.0 V operation, the minimum
recommended value for CT is 470 pF ± 5%. These values
ensure that the blanking time is sufficient to avoid false trips
of the comparator under normal operating conditions. For
optimal regulation of the load current, the above values for CT
are recommended and the value of RT can be sized to determine
tOFF. For more information regarding load current regulation, see
below.
LOAD CURRENT REGULATION
WITH INTERNAL PWM
CURRENT-CONTROL CIRCUITRY
When the device is operating in slow current-decay mode,
there is a limit to the lowest level that the PWM currentcontrol circuitry can regulate load current. The limitation is the
minimum duty cycle, which is a function of the user-selected
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7
where tOFF = RT x CT, RLOAD is the series resistance of the load,
VBB is the motor supply voltage and t ON(min)max is specified in
the Electrical Characteristics table. When the motor is rotating,
the back EMF generated will influence the above relationship.
For brush dc motor applications, the current regulation is
improved. For stepper motor applications, when the motor is
rotating, the effect is more complex. A discussion of this subject
is included in the section on stepper motors below.
The following procedure can be used to evaluate the worst-case
slow current-decay internal PWM load current regulation in the
system:
1. Set VREF to 0 volts. With the load connected and the PWM
current control operating in slow current-decay mode, use an
oscilloscope to measure the time the output is low (sink on) for
the output that is chopping. This is the typical minimum on time
(tON(min) typ) for the device.
2. The CT then should be increased until the measured value
of tON(min) is equal to tON(min) max as specified in the electrical
characteristics table.
3. When the new value of CT has been set, the value of RT should
be decreased so the value for tOFF = RT x CT (with the artificially
increased value of CT) is equal to the nominal design value.
diodes conduct after the drivers are disabled, resulting in fast
current decay. When the device is enabled the internal currentcontrol circuitry will be active and can be used to limit the load
current in a slow current-decay mode.
For applications that PWM the ENABLE input and desire the
internal current-limiting circuit to function in the fast decay
mode, the ENABLE input signal should be inverted and
connected to the MODE input. This prevents the device from
being switched into sleep mode when the ENABLE input is low.
Phase PWM. Toggling the PHASE terminal selects which
sink/source pair is enabled, producing a load current that varies
with the duty cycle and remains continuous at all times. This
can have added benefits in bidirectional brush dc servo motor
applications as the transfer function between the duty cycle on
the PHASE input and the average voltage applied to the motor is
more linear than in the case of ENABLE PWM control (which
produces a discontinuous current at low current levels). For more
information see DC Motor Applications section, below.
Synchronous Fixed-Frequency PWM. The internal
PWM current-control circuitry of multiple A3953 devices can
be synchronized by using the simple circuit shown in figure 3.
A 555 IC can be used to generate the reset pulse/blanking signal
(t1) for the device and the period of the PWM cycle (t2). The
value of t1 should be a minimum of 1.5 ms. When used in this
configuration, the RT and CT components should be omitted.
The PHASE and ENABLE inputs should not be PWM with this
circuit configuration due to the absence of a blanking function
synchronous with their transitions.
Figure 3
Synchronous Fixed-Frequency Control Circuit
V CC
4. The worst-case load-current regulation then can be measured
in the system under operating conditions.
PWM of the PHASE and ENABLE Inputs. The
PHASE and ENABLE inputs can be pulse-width modulated
to regulate load current. Typical propagation delays from the
PHASE and ENABLE inputs to transitions of the power outputs
are specified in the electrical characteristics table. If the internal
PWM current control is used, the comparator blanking function
is active during phase and enable transitions. This eliminates
false tripping of the over-current comparator caused by
switching transients (see RC Blanking section, above).
Enable PWM. With the MODE input low, toggling the
ENABLE input turns on and off the selected source and sink
drivers. The corresponding pair of flyback and ground-clamp
t
2
100 kΩ
value of tOFF and the minimum on-time pulse tON(min) max that
occurs each time the PWM latch is reset. If the motor is not
rotating (as in the case of a stepper motor in hold/detent mode, a
brush dc motor when stalled, or at startup), the worst case value
of current regulation can be approximated by:
[(VBB – VSAT(source+sink)) x tON(min)max] – (1.05(VSAT(sink) + VF) x tOFF)
IAVE ≈
1.05 x (tON(min)max + tOFF) x RLOAD
Full-Bridge PWM Motor Driver
20 kΩ
A3953
RC 1
1N4001
2N2222
t
RC N
1
Dwg. EP-060
Miscellaneous Information. A logic high applied to both
the ENABLE and MODE terminals puts the device into a sleep
mode to minimize current consumption when not in use.
An internally generated dead time prevents crossover currents
that can occur when switching phase or braking.
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8
A3953
Thermal protection circuitry turns off all drivers should the
junction temperature reach 165°C (typical). This is intended
only to protect the device from failures due to excessive junction
temperatures and should not imply that output short circuits
are permitted. The hysteresis of the thermal shutdown circuit is
approximately 15°C.
Full-Bridge PWM Motor Driver
for the given level of ILOAD. The value for RθJT is given in the
package thermal resistance table for the appropriate package.
The power dissipation of the batwing packages can be improved
by 20% to 30% by adding a section of printed circuit board
copper (typically 6 to 18 square centimeters) connected to the
batwing terminals of the device.
APPLICATION NOTES
The thermal performance in applications that run at high load
currents and/or high duty cycles can be improved by adding
Current Sensing. The actual peak load current (IPEAK) will be external diodes in parallel with the internal diodes. In internal
above the calculated value of ITRIP due to delays in the turn off of PWM slow-decay applications, only the two ground clamp diodes
the drivers. The amount of overshoot can be approximated by:
need be added. For internal fast-decay PWM, or external PHASE
(VBB – [(ITRIP x RLOAD) + VBEMF]) x tPWM(OFF)
or ENABLE input PWM applications, all four external diodes
IOS ≈
should be added for maximum junction temperature reduction.
LLOAD
PCB Layout. The load supply terminal, VBB, should
where VBB is the motor supply voltage, VBEMF is the back-EMF
be decoupled with an electrolytic capacitor (>47 μF is
voltage of the load, RLOAD and LLOAD are the resistance and
recommended) placed as close to the device as is physically
inductance of the load respectively, and tPWM(OFF) is specified in
practical. To minimize the effect of system ground I x R drops on
the electrical characteristics table.
the logic and reference input signals, the system ground should
have a low-resistance return to the motor supply voltage. See also
The reference terminal has a maximum input bias current of ±5
the Current Sensing and Thermal Considerations sections, above.
μA. This current should be taken into account when determining
the impedance of the external circuit that sets the reference
Fixed Off-Time Selection. With increasing values of tOFF,
voltage value.
switching losses will decrease, low-level load-current regulation
To minimize current-sensing inaccuracies caused by ground trace will improve, EMI will be reduced, the PWM frequency will
decrease, and ripple current will increase. The value of tOFF can
I x R drops, the current-sensing resistor should have a separate
be chosen for optimization of these parameters. For applications
return to the ground terminal of the device. For low-value sense
where audible noise is a concern, typical values of tOFF are chosen
resistors, the I x R drops in the printed wiring board can be
significant and should be taken into account. The use of sockets
to be in the range of 15 ms to 35 ms.
should be avoided as their contact resistance can cause variations
Stepper Motor Applications. The MODE terminal
in the effective value of RS.
can be used to optimize the performance of the device in
Generally, larger values of RS reduce the aforementioned effects
microstepping/sinusoidal stepper-motor drive applications. When
but can result in excessive heating and power loss in the sense
the load current is increasing, slow decay mode is used to limit
resistor. The selected value of RS should not cause the absolute
the switching losses in the device and iron losses in the motor.
maximum voltage rating of 1.0 V (0.4 V for VCC = 3.3 V
This also improves the maximum rate at which the load current
operation), for the SENSE terminal, to be exceeded.
can increase (as compared to fast decay) due to the slow rate of
decay during tOFF. When the load current is decreasing, fast-decay
The current-sensing comparator functions down to ground
mode is used to regulate the load current to the desired level. This
allowing the device to be used in microstepping, sinusoidal, and
prevents tailing of the current profile caused by the back-EMF
other varying current-profile applications.
voltage of the stepper motor.
Thermal Considerations. For reliable operation it is
In stepper-motor applications applying a constant current to
recommended that the maximum junction temperature be kept
below 110°C to 125°C. The junction temperature can be measured the load, slow-decay mode PWM is typically used to limit the
best by attaching a thermocouple to the power tab/batwing of the switching losses in the device and iron losses in the motor.
device and measuring the tab temperature, TTAB. The junction
DC Motor Applications. In closed-loop systems, the
temperature can then be approximated by using the formula:
speed of a dc motor can be controlled by PWM of the PHASE
or ENABLE inputs, or by varying the reference input voltage
TJ ≈ TTAB + (ILOAD x 2 x VF x RJT)
(REF). In digital systems (microprocessor controlled), PWM of
where VF may be chosen from the electrical specification table
the PHASE or ENABLE input is used typically thus avoiding
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
9
A3953
Full-Bridge PWM Motor Driver
the need to generate a variable analog voltage reference. In this
case, a dc voltage on the REF input is used typically to limit the
maximum load current.
load current will regulate to a value given by:
In dc servo applications, which require accurate positioning
at low or zero speed, PWM of the PHASE input is selected
typically. This simplifies the servo control loop because the
transfer function between the duty cycle on the PHASE input and
the average voltage applied to the motor is more linear than in the
case of ENABLE PWM control (which produces a discontinuous
current at low current levels).
CAUTION: In fast current-decay mode, when the direction of
With bidirectional dc servo motors, the PHASE terminal can be
used for mechanical direction control. Similar to when braking
the motor dynamically, abrupt changes in the direction of a
rotating motor produces a current generated by the back-EMF.
The current generated will depend on the mode of operation. If
the internal current control circuitry is not being used, then the
maximum load current generated can be approximated by ILOAD =
(VBEMF + VBB)/RLOAD where VBEMF is proportional to the motor’s
speed. If the internal slow current-decay control circuitry is used,
then the maximum load current generated can be approximated
by ILOAD = VBEMF/RLOAD. For both cases care must be taken to
ensure that the maximum ratings of the device are not exceeded.
If the internal fast current-decay control circuitry is used, then the
ILOAD = VREF/RS.
the motor is changed abruptly, the kinetic energy stored in the
motor and load inertia will be converted into current that charges
the VBB supply bulk capacitance (power supply output and
decoupling capacitance). Care must be taken to ensure that the
capacitance is sufficient to absorb the energy without exceeding
the voltage rating of any devices connected to the motor supply.
See also the Brake Operation section, above.
Soldering Considerations. The lead (Pb) free (100%
matte tin) plating on lead terminations is 100% backwardcompatible for use with traditional tin-lead solders of any
composition, at any temperature of soldering that has been
traditionally used for that tin-lead solder alloy. Further, 100%
matte tin finishes solder well with tin-lead solders even at
temperatures below 232°C. This is because the matte tin dissolves
easily in the tin-lead. Additional information on soldering is
available on the Allegro Web site, www.allegromicro.com.
Figure 4 — Typical Application
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
10
A3953
Full-Bridge PWM Motor Driver
B package 16-pin DIP
19.05±0.25
16
+0.10
0.38 –0.05
+0.76
6.35 –0.25
+0.38
10.92 –0.25
7.62
A
1
2
5.33 MAX
+0.51
3.30 –0.38
1.27 MIN
+0.25
1.52 –0.38
2.54
For Reference Only
(reference JEDEC MS-001 BB)
Dimensions in millimeters
Dimensions exclusive of mold flash, gate burrs, and dambar protrusions
Exact case and lead configuration at supplier discretion within limits shown
A Terminal #1 mark area
0.46 ±0.12
LB package 16-pin SOICW
10.30±0.20
4° ±4
16
1.27
0.65
+0.07
0.27 –0.06
10.30±0.33
7.50±0.10
A
9.50
+0.44
0.84 –0.43
2.25
1
2
0.25
16X
SEATING
PLANE
0.10 C
0.41 ±0.10
1.27
2.65 MAX
0.20 ±0.10
C
SEATING PLANE
GAUGE PLANE
B
PCB Layout Reference View
For Reference Only
Pins 4 and 5, and 12 and 13 internally fused
Dimensions in millimeters
(reference JEDEC MS-013 AA)
Dimensions exclusive of mold flash, gate burrs, and dambar protrusions
Exact case and lead configuration at supplier discretion within limits shown
A Terminal #1 mark area
B Reference pad layout (reference IPC SOIC127P1030X265-16M)
All pads a minimum of 0.20 mm from all adjacent pads; adjust as necessary
to meet application process requirements and PCB layout tolerances
Copyright ©1995-2008, Allegro MicroSystems, Inc.
Allegro MicroSystems, Inc. reserves the right to make, from time to time, such departures from the detail specifications as may be required to permit improvements in the performance, reliability, or manufacturability of its products. Before placing an order, the user is cautioned to verify that the
information being relied upon is current.
Allegro’s products are not to be used in life support devices or systems, if a failure of an Allegro product can reasonably be expected to cause the
failure of that life support device or system, or to affect the safety or effectiveness of that device or system.
The information included herein is believed to be accurate and reliable. However, Allegro MicroSystems, Inc. assumes no responsibility for its use;
nor for any infringement of patents or other rights of third parties which may result from its use.
For the latest version of this document, visit our website:
www.allegromicro.com
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
11
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