A8427 Datasheet

A8427
Xenon Photoflash Capacitor Charger
with IGBT Driver
Discontinued Product
This device is no longer in production. The device should not be
purchased for new design applications. Samples are no longer available.
Date of status change: December 10, 2012
Recommended Substitutions:
For existing customer transition, and for new customers or new applications, contact Allegro Sales.
NOTE: For detailed information on purchasing options, contact your
local Allegro field applications engineer or sales representative.
Allegro MicroSystems, Inc. reserves the right to make, from time to time, revisions to the anticipated product life cycle plan
for a product to accommodate changes in production capabilities, alternative product availabilities, or market demand. The
information included herein is believed to be accurate and reliable. However, Allegro MicroSystems, Inc. assumes no responsibility for its use; nor for any infringements of patents or other rights of third parties which may result from its use.
A8427
Xenon Photoflash Capacitor Charger
with IGBT Driver
Features and Benefits
Description
▪ Low quiescent current (0.1 μA in shutdown mode)
▪ Primary-side output voltage sensing; no resistor divider
required
▪ User-adjustable current limit from 0.8 to 2.4 A
▪ 1.3 V logic (VHI(min)) compatibility
▪ Integrated IGBT driver with separate sink and source
▪ Flash trigger with interlock for increased noise immunity
▪ Optimized for 1-cell Lithium-ion or 2 to 3 Alkaline/NiMH
batteries
▪ No primary-side Schottky diode needed
▪ Zero-voltage switching for lower loss
▪ >70% efficiency
▪ Optional regulation feature to maintain the output voltage
▪ Charge complete indication
▪ Integrated 40 V DMOS switch in very thin profile 3 mm
×3 mm, 0.75 mm nominal height package
The Allegro A8427 xenon photoflash capacitor charger IC is
designed for camera phones and digital cameras. To extend
battery life, it features very low supply current drain, typically
0.1 μA in shutdown mode, and 10 μA in standby mode.
The charge time is adjustable by setting the peak current limit
from 0.8 to 2.4 A. By using primary-side voltage sensing, the
need for a secondary-side resistive divider is eliminated. This
leads to benefits of reducing power loss, lower system cost,
and smaller board space.
The A8427 has an integrated IGBT driver and flash trigger
interlock to increase the system noise immunity. The IGBT
driver also has separate source and sink connections, for
flexibility in controlling rise and fall time. The charge and
trigger input logic thresholds are set at 1.3 VHI (min) to support
low-voltage control logic.
Package: 16-contact TQFN (suffix ES)
The A8427 is available in 16-contact 3 mm × 3 mm TQFN
package with exposed pad for enhanced thermal performance.
This small, very thin profile (0.75 mm nominal overall height)
package is ideal for space-constrained applications.
Applications include:
▪ Digital camera flash
▪ Film and digital SLR camera flash
Approximate Scale 1:1
Typical Application
Bias Input
2.3 to 5.5V
Battery Input
1.5 to 6.0V
1 : 10
+
VIN
RSET
100 μF
315 V
VBAT
TLIM
ISET
COUT
C1
C2
VOUT Detect
Control
Block
ISW sense
SW
Connect
to VIN
REG
CHARGE
DONE
VPULLUP
100 kΩ
DONE
VIN
IGBT Driver
GSRC
TRIGGER
IGBT Gate
GSNK
GND
Application 1. Typical application without output voltage regulation (REG pin connected to
VIN). System needs to periodically restart the charging cycle to replenish lost charge on
the output capacitor.
A8427-DS, Rev. 1
Xenon Photoflash Capacitor Charger
with IGBT Driver
A8427
Selection Guide
Part Number
A8427EESTR-T
Packing*
Tape and reel, 1500 pieces/reel
*Contact Allegro for additional packing options.
Absolute Maximum Ratings*
Characteristic
Symbol
Notes
DC voltage. (VSW is self-clamped by an
internal active clamp and is allowed to
exceed 40 V during flyback spike durations.
Maximum repetitive energy during flyback
spike: 0.5 μJ at frequency ≤ 400 kHz.)
Rating
Units
–0.3 to 40
V
SW Pin
VSW
VBAT Pin
VBAT
–0.3 to 7.0
V
VIN
–0.3 to 6.0
V
–0.6 to VIN + 0.3 V
V
–0.3 to VIN + 0.3 V
V
VIN Pin
Care must be taken to limit the current when
–0.6 V is applied to these pins
¯N̄¯Ē¯ Pins
CHARGE, TRIGGER, D̄¯Ō
Remaining Pins
Operating Ambient Temperature
Maximum Junction
–40 to 85
ºC
TJ(max)
TA
150
ºC
Tstg
–55 to 150
ºC
Storage Temperature
Range E
*With respect to GND.
Thermal Characteristics
Characteristic
Package Thermal Resistance
Symbol
RθJA
Test Conditions*
On 4-layer PCB, based on JEDEC specification
Value
Units
47
ºC/W
*Additional thermal information available on Allegro website.
Allegro MicroSystems, Inc.
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 (508) 853-5000
www.allegromicro.com
2
Xenon Photoflash Capacitor Charger
with IGBT Driver
A8427
14 REG
13 NC
10 TRIGGER
9
SW
VBAT 8
4
7
GND
11 DONE
EP
NC
3
6
VIN
12 TLIM
5
2
NC
1
GSINK
CHARGE
GSOURCE
15 ISET
16 NC
Pin-out Diagram
(Top View)
Terminal List Table
Number
1
Name
GSOURCE
2
GSINK
3
VIN
4
GND
5
CHARGE
Function
IGBT gate drive – source connection
IGBT gate drive – sink connection
Input voltage; connect to a 2.3 to 5.5 V voltage source
Ground connection
Pull high to initiate charging; pull low to enter low-power standby mode
6, 7, 13, 16
NC
8
VBAT
No connection
Battery voltage; connect to the main power supply for primary-side sensing
9
SW
Drain connection of internal power MOSFET switch; connect to transformer
10
TRIGGER
11
¯N̄¯Ē
¯
D̄¯Ō
12
TLIM
14
REG
15
ISET
–
EP
¯N̄¯Ē
¯ is low. This
IGBT input trigger; triggering is enabled when CHARGE pin is low, or when CHARGE is high and D̄¯Ō
feature improves system noise immunity
Pulls low when output reaches target value and CHARGE pin is high; remains low until CHARGE pin is cycled
For Allegro use only; connect to GND on PCB
Output voltage regulation pin; connect to external resistor and capacitor to regulate output voltage, or connect to
VIN to disable regulation. See the Output Regulation section for details.
Sets the maximum switch current; connect an external resistor to GND to set the target peak current; see Circuit
Description section for details
Exposed pad for enhanced thermal dissipation (not connected electrically)
Allegro MicroSystems, Inc.
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 (508) 853-5000
www.allegromicro.com
3
Xenon Photoflash Capacitor Charger
with IGBT Driver
A8427
Functional Block Diagram
SW
VIN
DCM‫ޓ‬Detector
VBAT
tOFF(max)
DMOS
18 μs
OCP
VSW 㧙VBAT
㧗
VDS Ref
ISET
H→L
Triggered
‫ޓ‬Timer
㧙
ISET
Buffer
S
Q
R
㧙
Q
Enable
tON(max)
18 μs
REG
DONE
㧗
㧗
㧙
㧙
㧗
㧙
CHARGE
S
Q
R
㧙
Q
VIN
GSOURCE
TRIGGER
GSINK
Exposed Pad
Allegro MicroSystems, Inc.
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 (508) 853-5000
www.allegromicro.com
4
Xenon Photoflash Capacitor Charger
with IGBT Driver
A8427
ELECTRICAL CHARACTERISTICS typical values valid at VIN = VBAT= 3.6 V, RSET = 36 kΩ, ISWlim = 2.4 A, and TA=25°C, unless otherwise noted
Characteristics
Symbol
Test Conditions
Min.
Typ.
Max.
Unit
VBAT Pin Voltage Range
VBAT
1.5
–
6.0
V
VIN Pin Voltage Range1
VIN
2.3
–
5.5
V
–
2.05
2..2
V
–
150
–
mV
2.16
2.4
2.64
A
UVLO Enable Threshold
VINUV
UVLO Hysteresis
VIN rising
VINUVhys
Switch Current Limit2
SW Current Limit to ISET Current Ratio
ISET Pin Voltage While Charging
ISWlimMAX
Maximum, ISET = 32.4 μA
ISWlimMIN
Minimum, ISET = 10.8 μA
–
0.8
–
A
ISET = 32.4 μA, CHARGE = high
–
74
–
kA/A
ISET = 32.4 μA, CHARGE = high, ISW = 0 A
(VBAT disconnected)
–
1.167
–
V
–
1.232
–
V
–
1000
–
Ω
ISWlim/ISET
VSET
ISET = 32.4 μA, CHARGE = high, ISW = 2.4 A
ISET Pin Internal Resistance
RSET(INT)
GND Pin Internal Resistance
RGND(INT)
Switch On-Resistance
RSWDS(on)
Switch Leakage
Current1
ISWlk
VIN Pin Supply Current
IIN
VBAT Pin Supply Current
IBAT
CHARGE Pin Input Current
ICHARGE
–
27
–
mΩ
VIN = 3.6 V, ID = 800 mA, TA = 25°C
–
0.25
–
Ω
VSW = VBAT(MAX)
–
–
2
μA
Shutdown (CHARGE = 0 V, TRIGGER = 0 V)
–
0.01
1
μA
Charging done, regulation disabled (REG = VIN)
–
10
50
μA
Charging done, regulation enabled
–
0.5
–
mA
Charging (CHARGE = VIN, TRIGGER = 0 V)
–
2
–
mA
Shutdown (CHARGE = 0 V, TRIGGER = 0 V)
–
0.01
1
μA
Charging done, regulation disabled (REG = VIN)
–
–
1
μA
Charging done, regulation enabled
–
–
50
uA
Charging (CHARGE = VIN, TRIGGER = 0 V)
–
–
125
uA
–
36
–
μA
CHARGE Pin Input Voltage High1
ICHARGE(H)
Over input supply range, VIN
1.3
–
–
V
Low1
ICHARGE(L)
Over input supply range, VIN
–
–
0.4
V
CHARGE Pin Pull-down Resistor
RCHARGE
–
100
–
kΩ
toffMAX
–
18
–
μs
Maximum Switch-on Timeout
tonMAX
–
18
–
μs
¯N̄¯Ē¯ Pin Output Leakage Current1
D̄¯Ō
IDONElk
–
–
1
μA
CHARGE Pin Input Voltage
Maximum Switch-off Timeout
¯N̄¯Ē¯ Pin Output Low Voltage1
D̄¯Ō
VDONEL
Output Comparator Trip Voltage1
VOUTTRIP
Output Comparator Overdrive
Minimum dV/dt for ZVS Comparator
VOUTOV
dV/dt
VCHARGE = VIN
¯N̄¯Ē¯ pin
32 μA into D̄¯Ō
–
–
100
mV
Measured as VSW – VBAT
31
31.5
32
V
200 ns pulse width (90% to 90%)
–
200
400
mV
Measured at SW pin
–
20
–
V/μs
Continued on the next page …
Allegro MicroSystems, Inc.
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 (508) 853-5000
www.allegromicro.com
5
Xenon Photoflash Capacitor Charger
with IGBT Driver
A8427
ELECTRICAL CHARACTERISTICS (continued) typical values valid at VIN = VBAT= 3.6 V, RSET = 36 kΩ, ISWlim = 2.4 A, and TA=25°C, unless
otherwise noted
Characteristics
Symbol
Test Conditions
Min.
Typ.
Max.
Unit
Regulation
REG Voltage When Charging Completes
VREG(H)
¯N̄¯Ē¯ → low transition
CHARGE = high, at D̄¯Ō
1.15
1.2
1.25
V
REG Voltage Threshold for Regulation
VREG(L)
¯N̄¯Ē¯ = low
CHARGE = high, D̄¯Ō
–
0.96
–
V
–
50
–
μA
–
0.2
–
μA
–
–
V
REG Output Current Drive Capability
IREG
¯N̄¯Ē¯ = high,
CHARGE = high, D̄¯Ō
VSW – VIN = 30 V, VREG = 1.0 V
REG Leakage Current While Not Charging
IREGlk
¯N̄¯Ē¯ = low, VREG = 1.2 V
CHARGE = high, D̄¯Ō
IGBT Driver
TRIGGER Pin High Input Voltage1
VTRIG(H)
Over input supply range, VIN
1.3
Voltage1
VTRIG(L)
Over input supply range, VIN
–
–
0.4
V
TRIGGER Pin Pull-down Resistor
RTRIGPD
–
100
–
kΩ
TRIGGER Pin Low Input
GSOURCE On-Resistance to VIN
RSrcDS(on)
VIN = 3.6 V, VGSOURCE= 1.8 V
–
5
–
Ω
GSINK On-Resistance to GND
RSnkDS(on)
VIN = 3.6 V, VGSINK= 1.8 V
–
6
–
Ω
Propagation Delay (Rising)
tdr
–
30
–
ns
Propagation Delay (Falling)
tdf
–
30
–
ns
Output Rise Time
tr
–
70
–
ns
Output Fall Time
tf
–
70
–
ns
1Specifications
2Current
Connect GSOURCE to GSINK (measure at pin),
RGATE = 12 Ω, CLOAD = 6500 pF, VDRV = 3.6 V
over the range TA= –40°C to 85°C; guaranteed by design and characterization.
limit guaranteed by design and correlation to static test. Refer to application section for peak current in actual circuits.
Allegro MicroSystems, Inc.
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 (508) 853-5000
www.allegromicro.com
6
Xenon Photoflash Capacitor Charger
with IGBT Driver
A8427
Performance Characteristics
Charging time at various peak switch current levels, with
VIN = 3.6 V (bias voltage), VBAT = 3.6 V (battery voltage), COUT = 100 μF / 330 V
UCC (output capacitor), transformer type DCT5EPL-UxxS002 (TDK), TA = 25°C
VOUT
C1
ISWpk ≈ 2.3 A
(RSET = 40 kΩ)
Symbol
C1
C2
t
Parameter
VOUT
IIN
time
Units/Division
50 V
200 mA
1s
IIN
C1, C2
C2
t
VOUT
C1
ISWpk ≈ 1.9 A
(RSET = 48 kΩ)
Symbol
C1
C2
t
Parameter
VOUT
IIN
time
Units/Division
50 V
200 mA
1s
IIN
C1, C2
C2
t
VOUT
C1
ISWpk ≈ 1.55 A
(RSET = 60 kΩ)
Symbol
C1
C2
t
Parameter
VOUT
IIN
time
Units/Division
50 V
200 mA
1s
IIN
C1, C2
C2
t
Allegro MicroSystems, Inc.
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 (508) 853-5000
www.allegromicro.com
7
Xenon Photoflash Capacitor Charger
with IGBT Driver
A8427
Performance Characteristics
VIN = 3.6 V (bias voltage), COUT = 100 μF / 330 V UCC (output capacitor),
transformer LP = 7.5 μH, N = 10, TA = 25°C
Charge Time versus Battery Voltage
VTLIM = low
16
15
14
13
RSET
(kΩ)
IP
(A)
100
≈ 1.0
80
≈ 1.2
7
60
≈ 1.6
6
48
≈ 2.0
40
≈ 2.4
12
Time (s)
11
10
9
8
5
4
3
2
1
2
3
4
VBAT (V)
5
6
Average Input Current versus Battery Voltage
VTLIM = low
1.0
0.9
IIN (A)
0.8
0.7
RSET
(kΩ)
0.6
40
0.5
48
≈ 2.0
0.4
60
≈ 1.6
0.3
80
≈ 1.2
0.2
100
≈ 1.0
IP
(A)
≈ 2.4
0.1
0
2
3
4
VBAT (V)
5
6
Efficiency versus Battery Voltage
Efficiency (%)
VTLIM = high
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
RSET
(kΩ)
40
2
3
4
5
IP
(A)
≈ 2.4
48
≈ 2.0
60
≈ 1.6
80
≈ 1.2
100
≈ 1.0
6
VBAT (V)
Allegro MicroSystems, Inc.
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 (508) 853-5000
www.allegromicro.com
8
Xenon Photoflash Capacitor Charger
with IGBT Driver
A8427
Timing and IGBT Interlock Function
VIN
CHARGE
SW
VOUT
DONE
A
B
C
D
TRIGGER
IGBTDRV
Explanation of Events
Trigger A arrives before the first charging cycle is finished. IGBTDRV is disabled in this case
¯N̄¯Ē¯ = high).
(CHARGE = high and D̄¯Ō
Trigger B arrives during regulation mode while not refreshing. IGBTDRV is enabled. Charging resumes
when TRIGGER goes low again.
Trigger C arrives during regulation mode while refreshing. Charging is stopped after present cycle.
IGBTDRV is enabled. Charging resumes when TRIGGER goes low again.
Trigger D arrives while the A8427 is in low-power standby mode. IGBTDRV is always enabled in this
case (CHARGE = low).
IGBT Drive Timing Definition
TRIGGER
50%
tdr
GSOURCE
or GSINK
50%
tr
tdf
90%
10%
tf
90%
10%
Allegro MicroSystems, Inc.
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 (508) 853-5000
www.allegromicro.com
9
Xenon Photoflash Capacitor Charger
with IGBT Driver
A8427
Application Information
General Operation Overview
The CHARGE pin enables the part and starts charg¯ open-drain indicator is pulled low
ing. The ¯¯¯
D¯ Ō¯¯N̄¯Ē
when CHARGE is high and the target output voltage
is reached. Charging is reinitiated when the REG pin
voltage falls below the regulation threshold. Pulling
the CHARGE pin low stops charging and forces the
chip into low-power standby mode.
Timer Mode and Fast Charging Mode
The A8427 achieves fast charging times and high efficiency by operating in discontinuous conduction mode
(DCM) through most of the charging process. The
relationship of Timer Mode and Fast Charging Mode
is shown in figure 1.
The IC operates in Timer Mode when beginning to
charge a completely discharged photoflash capacitor,
usually when the output voltage, VOUT, is less than
approximately 40 V (actual value depends on input
voltage and transformer inductance). Timer Mode is a
fixed period, 18 μs, off-time control. One advantage of
having Timer Mode is that it limits the initial battery
current surge and thus acts as a “soft-start.” A time
expanded view of a Timer Mode interval is shown in
figure 2.
As soon as a sufficient voltage has built up at the
output capacitor, the IC enters Fast-Charging Mode.
In this mode, the next switching cycle starts after the
secondary side current has stopped flowing, and the
switch voltage has dropped to a minimum value. A
proprietary circuit is used to allow minimum-voltage
switching, even if the SW pin voltage does not drop to
0 V. This enables Fast-Charging Mode to start earlier
than previously possible, thereby reducing the overall
charging time. Minimum-voltage switching is shown
in figure 3.
VSW
VOUT
VBAT
ISW
t = 2 μs/div; VOUT =10 V/div; VBAT =2 V/div.; VSW =2 V/div;
ISW =200 mA/div. VIN = 3.6 V; VBAT =5.5 V; RSET=80 kΩ;
Transformer LP= 7.5 μH, N = 10
Figure 2. Timer Mode
VOUT
VSW
Timer Mode
Fast Charging Mode
VOUT
VBAT
ISW
ISW
t = 1 μs/div; VOUT =10 V/div; VBAT =2 V/div.; VSW =2 V/div;
ISW =200 mA/div. VIN = 3.6 V; VBAT =5.5 V; RSET=80 kΩ;
Transformer LP= 7.5 μH, N = 10
Figure 1. Relationship of Timer mode and Fast Charging mode
Figure 3. Fast Charging Mode, minimum voltage
10
Allegro MicroSystems, Inc.
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 (508) 853-5000
www.allegromicro.com
Xenon Photoflash Capacitor Charger
with IGBT Driver
A8427
During Fast-Charging Mode, when VOUT is high
enough such that the reflected voltage (VOUT / N) is
greater than VBAT, true zero-voltage switching (ZVS)
is achieved. This further improves efficiency as well
as reduces switching noise. A ZVS interval is shown in
figure 4.
Output Voltage Regulation
When the REG pin is connected to VIN, the A8427
stops charging the output voltage after the reflected
voltage (VSW – VIN) reaches 31.5 V. In this mode,
charging can be reinitiated by cycling the CHARGE
signal through a low-to-high transition.
The A8427 can also be used to regulate output voltage
within a predetermined window. In this mode, connect
a capacitor, CREG, and resistor, RREG, from the REG
pin to GND (refer to the figure Application 3). When
CHARGE is held high, the voltage monitoring circuit
of the A8427 is always active, irrespective of the REG
pin voltage level.
Voltage Regulation Using Predicitive Droop
The A8427 uses a technique called Predictive Droop
for regulating the output capacitor voltage after the
completion of a charging cycle. When the target output voltage is reached, the converter stops charging
VOUT
VSW
VBAT
ISW
t = 1 μs/div; VOUT =10 V/div; VBAT =2 V/div.; VSW =2 V/div;
ISW =200 mA/div. VIN = 3.6 V; VBAT =5.5 V; RSET=80 kΩ;
Transformer LP= 7.5 μH, N = 10
Figure 4. Zero-voltage switching
and output capacitor voltage will droop due to leakage current. An external resistor connected from REG
pin to ground provides a RC discharge time constant.
This time constant can be selected to mirror the droop
rate of the output capacitor. When voltage at the REG
pin drops to 80% of its reference value, the converter
will start charging again and bring the output capacitor
back to target voltage again.
The time required for a RC network to discharge from
V0 to VT is given by:
T = R × C × ln (V0 / VT) .
(1)
For example, if C = 10 μF, R = 10 M Ω and V0 / VT =
1.25, then T = 22 s. Assuming that the RC-discharge
characteristic of the output capacitor matches that at
the REG pin, we can predict that the output voltage
has drooped 20%, and therefore it is time to recharge
the output capacitor.
By implementing a Predictive Droop technique, no
additional leakage paths are introduced on the secondary side, which helps to keep power losses to a minimum. By intentionally making the RC discharge time
constant at the REG pin shorter than that of the output
capacitor, we can also regulate the output voltage to a
window tighter than the default 20% hysteresis.
Voltage Regulation Using Direct Sensing
If direct sensing from the secondary side is required,
connect the REG pin to a resistor divider network
across the output capacitor to enable output regulation.
In this case, the charging cut-off is still controlled by
primary side sensing (charging stops when reflected
voltage reaches 31.5 V), but the regulation threshold
is controlled by secondary-side sensing. When the
CHARGE pin is high and the sensed output voltage
falls below the lower VREG threshold, the flyback
charges the output capacitor again until the primaryside sensing stops further charging. This cycle repeats
until the CHARGE pin is pulled low.
11
Allegro MicroSystems, Inc.
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 (508) 853-5000
www.allegromicro.com
A8427
Xenon Photoflash Capacitor Charger
with IGBT Driver
The benefit of this method is that this lower output
voltage can be selected independently, simply by
changing the resistor divider ratio. For example, if:
Then,
R1= 10 MΩ,
R2= 33.2 kΩ, and
VREG(L) = 0.96 V,
then:
where tD is the delay in SW turn-off (0.1 μs typical).
(5)
Figure 5 can be used to determine the relationship
between RSET and ISWlim at various bias voltages.
VOUT(Low) = VREG(L) × (R1 / R2 +1 ) = 290 V . (2)
Selection of Switching Current Limit
The A8427 features continuously adjustable peak
switching current between 0.8 and 2.4 A. This is done
by selecting the value of an external resistor RSET,
connected from the ISET pin to GND, which determines the ISET bias current, and therefore the switching current limit.
To the first order approximation, ISWlim is related to
ISET and RSET according to the following equation :
ISWlim = ISET × K = VSET / RSET × K ,
ISWlim = ISET × K + VBAT / LP × tD ,
Smart Current Limit (Optional)
With the help of some simple external logic, the user
can change the charging current according to the
battery voltage. As an example (refer to the circuit
diagram below), assume that the ISET current level
is normally 30 μA (for ISWlim = 2.2 A). Further, when
the battery voltage drops below 2.5 V, an external BL
(battery-low) signal comes high. A resistor, RBL, connected from the BL node to the ISET pin, then injects
10 μA into RSET. This effectively reduces ISET current to 20 μA (for ISWlim = 1.5 A). The disadvantage of
this method is that the 10 μA current is always flowing
whenever the BL signal goes high.
(3)
BL
RBL
where VSET is 1.2 V and K is approximately 74000
when bias voltage, VIN, is 3.6 V.
In applications, the actual switching current limit is
affected by bias voltage, battery voltage, and also the
transformer primary inductance, LP. If necessary, the
following expressions can be used to determine ISWlim
more accurately:
ISET = VSET / (RSET + RSET(INT) – K × RGND(INT) ),(4)
where:
RSET(INT) is the internal resistance of the ISET pin
(1 kΩ typical),
RGND(INT) is the internal resistance of the bonding
wire for the GND pin (27 mΩ typical), and
K = (K′ + VIN × K″), with K′ = 67500 and K″ ≈
2200 at TA = 25°C.
ISET
RSET
IGBT Gate Driver Interlock
The TRIGGER pin controls the IGBT gate driver.
However, triggering is disabled (locked) during charging. This is to prevent switching noises from interfering with the IGBT driver. After the CHARGE pin goes
high (at the start of a charging cycle), the IC must wait
¯¯¯¯ Ō¯¯N̄¯Ē
¯ goes
for completion of the charging cycle (D
low) before triggering can be enabled, according to the
following chart:
Conditions
Resulting State
CHARGE
¯N̄¯Ē¯
D̄¯Ō
IGBT Gate Driver
Low
Don’t Care
Enabled
High
High
Disabled
High
Low
Enabled
12
Allegro MicroSystems, Inc.
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 (508) 853-5000
www.allegromicro.com
Xenon Photoflash Capacitor Charger
with IGBT Driver
A8427
After completion of the charging cycle, if the charge
pin is kept high and REG is enabled, the IC will
periodically recharge the output. If a trigger signal
comes in during a recharge cycle, charging will be
halted immediately and the IGBT gate driver will be
allowed to fire after a delay of less than 1 μs. Charging
resumes after the trigger signal is removed.
Red Eye Reduction
The IGBT gate driver is always enabled when the
CHARGE pin is low. If the CHARGE pin is disabled
before sufficient voltage has built up on the output
capacitor, the flash may not fire. In the case of redeye reduction flashes, it is recommended to keep the
CHARGE pin low until completion of triggering
pulses. This ensures that the IGBT gate driver will
¯ pin state.
remain enabled regardless of the ¯¯¯
D¯ Ō¯¯N̄¯Ē
Selection of Transformer
1. The transformer turns ratio (N = NS/NP) determines
the output voltage:
VOUT = 31.5 × N – Vd ,
(6)
where Vd is the forward drop of the output diode.
2. The primary inductance LP determines the on-time
of the switch:
ton = –LP / R × ln (1 – ISWlim × R / VBAT) , (7)
where R is the total resistance in the primary current
path (including the RDS(on) of SW and the DC resistance of the transformer).
If VBAT is much larger than ISWlim × R, then ton can be
approximated by:
ton = ISWlim × LP / VBAT .
(8)
Peak Current Limit versus ISET Resistance
ISWlim (A)
VBAT = 3.6 V, Transformer LP = 7.5 μH, TA=25°C
2.5
2.4
2.3
2.2
2.1
2.0
1.9
1.8
1.7
1.6
1.5
1.4
1.3
1.2
1.1
1.0
0.9
0.8
VIN = 5.0 V
VIN = 3.6 V
VIN = 2.3 V
35
40
45
50
55
60
65
70
75
80
85
90
95
100 105 110 115 120
Figure 5. Chart of current versus limit settings
13
Allegro MicroSystems, Inc.
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 (508) 853-5000
www.allegromicro.com
Xenon Photoflash Capacitor Charger
with IGBT Driver
A8427
3. The secondary inductance, LS , determines the
off-time of the switch:
toff = (ISWlim / N ) × LS / VOUT .
(9)
Because LS / LP = N × N:
toff = (ISWlim × LP × N ) / VOUT .
(10)
The minimum pulse width for toff determines what
is the minimum primary inductance required for the
transformer. For example, if ISWlim = 1.0 A, N = 10,
and VOUT = 315 V, then LP must be at least 6.3 μH in
order to keep toff at 200 ns or longer.
loss). But a transformer with a larger LP also requires
more windings and a larger magnetic core. Therefore a
trade-off must be made between transformer size and
efficiency.
Component Selection
Selection of the flyback transformer should be based
on the peak current, according to the following table.
Note: The maximum peak current must be derated at
higher temperatures.
IPeak Range
Sup-
(A)
plier
1.0 to 2.0
TDK
LDT565630T-001
6
10.4
1.4 to 2.4
TDK
LDT565630T-041
4.7
10.4
0.8 to 2.0
TDK
DCT5EPL-UxxS002
8
10
0.8 to 2.4
TDK
DCT9.5/5ER-UxxS003
7.6
10
In general, choosing a transformer with a larger LP
results in higher efficiency (because a larger LP means
lower switch frequency and hence lower switching
ton
LP
Part Number
(μH)
N
toff
VSW
ISW
Vr
tf
VIN
VIN
ISW
VSW
tneg
Figure 6. Relationship of toff and switch output.
14
Allegro MicroSystems, Inc.
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 (508) 853-5000
www.allegromicro.com
Xenon Photoflash Capacitor Charger
with IGBT Driver
A8427
Typical Applications
Bias Input
2.3 to 5.5V
Battery Input
1.5 to 6.0V
1 : 10
+
VIN
COUT
C1
C2
100 μF
315 V
VBAT
TLIM
VOUT Detect
SW
10Meg
ISET
Control
Block
RSET
ISW sense
38.3 kΩ
REG
CHARGE
DONE
VPULLUP
100 kΩ
DONE
VIN
IGBT Driver
GSRC
TRIGGER
IGBT Gate
GSNK
GND
Application 2: Maintaining output target voltage
by directly monitoring the output voltage droop
(REG pin connected to a secondary-side resistor
divider).
Bias Input
2.3 to 5.5V
Battery Input
1.5 to 6.0V
1 : 10
+
C2
VIN
RSET
100 μF
315 V
VBAT
TLIM
ISET
COUT
C1
VOUT Detect
Control
Block
SW
ISW sense
REG
CHARGE
DONE
CREG
RREG
2.2 μF
10 MΩ
VPULLUP
100 kΩ
DONE
VIN
IGBT Driver
GSRC
TRIGGER
IGBT Gate
GSNK
GND
Application 3: Maintaining output target voltage
by predicting the output voltage droop (REG pin
connected to a primary-side RC network).
15
Allegro MicroSystems, Inc.
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 (508) 853-5000
www.allegromicro.com
Xenon Photoflash Capacitor Charger
with IGBT Driver
A8427
Package ES, 3 mm x 3 mm 16-Contact TQFN
with Exposed Thermal Pad
0.30
3.00 ±0.15
0.90
16
1
2
A
0.50
16
1
3.00 ±0.15
1.70
3.10
1.70
17X
D
SEATING
PLANE
0.08 C
+0.05
0.25 –0.07
C
3.10
C
PCB Layout Reference View
0.75 ±0.05
0.50
For reference only
(reference JEDEC MO-220WEED)
Dimensions in millimeters
Exact case and lead configuration at supplier discretion within limits shown
+0.15
0.40 –0.10
A Terminal #1 mark area
B
1.70
2
1
16
1.70
B Exposed thermal pad (reference only, terminal #1
identifier appearance at supplier discretion)
C Reference land pattern layout (reference IPC7351
QFN50P300X300X80-17W4M);
All pads a minimum of 0.20 mm from all adjacent pads; adjust as
necessary to meet application process requirements and PCB layout
tolerances; when mounting on a multilayer PCB, thermal vias at the
exposed thermal pad land can improve thermal dissipation (reference
EIA/JEDEC Standard JESD51-5)
D Coplanarity includes exposed thermal pad and terminals
16
Allegro MicroSystems, Inc.
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 (508) 853-5000
www.allegromicro.com
Xenon Photoflash Capacitor Charger
with IGBT Driver
A8427
Revision History
Revision
Revision Date
Description of Revision
Rev. 1
April 19, 2012
Update Selection Guide, miscellaneous format changes
Copyright ©2006-2012, Allegro MicroSystems, Inc.
Allegro MicroSystems, Inc. reserves the right to make, from time to time, such departures from the detail specifications as may be required to permit improvements in the performance, reliability, or manufacturability of its products. Before placing an order, the user is cautioned to verify that the
information being relied upon is current.
Allegro’s products are not to be used in life support devices or systems, if a failure of an Allegro product can reasonably be expected to cause the
failure of that life support device or system, or to affect the safety or effectiveness of that device or system.
The information included herein is believed to be accurate and reliable. However, Allegro MicroSystems, Inc. assumes no responsibility for its use;
nor for any infringement of patents or other rights of third parties which may result from its use.
For the latest version of this document, visit our website:
www.allegromicro.com
17
Allegro MicroSystems, Inc.
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 (508) 853-5000
www.allegromicro.com
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