A8436 Datasheet

A8436
Photoflash Capacitor Charger with IGBT Driver
Discontinued Product
This device is no longer in production. The device should not be
purchased for new design applications. Samples are no longer available.
Date of status change: December 10, 2012
Recommended Substitutions:
For existing customer transition, and for new customers or new applications, contact Allegro Sales.
NOTE: For detailed information on purchasing options, contact your
local Allegro field applications engineer or sales representative.
Allegro MicroSystems, Inc. reserves the right to make, from time to time, revisions to the anticipated product life cycle plan
for a product to accommodate changes in production capabilities, alternative product availabilities, or market demand. The
information included herein is believed to be accurate and reliable. However, Allegro MicroSystems, Inc. assumes no responsibility for its use; nor for any infringements of patents or other rights of third parties which may result from its use.
A8436
Photoflash Capacitor Charger with IGBT Driver
Features and Benefits
Description
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The A8436 is a highly integrated IC that charges photoflash
capacitors for digital and film cameras. It also features an
integrated IGBT driver that facilitates the flash discharge
function and saves board space.
Power with 1 Li+ or 2 Alkaline/NiMH/NiCAD batteries
Adjustable output voltage
>75% efficiency
Three levels of switch current limit: 1.0, 1.2, 1.4 A
Fast charge time
Charge complete indication
Integrated IGBT driver with trigger
No primary-side Schottky diode needed
Low-profile packages
Packages:
To charge the photoflash capacitor, the A8436 integrates a
40 V, DMOS switch that drives the transformer in a flyback
topology, allowing optimized design with tight coupling and
high efficiency. A proprietary control scheme optimizes the
capacitor charging time. Low quiescent current and low
shutdown current further improve system efficiency and
extend battery life.
Three levels of switch current limit are provided: 1.0, 1.2,
and 1.4 A. The level is determined by configuring the ILIM
pin as grounded, floating, or pulled up to IC supply voltage,
respectively.
The CHARGE pin enables the A8436 and starts the charging
of the output capacitor. When the designated output voltage
is reached, the A8436 stops the charging until the CHARGE
pin is toggled again. Pulling the CHARGE pin low stops
charging. The D̄¯Ō¯N̄¯Ē
¯ pin is an open-drain indicator of when
the designated output voltage is reached.
TDFN/MLP (suffix EJ)
10-pin, 3 mm × 3 mm
0.75 mm nominal overall height
MSOP (suffix LZ)
10-pin, 3 mm × 3 mm
1.10 mm maximum overall height
Approximate Scale 1:1
The A8436 can be used with two Alkaline/NiMH/NiCAD or one
single-cell Li+ battery connected to the transformer primary.
Connect the VIN pin to a 3.0 to 5.5 V supply, which can be
either the system rail or the Li+ battery, if used.
The A8436 is available in a very low profile (0.75 mm) 10terminal 3 mm ×3 mm MLP/TDFN package, making it ideal
for space-constrained applications, as well as an MSOP. They
are lead (Pb) free, with 100% matte-tin leadframe plating.
Typical Applications
Two Alkaline/NiMH/NiCAD or one Li+ battery
or 1.5 to 5.5 V
D1
VBATT
VOUT
T1
R5
100 k7
+
VBIAS 3.0 to 5.5 V
C1
0.1 μF
R4
C2
4.7 μF
10 k7
1.4 A
1.2 A (N.C.)
R1
R5
SW
1.0 A
100 k7
10 k7
IGBTDRV
GND
1.0 A
To IGBT Gate
10 k7
FB
DONE
Figure 1. Typical circuit with separate power supply to transformer
A8436-DS, Rev. 4
R6
10 k7
R1
SW
R3
A8436
CHARGE
TRIGGER
R7
D1
R2
VIN
ILIM
R3
A8436
C2
4.7 μF
10 k7
CHARGE
R6
C1
0.1 μF
R4
1.4 A
1.2 A (N.C.)
FB
DONE
T1
COUT
R2
VIN
ILIM
One Li+ battery
VBATT or 3.0 to 5.5 V
TRIGGER
R7
IGBTDRV
GND
To IGBT Gate
10 k7
Figure 2. Typical circuit with single power supply
VOUT
COUT
A8436
Photoflash Capacitor Charger with IGBT Driver
Description (continued)
Applications include:
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Digital camera flash
Film camera flash
Cell phone flash
Emergency strobe light
Selection Guide
Part Number
A8436EEJTR-T
A8436ELZTR-T
Package
Packing*
10-pin TDFN/MLP
10-pin MSOP
*Contact Allegro for additional packing options
1500 pieces per 7-in. reel
4000 pieces per 13-in. reel
Absolute Maximum Ratings
Characteristic
Symbol
SW pin
Rating
Units
VSW
Notes
–0.3 to 40
V
VIGBTDRV
–0.3 to VIN + 0.3
V
FB pin
VFB
–0.3 to VIN
V
All other pins
VX
Operating Ambient Temperature
TA
Maximum Junction Temperature
IGBTDRV pin
Storage Temperature
–0.3 to 7
V
–40 to 85
ºC
TJ(max)
150
ºC
Tstg
–55 to 150
ºC
Range E
Package Thermal Characteristics
Characteristic
Package Thermal Resistance
Symbol
RθJA
Test Conditions*
Rating Units
Package EJ, 4 layer PCB, based on JEDEC standard
45
ºC/W
Package LZ, 4 layer PCB, based on JEDEC standard
103
ºC/W
*Additional information is available on the Allegro website.
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
2
A8436
Photoflash Capacitor Charger with IGBT Driver
Functional Block Diagram
SW
DCM
Comparator
VIN
Control Logic
CMP3
18 µs
H→L
Triggered Timer
1.2 V
40 V
DMOS
Q
S SET Q
R
CMP2
CLR Q
ILIM
Comparator
ILIM
Adjustable
Reference
ILIM Decoder
Enable
Q
Q
SET
CLR
S
FB
R
CMP1
CHARGE
1.2 V
DONE
VIN
TRIGGER
One-Shot
GND
IGBTDRV
Device Pin-out Diagrams
Terminal List Table
Number
1
Name
NC
Function
No connection
NC
1
10 ILIM
IGBTDRV
2
9
FB
2
IGBTDRV
VIN
3
8
DONE
3
VIN
Power supply input
GND
4
7
TRIGGER
CHARGE
5
6
SW
4
GND
Device ground
5
CHARGE
6
SW
7
TRIGGER
Package EJ
10 ILIM
NC 1
IGBTDRV 2
9
FB
VIN 3
8
DONE
GND 4
7
TRIGGER
CHARGE 5
6
SW
8
¯N̄¯Ē¯
D̄¯Ō
9
FB
10
ILIM
IGBT driver gate drive output
Charging enable; set to low to power-off the A8436
Switch, internally connected to the DMOS power FET drain
Strobe signal input
Open drain, when pulled low by internal MOSFET, indicates that
charging target level has been reached
Output voltage feedback
Switch current limit setting; sets three discreet levels
Package LZ
(Top Views)
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
3
A8436
Photoflash Capacitor Charger with IGBT Driver
ELECTRICAL CHARACTERISTICS Typical values at TA = 25°C and VIN = 3.3 V (unless otherwise noted)
Characteristics
Supply Voltage*
Supply Current
Primary Side Current Limit
SW On Resistance
SW Leakage Current*
SW Maximum Off-Time
SW Maximum On-Time
CHARGE Input Current
CHARGE Input Voltage*
¯N̄¯Ē
¯ Output Leakage Current*
D̄¯Ō
¯N̄¯Ē
¯ Output Low Voltage*
D̄¯Ō
FB Voltage Threshold*
FB Input Current
UVLO Enable Threshold
UVLO Hysteresis
IGBT Driver
IGBTDRV On Resistance to VIN
IGBTDRV On Resistance to GND
TRIGGER Input Current
Symbol
Test Conditions
VIN
IIN
ISWLIM
RDS(On)SW
ISWLKG
tOFF(Max)
tON(Max)
ICHARGE
VCHARGE(H)
VCHARGE(L)
Charging
Charging done
Shutdown (VCHARGE = 0 V, VTRIGGER = 0 V)
VILIM < 1.0 V
ILIM pin floating
VILIM > VIN – 1.3 V
VIN = 3.3 V, ID = 800 mA, TA = 25°C
VSW = 35 V
VCHARGE = VIN
IDONELKG
VDONE(L)
VFB
IFB
VUVLO
¯N̄¯Ē¯ pin
32 μA into D̄¯Ō
VFB = 1.205 V
VIN rising
VUVLOHYS
RDS(On)I-V
VIN = 3.3 V, VIGBTDRV = 1.5 V
RDS(On)I-G
VIN = 3.3 V, VIGBTDRV = 1.5 V
ITRIGGER
VTRIGGER = VIN
VTRIGGER(H)
TRIGGER Input Voltage*
VTRIGGER(L)
Rgate=12 Ω, CLOAD = 6500 pF, VIN = 3.3 V
Propagation Delay, Rising
tDr
Propagation Delay, Falling
tDf
Rgate=12 Ω, CLOAD = 6500 pF, VIN = 3.3 V
Rgate=12 Ω, CLOAD = 6500 pF, VIN = 3.3 V
Output Rise Time
tr
Output Fall Time
tf
Rgate=12 Ω, CLOAD = 6500 pF, VIN = 3.3 V
*Guaranteed by design and characterization over operating temperature range, –40°C to 85°C.
Min.
Typ.
Max. Units
3
–
–
–
–
1.08
–
–
–
–
–
–
2
–
–
1.3
1
0.01
1.0
1.2
1.4
0.27
–
18
18
–
–
–
5.5
–
10
1
–
1.32
–
–
1
–
–
1
–
0.8
V
mA
μA
μA
A
A
A
Ω
μA
μs
μs
μA
V
V
–
–
1
μA
–
100
mV
–
1.187
–
2.55
–
–
–
–
2
–
–
–
–
–
1.205 1.223
–120
–
2.65 2.75
150
–
5
6
–
–
–
30
70
125
125
–
–
1
–
0.8
–
–
–
–
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
V
nA
V
mV
Ω
Ω
μA
V
V
ns
ns
ns
ns
4
A8436
Photoflash Capacitor Charger with IGBT Driver
Operation Timing Diagram
VUVLO
VIN
CHARGE
SW
Target VOUT
VOUT
DONE
TRIGGER
IGBTDRV
A
B
C
D
E
F
Explanation of Events:
A.
Start charging by pulling CHARGE to high, provided that VIN is above the VUVLO level.
B.
¯N̄¯Ē
¯ goes low, to signal the
Charging stops when VOUT reaches the target voltage. D̄¯Ō
completion of the charging process.
C.
Start a new charging process with a low-to-high transition at the CHARGE pin.
D.
Pull CHARGE to low, to put the controller in low-power standby mode.
E.
Charging does not start, because VIN is below VUVLO level when CHARGE goes high.
F.
After VIN goes above VUVLO, another low-to-high transition at the CHARGE pin is
required to start charging.
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115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
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5
A8436
Photoflash Capacitor Charger with IGBT Driver
Performance Characteristics
Tests performed using application circuit shown in figure 6 (unless otherwise noted)
Charging Waveforms
Symbol
C1
C4
t
Conditions
Parameter
VOUT
IBATT(Avg)
time
Parameter
VBATT
VBIAS
COUT
VOUT
Units/Division
50 V
200 mA
1s
Value
2.5 V
3.3 V
100 μF
IBATT
C4
C1
t
VOUT
Symbol
C1
C4
t
Conditions
Parameter
VOUT
IBATT(Avg)
time
Parameter
VBATT
VBIAS
COUT
Units/Division
50 V
200 mA
1s
Value
3.6 V
3.3 V
100 μF
IBATT
C4
C1
t
VOUT
Symbol
C1
C4
t
Conditions
Parameter
VOUT
IBATT(Avg)
time
Parameter
VBATT
VBIAS
COUT
Units/Division
50 V
200 mA
1s
Value
4.2 V
3.3 V
100 μF
IBATT
C4
C1
t
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115 Northeast Cutoff
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6
A8436
Photoflash Capacitor Charger with IGBT Driver
Performance Characteristics, continued
Charge Time
Efficiency
VBIAS = 3.3 V, COUT = 100 μF
Connect VBATT to a separate power supply
VBATT = VBIAS , TA = 25°C
90
7 7
80
Efficiency (%)
8 8
Charge Time (s)
Charge Time (s)
Tests performed using application circuit shown in figure 6 (unless otherwise noted)
6 6
5 5
VVOUT ==320
V
OUT 320 V
4 4
VVOUT ==300
V
OUT 300 V
3 3
2.5
2.5
70
60
50
2 2
2.0
2
VBATT = 5.0 V
VBATT = 4.2 V
VBATT = 3.0 V
33.0 3.53.5 4 4.0 4.5 4.5 5
VVBATT
(V)(V)
BATT
5.0
5.5
5.5
6
40
100
6.0
150
200
VOUT (V)
250
300
350
Typical Switching Waveform
VBATT
C3
VOUT
Symbol
C1
C2
C3
C4
t
Conditions
Parameter
VOUT
VSW
VBATT
IPrimary
time
Parameter
VOUT
VBATT
Units/Division
50 V
10 V
5V
500 mA
2 μs
Value
300 V
VIN
C2
VSW
IPrimary
C4
C1
t
IGBT Drive Timing Definition
50%
50%
TRIGGER
t Dr
IGBTDRV
10%
tr
t Df
90%
90%
tf
10%
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115 Northeast Cutoff
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7
A8436
Photoflash Capacitor Charger with IGBT Driver
Performance Characteristics, continued
IGBT Drive waveforms are measured with R-C load (12 Ω, 6800 pF)
IGBT Drive Performance
tr
Rising Signal
VIGBTDRV
Symbol
C2
C3
t
Conditions
Parameter
VIGBTDRV
VTRIGGER
time
Parameter
tDr
tr
CLOAD
Rgate
Units/Division
1V
1V
50 ns
Value
22.881 ns
63.125 ns
6800 pF
12 Ω
C2
VTRIGGER
C3
t
tf
Falling Signal
Symbol
C2
C3
t
Conditions
Parameter
VIGBTDRV
VTRIGGER
time
Parameter
tDf
tf
CLOAD
Rgate
Units/Division
1V
1V
50 ns
Value
27.427 ns
65.529 ns
6800 pF
12 Ω
C2
VIGBTDRV
C3
VTRIGGER
t
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115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
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8
A8436
Photoflash Capacitor Charger with IGBT Driver
Functional Description
Overview
Fast Charging and Timer Modes
The A8436 is a photoflash capacitor charger control IC with
adjustable input current limiting. It also integrates an IGBT
driver for strobe operation of the flash tube, dramatically saving
board space in comparison to discrete solutions for strobe flash
operation. The control logic is shown in the functional block
diagram.
The IC operates in the Fast Charging mode when the photoflash
capacitor, COUT, is only partially discharged. In Fast Charging
mode, the converter operates near the discontinuous boundary,
and a sensing circuit tracks the fly-back voltage at the SW node.
As soon as this voltage swings below 1.2 V, the internal MOSFET switch is turned on again, starting the next charging cycle.
The charging operation of the A8436 is started by a low-to-high
signal on the CHARGE pin, provided that VIN is above VUVLO
level. If CHARGE is already high before VIN reaches VUVLO ,
another low-to-high transition on the CHARGE pin is required
to start the charging. When a charging cycle is initiated, the
transformer primary side current, IPrimary, ramps up linearly at a
rate determined by the combined effect of the battery voltage,
VBATT , and the primary side inductance, LPrimary. When IPrimary
reaches the current limit, ISWLIM , set by configuring the ILIM
pin, the internal MOSFET is turned off immediately, allowing the
energy to be pushed into the photoflash capacitor, COUT, from the
secondary winding. The secondary side current drops linearly as
COUT charges.
The IC operates in the Timer mode when beginning to charge a
completely discharged photoflash capacitor, usually when the output voltage, VOUT, is less than approximately 10 to 20 V. Timer
mode is a fixed 18 μs off-time control. One advantage of the
A8436 watchdog timer control scheme is that it limits the initial
current surge and thus acts as a “soft-start.” As shown in figure 3,
the timer mode only lasts a small fraction of a second (usually <
100 ms). It can be recognized by its lower initial input charging
current as a result of a lower duty cycle. As output voltage rises to
more than 10 to 20 V, the adaptive Fast Charging mode takes over
the control, raising the average input current level.
While the internal MOSFET switch is turned off, the output
voltage, VOUT, is sensed by a resistor string, R1 through R3, connected between the anode of the output diode, D1, and ground.
This resistor string forms a voltage divider that feeds back to the
FB pin. The resistors must be sized to achieve a desired output
voltage level based on a typical value of 1.205 V at the FB pin.
As soon as VOUT reaches the desired value, the charging process
is terminated. The user may toggle the CHARGE pin to refresh
the photoflash capacitor.
Switch On-Time and Off-Time Control
The A8436 implements an adaptive on-time/off-time control. (For
circuit details, please refer to the the Control Logic block in the
simplified Functional Block Diagram on page 2.) On-time duration, tON , is determined by input voltage, VIN, transformer primary
inductance, LPrimary, and the set current limit, ISWLIM . Off-time
duration, tOFF , depends on the operating conditions during switch
off-time. The A8436 applies its two charging modes, Fast Charging mode and Timer mode, according to those conditions.
Timer
Mode
Fast Charging Mode
IBATT(Avg)
VOUT
Figure 3. Sequencing of Timer mode and Fast Charging mode (time
axis scale is 1 s per division)
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A8436
Photoflash Capacitor Charger with IGBT Driver
Charging Cycles for a Completely Discharged Photoflash Capacitor
VBATT
C3
Figure 4A. Initial two cyles of charging
a completely discharged photoflash
capacitor. In these two cycles, off-time
(VSW low) is controlled by the internal
18 μs timer (Timer mode). Note that, in the
first cycle, IPrimary starts near 0 A, but in
the second cycle, it starts at a higher level.
This indicates that the transformer core did
not reset during the first cycle.
VSW
C2
C4
C1
IPrimary
VOUT
t
VBATT
C3
VSW
Figure 4B. During the intermediate cycles,
the output voltage, VOUT, has increased.
ISecondary goes discontinuous, leading to
the ringing of VSW . The amplitude of the
ringing is not great enough, however,
to pull VSW below 1.2 V, so the A8436
remains in Timer mode.
C2
C4
IPrimary
VOUT
C1
t
VBATT
C3
VSW
Figure 4C. The final cycle of Timer mode
is shown, followed by a series of cycles in
Fast Charging mode. VSW is able to ring
down below 1.2 V in every cycle as a result
of increased VOUT , triggering the turn-on of
the main MOSFET switch.
C2
C4
Symbol
C1
C2
C3
C4
t
Conditions
Parameter
VOUT
VSW
VBATT
IPrimary
time
Parameter
VBATT
Units/Division
50 V
10 V
5V
500 mA
5 μs
Value
VIN
IPrimary
VOUT
C1
t
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10
A8436
Photoflash Capacitor Charger with IGBT Driver
To understand the Timer mode, it is noted that the secondary
winding charge current, ISecondary, decreases linearly at a rate of:
dISecondary
where:
dt
=
VOUT
LPrimary
N2
(1)
ISecondary is the secondary side current,
LPrimary is the primary side inductance, and
N is the transformer turns ratio (NSecondary / NPrimary).
Lower input current offers the advantage of a longer battery
lifetime. For faster charging time, however, use the highest
current limit.
ISWLIM may be adjusted during charging. Figure 5 shows a
waveform of ISWLIM being adjusted during charging. ISWLIM is
lowered from 1.4 to 1.2 A, and charging slows slightly at the
lower current level.
As shown in the three panels of figure 4, when the A8436 charges
a fully-discharged photoflash capacitor, ISecondary decreases very
slowly due to the low initial VOUT. The A8436 internal timer
(Timer mode) sets a maximum timeframe of 18 μs for the offtime as long as the SW node voltage is greater than 1.2 V. When
the off-time passes 18 μs, the internal MOSFET switch is turned
on, initiating the next charging cycle .
ISWLIM = 1.4 A
ISWLIM = 1.2 A
IIN(Avg)
Input Current Limiting
The peak input current, ISWLIM , can be set to three levels by
configuring the ILIM pin:
ISWLIM Setting
(A)
VOUT
ILIM Pin
Connection
1.0
External ground
1.2
Float
1.4
Pull up to IC supply voltage
with a 1 to 10 kΩ resistor
Figure 5. Reducing ISWLIM during charging
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A8436
Photoflash Capacitor Charger with IGBT Driver
Applications Information
LPrimary (μH), use the following formula:
Transformer Design
Turns Ratio. The minimum transformer turns ratio, N,
(Secondary:Primary) should be chosen based on the following
formula:
N≥
VOUT + VD_Drop
40 − VBATT
(2)
where:
VOUT (V) is the required output voltage level,
VD_Drop (V) is the forward voltage drop of the output diode(s),
VBATT (V) is the transformer battery supply, and
40 (V) is the rated voltage for the internal MOSFET switch,
representing the maximum allowable reflected voltage from the
output to the SW pin.
For example, if VBATT is 3.5 V and VD_Drop is 1.7 V (which could
be the case when two high voltage diodes were in series), and the
desired VOUT is 320 V, then the turns ratio should be at least 8.9.
In a worst case, when VBATT is highest and VD_Drop and VOUT are
at their maximum tolerance limit, N will be higher. Taking VBATT
= 5.5 V, VD_Drop = 2 V, and VOUT = 320 V × 102 % = 326.4 V as
the worst case condition, N can be determined to be 9.5.
In practice, always choose a turns ratio that is higher than the
calculated value to give some safety margin. In the worst case
example, a minimum turns ratio of N = 10 is recommended.
Primary Inductance. The A8436 has a minimum switch off-time,
tOFF(min) , of 300 ns, to ensure correct SW node voltage sensing.
As a loose guideline when choosing the primary inductance,
Two Alkaline/NiMH/NiCAD or one Li +
VBATT 1.5 to 5.5 V
D1
T1
R5
100 k7
+
VBIAS 3.0 to 5.5 V
C1
0.1 μF
R4
C2
4.7 μF
10 k7
R1
150 k7
LPrimary ≥
former design should minimize the leakage inductance to ensure
the turn-off voltage spike at the SW node does not exceed the
40 V limit. An achievable minimum leakage inductance for this
application, however, is usually compromised by an increase in
parasitic capacitance. Furthermore, the transformer secondary
capacitance should be minimized. Any secondary capacitance is
multiplied by N2 when reflected to the primary, leading to high
initial current swings when the switch turns on, and to reduced
efficiency.
VOUT
COUT
100 μF
330 V
SW
FB
DONE
R3
A8436
1.2 k7
CHARGE
R6
10 k7
TRIGGER
R7
IGBTDRV
GND
(3)
Leakage Inductance and Secondary Capacitance. The trans-
Symbol
To IGBT Gate
10 k7
Rating
C1
0.1 μF, X5R or X7R, 10 V
C2
4.7 μF, X5R or X7R, 10 V
D1
Fairchild Semiconductor BAV23S
(dual diode connected in series)
T1
Tokyo Coil Engineering T-16-024A,
LPrimary = 12 μH, N = 10.2
150 k7
VIN
.
Ideally, the charging time is not affected by transformer primary
inductance. In practice, however, it is recommended that a
primary inductance be chosen between 10 μH and 20 μH. When
LPrimary is much lower than 10 μH, the converter operates at
higher frequency, which increases switching loss proportionally.
This leads to lower efficiency and longer charging time. When
LPrimary is greater than 20 μH, the rating of the transformer must
be dramatically increased to handle the required power density,
and the series resistances are usually higher. A design that is
optimized to achieve a small footprint solution would have an
LPrimary of 12 to 14 μH, with minimized leakage inductance and
secondary capacitance, and minimized primary and secondary
series resistance. Please refer to the table Recommended
Components for more information.
R2
ILIM
300 × 10−9 × VOUT
N × ISWLIM
R1, R2
1206 resistors, 1 %
R3
0603 resistor, 1 %
R4, R5
Pull-up resistors
R6, R7
Pull-down resistors
Figure 6. Typical circuit for photoflash application. Configured for ISWLIM of 1.4 A.
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115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
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12
A8436
Photoflash Capacitor Charger with IGBT Driver
Adjusting Output Voltage
The A8436 senses output voltage during switch off-time. This
allows the voltage divider network, R1 through R3 (see figure
6), to be connected at the anode of the high voltage output diode,
D1, eliminating power loss due to the feedback network when
charging is complete. The output voltage can be adjusted by
selecting proper values of the voltage divider resistors. Use the
following equation to calculate values for Rx (Ω):
R1 + R2 VOUT
=
−1 .
R3
VFB
(4)
R1 and R2 together need to have a breakdown voltage of at
least 300 V. A typical 1206 surface mount resistor has a 150 V
breakdown voltage rating. It is recommended that R1 and R2
have similar values to ensure an even voltage stress between
them. Recommended values are:
R1 = R2 = 150 kΩ (1206)
R3 = 1.2 kΩ (0603)
which together yield a stop voltage of 303 V.
Using higher resistance values for R1, R2, and R3 does not offer
significant efficiency improvement, because the power loss of
the feedback network occurs mainly during switch off-time, and
because the off-time is only a small fraction of each charging
cycle.
Output Diode Selection
Choose the rectifying diode(s), D1, to have small parasitic
capacitance (short reverse recovery time) while satisfying the
reverse voltage and forward current requirements.
The peak reverse voltage of the diode, VD_Peak , occurs when the
Recommended Components Table
Component
Rating
0.1 μF, ± 10%, 16 V X7R ceramic
C1 Input Capacitor
capacitor (0603)
4.7 μF, ± 10%, 10 V, X5R ceramic
C2 Input Capacitor
capacitor (0805)
COUT Photoflash Capacitor 330 V, 100 μF (or 19 to 180 μF)
D1 Output Diode
R1 and R2 FB Resistors
R3 FB Resistors
T1 Transformer
internal MOSFET switch is closed, and the primary-side current
starts to ramp-up. It can be calculated as:
(5)
VD_ Peak = VOUT + N × VBATT .
The peak current of the rectifying diode, ID_Peak, is calculated as :
(6)
ID_ Peak = IPrimary_Peak / N .
Input Capacitor Selection
Ceramic capacitors with X5R or X7R dielectrics are recommended for the input capacitor, C2. It should be rated at least
4.7 μF / 6.3 V to decouple the battery input, VBATT , at the primary
of the transformer. When using a separate bias, VBIAS , for the
A8436 VIN supply, connect at least a 0.1 μF / 6.3 V bypass
capacitor to the VIN pin.
Layout Guidelines
Key to a good layout for the photoflash capacitor charger circuit
is to keep the parasitics minimized on the power switch loop
(transformer primary side) and the rectifier loop (secondary side).
Use short, thick traces for connections to the transformer primary
and SW pin.
Output voltage sensing circuit elements must be kept away from
switching nodes such as SW pin. Make sure that there is no GND
plane underneath R1 and R2, because parasitic capacitance to
ground will affect sensing accuracy. It is important that the D̄¯Ō¯
N̄¯Ē
¯ signal trace be routed away from the transformer and other
switching traces, in order to minimize noise pickup. In addition,
high voltage isolation rules must be followed carefully to avoid
breakdown failure of the circuit board.
Part Number
Source
GRM188R71C104KA01D
Murata
LMK212BJ475KG
Taiyo Yuden
EPH-331ELL101B131S
Chemi-Con
Philips Semiconductor,
Fairchild Semiconductor
Vishay
Yageo
Yageo
TDK
Tokyo Coil Engineering
Asatech
Kijima-Musen
2 x 250 V, 225 mA, 5 pF
BAV23S
2 x 300 V, 225 mA, 5 pF
150 kΩ, 1/4 W ± 1% (1206)
1.20 kΩ 1/10 W ± 1% (0603)
1:10.2, LPrimary = 14.5 μH
1:10.2, LPrimary = 12 μH
1:10, LPrimary = 10.8 μH
1:10.2, LPrimary = 9.8 μH
GSD2004S
9C12063A1503FKHFT
9T06031A1201FBHFT
LDT565630T-002
T-16-024A
ST-532517A
SBL-5.6-1
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
13
A8436
Photoflash Capacitor Charger with IGBT Driver
Package EJ, 10-Contact TDFN/MLP
0.30
3.00
0.85
0.50
10
10
3.00
1.65
3.10
A
1
2
1
2.38
0.75
C
0.25
PCB Layout Reference View
0.50
1
All dimensions nominal, not for tooling use
(reference JEDEC MO-229WEED)
Dimensions in millimeters
Exact case and lead configuration at supplier discretion within limits shown
2
0.40
1.65
B
10
2.38
A Terminal #1 mark area
B Exposed thermal pad (reference only, terminal #1
identifier appearance at supplier discretion)
C Reference land pattern layout (reference
IPC7351 SON50P300X300X80-11WEED3M);
All pads a minimum of 0.20 mm from all adjacent pads; adjust as
necessary to meet application process requirements and PCB layout
tolerances; when mounting on a multilayer PCB, thermal vias at the
exposed thermal pad land can improve thermal dissipation (reference
EIA/JEDEC Standard JESD51-5)
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
14
A8436
Photoflash Capacitor Charger with IGBT Driver
Package LZ, 10-Contact MSOP
3.00
0.30
0.50
0.50
10
3º
10
0.18
3.00
1.60
4.70
4.90
A
0.74
0.95
1
2
0.25
1
Seating Plane
Gauge Plane
2
B PCB Layout Reference View
SEATING
PLANE
0.23
1.10 MAX
0.50
0.10
All dimensions nominal, not for tooling use
(reference JEDEC MO-187 BA, except leads)
Dimensions in millimeters
Dimensions exclusive of mold flash, gate burrs, and dambar protrusions
Exact case and lead configuration at supplier discretion within limits shown
A Terminal #1 mark area
B Reference land pattern layout
(reference IPC7351 TSSOP50P490X110-10M);
All pads a minimum of 0.20 mm from all adjacent pads;
adjust as necessary to meet application process
requirements and PCB layout tolerances
Copyright ©2005, 2007, Allegro MicroSystems, Inc.
The products described here are manufactured under one or more U.S. patents or U.S. patents pending.
Allegro MicroSystems, Inc. reserves the right to make, from time to time, such departures from the detail specifications as may be required to permit improvements in the performance, reliability, or manufacturability of its products. Before placing an order, the user is cautioned to verify that the
information being relied upon is current.
Allegro’s products are not to be used in life support devices or systems, if a failure of an Allegro product can reasonably be expected to cause the
failure of that life support device or system, or to affect the safety or effectiveness of that device or system.
The information included herein is believed to be accurate and reliable. However, Allegro MicroSystems, Inc. assumes no responsibility for its use;
nor for any infringement of patents or other rights of third parties which may result from its use.
For the latest version of this document, visit our website:
www.allegromicro.com
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
15
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