485BC

MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
QFN20 3x3, 0.4P
CASE 485BC−01
ISSUE O
SCALE 2:1
ÍÍÍ
ÍÍÍ
ÍÍÍ
D
PIN ONE
REFERENCE
A B
DATE 15 OCT 2009
L
L
L1
DETAIL A
E
ALTERNATE TERMINAL
CONSTRUCTIONS
0.10 C
2X
ÉÉÉ
ÉÉÉ
EXPOSED Cu
2X
0.10 C
TOP VIEW
DETAIL B
0.05 C
A3
DETAIL B
A
0.05 C
MOLD CMPD
C
SIDE VIEW
GENERIC
MARKING DIAGRAM*
SEATING
PLANE
D2
DETAIL A
1
6
11
20X
K
E2
e
L
16
20X
BOTTOM VIEW
b
0.07 C A
B
NOTE 3
0.05 C
XXXXX
XXXXX
ALYWG
G
XXXX = Specific Device Code
A
= Assembly Location
L
= Wafer Lot
Y
= Year
W
= Work Week
G
= Pb−Free Package
(Note: Microdot may be in either location)
*This information is generic. Please refer
to device data sheet for actual part
marking. Pb−Free indicator, “G”, may
or not be present.
1
20X
A1
ALTERNATE
CONSTRUCTIONS
A1
NOTE 4
ÉÉ
ÇÇ
ÇÇ
A3
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b APPLIES TO PLATED
TERMINAL AND IS MEASURED BETWEEN
0.15 AND 0.30mm FROM TERMINAL.
4. COPLANARITY APPLIES TO THE EXPOSED
PAD AS WELL AS THE TERMINALS.
MILLIMETERS
DIM
MIN
MAX
A
0.80
1.00
A1
--0.05
A3
0.20 REF
b
0.15
0.25
D
3.00 BSC
D2
1.70
1.90
E
3.00 BSC
E2
1.70
1.90
e
0.40 BSC
K
0.30 REF
L
0.20
0.40
L1
0.00
0.15
SOLDERING FOOTPRINT*
20X
0.52
1
2X
3.30
2X
1.86
20X
0.40
PITCH
0.26
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
DOCUMENT NUMBER:
STATUS:
98AON46007E
ON SEMICONDUCTOR STANDARD
NEW STANDARD:
© Semiconductor Components Industries, LLC, 2002
October, DESCRIPTION:
2002 − Rev. 0
QFN20 3X3, 0.4P
http://onsemi.com
1
Electronic versions are uncontrolled except when
accessed directly from the Document Repository. Printed
versions are uncontrolled except when stamped
“CONTROLLED COPY” in red.
Case Outline Number:
PAGE 1 OFXXX
2
DOCUMENT NUMBER:
98AON46007E
PAGE 2 OF 2
ISSUE
O
REVISION
RELEASED FOR PRODUCTION. REQ. BY J. FEELEY.
DATE
15 OCT 2009
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
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intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
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© Semiconductor Components Industries, LLC, 2009
October, 2009 − Rev. 01O
Case Outline Number:
485BC
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