ISL59123 ® Data Sheet April 4, 2007 FN6432.1 Triple Channel Video Driver with LPF Features The ISL59123 is a triple channel reconstruction filter with a -3dB roll-off frequency of 18MHz. Operating from single supplies ranging from +2.5V to +3.6V and sinking a low 4mA quiescent current, the ISL59123 is ideally suited for low power, battery-operated applications. An enable pin allows the part to be placed in a 500nA shutdown mode in less than 30ns. • 3rd order 18MHz reconstruction filter The ISL59123 is designed to meet the needs for extremely low power and bandwidth requirements in battery-operated communication, instrumentation, and modern industrial applications such as video on demand, cable set-top boxes, MP3 players, and HDTV. The ISL59123 is offered in a space-saving chipscale package guaranteed to a 0.57mm maximum height constraint and specified for operation from -40°C to +85°C temperature range. • Pb-free plus anneal available (RoHS compliant) Block Diagram • Cable set-top boxes • 4mA typical supply current • Less than 500nA maximum power-down current • 2.5V to 3.6V supply range • CSP package Applications • Video amplifiers • Portable and handheld products • Communications devices • Video on demand • Satellite set-top boxes 50mV VIN1 18MHz - + • MP3 players VOUT1 X2 • HDTV • Personal video recorder Pinout 50mV VIN2 18MHz - + ISL59123 (9 BALL WLCSP) TOP VIEW VOUT2 X2 1 2 3 VIN1 GND VOUT1 VIN2 EN VOUT2 VIN3 VDD VOUT3 50mV VIN3 EN 18MHz - + A VOUT3 X2 B BIASING AND CONTROL C Ordering Information PART NUMBER (Note) ISL59123IIZ-T7 PART MARKING TAPE AND REEL 123Z 7” TEMP. RANGE (°C) -40 to +85 PACKAGE (Pb-free) 9 Ball 3x3 WLCSP PKG. DWG. # W3x3.9B NOTE: Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020. 1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright © Intersil Americas Inc. 2007. All Rights Reserved. All other trademarks mentioned are the property of their respective owners. ISL59123 Absolute Maximum Ratings (TA = +25°C) Thermal Information Supply Voltage from VDD to GND . . . . . . . . . . . . . . . . . . . . . . . 4.2V Input Voltage . . . . . . . . . . . . . . . . . . . . . . . VDD +0.3V to GND -0.3V Continuous Output Current . . . . . . . . . . . . . . . . . . . . . . . . . . . 40mA Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . .-65°C to +125°C Ambient Operating Temperature . . . . . . . . . . . . . . . .-40°C to +85°C Operating Junction Temperature . . . . . . . . . . . . . . . . . . . . . . +125°C ESD Rating Human Body Model (Per MIL-STD-883 Method 3015.7) . . .2500V Machine Model (Per EIAJ ED-4701 Method C-111) . . . . . . . .300V Thermal Resistance (Typical) θJA (°C/W) 9 Ball WLCSP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 105 Pb-free reflow profile . . . . . . . . . . . . . . . . . . . . . . . . . .see link below http://www.intersil.com/pbfree/Pb-FreeReflow.asp CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. IMPORTANT NOTE: All parameters having Min/Max specifications are guaranteed. Typ values are for information purposes only. Unless otherwise noted, all tests are at the specified temperature and are pulsed tests, therefore: TJ = TC = TA Electrical Specifications PARAMETER VDD = 3.3V, TA = +25°C, RSOURCE = 200Ω, RL = 150Ω to GND, unless otherwise specified. DESCRIPTION CONDITIONS MIN TYP MAX UNIT 3.6 V 6.0 mA 0.5 µA 10 pF 0.01 1 µA 45 100 150 mV 1.95 1.99 2.04 V/V ±0.5 ±1.75 % INPUT CHARACTERISTICS VDD Supply Voltage Range 2.5 IDD Quiescent Supply Current VIN = 500mV, EN = VDD, no load IDD_OFF Shutdown Supply Current EN = 0V CIN VIN Input Capacitance IIN VIN Input Bias Current 0.0V < VIN < 2.0V VOLS Output Level Shift Voltage VIN = 0V, no load (minimum output voltage) AV Voltage Gain RL = 150Ω ΔAV Channel-to Channel Gain Mismatch PSRR DC Power Supply Rejection VDD = 2.7V to 3.3V VOH Output Voltage High Swing VIN = 2V, RL = 150Ω to GND ISC Output Short-Circuit Current 4.0 63 dB 2.85 3.1 V VIN = 2V, VOUT shorted to GND through 10Ω 100 140 mA VIN = 0V, VOUT shorted to VDD through 10Ω 140 200 mA IENABLE Enable Input Current 0V < VEN < 3.3V ±0.003 VIL Disable Threshold VDD = 2.7V to 3.3V VIH Enable Threshold VDD = 2.7V to 3.3V 2.0 ROUT Shutdown Output Impedance EN = 0V DC 5.0 ±1 µA 0.8 V V 6.4 8.0 kΩ EN = 0V, f = 4.5MHz 1.5 kΩ 18 MHz AC PERFORMANCE BW -3dB Bandwidth RL = 150Ω, CL = 5pF Passband Gain Normalized Gain at 11MHz RL = 150Ω, CL = 5pF -0.5 Stopband Gain Normalized Stopband Gain (minimum limits guaranteed by design and bench characterization) f = 43MHz -11 -16 dB f = 54MHz -16 -21 dB dG Differential Gain NTSC and PAL 0.10 % dP Differential Phase NTSC and PAL 0.5 ° D/DT Group Delay Variation f = 400kHz, 5MHz 5.4 ns SNR Signal To Noise Ratio 100% white signal 65 dB +SR Positive Slew Rate 10% to 90%, VIN = 1V step 55 V/µs 2 40 +0.5 dB FN6432.1 April 4, 2007 ISL59123 Electrical Specifications PARAMETER VDD = 3.3V, TA = +25°C, RSOURCE = 200Ω, RL = 150Ω to GND, unless otherwise specified. (Continued) DESCRIPTION CONDITIONS MIN TYP MAX UNIT 50 60 V/µs -SR Negative Slew Rate 90% to 10%, VIN = 1V step tF Fall Time 2.5VSTEP, 80% to 20% 25 ns tR Rise Time 2.5VSTEP, 20% to 80% 22 ns tON Enable Time VIN = 500mV, VOUT to 1% 250 ns tOFF Disable Time VIN = 500mV, VOUT to 1% 30 ns Pin Descriptions PIN NUMBER PIN NAME DESCRIPTION A1 VIN1 Video input for Channel 1 A2 GND Ground A3 VOUT1 B1 VIN2 B2 EN B3 VOUT2 C1 VIN3 Video input for Channel 3 C2 VDD Positive power supply C3 VOUT3 Video output for Channel 1 Video input for Channel 2 Enable Video output for Channel 2 Video output for Channel 3 Component Video Connection Diagram 3.3V 0.1μF COMPONENT VIDEO CABLE V DD 50mV VIN1 Y 18MHz CURRENT DAC - + X2 VOUT1 YOUT 75Ω 75Ω 200Ω 50mV VIN2 PB 18MHz CURRENT DAC - + X2 VOUT2 PBOUT 75Ω 75Ω 200Ω 50mV VIN3 PR 18MHz CURRENT DAC - + X2 VOUT3 PROUT 75Ω 200Ω 75Ω EN μC OR TIE TO 3.3V BIASING AND CONTROL 3 FN6432.1 April 4, 2007 ISL59123 Composite and S-Video Connection Diagram 3.3V 0.1μF V DD S-VIDEO CABLE 50mV Y (LUMA) VIN1 CURRENT DAC 18MHz - + X2 VOUT1 YOUT 75Ω 200Ω 50mV VIN2 C (CHROMA) CURRENT DAC 18MHz - + VOUT2 COUT X2 75Ω 200Ω CVBS 50mV VIN3 18MHz CURRENT DAC - + 75Ω VOUT3 75Ω CVBSOUT X2 75Ω 200Ω 75Ω EN μC OR TIE TO 3.3V 4 BIASING AND CONTROL FN6432.1 April 4, 2007 ISL59123 Typical Performance Curves VDD = +3.3V, RL = 150Ω, unless otherwise noted 5.0 VDD = +3.3V RL = 150Ω INPUT SWING = +0.3V TO +1.0V RSOURCE = 200Ω 4.0 3.0 0 -10 -20 1.0 GAIN (dB) GAIN (dB) 2.0 0.0 -1.0 -2.0 -30 -40 -50 VDD = +3.3V RL = 150Ω INPUT SWING = +0.3V TO +1.0V RSOURCE = 200Ω -3.0 -60 -4.0 -70 0.1M -5.0 0.1M 1M 10M FREQUENCY (Hz) 100M FIGURE 1. GAIN vs FREQUENCY -0.1dB 1M 10M 100M FREQUENCY (Hz) 1G FIGURE 2. GAIN vs FREQUENCY -3dB POINT 10 3.5 CL = 27pF 0 3.0 -10 2.5 VOUT (VP-P) GAIN (dB) -20 -30 -40 CL = 10pF 2.0 1.5 -50 1.0 -60 -70 VDD = +3.3V RL = 150Ω INPUT SWING = +0.3V TO +1.0V RSOURCE = 200Ω -80 0.1M 0.5 0 1M 10M FREQUENCY (Hz) 0 100M FIGURE 3. GAIN vs FREQUENCY FOR VARIOUS CLOAD 0.5 1.0 1.5 2.0 2.5 VIN (VP-P) 3.0 3.5 4.0 FIGURE 4. MAXIMUM OUTPUT MAGNITUDE vs INPUT MAGNITUDE 250 0 200 -10 150 VDD = +3.3V VAC = 100mVP-P -20 PSRR (dB) PHASE (°) 100 50 0 -50 -30 -40 -50 -100 -60 -150 -70 -200 -250 0.1M 1M 10M FREQUENCY (Hz) FIGURE 5. PHASE vs FREQUENCY 5 100M -80 0.1M 1M 10M FREQUENCY (Hz) 100M FIGURE 6. PSRR vs FREQUENCY FN6432.1 April 4, 2007 ISL59123 Typical Performance Curves VDD = +3.3V, RL = 150Ω, unless otherwise noted (Continued) 35 0 30 -20 VDD = +3.3V VIN3 to VOUT2 -40 ISOLATION (dB) IMPEDANCE (Ω) 25 VIN2 to VOUT1 VIN1 to VOUT2 20 15 -60 -80 10 -100 5 -120 VIN3 to VOUT1 VIN2 to VOUT2 0 0.01M 0.1M 1.0M FREQUENCY (Hz) 10M -140 0.1M 100M 3.05 6 3.00 5 2.95 2.90 2.85 2.80 0 100 200 300 400 500 600 LOAD RESISTANCE (Ω) 700 800 FIGURE 9. MAXIMUM OUTPUT vs LOAD RESISTANCE 10M FREQUENCY (Hz) 100M 1G 4 3 2 1 VDD = +3.3V fIN = 3MHz 2.75 1M FIGURE 8. ISOLATION vs FREQUENCY SUPPLY CURRENT (mA) MAX OUTPUT MAGNITUDE (VP-P) FIGURE 7. OUTPUT IMPEDANCE vs FREQUENCY 2.70 VIN1 to VOUT3 NO INPUT NO LOAD 900 0 0.5 1.0 1.5 2.0 2.5 3.0 SUPPLY VOLTAGE (V) 3.5 FIGURE 10. SUPPLY CURRENT vs SUPPLY VOLTAGE TIME SCALE = 100ns/DIV TIME SCALE = 100ns/DIV VDD = +3.3V RL = 150Ω VOUT = 1VP-P VDD = +3.3V RL = 150Ω VOUT = 200mVP-P tRISE = 20.07ns 4.0 tRISE = 19.03ns tFALL = 21.22ns tFALL = 20.49ns FIGURE 11. LARGE SIGNAL STEP RESPONSE 6 FIGURE 12. SMALL SIGNAL STEP RESPONSE FN6432.1 April 4, 2007 ISL59123 Typical Performance Curves VDD = +3.3V, RL = 150Ω, unless otherwise noted (Continued) TIME SCALE = 50ns/DIV TIME SCALE = 10ns/DIV ENABLE SIGNAL OUTPUT SIGNAL OUTPUT SIGNAL DISABLE SIGNAL FIGURE 13. ENABLE TIME FIGURE 14. DISABLE TIME 0 0 VDD = +3.3V VOUT = 2VP-P, SINE WAVE RL = 150Ω -20 THD -30 -40 -50 -60 VDD = +3.3V fIN = 500kHz RL = 150Ω -10 HARMONIC DISTORTION (dBc) HARMONIC DISTORTION (dBc) -10 2ND HD -20 -30 THD -40 3RD HD -50 2ND HD -60 -70 -70 3RD HD -80 -80 0M 1M 2M 3M 4M 5M 6M 0 7M 0.5 FIGURE 15. HARMONIC DISTORTION vs FREQUENCY 1.5 2.0 2.5 3.0 FIGURE 16. HARMONIC DISTORTION vs OUTPUT VOLTAGE 30 25 25 20 BANDWIDTH (MHz) GROUP DELAY (ns) 1.0 OUTPUT VOLTAGE (VP-P) FREQUENCY (Hz) 20 15 10 15 10 5 5 VDD = +3.3V RL = 150Ω 0 0.1M 0 1M 10M FREQUENCY (Hz) FIGURE 17. GROUP DELAY vs FREQUENCY 7 100M 0 50 100 150 200 250 300 350 INPUT RESISTANCE (Ω) 400 450 500 FIGURE 18. -3dB BANDWIDTH vs INPUT RESISTANCE FN6432.1 April 4, 2007 ISL59123 Typical Performance Curves VDD = +3.3V, RL = 150Ω, unless otherwise noted (Continued) 80 0.10 70 DIFFERENTIAL GAIN (%) SLEW RATE (V/μs) 60 50 40 NEGATIVE SLEW 30 POSITIVE SLEW 20 2.0 2.2 2.4 2.6 2.8 3.0 3.2 3.4 SUPPLY VOLTAGE (V) 3.6 3.8 0.06 0.04 0.02 0.00 -0.02 VOUT = 2VP-P RL = 150Ω 10 0 RL = 150Ω VAC = 40mV FREQ = 3.58MHz VDD = +3.3V AV = +2 0.08 -0.04 0.3 4.0 0.4 FIGURE 19. SLEW RATE vs SUPPLY VOLTAGE 0.5 0.6 0.7 0.8 INPUT DC LEVEL (V) 0.9 1.0 FIGURE 20. DIFFERENTIAL GAIN 300 0.45 NOISE FLOOR (nV/ ROOT Hz) 0.40 0.35 PHASE (°) 0.30 0.25 0.20 0.15 RL = 150Ω VAC = 40mV FREQ = 3.58MHz VDD = +3.3V AV = +2 0.10 0.05 0 0.3 0.4 0.5 0.6 0.7 INPUT DC LEVEL 0.8 0.9 1.0 250 200 150 100 50 0 0.01M FIGURE 21. DIFFERENTIAL PHASE 0.10M 1.00M FREQUENCY (Hz) FIGURE 22. UNWEIGHTED NOISE FLOOR JEDEC JESD51-3 LOW EFFECTIVE THERMAL CONDUCTIVITY TEST BOARD JEDEC JESD51-7 HIGH EFFECTIVE THERMAL CONDUCTIVITY TEST BOARD 1 1.4 0.9 0.8 POWER DISSIPATION (W) POWER DISSIPATION (W) 10.0M 0.7 0.6 462mW 0.5 WLCSP (3x3 BUMP) 0.4 θJA=216°C/W 0.3 0.2 0.1 1.2 952mW 1 WLCSP (3x3 BUMP) 0.8 θJA=105°C/W 0.6 0.4 0.2 0 0 25 50 75 85 100 125 150 AMBIENT TEMPERATURE (°C) FIGURE 23. PACKAGE POWER DISSIPATION vs AMBIENT TEMPERATURE 8 0 0 25 50 75 85 100 125 150 AMBIENT TEMPERATURE (°C) FIGURE 24. PACKAGE POWER DISSIPATION vs AMBIENT TEMPERATURE FN6432.1 April 4, 2007 ISL59123 Application Information Where: The ISL59123 is a single-supply rail-to-rail triple video lowpass filter and amplifier with a -3dB bandwidth of 18MHz. It provides anti-aliasing for component, s-video, and composite video signals. Its small size and low power make the ISL59123 ideal for portable video applications. The Sallen Key Low Pass Filter The Sallen Key is a classic low pass configuration. This provides a very stable low pass function, and in the case of the ISL59123, a three-pole roll-off at 18MHz. The three-pole function is accomplished with an RC low pass network placed in series with and before the Sallen Key. The first pole is formed by an RC network (including the impedance of the source driving the ISL59123), with poles two and three generated by a Sallen Key, creating a three-pole roll-off characteristic at 18MHz. Output Coupling TJMAX = Maximum junction temperature TAMAX = Maximum ambient temperature θJA = Thermal resistance of the package The maximum power dissipation actually produced by an IC is the total quiescent supply current times the total power supply voltage, plus the power in the IC due to the load, or: for sourcing use Equation 2: V OUT PD MAX = V S × I SMAX + ( V S – V OUT ) × ---------------R L (EQ. 2) for sinking use Equation 3: PD MAX = V S × I SMAX + ( V OUT – V S ) × I LOAD (EQ. 3) Where: The ISL59123 can be AC or DC coupled to its output. When AC coupled, a 220µF coupling capacitor is recommended to ensure that low frequencies are passed, preventing video “tilt” or “droop” across a line. Output Drive Capability VS = Supply voltage ISMAX = Maximum quiescent supply current VOUT = Maximum output voltage of the application RLOAD = Load resistance tied to ground The ISL59123 does not have internal short circuit protection circuitry. If the output is shorted indefinitely, the power dissipation could easily overheat the die or the current could eventually compromise metal integrity. Maximum reliability is maintained if the output current never exceeds ±40mA. This limit is set by the design of the internal metal interconnect. Note that for transient short circuits, the part is robust. Short circuit protection can be provided externally with a back match resistor in series with the output placed close as possible to the output pin. In video applications this would be a 75Ω resistor and will provide adequate short circuit protection to the device. Care should still be taken not to stress the device with a short at the output. Power Dissipation With the high output drive capability of the ISL59123, it is possible to exceed the +125°C absolute maximum junction temperature under certain load current conditions. Therefore, it is important to calculate the maximum junction temperature for an application to determine if load conditions or package types need to be modified to assure operation of the amplifier in a safe operating area. ILOAD = Load current Power Supply Bypassing Printed Circuit Board Layout As with any modern operational amplifier, a good printed circuit board layout is necessary for optimum performance. Lead lengths should be as short as possible. The power supply pin must be well bypassed to reduce the risk of oscillation. For normal single supply operation, a single 4.7µF tantalum capacitor in parallel with a 0.1µF ceramic capacitor from VDD to GND will suffice. Printed Circuit Board Layout For good AC performance, parasitic capacitance should be kept to minimum. Use of wire wound resistors should be avoided because of their additional series inductance. Use of sockets should also be avoided if possible. Sockets add parasitic inductance and capacitance that can result in compromised performance. The maximum power dissipation allowed in a package is determined according to Equation 1: T JMAX – T AMAX PD MAX = --------------------------------------------θ JA (EQ. 1) 9 FN6432.1 April 4, 2007 ISL59123 Wafer Level Chip Scale Package (WLCSP) W3x3.9B 3x3 ARRAY 9 BALL WAFER LEVEL CHIP SCALE PACKAGE (Intersil Standard) E SYMBOL MILLIMETERS NOTES A 0.54 Min, 0.65 Max - PIN A1 ID AREA D TOP VIEW bb A2 A A1 b A1 0.24 ±0.03 - A2 0.355 ±0.03 - b 0.32 ±0.03 - bb θ 0.30 REF. - D 1.45 ±0.05 - D1 1.00 BASIC - E 1.45 ±0.05 - E1 1.00 BASIC - e 0.50 BASIC - SD 0.00 BASIC - N 9 3 Rev. 0 6/06 SIDE VIEW NOTES: 1. Dimensions are in Millimeters. E1 2. Dimensioning and tolerancing conform to ASME 14.5M-1994. 3. Symbol “N” is the actual number of solder balls. C 4. Reference JEDEC MO-211-C, variation DD. SD D1 B A 1 2 3 b BOTTOM VIEW All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems. Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com 10 FN6432.1 April 4, 2007