RMKHT (CNHT) www.vishay.com Vishay Sfernice High Temperature (230 °C) Wirebondable Thin Film Chip Resistors and Resistor Networks FEATURES • Operating temperature range: -55 °C; +215 °C • Storage temperature: -55 °C; +230 °C • Wirebondable (aluminum pads) • Aluminum or gold pads • Large selection of sizes available • Custom networks available on request (CNHT) • Temperature coefficient down to ± 15 ppm/°C (-55 °C; +215 °C) INTRODUCTION • Tolerance down to ± 0.05 % For applications such as down hole applications, the need for parts able to withstand very severe conditions (temperature as high as 215 °C powered or up to 230 °C un-powered) has leaded Vishay Sfernice to push out the limit of the thin film technology. Designers might read the application note “Power Dissipation Considerations in High Precision Vishay Sfernice Thin Film Chip Resistors and Arrays (P, PRA, etc…) (High Temperature Application)” www.vishay.com/doc?53047 in conjunction with this datasheet to help them to properly design their PCBs and get the best performances of the RMKHT. Vishay Sfernice research and development engineers will be willing to support any customer design considerations. • Temperature coefficient remains at ± 15 ppm/°C after long term storage at 230 °C • Material categorization: for definitions of compliance please see www.vishay.com/doc?99912 TYPICAL PERFORMANCE TCR ABS TRACKING (1) ± 25 ppm/°C 2 ppm/°C ABS RATIO (1) ± 0.05 % 0.02 % TOL. Note (1) When applicable (networks only). MECHANICAL SPECIFICATIONS Resistive element Nichrome (NiCr) Substrate material Silicon (size 22, 33, 55, 515) - alumina (other sizes) Bonding pads Aluminum (Al) or gold (Au) Passivation Silicon nitride (Si3N4) Back metallization (2) Gold (thickness = 0.5 μm typical) on nickel barrier (1 μm typical) Note When applicable (only on alumina substrate). Drift (%) (2) 2.0 1.8 1.6 1.4 1.2 1.0 0.8 0.6 0.4 0.2 With Pd (Tj = 230 °C) T = 185 °C T = 200 °C T = 215 °C T = 230 °C 0 2000 4000 6000 8000 t (h) 10 000 12 000 14 000 Note • TCR (-55 °C; +215 °C) remains unchanged after 15 000 h storage. Revision: 10-Jul-15 Document Number: 60075 1 For technical questions, contact: [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 RMKHT (CNHT) www.vishay.com Vishay Sfernice SCHEMATIC WIREBONDABLE CHIP RESISTORS WIREBONDABLE RESISTORS NETWORKS RMKHT55 RMKHT22 RMKHT48 7 6 R R R4 RMKHT33 R3 8 5 R2 R1 R2 1 4 R1 R1 = R2 = R RMKHT515 2 3 R1 = R2 = R3 = R4 = R R RMKHT408 7 6 8 15 5 16 RMKHT0603 R RMKHT0805 R1 R2 R3 RMKHT816 13 12 14 11 10 R1 R2 R3 R4 R5 R6 R7 R8 9 R4 1 8 R 1 2 3 4 R1 = R2 = R3 = R4 = R RMKHT2010 RMKHT508 7 6 8 2 3 4 5 6 7 R1 = R2 = R3 = R4 = R5 = R6 = R7 = R8 = R 13 5 RMKHT914 11 10 12 9 8 RMKHT1206 R9 R2 R R4 14 R2 R4 R6 R8 NC R5 R R1 NC R3 R1 1 2 3 4 R1 = R2 = R3 = R4 = R5 = R R3 R5 R7 7 1 2 3 4 5 6 R1 = R2 = R3 = R4 = R5 = R6 = R7 = R8 = R9 = R Rated Power (%) POWER DERATING CURVE 350 300 250 200 150 100 50 0 0 50 100 150 200 250 Ambient Temperature in °C Revision: 10-Jul-15 Document Number: 60075 2 For technical questions, contact: [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 RMKHT (CNHT) www.vishay.com Vishay Sfernice PATTERN WIREBONDABLE CHIP RESISTORS RMKHT22 B C E WIREBONDABLE RESISTORS NETWORKS RMKHT55 B E RMKHT33 C RMKHT48 B F AG G D C B F C A G G F A H D D F E RMKHT515 B G F E C E A H A D D RMKHT408 RMKHT508 F C B F RMKHT0805 B RMKHT0603 B E C C E A G A D E D A D F F RMKHT1206 B RMKHT816 RMKHT914 B C E F D A C G I H J A F D RMKHT2010 B E C E DIMENSIONS in millimeters D A SERIES SERIES A B C ± 0.05 ± 0.05 max. E F G RMKHT22 0.58 0.58 0.4 0.08 0.08 0.354 0.354 RMKHT55 1.32 1.32 0.4 0.11 0.26 0.87 RMKHT515 1.32 3.75 0.4 0.96 0.16 3.3 RMKHT0603 0.9 1.8 0.45 0.68 0.265 1.365 RMKHT0805 1.25 2.05 0.45 1.03 0.265 1.615 RMKHT1206 1.725 3.2 0.45 1.505 0.29 RMKHT2010 5.23 0.45 2.42 0.518 4.54 2.64 Revision: 10-Jul-15 G H I J 0.83 0.83 2 2 1.6 2.6 0.4 0.11 0.36 0.65 1.25 1.7 3.4 0.4. 0.13 0.25 0.62 0.69 0.35 0.47 0.225 RMKHT816 D F RMKHT48 RMKHT508 DIMENSIONS in millimeters E RMKHT33 RMKHT408 F A B C D ± 0.05 ± 0.05 max. RMKHT914 0.4 0.08 0.16 0.3 0.22 0.6 0.4 0.1 0.39 0.57 0.12 0.69 1.02 2.74 Document Number: 60075 3 For technical questions, contact: [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 RMKHT (CNHT) www.vishay.com Vishay Sfernice STANDARD ELECTRICAL SPECIFICATIONS - Bare Resistors Chips MODEL SIZE RMKHT22 RMKHT55 RMKHT515 RMKHT0603 RMKHT0805 RMKHT1206 RMKHT2010 0202 0505 0515 0603 0805 1206 2010 RESISTANCE RANGE (1) 10 to 500K 150 to 2M 100 to 5M 10 to 320K 10 to 720K 10 to 2.7M 10 to 7.5M TCR (2) -55 °C; +215 °C ± ppm/°C 15, 30 15, 30 15, 30 15, 30 15, 30 15, 30 15, 30 TOLERANCE ±% 0.05, 0.1, 0.5, 1 0.05, 0.1, 0.5, 1 0.05, 0.1, 0.5, 1 0.05, 0.1, 0.5, 1 0.05, 0.1, 0.5, 1 0.05, 0.1, 0.5, 1 0.05, 0.1, 0.5, 1 POWER RATING (3) P70 °C W 0.05 0.25 0.5 0.125 0.2 0.33 1 POWER RATING (3) P215 °C W 0.005 0.025 0.05 0.0375 0.06 0.1 0.2 (5) PERFORMANCES - Bare Resistors Chips TEST Limiting voltage Operating temperature range Max. temperature resistive element Max. substrate temperature Load life stability Storage temperature range Shelf life stability SPECIFICATIONS From 75 V to 300 V (depending on size) (4) -55 °C; +215 °C 220 °C 230 °C ± 0.35 % -55 °C; +230 °C ± 0.6 % typ. (± 0.8 % max.) CONDITIONS 2000 h / 220 °C (ambient) at Pn 15 000 h / 230 °C STANDARD ELECTRICAL SPECIFICATIONS - Bare Resistors Networks MODEL RESISTANCE ABSOLUTE SIZE RANGE (1) TOLERANCE ±% RMKHT33 RMKHT48 RMKHT408 RMKHT508 RMKHT816 RMKHT914 0303 0808 0610 0610 0714 0714 100 to 500K 100 to 800K 100 to 400K 500 to 400K 100 to 400K 500 to 200K 0.05, 0.1, 0.5, 1 0.05, 0.1, 0.5, 1 0.05, 0.1, 0.5, 1 0.05, 0.1, 0.5, 1 0.05, 0.1, 0.5, 1 0.05, 0.1, 0.5, 1 RATIO TOLERANCE ±% 0.02, 0.05, 0.5, 0.1 0.02, 0.05, 0.5, 0.1 0.02, 0.05, 0.5, 0.1 0.02, 0.05, 0.5, 0.1 0.02, 0.05, 0.5, 0.1 0.02, 0.05, 0.5, 0.1 ABSOLUTE RATIO TCR (2) TCR -55 °C; +215 °C -55 °C; +215 °C ± ppm/°C ± ppm/°C 15, 30 15, 30 15, 30 15, 30 15, 30 15, 30 2, 5 2, 5 2, 5 2, 5 2, 5 2, 5 POWER POWER RATING (3) RATING (3) P70 °C P215 °C W W PER RESISTOR PER RESISTOR 0.10 0.010 0.10 0.010 0.10 0.010 0.10 0.010 0.10 0.010 0.10 0.010 PERFORMANCES - Bare Resistors Networks TEST SPECIFICATIONS CONDITIONS Limiting voltage 100 V on each resistor (except RMKHT33 50 V on each resistor) Operating temperature range -55 °C; +215 °C Max. temperature resistive element 220 °C Max. substrate temperature 230 °C Load life stability ± 0.35 % 2000 h / 220 °C (ambient) at Pn Load life stability on ratio ± 0.35 % 2000 h / 220 °C (ambient) at Pn Storage temperature range -55 °C; +230 °C Shelf life stability ± 0.6 % typ. (± 0.8 % max.) 15 000 h/230 °C Notes (1) For ohmic range vs. tolerance and TCR see detailed table on next page. (2) Temperature Coefficient of Resistance Bare Resistors Chips ± 10 ppm/°C -55 °C; +155 °C Y ± 15 ppm/°C -55 °C; +215 °C ± 25 ppm/°C -55 °C; +155 °C E ± 30 ppm/°C -55 °C; +215 °C Bare Resistors Networks ± 10 ppm/°C abs. 1 ppm/°C tracking -55 °C; +155 °C ± 15 ppm/°C abs. 2 ppm/°C tracking -55 °C; +215 °C ± 25 ppm/°C abs. 2 ppm/°C tracking -55 °C; +155 °C E ± 30 ppm/°C abs. 5 ppm/°C tracking -55 °C; +215 °C Pn is intended with no back side metallized. For power handling improvement, please refer to application note 53047 “Power Dissipation Considerations in High Precision Vishay Sfernice Thin Film Chip Resistors and Arrays (High Temperature Applications)” www.vishay.com/doc?53047 and consult Vishay Sfernice. See Limiting Voltage table on next page. It is possible to dissipate up to 0.3 W, but there will be an additional drift of 0.1 % after load life. Y (3) (4) (5) Revision: 10-Jul-15 Document Number: 60075 4 For technical questions, contact: [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 RMKHT (CNHT) www.vishay.com Vishay Sfernice BEST TOLERANCE AND TCR VS. OHMIC VALUE - Bare Resistors Chips BEST TOLERANCE AND TCR VS. OHMIC VALUE - Bare Resistors Networks OHMIC RANGE (1) CT: Y CT: E MIN. MAX. MIN. MAX. 50 300 k 10 500 k 1 k 1.5 M 150 2 M 1 k 2 M 100 5 M 39 210 k 10 320 k 39 480 k 10 720 k 39 1.8 M 10 2.7 M 39 5 M 10 7.5 M SERIES OHMIC RANGE SERIES 22 55 515 0603 0805 1206 2010 Note (1) Best possible tolerance: 0.5 %: 10 to < 20 0.1 %: 20 to < 39 0.05 %: 39 to max. ohmic value SIZE 22 55 515 0603 0805 1206 2010 CT: Y MIN. 1 k 1 k 1 k 1 k 1 k 1 k 33 48 408 508 816 914 CT: E MAX. 250 k 200 k 200 k 200 k 200 k 100 k MIN. 100 100 100 500 100 500 MAX. 500 k 800 k 400 k 400 k 400 k 200 k POPULAR OPTION LIMITING VOLTAGE in V 100 V 100 V 100 V 75 V 150 V 200 V 300 V Back side metalized Option to order: 06 (not available for sizes 22, 33, 55, 515) Please refer to Application Note 53047 “Power Considerations in High Precision Vishay Sfernice Thin Film Chip Resistors and Arrays (High Temperature Applications) www.vishay.com/doc?53047 to evaluate performances improvement depending on process (brazing or gluing). Choice of PCB will be determinant. GLOBAL PART NUMBERING INFORMATION - Bare Resistors Chips Bare Chip Resistors R M K H T 0 6 0 3 Y 1 0 0 1 B A 0 6 GLOBAL MODEL SIZE TCR VALUE TOLERANCE PADS OPTION RMKHT 22 55 515 0603 0805 1206 2010 Y E The first 3 digits are significant figures and the last digit specifies the number of zeros to follow. R designates decimal point W = 0.05 % B = 0.1 % D = 0.5 % F=1% A: aluminum G: gold Blank = no option 06 = back side metallized 10R0 = 10 3901 = 3900 1004 = 1 M AA (2) GLOBAL PART NUMBERING INFORMATION - Bare Resistors Networks Bare Resistors Networks R M GLOBAL MODEL RMKHT K H T 8 1 6 E 1 SIZE TCR VALUE 33 48 408 508 816 914 Y E The first 3 digits are significant figures and the last digit specifies the number of zeros to follow. R designates decimal point 0 0 1 B W ABS. TOLERANCE TOLERANCE RATIO W = 0.05 % B = 0.1 % D = 0.5 % F=1% P = 0.02 % W = 0.05 % D = 0.5 % B = 0.1 % A 0 6 PADS OPTION A: Aluminum G: Gold Blank = No option 06 = Back side metallized 10R0 = 10 3901 = 3900 1004 = 1 M AA (2) Note (2) For more than three significant digits an alphabetical code will be used (AA to ZZ) and a cross table will be provided. Revision: 10-Jul-15 Document Number: 60075 5 For technical questions, contact: [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 RMKHT (CNHT) www.vishay.com Vishay Sfernice GLOBAL PART NUMBERING INFORMATION - Bare Custom Networks Custom Networks C N H T 9 9 9 9 GLOBAL MODEL REFERENCE CNHT 9999 Note • A specific reference number is assigned by Vishay Sfernice. Revision: 10-Jul-15 Document Number: 60075 6 For technical questions, contact: [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 Legal Disclaimer Notice www.vishay.com Vishay Disclaimer ALL PRODUCT, PRODUCT SPECIFICATIONS AND DATA ARE SUBJECT TO CHANGE WITHOUT NOTICE TO IMPROVE RELIABILITY, FUNCTION OR DESIGN OR OTHERWISE. Vishay Intertechnology, Inc., its affiliates, agents, and employees, and all persons acting on its or their behalf (collectively, “Vishay”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained in any datasheet or in any other disclosure relating to any product. Vishay makes no warranty, representation or guarantee regarding the suitability of the products for any particular purpose or the continuing production of any product. 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