Media:ArmETBv2.pdf

Using ARM ETB with TI CCS
CCS 3.3 with SR9 on TMS320DM6446
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ETB Usage Brief Tutorial
1. Setup CCS setup configuration to include the ETB.
2. Connect to the target (including the ETB)
3. Select the ETB as the Receiver type in the XDS560 Trace
system control panel. (ToolsÆXDS560 TraceÆControl)
4. Turn the trace system ON by going to the Unified Breakpoint
Manager (DebugÆBreakpoints) and create a “Trace” operation.
Select the action to be “Trace ON” and check the box for
“Program Address” and “Data”. Enable the action and submit it.
The trace system is ready!
5. Run your program to collect trace. If you know your point of
failure, halt the core at that point. By default, the trace system
will start/stop with the core. This means that every Run, Step,
and Halt operation will refresh the Trace Display with trace
information.
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Make sure your CCS Setup includes the ETB
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Parallel Debug Manager (PDM) on startup
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Parallel Debug Manager (PDM) on startup
1. Select the target.
2. Choose “Connect”
3. Open the ARM processor CCS View
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Parallel Debug Manager (PDM) on startup
1. Select the target.
2. Choose “Connect”
3. Open the ARM processor CCS View
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Parallel Debug Manager (PDM) on startup
1. Select the target.
2. Choose “Connect”
3. Open the ARM processor CCS View
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Choose Trace
Control to select
ETB as
“Receiver”
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Select Trace Recevier to be ETB
Choose
“Receiver” to
select Trace
collection method
Select ETB
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Select
“Breakpoints” to
turn the Trace
system on. Can
also do this
through
ToolsÆXDS560
TraceÆSetup
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The Unified
Breakpoint
Manager (UBM)
is now available.
Choose “New”
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Select “Trace”
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The Trace properties
page is available. Click
the “+” sign to choose
when trace action
(Start/Stop) as well as
the type of tracing
(program, data, etc. )
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Select “+” on what to trace
to select Program and Data
Note that different
start/stop events can be
used.
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Select Program
Trace
Check the
“Enable” box.
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Click the
“Submit” button to
submit this trace
job to the system.
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Trace with ETB
‹ At this point, the ETB system is setup and is collecting trace.
‹ By default, the trace system will start/stop when Code Composer
Studio™ (CCS) starts and stops the CPU.
‹ It is possible to choose different start/stop events for tracing, as
these are based on the Advanced Event Triggering capabilities
of the device (AET).
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Trace Display is
available under
ToolsÆXDS560
TraceÆTrace
Display
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Once you halt the processor,
the Trace display will refresh
with trace information.
Choose Fields to select what is
displayed.
Right click-and choose
“source” to setup the source
code correlation.
One display shows the
current line, and the
second display shows the
C file for that line.
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By filtering for source
code only, we can see
the C code that the
processor executed.
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With Data trace enabled, we
can wee the processor load
address and values.
This is useful for checking
whether the address is correct
(pointer problems) and to
validate the data values.
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The trace information can be
saved for later viewing and
analysis.
In this case, I am looking at
the data accesses for a
particular function.
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