AN1036: Using the ISL6411 Triple LDO Controller

Using the ISL6411 Triple LDO Controller
Evaluation Board
®
Application Note
PRELIMINARY
October 2003
AN1036
Author: Manisha Pandya
Introduction
Quick Start Evaluation
The ISL6411 integrates three ultra low noise, low dropout
linear regulators providing a highly integrated single-chip
solution for 802.11 wireless chipset architectures. It operates
from 3.0V to 3.8V input and provides preset output voltages LDO1 set at 1.8V, LDO2 and LDO3 set at 2.84V.
The evaluation board is shipped “ready to use” right from the
box. The board accepts a 3.3V input from a standard power
supply. The output can be exercised through the use of an
external load.
The device features power sequencing specifically for
wireless chipsets. The outputs are sequenced such that
LDO1, the 1.8V core regulator voltage, is always within
regulation before LDO2, the 2.84V output LDO, is
sequenced on. When powering down, power to the 2.84V
LDO2 is removed before the 1.8V LDO1 core regulator is
sequenced off.
Designed with an internal P-channel MOSFET pass
transistor, the ISL6411 operates with a low supply current.
An output fault detection circuit indicates loss of regulation
on any of the three outputs. Other features include a logic
controlled shutdown mode, short circuit and thermal
shutdown protection, and reverse battery protection.
The ISL6411 also includes a RESET function. Integration of
this function into the ISL6411 eliminates the additional
RESET IC and external support components required in
wireless chipset power supply applications. The IC asserts a
RESET signal whenever the VCC (IN) supply voltage drops
below a preset threshold, keeping it asserted for at least
100ms after VCC (IN) has risen above the reset threshold.
Two RESET outputs are provided; RESET is a push-pull
active-LOW output, while RESET is an active-HIGH output.
Applications
• PRISM® 3 Chipsets – ISL37106P
1
• An adjustable 0V - 5V, 2A capable bench power supply
• An electronic load
• A Four channel oscilloscope with probes
• A Precision digital multimeter
Power and Load Connections
Input Voltage - Connect the positive lead of the adjustable
bench power supply to the 3.3V post (P3). Connect the
ground lead of the supply to GND post (P4).
Output Voltages - The ISL6411EVAL1 provides fixed
output voltages for use in Wireless Chipset applications.
Internal trimmed resistor networks inside the chip set the
nominal output voltages as below:
The outputs can be exercised through external load on
connectors. The maximum currents are VOUT1 - 500mA,
VOUT2 - 300mA and VOUT3 -200mA.
TABLE 1. ISL6411 EVALUATION BOARD
ISL6411IR
To test the functionality of the ISL6411, the following
equipment is recommended:
VOUT3 = 2.84V (P1)
ISL6411 Reference Design
ISL6411EVAL1
Recommended Test Equipment
VOUT2 = 2.84V (P7)
• Liberty Chipset
IC PART NUMBER
Each evaluation board kit is sent with 5 samples of
ISL6411CR.
VOUT1 = 1.8V (P5)
• WLAN Cards
- PCMCIA, Cardbus32, MiniPCI Cards
- Compact Flash Cards
BOARD NAME
There are posts available on the board for introducing power
to the board and for drawing current from the regulated
outputs. Post connectors are also available to monitor power
good conditions FAULT (P11), RESET (P9) and RESET
(P10). Posts for Shutdown functions SHDN (P12) and
SHDN3 (P13) allows low power mode function testing.
PACKAGE
16-Ld QFN
Output Loading, Sourcing Current - To load the VOUT1
output connect the positive lead of the electronic load to the
VOUT1 (P5) post and the return terminal of the same load
channel to the GND (P6) post. Similarly connect the positive
terminal of the second load channel to the VOUT2 (P7) post
and the return terminal to the GND (P8) post to load the
output of LDO2. The LDO3 output can be loaded by
connecting the positive terminal of a third channel of the
electronic load to the VOUT3 (P1) post and the return
terminal to the GND (P2) post.
1-888-INTERSIL or 321-724-7143
|
Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright © Intersil Americas Inc. 2003. All Rights Reserved
PRISM® 3 is a trademark of GlobespanVirata, Inc.
All other trademarks mentioned are the property of their respective owners.
Application Note 1036
Evaluation Board Performance
Driving the SHDN input (P12) LOW puts both LDO1 and
LDO2 into shutdown mode. Driving the SHDN3 (P13) input
LOW puts LDO3 in shutdown mode. Pulling the SHDN and
SHDN3 pins LOW simultaneously, puts the entire chip into
shutdown mode, and supply current drops to 5µA typical.
External pull up resistors are not required because both
SHDN and SHDN3 inputs have internal pull-up resistors, so
that in normal operation the outputs are always enabled.
ISL6411EVAL1 Evaluation board provides easy platform to
characterize performance of the IC.
VOUT = 1.8V
20
LOAD = 50mA
0
4
3
Output Performance
Figures below show transient response and regulation for
LDO1, LDO2 and LDO3.
INPUT
OUTPUT
VOLTAGE (V) VOLTAGE (mV)
INPUT
OUTPUT
VOLTAGE (V) VOLTAGE (mV)
Shutdown
VOUT = 2.84V
20
0
4
3
TIME (1ms/DIV)
TIME (1ms/DIV)
FIGURE 2. TRANSIENT RESPONSE (VOUT2)
VOUT = 2.84V
LOAD = 50mA
0
4
3
LOAD
OUTPUT VOLTAGE
CURRENT (mA)
DEVIATION (mV)
INPUT
OUTPUT
VOLTAGE (V) VOLTAGE (mV)
FIGURE 1. TRANSIENT RESPONSE (VOUT1)
20
10
0
100
0
TIME (1ms/DIV)
TIME (2ms/DIV)
VOUT = 2.84V
VIN = 3.3V
5
0
100
FIGURE 4. LOAD REGULATION (VOUT1)
LOAD
OUTPUT VOLTAGE
CURRENT (mA) DEVIATION (mV)
LOAD
OUTPUT VOLTAGE
CURRENT (mA)
DEVIATION (mV)
VOUT = 1.8V
VIN = 3.3V
5
FIGURE 3. TRANSIENT RESPONSE (VOUT3)
10
LOAD = 50mA
10
VOUT = 2.84V
VIN = 3.3V
5
0
100
0
TIME (2ms/DIV)
FIGURE 5. LOAD REGULATION (VOUT2)
2
0
TIME (2ms/DIV)
FIGURE 6. LOAD REGULATION (VOUT3)
Application Note 1036
180
The ISL6411 features a typical 0.5Ω RDS(ON) P-channel
MOSFET pass transistors. This provides several
advantages over similar designs using PNP bipolar pass
transistors. The P-Channel MOSFET requires no base drive,
which reduces quiescent current considerably. PNP based
regulators waste considerable current in dropout when the
pass transistor saturates. They also use high base drive
currents under large loads. The ISL6411 does not suffer
from these problems and ultra low drop-out regulators to
maintain 2.84V supplies within regulation with worst case
minimum line input. Both LDO2 and LDO3 can supply full
load with less then 3.0V input. Figure below shows the
dropout voltage vs output load current for both LDO2 and
LDO3.
160
DROPOUT VOLTAGE (mV)
Dropout Voltage
140
120
100
80
60
40
20
0
-40
-15
10
35
TEMPERATURE (°C)
60
85
FIGURE 9. LD02 DROPOUT VOLTAGE vs TEMPERATURE
100
90
0.120
80
DROPOUT (mV)
0.140
VD (V)
0.100
0.080
0.060
70
60
50
40
30
0.040
20
0.020
10
0
0.000
0.00
0.05
0.10
0.15
IO (A)
0.20
0.25
0.30
-40
-10
25
85
TEMPERATURE (°C)
FIGURE 10. LD03 DROPOUT VOLTAGE vs TEMPERATURE
FIGURE 7. LD02 DROPOUT VOLTAGE
Current Limit
The ISL6411 monitors and controls the pass transistor’s
gate voltage to limit the output current. The current limit for
LDO1 is 550mA, LDO2 is 330mA and LDO3 is 250mA.
Performance in over current event can be tested by applying
over load on respective LDO outputs. The FAULT output will
go low for over current condition on any of the three LDO.
The ISL6411 based DC-DC converter is fully protected from
short circuit to ground outputs due to the current limit and
thermal protection features.
0.100
0.090
0.080
VD (V)
0.070
0.060
0.050
0.040
0.030
0.020
Integrated RESET for MAC/Baseband Processors
0.010
0.000
0.00
0.05
0.10
0.15
IO (A)
FIGURE 8. LD03 DROPOUT VOLTAGE
0.30
The ISL6411 includes a microprocessor supervisory circuit.
This circuit eliminates the extra RESET IC and external
components needed in wireless chipset applications. This
block performs a single function; it asserts a RESET signal
whenever the VIN supply voltage decreases below a preset
threshold 2.63V, keeping it asserted for a programmable
time (set by external capacitor CT) after the VIN pin voltage
has risen above the RESET threshold.
The push pull output stage of the reset circuit provides both
an active-Low RESET (P10) and an active-HIGH RESET
(P9) output. This function is guaranteed to be in the correct
3
Application Note 1036
ambient air, and the rate of air flow. The power dissipated in
the device is:
state for VIN down to 1V. In addition to issuing a reset to the
microprocessor during power-up, power down and brownout
conditions, this block is relatively immune to short duration,
negative-going VIN transients/glitches. Figure below shows
the relations between RESET timing capacitor and
programmable RESET delay.
PT = P1 + P2 + P3, where
P1 = IOUT1 (VIN – VOUT1)
P2 = IOUT2 (VIN – VOUT2)
Thermal Overload Protection
P3 = IOUT3 (VIN – VOUT3)
Thermal overload protection limits total power dissipation in
the ISL6411. When the junction temperature (TJ) exceeds
+150°C, the thermal sensor sends a signal to the shutdown
logic, turning off the pass transistor and allowing the IC to
cool. The pass transistor turns on again after the IC’s
junction temperature cools 20°C, resulting in a pulsed output
during continuous thermal overload conditions. Thermal
overload protection protects the ISL6411 against fault
conditions. For continuous operation, do not exceed the
absolute maximum junction temperature rating of +150°C.
The maximum allowed power dissipation is:
PMAX = (TJMAX – TA)/θJA
Where TJMAX = 150°C, TA = ambient temperature, and θJA
is the thermal resistance from the junction to the surrounding
environment.
References
For Intersil documents available on the web, see
http://www.intersil.com/
Operating Region and Power Dissipation
[1] ISL6411 Data Sheet, Intersil Corporation, File No.
FN9081.
The maximum power dissipation of ISL6411 depends on the
thermal resistance of the IC package and circuit board, the
temperature difference between the die junction and
ISL6411EVAL1 Schematic
FAULT
R1
P11
100K
1
2
3
4
12
OUT1
11
CC1
10
OUT2
9
CC2
OUT3
CC3
GND3
GND
P12
RESET
CT
ISL6411
SHDN
SHDN3
P13
C2
4.7µF
C9
DNP
VOUT3
+2.84V
GND
GND
C6
0.033µF
P7
P8
C3
4.7µF
P1
C4
4.7µF
P2
4
C11
DNP
C8
0.033µF
P6
+1.8V
GND
VOUT2
C7
0.033µF
5
6
7
8
SHDN3
P4
P5
14
VIN
13
VIN
16
15
C5
0.01µF
SHDN
C1
10µF
+3.3V
VOUT1
P10
FAULT
RESET
+
VIN
P9
RESET
RESET
P3
C10
DNP
+2.84V
GND
Application Note 1036
ISL6411EVAL1 Bill of Materials
ITEM
1
REFERENCE
QTY
U1
PART NUMBER
PART TYPE
1
ISL6411IR
IC, Linear, Multi-Output
DESCRIPTION
Regulator, Low
Drop Out
PACKAGE
VENDOR
16-Lead
QFN 4x4
Intersil
CAPACITORS
2
C1
1
1210ZC106MAT2A
Capacitor, Ceramic, X7R 10µF, 20%, 10V
SM_1210
AVX/Panasonic
3
C2, C3, C4
3
1210ZC475MAT2A
Capacitor, Ceramic, X7R 4.7µF, 20%, 10V
SM_1210
AVX/Panasonic
4
C9, C10, C11 (DNP)
3
Capacitor, Ceramic, X7R
SM_1210
AVX/Panasonic
5
C5
1
0603ZC103KAT2A
Capacitor, Ceramic, X7R 0.01µF, 10%, 10V
SM_0603
AVX/Panasonic
6
C6, C7, C8
3
0603ZC333JAT2A
Capacitor, Ceramic, X7R 0.033µF, 5%, 10V
SM_0603
AVX/Panasonic
Resistor, Film
100kΩ, 5%, 0.1W
SM_0603
Panasonic
Turrett Post
Terminal post, through- PTH
hole,1/4 inch tall
RESISTORS
7
R1
1
OTHERS
8
P1 - P13
13
1514-2
ISL6411EVAL1 Evaluation Board Layout
FIGURE 11. ISL6411EVAL1 - TOP LAYER SILK SCREEN
5
Keystone
Application Note 1036
ISL6411EVAL1 Evaluation Board Layout (Continued)
FIGURE 12. ISL6411EVAL1 - TOP LAYER
FIGURE 13. ISL6411EVAL1 - LAYER 2 (GROUND)
6
Application Note 1036
ISL6411EVAL1 Evaluation Board Layout (Continued)
FIGURE 14. ISL6411EVAL1 - LAYER 3 (POWER)
FIGURE 15. ISL6411EVAL1 - LAYER 4 (BOTTOM)
7
Application Note 1036
ISL6411EVAL1 Evaluation Board Layout (Continued)
FIGURE 16. ISL6411EVAL1 - BOTTOM LAYER SILK SCREEN
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Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
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reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
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8
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