The X9520 in Fibre Channel/Gigabit Ethernet Applications ® Application Note May 5, 2005 AN137.0 Authors: Joe Ciancio, Ali Ghiasi Abstract This Application Note looks at the functionality and features of the X9520 family of devices, and gives examples of how such devices may be used in Fibre Channel/Gigabit Ethernet applications such as Gigabit Interface Converter (GBIC) or “MSA” (Multisource Agreement) fiber optic modules. We will show how the designer may use the X9520 Family of devices in such applications in order to facilitate higher system integration, improved manufacturing process, smaller footprint, lower system cost and higher reliability. Introduction In recent years, the ever increasing bandwidth requirements of almost all aspects of computer networking, has seen the rapid adoption of fiber optic technology into this arena, and has driven the volume of transceivers by several fold. Applications such as Storage Area Networks (SAN’s) have driven the popularity of protocols such as Fibre Channel (FC), due to its attributes of low cost, high bandwidth, low latency, stability and high RAS (Reliability, Availability, Serviceability) [1]. The adoption of the Fibre Channel physical layer (FC-PH) as a basis for the Gigabit Ethernet (GE) (IEEE 802.3z) physical layer [2][3], has further popularized this protocol. Both FC and GE allow for different physical media such as copper cable (such as Twin-ax), as well as fiber optic cable (Multi Mode and Single Mode). The remainder of this discussion will focus on the optical implementations of FC-PH applications. In order to co-ordinate the development and implementation of FC and GE system transceivers, the Small Form Factor (SFF) Committee (a committee comprising of a range of Industry representatives) has defined a standard for what is known as the Gigabit Interface Converter (GBIC) module [4]. This Multisource Agreement (MSA) group is currently in the process of defining a new SFP (Small Form Factor, Pluggable) GBIC module called “MSA”. Gigabit Interface Converter (GBIC)/MSA Basics At the simplest level, the GBIC/MSA module is a full duplex data transceiver (Transmitter and Receiver), with two data “ports”. One “port” is for optical data (unless the GBIC is a copper variant), and may be realized as a Duplex SC optical connector. This connector provides for the reliable, low loss connection of two optic fibers to the GBIC module - one for transmitting optical data, and one for receiving optical data. The other “port” is dedicated for electrical signals, and may be realized as a 20-pin SCA-2 Connector. The SCA-2 connector of the GBIC module is plugged into the host device. The electrical signals handled over this connector 1 are module fault or alarm, transmit disable, signal detect, module identification, as well as the electrical high speed serial data. Using these two data ports, the GBIC provides the simultaneous Electrical to Optical (E/O) and Optical to Electrical (O/E) conversion of data (Figure 1). Host devices built with GBIC ports are flexible and capable of accepting various optical or copper converter. The GBIC/MSA module accepts 8B/10B encoded, differential serial data, which complies with the FC-PH Physical Layer. The adoption of FC-PH compliant GBIC modules, makes them suited to not only to FC, but also to GE systems, as well as distributed multiprocessor, processor to peripheral, and data storage interconnect, as well as other proprietary applications requiring high bandwidth serial links. GBIC and MSA modules are also specified to be “Hot Pluggable” devices. This requires that the modules may be inserted into, or removed from the host device without having to shut down power to device. This requirement is important in applications such as servers, where it is desirable to have zero down time. The Hot Pluggable nature of the GBIC modules facilitates zero down time upgrades and maintenance. X9520 IN GBIC/MSA APPLICATIONS X9520 Function Overview The X9520 has been designed specifically with the view of integrating many of the functions required to realize a GBIC or MSA compliant fiber optical module. In the case of MSA optical module, the discrete implementation of the control logic is limited by the space available. The X9520 provides a GBIC / MSA Module O/E (Optical) High Speed Data (Electrical) Control, Alarm, ID. (Optical) E/O Optical SC Connector To Fiber Optic Cable interconnect (Electrical) High Speed Data 20-Pin SCA-2 Connector To Host device FIGURE 1. GBIC/MSA FUNCTIONAL DIAGRAM CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2005. All Rights Reserved All other trademarks mentioned are the property of their respective owners. Application Note 137 The X9520 features Intersil’s Block Lock function. Once data is written to EEPROM, the Block Lock bits of the internal Control and Status (CONSTAT) register “lock” the appropriate area of the memory array. A write to this area of “locked” memory is then disabled. Changing the “wiper position” of a DCP is also disabled in this state. The Write Protect (WP) pin, when active, further safeguards the device and prevents any nonvolatile write operations to the EEPROM array and DCPs. versatile and compact solution. The device integrates the following functions: • Three Digitally Controlled Potentiometers • Power On/Low Voltage Reset with Manual Reset input • Two supplementary Voltage Monitoring circuits with hardware and software outputs • Integrated 2 Kbit EEPROM Other devices in the X9520 family (the X9521, X9522. X9523) provide various combinations of these functions to satisfy the designers’ specific needs. The X9520 also provides for various voltage monitoring functions. Power On reset and Low Voltage reset functions are provided for Vcc. When Vcc is applied to the X9520, the Vcc Reset Output (V1RO) pin is held HIGH until Vcc rises above the VTRIP0 threshold (and remains higher than VTRIP1) for the Power On Reset delay time (tpurst). After this time, V1RO becomes LOW. The time tpurst may be selected via software using the CONSTAT Register, from one value of either 50ms, 100ms, 200ms or 300ms. V1RO also makes a transition to a HIGH state, when Vcc falls below VTRIP0. The Digitally Controlled Potentiometers (DCPs) in the device are the equivalent to a three terminal mechanical potentiometer. DCPs however, do not suffer from mechanical wear, they allow for repeatable nonvolatile “wiper position” setting, and automated digital control via the 2-Wire serial data port (SDA, SCL). Traditionally and operator had to adjust a mechanical potentiometer while monitoring the laser waveform for optimum response and laser safety. The process of manufacturing GBIC or MSA optical modules can now be automated. Through the 2 Wire bus the laser can be set, while an optical scope monitors the module response and power. The Power On/Low Voltage Reset circuit also has an associated debounced Manual Reset (MR) input pin. When MR is asserted active (HIGH) then the V1RO output makes RH0 WIPER COUNTER REGISTER RW0 RL0 8 WP 6 - BIT NONVOLATILE MEMOR Y PROTECT LOGIC RH1 CONSTAT SDA SCL DATA REGISTER 4 COMMAND DECODE & CONTROL LOGIC WIPER COUNTER REGISTER REGISTER RW1 RL1 7 - BIT NONVOLATILE MEMOR Y 2 Kbit EEPROM ARRAY RH2 THRESHOLD RESET LOGIC WIPER COUNTER REGISTER RW2 RL2 MR 2 VTRIP 3 + VTRIP 2 + VTRIP 1 + - V3 V2 V1 / Vcc 8 - BIT NONVOLATILE MEMOR Y V3RO V2RO POWER ON / LOW VOLTAGE RESET GENERATION V1RO FIGURE 2. X9520 BLOCK DIAGRAM 2 AN137.0 May 5, 2005 Application Note 137 a transition to a HIGH, until time tpurst after MR returns to its normal (LOW) state. be connected to the MOD_DEF(1) and MOD_DEF(2) pins of the GBIC module respectively. V2 and V3 are supplementary Voltage Monitor inputs which have no reset time-out, nor manual reset associated with them. When the input monitor voltage (V2, V3) rises above its associated threshold voltage (VTRIP2, VTRIP3), then the appropriate hardware reset output (V2RO, V3RO) becomes HIGH. The current GBIC specification (Revision 5.4) [4] states that address of the module definition EEPROM shall be “000”. The X9520 eliminates any external addressing pins, and instead the EEPROM address of the device is set to “000” internally. Other addresses are used to select and control other internal parts of the X9520, such as the DCPs and the CONSTAT register. A unique feature of Intersils’ X9520, is the flexibility of being able to re-program the values of the Voltage Monitor threshold levels (VTRIP1 - VTRIP3). By applying the desired voltage to the appropriate external pin (V1 / Vcc,V2,V3), it is possible to “capture” a new analog threshold level (VTRIP1 - VTRIP3). Also, the output status of the voltage monitor circuits (V2RO and V3RO) may be read (from the CONSTAT register) to the host, via the 2-Wire serial interface. The X9520 is available in Intersils Ball Grid Array (XBGA) packaging. This package dramatically reduces the area of board space used when compared to discrete implementations. X9520 Application Example An example of how the X9520 may be used in the design of GBIC / MSA optical module, is shown in Figure3. The DCP’s may be used to set various parameters in the Laser Driver & Safety Control circuitry of the optical GBIC module. For example, the high resolution (256 tap) DCP may be used to set the Modulation Current (IMOD) of the Laser Diode, while the 100 tap DCP may be used to set the Bias Current (IB) of the Laser Diode. The lower resolution (64 tap) DCP may be used to set the maximum optical power level of the GBIC module (via IMAX) such that it meets relevant safety specifications such as IEC 825-1 (and CDRH). The IEC 825-1 standard requires Class I compliance under a single fault. The laser driver or an external circuit monitoring maximum laser drive current is often required. The DCP controlling IMAX provides this feature. In another situation, two of the DCP’s may be ganged in order to provide higher resolution for the setting of either IB or IMOD. The DCP’s “wiper position” may be set during the time of manufacture using Automated Test Equipment (ATE), then “locked” using the Block Lock bits of the CONSTAT Register. The wiper positions are then locked in the device and cannot be changed until the user resets these bits. The Write Protect (WP) pin adds a further level of protection to the device. This increases device integrity, as well as eliminating the possibility of inadvertent or intentional tampering of the device by the end user. The integrated 2 Kbit EEPROM memory of the X9520 can be used to provide module definition data for the GBIC module to the host, as specified by Annex D of the GBIC specification [4]. The SDA and SCL pins of the device can 3 The Voltage Monitoring capabilities can be used to realize the various alarm and safety functions that may be implemented in GBIC optical modules. For example (figure 3), the voltage monitor input V2 may be used to monitor laser diode over-current (OC) using a low value shunt sense resistor, or monitor photodiode circuit. Module over-voltage may be monitored using a simple voltage divider circuit (R1, R2) as the input to V3. The voltage monitor outputs V2RO and V3RO may be OR’ed with the V1RO output of the X9520, to produce a output signal: V2RO+V3RO+V1RO. This signal may be interpreted as the module “Transmitter Fault” (TX_FAULT) alarm. This alarm signal is defined to active HIGH [4], and therefore, in this example TX_FAULT will be active in one of three instances: • During power up and power down of the module • A laser over-current condition is detected. • A module over-voltage condition is detected. The TX_FAULT signal may also be used to drive the laser driver circuit enable input (EN). This would have effect of disabling the laser diode at critical times, which may cause damage to the laser diode. Further, the manual reset (MR) pin may be used to force V1RO active (HIGH). This would have the effect of disabling the laser diode, by driving the TX_FAULT output HIGH. Hence, the MR input may be used as the “Transmitter Disable” (TX_DISABLE) input pin on the GBIC module. Since the voltage monitors are circuits with independent inputs and outputs, they may configured in a manner which best suits the designers’ requirements. For example, instead of using V3 as an input to monitor module over-voltage, it may be used to perform a “level shifting” function. Some integrated fiber optic receiver IC’s provide a “Receiver Loss” (RX_LOS) alarm (which indicates that the received optical power has fallen below a level that produces an acceptable Bit Error Rate (BER)). This signal however, may have a PECL output range and therefore would not be compatible with the GBIC specified TTL alarm levels. The voltage monitor function of the X9520 is well suited to providing the required PECL to TTL level shifting. AN137.0 May 5, 2005 Application Note 137 Conclusion The X9520 may be ordered with pre-programmed VTRIP levels (VTRIP1, VTRIP2, VTRIP3) which are suited to both 3.3V as well as “legacy“ 5V GBIC module designs. These threshold levels however, may be re-programmed at the time of manufacture in order to suit specific designer requirements. This paper has reviewed the basics of GBIC and MSA compliant fiber optic modules, an how these devices fit into Fibre Channel and Gigabit Ethernet applications. The X9520 from Intersil was also introduced. This device was shown to feature the functionality which simplifies design, decreases cost, and increases the reliability of GBIC/MSA fiber optic modules. One final important feature of X9520, it is designed for Hot Pluggable applications like GBIC or MSA. The X9520 provides all the necessary GBIC power on requirement within the digitally controlled device. Optical Receiver - RX_DAT VDDT VDDT VDDT MOD_DEF(2) R2 RW2 GND RW1 VDDT RW0 V2 Power Management X9520 WP V1 / Vcc SDA V3 R1 VDDR +RX_DAT Amplifier & Signal Conditioning. GND SCL MR V3RO V2RO Vss V1RO GND MOD_DEF(1) MOD_DEF(0) TX_DISABLE RX_LOS TX_FAULT VDDR VDDT IMOD IB Laser IMAX OC EN Laser Driver & +TX_DAT - TX_DAT Safety Control NOTE: Pull-Up resistors are not shown for clarity. FIGURE 3. X9520 APPLICATION EXAMPLE IN GBIC/MSA OPTICAL MODULE. 4 AN137.0 May 5, 2005 Application Note 137 References Sites Of Interest 1. “It’s time for a SAN Reality Check”, pp. 1 - 2, Fibre Channel Industry Association, Available from http://www.fcloop.org/SAN/whitepapers/realitycheck.html 2. EEE Standard 802.3, 1998 Edition, Available from http://standards.ieee.org/ 3. “Gigabit Ethernet, accelerating the standard for speed”, Gigabit Ethernet Alliance, 1997, pg 10, Avalailable from http://www.gigabitethernet.org/technology/whitepapers/gige_97/ 4. Small Form Factor (SFF) Committee Gigabit Interface Converter (GBIC) Specification Version 5.4 - Available from ftp://playground.sun.com/pub/OEmod • Intersil Inc. http://www.intersil.com • Sun Microsystems http://www.sun.com • Gigabit Ethernet Alliance http://www.gigabit-ethernet.org/ • Fibre Channel Industry Association http://www.fibrechannel.com/ • “Lightwave” Magazine http://lw.pennwellnet.com/home/home.cfm Authors Bibliography • Johnson, Bruce, “Single Chip Transceivers Help Facilitate Fibre-Channel Implementation”, Computer Technology Review, May, 1999, pp. 55. • Travis, Bill, “Fiber battles copper for serial links”, EDN, January 6, 2000, pp. 85 -98. • Tolley, Bruce, “Gigabit Ethernet Comes of Age”, 3COM, Available from http://www.3com.com/technology/tech_net/white_papers/ • X9520 Data Sheet, Available from http://www.intersil.com Joe Ciancio Joe Ciancio earned a BE (Electrical) with Honours, and a BSc (Computer) from the University of Melbourne, Australia. At Intersil, Joe is responsible for the definition and development of new products, focusing mainly on Intersils’ Analog and Mixed Signal product line. His main areas of technical interest include fiber optic communications and three dimensional optical data storage techniques. Ali Ghiasi Ali Ghiasi is a Senior Staff Engineer of the Communication and Optical Technologies group at Sun Microsystems. He earned a Ph.D. from University of Minnesota. He is responsible for development of optical and interconnect technologies for Sun platforms. He is an active member of the Fiber Channel and GBIC group, Where has made significant contributions to the definition of the GBIC and MSA fiber optic module specification. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that the Application Note or Technical Brief is current before proceeding. For information regarding Intersil Corporation and its products, see www.intersil.com 5 AN137.0 May 5, 2005