AN1566: Video Fader With DCP-Digital Control

Application Note 1566
Authors: Rudy Berneike and Trevor Earl
Video Fader With DCP-Digital Control
Introduction
Bandwidth Enhancement
There are times when a digital video fade control is needed.
DCPs are often overlooked for this application as they are
thought to have too low a bandwidth for video. By selecting the
proper DCP, the bandwidth is sufficient for NTSC and PAL
video, as well as for HDTV.
The circuit uses one small capacitor for bandwidth recovery to
compensate for the bandwidth loss of the DCP. The capacitor
is very small value so has little risk of causing excess peaking.
The capacitor C5 from the op amp non-inverting input to the op
amp output extends the bandwidth at all fader settings.
Solution
Circuit Biasing
The X9317ZS8 is a 1kΩ DCP and only a low value DCP can be
used for video. The high operating capacitance of the CMOS
switches used in the DCP causes the loss in bandwidth. This
application note shows how to use a DCP as a video fader for
digital control of the fade function. The fader function is done
by using a DCP with one video source connected to one end of
the DCP and a second video source connected to the other end
of the DCP. Now, with the DCP set to one end only, the first
video will be seen. Set at the other end of the DCP, only the
second video will be seen. At the middle of the DCP setting,
both videos will be seen but only at half level each. The other
settings will be comparable ratios.
The X9317 DCP is a 0VSUPPLY to 5VSUPPLY part and the video is
AC coupled in so the DCP would see minus voltage and exceed
the absolute maximum rating. To correct for this, a two diode
clamp is used to clamp the sync tip to ~100mV above ground.
The 100mV is the result of the difference in the bias current of
the diodes, approximately 50 to 1 ratio. The clamp circuit also
will reduce some power line noise on the video input signal.
The output op amp also uses 0VSUPPLY to 5VSUPPLY and with
only ~100mV on the sync tip output the coupling capacitor
may be an option for some applications.
Video Sync
A small amount of cross coupling would be present from one
input to the other at approximately 3.7% with no video input
buffers. This can be corrected by using video buffers on the
video source input lines. With buffers used, the bias input
clamps are needed on both buffer inputs.
For two video sources to be faded they must be in sync. Some
video sources can be synced from external sources. For those
cases, the EL1881, EL1883 can be used as a sync source. The
EL1881, EL1883 C SYNC output is low power, so it needs
digital buffering to transmit over a cable. The EL1881, EL1883
also allows the fade to black function. The EL1881, EL1883
insures the constant sync needed for the fade to black
function. The C SYNC out of the EL1881, EL1883 is too large to
be used as the video sync, so it is attenuated to normal video
level. If neither of these are used then the EL1881, EL1883
can be an unused option. For video sources that are not synced,
there are costly converter boxes available to sync them.
June 17, 2011
AN1566.0
1
Cross Coupling
The circuit is shown with inputs terminated with 75Ω to ground
for a 75Ω cable input. There is also an output series resistor,
75Ω, for back-loaded cable driving. If there is no output cable
load, then the amp gain may be set to one by changing the
resistor value of the gain R14 to open and feedback R13 to zero.
The X9317ZS8 is a three wire up/down logic control DCP and
the data sheet will give all the details needed for its proper
operation.
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Copyright Intersil Americas Inc. 2011. All Rights Reserved
Intersil (and design) is a trademark owned by Intersil Corporation or one of its subsidiaries.
All other trademarks mentioned are the property of their respective owners.
Application Note 1566
R6
10kΩ
D2
5V
D1
VIDEO
IN
C5
10pF
DIODES
MMBD4148
R7
50kΩ
C6
0.1µF
C1
0.47µF
U2:1
15 EL8300-3
CE
R1
75Ω
5V
D3
R8
50kΩ
R4
10kΩ
U2:2
EL8300-3
13
R 11
50Ω
CE
5V
C SYNC OUT
1
2
R5
10kΩ
3
4
INC
U/D
CNTRL VCC
&
MMRY CS
RL
RH
RW
VSS
8
R14
1kΩ
R13
1kΩ
7
6
1
C SYNC
OUT
5
2
VIDEO
IN
3
R9
5kΩ
C2
0.47µF
R2
680Ω
R3
75Ω
4
FADE
TO
BLACK
CE
U2:3
EL8300-3
VDD
8
HSYNC
OUT
7
V SYNC
RSET
OUT
BURST/BACK
PORCH
GND
OUTPUT
6
C3
0.1µF
10
FADE
VIDEO TO VIDEO
5V
U3 EL1883
U1 X9317
VIDEO
IN
VIDEO
OUT
R12
75Ω
H SYNC OUT
5
R15
681kΩ
V SYNC OUT
R10
300Ω
C4
510pF
EL1883 Option for Fade to Black
or Sync Second Source
FIGURE 1. VIDEO FADER W/DCP DIGITAL CONTROL SCHEMATIC
NOTE: Figure 1 shows an updated, modified version of Figure 2 Eval Board Layout Schematic with the buffer amp U2C output directly connected to DCP
Pin 6 and switch on U2C pin 8.
2
AN1566.0
June 17, 2011
+5V
J1
BNC
U2A
EL8300-3
C1 0.1µF
R2
50k
R1
75
1
D1A
MMBD4148
2
INA+
14
C2
0.1µF
VS+
INA- 16
OUTA
CEA
15
3
VS-
R5
10k
SW1
+5V
C5 0.1µF
R18
10k
2
3
5p
U1
1
1
C9
+5V
+5V
2
SW2
3
4
INC
Vcc
U/D
CS
RL
RH
Rw
VSS
8
U2B
EL8300-3
R6
10k
7
J3
BNC
2
1
SW3
6
4
CEB
R13
OUTB 13
75
R10
5
5
INB+
50
X9317ZS8
INB- 12 R11
1k
R12
1k
TP1
Sync Out
11
U2C
R7
680
NC
J2
BNC
C3
R3 0.1µF
75
7
10
CEC
8
R4
50k
OUTC
INC-
INC+
NC
EL8300-3
6
D2A
MMBD4148
9
1
2
U3
3
JU1
R14
300
R8 5k
1
C7 0.1µF
2
C6
510p
TP2
V Sync
3
4
CSYNC
CVIDEO
VDD
HSYNC
VSYNC
GND
EL1883IS
AN1566.0
June 17, 2011
FIGURE 2. BOARD LAYOUT SCHEMATIC
RSET
BP
8
7
+5V C8
0.1µF
TP3
H Sync
6
5
R9
681k
J4
+5V
J6
GND
+5V
+ C10
4.7
C12
0.1µF
Application Note 1566
+5V
3
D1B
MMBD4148
Application Note 1566
Eval Board Layouts
FIGURE 3. TOP LAYER
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Application Note 1566
Eval Board Layouts
(Continued)
FIGURE 4. BOTTOM LAYER
5
AN1566.0
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Application Note 1566
Eval Board Layouts
(Continued)
FIGURE 5. PART PLACEMENT
Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is
cautioned to verify that the Application Note or Technical Brief is current before proceeding.
For information regarding Intersil Corporation and its products, see www.intersil.com
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