AN174: Optimizing LDMOS Transistors Bias Control An Accurate Solution for Basestation RF Power Amplifiers

LDMOS Transistors Bias Control in Basestation RF Power
Amplifiers Using Intersil’s LUT-based Sensor Signal Conditioners
Application Note
April 20, 2006
AN174.2
Author: Jim Pflasterer
Introduction
Vdd
LDMOS transistors are used for RF Power Amplification in
numerous applications from point-to-multipoint
communications to Radar. The most pervasive application is
in cell phone basestations. These RF Power Amplifiers
(RFPA) provide from 5W to over 200W of output power per
channel, and require very good linearity to maximize the
data throughput in a given channel. The main consideration
to achieve that linearity is the DC biasing of the LDMOS
transistor for optimal drain current for a given power output.
This bias needs to be held constant over temperature and
time. Typically the target accuracy for bias current over
temperature is ±5% but ±3% is much more desirable for a
high performance design.
A simplified circuit of an LDMOS amplifier bias circuit is
shown in Figure 1. The DC Bias on these amplifiers is set by
applying a DC voltage to the gate (Vgs) and monitoring the
Drain current (Idd). Ideally, this Idd will be constant over
temperature, but since the Vgs of LDMOS amplifier devices
varies with temperature, some type of temperature
compensation is required. One method of setting this DC
bias involves using an adjustable reference, DAC, or Digital
potentiometer combined with a temperature compensation
source, such as a transistor Vbe multiplier. This solution can
work well, but getting tight temperature compensation can
be problematic since the Vbe junction temperature
characteristic for production transistors will vary. Also, the
Vgs tempco for LDMOS amplifiers will vary with Idd. The
result is that there are variations in Vbe junction
characteristics as well as the LDMOS characteristics. For
optimal temperature compensation, in-circuit adjustments
need to be made for both the temperature compensation as
well as the Vgs bias itself.
RF Out
LDMOS
Transistor
RF In
Vbias
generator
FIGURE 1. RFPA SIMPLIFIED SCHEMATIC
A new way to bias an LDMOS amplifier is presented here,
which involves digitally converting temperature information
and adjusting the DC bias using Look-Up Table (LUT)
memory. The memory is programmed at final test using
measured parameters from the amplifier circuit being tested.
DC bias performance is optimized over the required
temperature range.
The X96011 Sensor Bias Conditioner IC
The X96011 device is one of a family available from Intersil
which perform signal conditioning functions using sensor
input information. It is particularly suited to this application
since it has a temperature sensor, A/D converter, a single
LUT and an 8-bit DAC (see Figure 2). The device is
programmed with a serial 2-wire interface using the Intersil
Windows LabVIEW™ software and Drivers, and the Intersil
XDCP ProgramIC board. A similar setup can be used for
programming an RFPA in production.
Voltage
Reference
ADC
Mux
Look-up
Table
Mux
DAC
IOUT
Temperature
Sensor
SDA
SCL
WP
Control
& Status
2-Wire
Interface
A2, A1, A0
FIGURE 2. X96011 BLOCK DIAGRAM
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
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Application Note 174
X96011 is programmable with ranges of 400µA, 800µA, and
1.6mA maximum. These ranges are set by internal resistors
which have a variation of ±20%. The 800µA range is chosen
here to economize on power dissipation yet keep opamp
offset currents well below the control range. The X96011
requires a +5V supply so U1 is added to regulate the Vdd
supply to +5V. A rail to rail input and output opamp was
chosen to assure the voltage ranges of the circuit are met
with a +5V supply. The feedback resistor, R1, is chosen
according to the following equation:
Other functions available on the device include LUT muxes
for directly controlling the LUT address, as well as direct
control of the output DAC. The DAC itself has selectable
ranges of output current, with 400µA, 800µA and 1.6mA full
scale ranges available. Since RFPA’s require a bias voltage
control, an opamp converts the current to a voltage in this
application. Note that the X96011 has an internal temp
sensor with an 8-bit A/D converter, of which 6 bits are used
for LUT addressing (64 addresses). The resulting 2.2°C/bit
resolution is adequate for RFPA applications, but it is
possible to improve on this with a different Intersil device, the
X96010, plus an external temperature sensor (see section
“Design Example: A LUT-based Temperature-Compensated
RFPA Module and Measured Results”).
(Vgs–Va) / R1 = I1
Va determines the low end of the output range and is fixed
here to 3.0V. The maximum Vgs control voltage is needed to
determine the range. Since 80% • 800µA = 640µA is the full
scale range including device tolerances, R1 minimum is:
Hardware Design using the X96011
Figure 3 shows the circuit used for this application. The
LDMOS device is the MRF9080 from NXP (formerly
Freescale) SPS, a 50W device optimized for GSM
applications. The RF Portion of the circuit is available by
contacting NXP (formerly Freescale)[1]. The DC bias is
applied to the MRF9080 evaluation platform with no RF
applied (inputs and outputs terminated with 50). The
complete temperature compensated bias control circuit
consists of the X96011, an opamp and some discretes,
making a small, cost-effective solution.
R1 = (4.2–3.0) / (640e-6)
R1 = 1.88K minimum
A value of 2.0K was chosen to include some margin. An
input resistor, R2, is included to ensure stable opamp
operation. The output compliance range of the X96011 is
1.2V when sinking current, so the 1K value chosen here
gives a minimum voltage of 2.04V. A lowpass filter is also
included in the bias line to block RF energy from entering the
bias control circuit. Since the filter presents a capacitive load
to the opamp, R4 is included to isolate the load capacitance
and insure stability.
The MRF9080 device typically requires from 3.25V to 3.80V
of bias voltage over a -20 to +100°C temp range for an Idd of
600mA. Although a 50W RFPA will quickly warm up, even at
-40°C, the bias voltage should be set at startup for optimum
amplifier operation. The full scale output current of the
Vdd=26V
RF Amplifier
SMA
Vdd=26V
U1
1
2
VIN
3
47
GND
R8
+5V C4
to Microcontroller
U3
3.9pF
C3
0.1
R7
8k
U2A
U2A
7 EL8186
LM6142
11
0.1
23
13
Iout
+
12 -
R2
3
4
1k
R6
13k
GND
A0
A1
A2
WPSCL
SDA
Vcc
1
2
3
5
6
7
M1
MRF9080
+5V
LP2950
X96011 4
4.7pF
SMA
VOUT
R4
R5
220
10
R3
1k
7
C5
100pF
C6
220pF
R1
11
*U3 is placed close
to M1 for best
thermal performance
2k
FIGURE 3. RFPA BIAS CONTROL WITH THE X96011
2
AN174.2
April 20, 2006
Application Note 174
Lookup Table Construction
There are various methods possible to compute the lookup
table values. The accuracy requirement for the amplifier
requires that continuous temperature adjustment is made
over the range of the amplifier. The X96011 provides a -40 to
+100°C temperature measurement range which will work for
this application. If higher temperature compensation is
needed, an external temperature sensor can be used with
one of the other Intersil bias controllers (the X96010 and
X96012 provide external sensor inputs). See the hardware
example which follows.
The temperature sensor in the X96011 digitizes to 6-bit
accuracy, giving a resolution of 2.2°C/bit, or compensation
which can change every 2.2°C. In this example, the typical
gm of the MRF9080 is about 3.3mhos, and the temperature
sensitivity of the Vgs is about -2.8mV/°C. So, between steps
of adjustment we can expect the amplifier to drift:
(-2.8mV/°C) • (3.3mA/mV) • (2.2°C/step) = 20mA/step.
The target Idd for the MRF9080 is 600mA, so the error
expected due to temperature quantization is about 3.3%.
Depending on how well the calibration is done, this can be
centered around the target Idd giving an accuracy of
±1.65%, which is within our target.
The other factor in the control of the bias current is the
output bias control voltage quantization. There is 8-bit
control with the X96011, and using the worst case full range
current and the gm of the MRF9080, we get
(3.3) • [(2000) • (800e-6 • 1.2)] / 255 = 24mA/step.
Again, if the calibration is done well, this should result in
about ±12mA variation around the target Idd or ±2.0%.
A very simple yet effective way to construct the lookup table
is to make measurements at two temperatures that
represent the target range for the product, and then
interpolate values for the other temperatures with a linear
regression. For example, the ADC value (temperature) is
recorded for one setting, and then the DAC is adjusted to
place the amplifier at a bias point closest to the correct Idd.
The amplifier is heated or cooled to the other temperature
and allowed to settle, then the second ADC value is
recorded while the DAC is set to the best output setting. The
table is then constructed using all of the values of ADC
outputs (64 entries) and the corresponding DAC values
interpolated from the measured values.
Note that since Vgs drift is not perfectly linear with
temperature, that the error in this method will increase at the
temperature extremes. A more accurate method would
include more temperature points and then interpolate
between those points.
A LUT-based Temperature-Compensated
RFPA Module and Measured Results
X96010 Hardware Design
An amplifier evaluation platform for the NXP (formerly
Freescale) MRF9080 LDMOS amplifier[1] was modified to
include biasing by the X96010 device and produced very
good results. The modifications included a temperature
sensor (LM35) mounted near the LDMOS and remote
connections to the X96010 plus op amp on a PC board.
The X96010 device includes inputs to the ADC for external
sensors, and for external DAC current range setting resistors
(see Figure 4). The temperature sensor circuit has a range
starting at 0V at 0°C and increases 10mV/°C. The ADC
range of the X96010 is from 0V min to 1.21V, (the internal
reference value), so the control range of the X96010 circuit
is from 0°C to 121°C. This range is sufficient for the amplifier
in most applications since the board/junction temperature
will be quite a bit higher than ambient. LUT control also
allows for over-temperature control by reducing gate voltage
at a specific hot temperature point to prevent thermal failure.
The resolution of the LUT DAC control is now 1.92°C/step.
Voltage
Reference
VRef
VSense
R2
Mux
Look-up
Table 2
Mux
DAC 2
I2
Mux
Look-up
Table 1
Mux
DAC 1
I1
ADC
Control
& Status
SDA
SCL
WP
R1
2-Wire
Interface
A2, A1, A0
FIGURE 4. X96010 BLOCK DIAGRAM
3
AN174.2
April 20, 2006
Application Note 174
Vdd=26V
RFAmplier:
Amplifier:
RF
forfor
completeschematic
schematic
complete
contactNXP
Motorola
contact
(formerly Freescale)
Vdd=26V
U1
1
2
VIN
VOUT
3
+5V
8
4
GND
LP2950
R7
C4
Vsense
U3
VOUT
Gnd
23
I2
R1
R2
13
14
R5
13k
9
10
4.7pF
M1
MRF9080
3.9pF
U2A
U2A
7 EL8186
LM6142
3
4
1k
SMA
C3
+
12 -
R2
Vsense
LM35
R3
1k
11
0.1
1
0.1
R6
8k
Iout
GND
A0
A1
A2
WPSCL
SDA
Vsen
Vref
Vcc
to Microcontroller
1
2
3
5
6
7
12
13
Vcc
SMA
47
X96010 4
U4
R4
R8
220
10
7
R9
1k
C5
100pF
C6
220pF
R1
11
1.5k
FIGURE 5. RFPA DESIGN USING THE X96010
Lookup Table Generation
To set up the lookup table, the circuit was powered up and
tested at two temperatures, 29°C and 75°C. At each
temperature, the Idd bias was set to the desired value and
the DAC setting recorded. These values were used in a
spreadsheet to generate a set of bias values that varied
linearly with temperature. Although the Idd bias temperature
variation is somewhat nonlinear, the use of the linear control
values and two-step calibration is fairly efficient and accurate
over a limited temperature range.
The spreadsheet requires a bit of setup beforehand. The
ADC output is recorded in 8-bit values which need to be
converted to 6-bits for use in the LUT addressing. The DAC
values will be calculated linearly to vary with temperature,
but need to be rounded off since the increments are noninteger, and then translated to a hex value. Finally, the actual
LUT address (DAC output) is offset from zero to start at 90
hex . Once completed, the final spreadsheet has two
adjacent columns which contain the LUT address and DAC
setting, and these can be copied and pasted into a text
document. The text document is easily read by the Intersil
X9601x LabVIEW software program which loads the values
4
directly into X96010 EEPROM. See Appendix 1 for the setup
table and spreadsheet results (Evaluation boards and
software for the X96010 family are available from Intersil, as
well as the sample design spreadsheet, see
www.intersil.com or call an Intersil sales representative).
Results
The Amplifier platform and control circuit were placed in a
temp chamber and tested from 0°C ambient to 90°C. The
bias current was monitored (RF power OFF) and the results
are shown in Figure 6. Error from Ideal is shown in Figure 7.
650
600
Idd, mA
For better output current accuracy and ease of design, a
1k current setting resistor (connected to pin R1) was used
on the X96010, and the gain setting resistor was changed to
suit the new output current range. The output current range
variation is now limited by the resistor tolerance plus the
X96010 reference tolerance, or ±3%. The resulting circuit
has a bias range of 3.05V to 4.20V and a DAC resolution of
4.5mV/step. The circuit is shown in Figure 5.
550
500
450
400
0
10
20
30
40
50
60
70
80
90
Temperature, °C
FIGURE 6. MEASURED DRAIN CURRENT vs TEMPERATURE
AN174.2
April 20, 2006
Application Note 174
References:
20.0
1. NXP (formerly Freescale) Wireless Infrastructure
Division
2100 East Elliot Road
Tempe, AZ 85284
(800) 521-6274
http://www.nxp.com/
15.0
Idd Error, %
10.0
5.0
0.0
-5.0
-10.0
Appendix 1. Lookup Table Construction
-15.0
-20.0
0
10
20
30
40
50
60
70
80
90
Temperature, °C
FIGURE 7. DRAIN CURRENT ERROR vs TEMPERATURE
Figure 6 includes ±5% limit indicators, and the amplifier
stays within these limits fairly consistently, meeting the
design goals. There are some discontinuities in the
compensation visible, and those are due to roundoff and
quantization error. With a reduced temperature control
range, the resolution of the temperature sensor would
increase and the resulting drift correction would improve.
Note that above and below the measured temperatures the
Vgs temp characteristics of the MRF9080 increasingly
diverge from a linear relationship, and for greatest accuracy
additional characterization points are needed and the LUT
modified accordingly.
One thing to note in this design or any that requires
temperature compensation is the mechanical properties of
the board mounting and the cooling system. In this example,
airflow over the LDMOS device and the temperature sensor
was limited, which enhanced the resulting compensation.
Also, the sensor was surface mounted with conductive
grease next to the LDMOS device. In many designs precise
control over placement and airflow is not possible, but since
calibration takes place after the assembly of the unit, these
effects can be minimized as long as the final installation is
similar to the calibration conditions.
Lookup Table Input Parameters
These parameters were measured after assembly and setup
of the bias control and amplifier circuit. Using the serial
interface, remote setup and calibration can be done.
TEMPERATURE
CALIBRATION DATA
HIGH
LOW
UNITS
75
29
°C
ADC =
26
0e
hex
ADC =
38
14
dec
Temperature
ADC (temp) steps
DAC (Vout) steps
DAC steps / ADC steps
24
DAC =
50
60
hex
DAC =
80
102
dec
-22
-0.92
Lookup Table Spreadsheet Setup and Results
Yellow and Cyan cells indicate calibration points
Shaded columns indicate final LUT entries (to be copied/
pasted to LUT file)
LDMOS amplifiers also have a characteristic Idd drift over
time (drain current reduces for a given Vgs), as well as
temperature. This can be addressed with lookup table
correction with a slightly higher constant bias offset, so that
over time the Idd will drift closer to the target bias value, not
further away.
5
AN174.2
April 20, 2006
Application Note 174
TABLE 1. LOOKUP TABLE SPREADSHEET SETUP AND RESULTS
6-BIT A/D OUT
(DECIMAL)
6-BIT A/D OUT
(HEX)
LUT ADDRESS
W/OFFSET
DAC IOUT
SETTING
(HEX)
DAC IOUT
SETTING
(INTEGER)
IOUT SETTING
(REAL)
0
0
90
73
115
114.83
1
1
91
72
114
113.92
2
2
92
71
113
113.00
3
3
93
70
112
112.08
4
4
94
6F
111
111.17
5
5
95
6E
110
110.25
6
6
96
6D
109
109.33
7
7
97
6C
108
108.42
8
8
98
6C
108
107.50
9
9
99
6B
107
106.58
10
A
9A
6A
106
105.67
11
B
9B
69
105
104.75
12
C
9C
68
104
103.83
13
D
9D
67
103
102.92
14
E
9E
66
102
102.00
15
F
9F
65
101
101.08
16
10
A0
64
100
100.17
17
11
A1
63
99
99.25
18
12
A2
62
98
98.33
19
13
A3
61
97
97.42
20
14
A4
61
97
96.50
21
15
A5
60
96
95.58
22
16
A6
5F
95
94.67
23
17
A7
5E
94
93.75
24
18
A8
5D
93
92.83
25
19
A9
5C
92
91.92
26
1A
AA
5B
91
91.00
27
1B
AB
5A
90
90.08
28
1C
AC
59
89
89.17
29
1D
AD
58
88
88.25
30
1E
AE
57
87
87.33
31
1F
AF
56
86
86.42
32
20
B0
55
85
85.50
33
21
B1
55
85
84.58
34
22
B2
54
84
83.67
35
23
B3
53
83
82.75
36
24
B4
52
82
81.83
37
25
B5
51
81
80.92
6
AN174.2
April 20, 2006
Application Note 174
TABLE 1. LOOKUP TABLE SPREADSHEET SETUP AND RESULTS (Continued)
6-BIT A/D OUT
(DECIMAL)
6-BIT A/D OUT
(HEX)
LUT ADDRESS
W/OFFSET
DAC IOUT
SETTING
(HEX)
DAC IOUT
SETTING
(INTEGER)
IOUT SETTING
(REAL)
38
26
B6
50
80
80.00
39
27
B7
4F
79
79.08
40
28
B8
4E
78
78.17
41
29
B9
4D
77
77.25
42
2A
BA
4C
76
76.33
43
2B
BB
4B
75
75.42
44
2C
BC
4A
74
74.50
45
2D
BD
4A
74
73.58
46
2E
BE
49
73
72.67
47
2F
BF
48
72
71.75
48
30
C0
47
71
70.83
49
31
C1
46
70
69.92
50
32
C2
45
69
69.00
51
33
C3
44
68
68.08
52
34
C4
43
67
67.17
53
35
C5
42
66
66.25
54
36
C6
41
65
65.33
55
37
C7
40
64
64.42
56
38
C8
3F
63
63.50
57
39
C9
3F
63
62.58
58
3A
CA
3E
62
61.67
59
3B
CB
3D
61
60.75
60
3C
CC
3C
60
59.83
61
3D
CD
3B
59
58.92
62
3E
CE
3A
58
58.00
63
3F
CF
39
57
57.08
Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to
verify that the Application Note or Technical Brief is current before proceeding.
For information regarding Intersil Corporation and its products, see www.intersil.com
7
AN174.2
April 20, 2006
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