AN177: Voltage Reference Application and Design Note

Voltage Reference Application and Design Note
®
Application Note
June 23, 2005
AN177.0
Author: Alan Rich
Table of Contents
What and Why is a Voltage Reference? . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Where is a Voltage Reference Used? . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Difference from a Voltage Regulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Types of Voltage References - Advantages and Disadvantages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Series and Shunt Mode Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Voltage Reference Design Techniques . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Bandgap Voltage Reference . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
XFETTM Voltage Reference . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Buried Zener Voltage Reference . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Floating Gate Analog Technology Voltage Reference . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3
4
4
4
Key Voltage Reference Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Absolute Initial Accuracy . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Temperature Coefficient and Using the Box Method. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Supply or Quiescent Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Output Noise; Wideband (10Hz-1kHz) and 0.1 - 10Hz . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Noise Performance and Reduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Line Regulation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Load Regulation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Long Term Stability . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Thermal Hysteresis . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Input Voltage Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Dropout Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Advantages of Intersil X60008 Voltage Reference. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Absolute Accuracy. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Low Temperature Drift. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Low Power. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Ability to Set any Output Voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
9
9
9
9
9
Care and Feeding of Voltage References . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Grounding and IR drops . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
PCB Mounting and Location on PCB . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Soldering Care . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
DNC Pins. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Voltage Reference Output Filters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input Voltage Regulators . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Thermocouple Effects . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
9
11
13
13
13
13
15
16
Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Auto-Calibrated 12 Bit Data Acquisition System . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Auto-Calibrated 12 Bit Digital to Analog Converter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Digital Voltmeter Integrated Circuit Voltage Reference. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .21
0 to 5 Amp, 1 to 50 V Active Load 10 bit Resolution . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
4 to 20 mA. Two Wire Current Transmitter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Negative Output Voltage Or Standing the Reference on its Head! . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Operation from a Battery or Capacitor. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Optically Isolated Voltage Reference . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Appendix A . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Appendix B . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
0.1 to 10Hz Noise Test Box with Peak to Peak Detector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Test Results . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Footnotes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
List of Figures. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2005. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
Application Note 177
What and Why is a Voltage Reference?
Conceptually, a voltage reference is a very simple device
with only one purpose in its life. Quite simply, the purpose of
a voltage reference is to generate an exact output voltage no
matter what happens with respect to its operating voltage,
load current, temperature changes or the passage of time.
The purpose of this Application Note is to provide an
understanding of voltage references, their limits of error, and
interesting application circuits using high accuracy voltage
references. The Intersil X60008 voltage reference
approaches the design in a new and exciting topology that
provides extremely tight initial tolerance, low temperature
drift, and unbelievably low operating current.
Where is a Voltage Reference Used?
Voltage references are used to provide a very precise
voltage for measurements to be made against. The accuracy
of any measurement is only as good as the ability to
compare it against a known standard.
High resolution A/D and D/As, digital meters, smart sensors
with threshold detectors, servo systems, battery
management, precision regulators and many other precision
industrial control systems require a precision voltage
reference at their core.
Voltage references can also be used to very accurately set
another variable; for example, a laser diode might need to
operate at a very precise current to generate the proper
wavelength of light. A high accuracy constant current source
can be designed using a voltage reference as shown in the
Applications Section.
Difference from a Voltage Regulator
Voltage references and voltage regulators seem to be very
similar devices; both are used to generate a regulated output
voltage that is immune to changes in load current, input
voltage, temperature, etc. A voltage regulator is intended to
provide higher output current than a voltage reference.
However, the voltage regulator is much less accurate than a
voltage reference, the output noise is higher, and the long
term stability is not specified in a voltage regulator.
Additionally, the voltage regulator is put into a package that
can withstand the heat that is generated by the power
dissipated by the regulator.
Types of Voltage References Advantages and Disadvantages
There are different topologies to operate a voltage regulator,
and there are many different techniques to generate highly
accurate output voltages from a voltage reference. The
Intersil X60008 voltage reference approaches the design in
a new and exciting topology that provides extremely tight
initial tolerance, low temperature drift, very low long term
drift, and unbelievably low operating current. The Intersil
2
Floating Gate Analog (FGA) technology will be discussed,
but first let’s review the various operating modes and
reference techniques.
Series and Shunt Mode Operation
First, voltage references are designed to operate in either
series mode or shunt mode as shown in Figure 1.
Vcc
R1
VREF
Vout
Vcc
Vin
Vout
Vout
Gnd
VREF
Shunt Mode
Series Mode
FIGURE 1.
Shunt mode references are typically less accurate than
Series mode, but require lower operating current. They can
be operated from very high input voltage (Vcc) because only
the resistor R1 sees the high voltage. Shunt references can
be used to generate negative reference voltages or a
reference voltage that is floating between potentials.
Series mode references are typically much higher accuracy
and lower noise than Shunt mode references. However, the
supply voltage (Vcc) is limited to the absolute maximum
rating of the device. Generally, a Series mode reference
provides a positive output voltage with respect to ground;
however, the extremely low supply current of the Intersil
X60008 voltage reference allows clever circuit design tricks
to be used to allow negative reference voltages or a
reference voltage that is floating between potentials.
Voltage Reference Design Techniques
Integrated voltage references are REALLY difficult to make!
Most IC voltage reference designs depend on using
nonlinear and highly process dependant characteristic of
transistors to cancel the temperature coefficients of diodes
or transistors. Extensive trimming of both initial tolerance
and temperature drift is required, and, often these two
parameters cannot be trimmed to satisfy both conditions. As
we will soon see, the Intersil X60008 voltage reference
depends only on the ability to force and measure a high
accuracy potential. But first, let’s review several popular
voltage reference topologies – the Bandgap reference, the
XFETTM reference, and the buried Zener reference. Finally, I
will give an overview of the Intersil Floating Gate Analog
technology.
AN177.0
June 23, 2005
Application Note 177
Bandgap Voltage Reference
With the exception of the Intersil Floating Gate Analog
technology, all voltage reference topologies rely on the
inherent temperature dependence of a transistor (bipolar or
FET). A highly simplified block diagram of a Bandgap
reference is shown in Figure 2.
Temperature Drift
1.245
Reverse Voltage (V)
Bandgap references are ideally suited for voltage reference
applications that require low reference voltage (<5V), low
operating current (< 1mA), medium temperature drift
(>20ppm/C), and versatile series/shunt mode operation.
1.240
1.235
1.230
1.225
Vcc
-55 -35 -15 5 25 45 65 85 105 125
Temperature (°C)
FIGURE 3. (Note 2)
I
(-2 mv/C)
Q1
+
Vref Out
+
It should be noted that this curve is highly idealized, and the
curves taken from actual devices show a wide variation from
unit to unit; this is shown in the graph in Figure 4 below for 3
typical IC voltage references with the same part number.
Output Voltage Temperature Drift
2.503
(+ 2mv/C)
FIGURE 2.
Two voltage sources are generated; the first voltage source
is the Vbe of a forward biased transistor with an output
voltage of 0.7V with a –2mV/°C temperature coefficient. A
second voltage source, the Proportional To Absolute
Temperature (PTAT) generator, produces an output voltage
with a +2mV/°C temperature coefficient. By operating two
transistors at different current densities, a PTAT voltage is
obtained. The two voltages are applied to a summing circuit
so that the two temperature drifts cancel to yield a Vref Out
voltage with zero temperature drift. Due to the magic of
semiconductor junctions, the temperature drift cancellation
requires an output voltage that is equal to the Bandgap
voltage of silicon extrapolated to 0o Kelvin; this is
approximately 1.24V depending on the fabrication process.
As can be seen in the graph in Figure 3, zero TC only occurs
at one point on the curve due to the nonlinear relationship of
semiconductor junctions. For additional reading on the
theory of Bandgap voltage references, see Notes 5 and 6.
3
3 Typical Parts
Output Voltage (V)
PTAT
Generator
2.502
2.501
2.500
2.499
2.498
-50
-25
0
25
50 75
Temperature (°C)
100
FIGURE 4. (Note 3)
A Bandgap reference shows the bow shaped curve as
illustrated in Figure 3. The temperature drift can be lowered
by adding a second order compensation term to achieve
“curvature correction”. These curvature correction Bandgap
references typically have an S-shaped TC curve as shown in
Figure 5.
AN177.0
June 23, 2005
Application Note 177
Vcc
2.5020
Reference Voltage (V)
Tempco -60°C to 120°C
2.5015 3 Typical Parts
2.5010
I
2.5005
I
+
2.5000
Vref Out
+
2.4995
2.4990
(-2 mv/C)
2.4985
(+ 2mv/C)
Zener Diode
2.4980
-60 -40 -20 0 20 40 60 80 100120
Temperature (°C)
FIGURE 5. (Note 3)
XFETTM Voltage Reference
XFET references are similar in principle to Bandgap
references except they depend on Junction Field Effect
Transistors (JFET) instead of bipolar transistors as used in
the typical Bandgap reference. XFET references can offer
lower noise and drift than Bandgap references while
operating at lower supply current. For additional reading on
the theory of XFET voltage references, see Note 7.
In summary, Bandgap references are usually used for
voltage reference applications that require low reference
voltage (<5V), low operating current (<1mA), medium
temperature drift (>20ppm/C), and versatile series/shunt
mode operation.
Buried Zener Voltage Reference
Zener diodes have traditionally been used to make high
quality voltage references. Prior to integrated circuits,
discrete Zener diodes were used for voltage reference
applications; “temperature compensated” Zener diodes such
as 1N829 were used in discrete and hybrid circuits. When IC
Zener diodes were first used they were very noisy and
unstable due to surface contamination and crystal
imperfections. It was found that by moving the Zener
junction from the surface of the die to below the surface the
noise and stability were greatly improved. These Zener
diodes became known as “buried Zener diodes”, and have
been the workhorse device for high quality voltage
references.
Zener diodes in the 5 to 8 V range show a temperature drift
that is approximately +2mV/°C. By combining a forward
biased diode junction with a Zener diode, a voltage
reference with zero TC could be obtained as shown in
Figure 6.
4
FIGURE 6.
However, there are lots of caveats that go along with this
reference circuit:
1. The temperature drift of the two diodes is dependant on
their bias current, and trimming is required to achieve low
TC.
2. Often, the zero TC adjustment changes the absolute
output voltage from its intended value so you can not
obtain tight initial tolerance and low temperature drift at
the same time.
3. The supply current is higher than a Bandgap reference
since the Zener diode and forward biased diode are
operated at a higher current to achieve low noise and
zero temperature drift. Also, for maximum flexibility in
setting the diode’s TC, two current sources are used to
bias the diodes.
4. The supply voltage must be greater than the Zener diode
voltage and the bias current source which makes the
supply voltage greater than 7V.
In summary, buried Zener references are usually used for
voltage reference applications that require low temperature
drift and low noise. However, they require higher supply
voltage (>7V), higher operating current (>1.5mA), and
operate only in series mode unless external biasing is used.
Floating Gate Analog Technology
Voltage Reference
The Intersil Floating Gate Analog technology takes a
radically different approach to make a high quality voltage
reference. Instead of using the inherent temperature drift
characteristics of transistors and diodes which are highly
nonlinear, process dependant, and extremely inflexible, the
Intersil Floating Gate Analog technology stores a precise
voltage on Cstore, a floating gate. The floating gate voltage
is buffered with a high quality CMOS amplifier as shown in
the simplified diagram shown in Figure 7.
AN177.0
June 23, 2005
Application Note 177
without loss for greater than 10 years. As one might expect,
the switch S1 is a very critical element and is highly
simplified in this description. Switch S1 is really two tunnel
diodes using a mechanism know as the Fowler-Nordheim
Tunneling effect. For a complete description of the Intersil
Floating Gate Analog technology, see Appendix A,
“Precision Voltage Reference Using EEPROM Technology”,
by Jim McCreary.
Vcc
Vref Out
Cstore
I
FIGURE 7.
The resulting voltage reference has excellent characteristics
which are unique in the industry; very low temperature drift
(1ppm/°C), high initial accuracy, and extremely low supply
current (<1µA). Also, the reference voltage is not limited to
“magic” voltages obtained from Bandgap references or
buried Zener diodes to achieve temperature drift
cancellation. In addition, there is no need for trimming via
lasers, fusible links, or Zener zapping. Standard output
voltage settings from 0.9000 to 5.000 are programmed as
part of the standard manufacturing process as discussed in
the following section.
To understand how the output voltage is programmed, refer
to the simplified diagram shown in Figure 8:
+
–
Vprogram
Vcc
S1
In summary, the Intersil Floating Gate Analog technology
provides a voltage reference which has excellent
characteristics which are unique in the industry; very low
temperature drift (1ppm/°C), high initial accuracy (0.01%),
and extremely low supply current (<1µA). Also, the reference
voltage is not limited to “magic” voltages so it is possible to
provide output voltage settings from 0.9000 to 5.000 that are
programmed as part of the standard manufacturing process.
Key Voltage Reference Specifications
Absolute Initial Accuracy
1. Absolute Initial Accuracy defines the range of the
reference’s output voltage with a defined input voltage,
load current, and ambient temperature. The top grade
voltage reference, X60008AIS8-50 has an output voltage
range of 4.9995V to 5.0005V (5V ±.5mV or 5V ±.01%)
with a 6.5V input, no load current, and 25°C operating
temperature.
Temperature Coefficient and Using the Box Method
2. Temperature Coefficient (TC) is a measure of the
output voltage change with respect to changes in the
operating temperature. The top grade voltage reference,
X60008AIS8-50 has a TC of 1ppm/°C which makes it one
of lowest temperature drift references in the industry.
Older voltage references such as the LM399 or LTZ1000
achieve low TC by temperature stabilizing the device die
with a heater. However, just the heater supply current
(25ma) is typically 50,000 times higher than the
X60008AIS8-50 supply current of .5µA!
Vref Out
Cstore
I
FIGURE 8.
During production testing, an external voltage, Vprogram, is
applied to the device under test, and switch S1 is closed. A
servo amplifier forces the Vprogram voltage onto the floating
gate capacitor, Cstore. When the programming and test
modes are complete, the programming voltage, Vprogram is
removed, and switch S1 is opened leaving a charge on
capacitor Cstore which is the desired reference voltage.
Typically the trapped charge on the floating gate can remain
5
The limits stated for TC are governed by the method of
measurement, and there are many ways to cheat when
specifying TC in a voltage reference. For example, let’s
consider the Temperature Drift curve shown in Figure 9
for a Bandgap reference. At –55°C the Reference Voltage
is 1.232V and at +125°C the Reference Voltage is
1.231V. Therefore, the change in Reference Voltage is
only 1mV for a change in temperature of 180°C or
5.5µv/°C; for a 1.235 V reference, this gives a TC of
4.4ppm/°C. Due to the parabolic shape of the TC curve,
it is possible to calculate a TC of zero using this method!
AN177.0
June 23, 2005
Application Note 177
Notice the large difference between the first method of
calculating TC which gives 4ppm/°C vs. the standard Box
Method which gives 18ppm/°C.
Temperature Drift
Reverse Voltage (V)
1.245
1.240
1.235
1.230
1.225
-55 -35 -15 5 25 45 65 85 105 125
Temperature (°C)
With both a Bandgap reference and buried Zener
reference, the TC curve is a nonlinear relationship so the
designer cannot infer a proportional TC relationship.
Curvature corrected Bandgap references with the “sshaped” curve may have a TC slope which exceeds the
average specified TC by 2x or 3x. The TC characteristic
of the Intersil X60008 is nearly a straight line with
curvature of less than 0.5ppm/°C over the industrial
temperature range of -40°C to +85°C. The combination of
very low TC and a predictable TC slope is unique to the
Intersil X60008 due to its floating gate topology. Figure 11
shows the flat slope TC curves for the X60008.
FIGURE 9.
Temperature Drift
Reverse Voltage (V)
1.245
1.240
Tempco (Normalized to +25°C)
4000µV
Change in VOUT
The overwhelming standard for specifying the TC of a
reference is the “Box Method” as shown in Figure 10.
10ppm/°C
2000µV
5ppm/°C
3ppm/°C
1ppm/°C
0µV
1ppm/°C
3ppm/°C
5ppm/°C
-2000µV
10ppm/°C
-4000µV
1.235
VRMAX
1.230
VRMIN
1.225
-55 -35 -15 5 25 45 65 85 105 125
TMAX
TMIN
Temperature (°C)
FIGURE 10.
In the Box Method, the reference voltage is measured
throughout the temperature range from the minimum
specified temperature (Tmin) to the maximum specified
temperature (Tmax). The minimum reference voltage
(Vrmin) and maximum reference voltage (Vrmax) is
determined within the temperature range. If Vr is the
reference output voltage at 25°C, the TC of the reference
is calculated by:
6
( Vrmax – Vrmin ) ⁄ ( Tmax – Tmin )
TC = --------------------------------------------------------------------------------------------- × 10 ppm/°C
Vr
In the same example as above using the graph in
Figure 9:
-40°C
25°C
Temperature
85°C
FIGURE 11.
In an A/D converter (ADC) or D/A converter (DAC) design
the reference temperature drift is an error source in the
full-scale accuracy. Over the full operating range, the total
drift must be less than 0.5 LSB to maintain an accuracy
consistent with the resolution of the ADC or DAC. The
chart below shows the drift requirements for various
system accuracies over a 0°C to +70°C temperature
range.
RESOLUTION
(BITS)
1/2 LSB FOR A
5 V FULL-SCALE (mV)
DRIFT
REQUIRED
(ppm/°C)
8
9.77
27.90
10
2.44
6.98
12
0.61
1.74
14
0.15
0.44
16
0.04
0.11
Tmin = -55°C
Tmax = +125°C
Vrmin = 1.231V
Vrmax = 1.235V
Vr = 1.235V
6
( 1.235 – 1.231 ) ⁄ ( 125 – ( – 55 ) )
TC = -------------------------------------------------------------------------------- × 10 = 18 ppm/°C
1.235
6
AN177.0
June 23, 2005
Application Note 177
Supply or Quiescent Current
1. The Supply Current of a voltage reference is the current
that is required to operate the voltage reference with no
load current. In the case of the shunt reference, the
supply current is the minimum current that must be
allowed to flow into the device for proper operation.
Generally, voltage references are designed with very low
supply current to minimize self-heating effects which
would degrade the TC of the device. The Intersil X60008
voltage reference is unique in the industry due to its
incredibly low supply current of only 500nA - it is the first
voltage reference to make possible continuous battery
operation as discussed in the Applications section.
noise in the 10kHz to 1MHz band can be reduced to about
50µVp-p using a 0.001µF capacitor on the output. Noise in
the 1kHz to 100kHz band can be further reduced using a
0.1µF capacitor on the output, but noise in the 1Hz to 100Hz
band increases due to instability of the very low power
amplifier with a 0.1µF capacitance load. For load
capacitances above 0.001µF, the noise reduction network
shown in Figure 13 is recommended. This network reduces
noise significantly over the full bandwidth. As shown in
Figure 12, noise is reduced to less than 40µVp-p from 1Hz to
1MHz using this network with a 0.01µF capacitor and a 2kΩ
resistor in series with a 10µF capacitor.
Output Noise; Wideband (10Hz-1kHz) and
0.1 - 10Hz
In reality, the best way to specify high frequency noise is
to show a graph of noise voltage spectral density in
nv/√Hz vs. frequency. This allows the design engineer to
calculate the reference noise based on the bandwidth of
the system.
X60008-50 Noise Reduction
400
CL=0
350
CL=.001µF
Noise Voltage (µVp-p)
2. Voltage reference Output Noise is generally specified
as a peak-peak voltage in the 0.1 – 10Hz bandwidth
which is useful for low frequency systems such as
temperature measurement. Using a rms reading, output
noise can also be specified in a higher frequency
bandwidth such as 10Hz to 1kHz. Assuming the noise is
truly random, the peak-peak noise can be estimated by
multiplying the rms value by 6. For example, a voltage
reference with 2µV, rms 10Hz to 1kHz noise will have a
peak-peak noise of approximately 12µV.
CL=.1µF
300
.01µF&10µF+2kohm
250
200
150
100
50
0
1
The following equation can be used to calculate the
required RMS noise voltage spectral density:
- Noise density (V/√Hz)
- Reference voltage
- Resolution
- System bandwidth
For example, for a 12 bit system with a 5 V reference
operating in an audio bandwidth of 100Hz to 20kHz:
En < 5 / (12 * 212 * √(20kHz – 100Hz)
< 720 nv//√Hz
100
1000
Frequency
10000
100000
FIGURE 12.
En < Vref / (12 * 2N * √BW)
Where En
Vref
N
BW
10
0.1µF
Vin
Vo
X60008-50
2KΩ
GND
.01µF
10µF
Noise Performance and Reduction
The X60008 output noise voltage in a 0.1Hz to 10Hz
bandwidth is typically 30 µVp-p. The noise measurement is
made with a bandpass filter made of a 1 pole high-pass filter
with a corner frequency at 0.1Hz and a 2-pole low-pass filter
with a corner frequency at 12.6Hz to create a filter with a
9.9Hz bandwidth. Noise in the 10kHz to 1MHz bandwidth is
approximately 400µVp-p with no capacitance on the output,
as shown in Fig.12 below. These noise measurements are
made with a 2 decade bandpass filter made of a 1 pole highpass filter with a corner frequency at 1/10 of the center
frequency and 1-pole low-pass filter with a corner frequency
at 10 times the center frequency. Figure 12 also shows the
7
FIGURE 13.
Often external filtering may be required to reduce the
reference noise to acceptable limits based on the system
resolution and accuracy requirements. The filters for voltage
references will be discussed further in the “Care and
Feeding” section of this Application Note.
AN177.0
June 23, 2005
Application Note 177
ROOM TEMP BOARD2 DRIFT
Delta Vout from 5V initial value
80
70
DRIFT (uV)
60
50
40
25
29
30
20
10
0
0
13 26 39 52 65 78 91 104 117 130 143 156 169 182 195 208 221 234 247 260 273 286 299 312 325 338 351 364 377 390 403 416 429 442 455 468
TIME (Hours)
FIGURE 14.
Line Regulation
Thermal Hysteresis
1. Line Regulation specifies the amount the output voltage
will change as the input voltage is varied over its limits.
Line regulation is specified as µV/V or ppm/V. For
example, the Intersil X60008 Line Regulation
specification is 100µV/V, maximum; therefore, if the input
voltage is changed by 2V from 6V to 8V, then the output
voltage will change by 200µV maximum.
Load Regulation
2. Load Regulation specifies the amount the output
voltage will change as the load current is varied over its
limits. Load regulation is specified as µV/mA or ppm/mA.
Due to the output driver stage of a voltage reference,
often the current sinking specification may be different
than the output sourcing current specification. For
example, the Intersil X60008 Line Regulation
specification is 100µV/mA sinking current and 50µV/mA
sourcing current.
Long Term Stability
3. Long Term Stability tries to predict the amount the
output voltage will change over an extended time period
and is specified as ppm/1000 hours. The only accurate
way to measure long term stability is to wait a very long
time! There is no easy and accurate way to accelerate the
long term stability of a voltage reference. Voltage
reference vendors have tried to use elevated
temperature to predict the effect of aging with the voltage
reference. This technique leads to inaccurate and highly
optimistic long term stability results as discussed in
Reference Note 8.
1. Thermal Hysteresis specifies the maximum change in
room temperature output voltage after the voltage
reference is cycled between two extreme temperature.
For example, the Intersil X60008 is temperature cycled
from 25°C to –40°C and returned to 25°C. The output
voltage is measured and recorded. Then the temperature
is cycled to +85°C and returned to 25°C. The output
voltage is then measured and recorded again. The
deviation between the first 25°C reading and the second
25°C reading is the thermal hysteresis expressed in ppm.
Thermal hysteresis is a direct result of the device
package with the smaller plastic SO packages exhibiting
higher thermal hysteresis than the older TO39 metal can
packages. For further discussion, see Reference Note 8.
Input Voltage Range
1. Input voltage range specifies the range of the input
voltage for proper device operation and meeting the
device electrical specifications. In addition, there is an
Absolute Maximum Rating which must not be exceeded
to avoid damaging the device.
Dropout Voltage
2. Dropout Voltage specifies the minimum differential
voltage between the input voltage and reference output
voltage to maintain the specified accuracy. Many high
precision voltage references require 1V or greater of
input voltage to output voltage differential. The Intersil
X60008 dropout voltage is typically less than 150mV with
an output current of 5mA.
The long term stability for the X60008 is shown in
Figure 14. Notice that after approximately 10 days (240
hours) of initial power-up drift, the output voltage
variations stabilize at about 20µV peak-peak or 4ppm
from the +5V nominal output voltage. Ongoing tests will
provide further data on the long term stability for the
X60008.
8
AN177.0
June 23, 2005
Application Note 177
Advantages of Intersil X60008 Voltage
Reference
The Intersil X60008 series of voltage references use the
Floating Gate Analog (FGA) technology to create references
with extremely tight initial tolerance, very low temperature
drift, and ultra low supply current. As discussed earlier in this
Application Note, the charge stored on a floating gate cell is
set precisely in manufacturing. The reference output voltage
is a buffered version of the floating gate voltage. The
resulting reference device has excellent characteristics
which are unique in the industry:
Absolute Accuracy
1. The Output Voltage Accuracy is extremely tight at
±500µV or ±0.01% for a +5V output. The tight initial
accuracy is set as part of the final manufacturing process
and does not depend on traditional trimming techniques
such as laser trims or fusible links.
Low Temperature Drift
2. The Temperature Drift is extremely low at 1ppm/°C and
is a well behaved monotonic slope with no second or third
order inflections as shown by Bandgap references. The
low temperature drift does not depend on traditional
trimming techniques such as laser trims or fusible links.
Low Power
3. The Supply Current achieves nanopower levels due to
the FGA and CMOS technology. At room temperatures,
the supply current is typically 500nA which is 1 to 3 orders
of magnitude lower than competitive voltage references.
Ability to Set any Output Voltage
4. The Ability to set any Output Voltage is certainly
unique to the X60008 voltage reference. The reference
voltage is not limited to magic voltages as required by
Bandgap voltage or Zener diode voltages. Output
voltages in the range of 0.9000V to 5.0000V can easily
and accurately be set in manufacturing.
Care and Feeding of Voltage References
To many, voltage references would seem extremely easy to
apply – after all, they only have three pins …. an input
voltage, an output voltage, and a ground pin. Some
references may have additional pins for trim, temperature
output, or noise cancellation, but the X60008 series of
references only have three pins. However, unless one is
very careful with the details, things can go wrong very fast!
Nothing should be left to chance in a high accuracy system.
Two schematics shown below for the same circuit illustrate
good and bad design practices.
The Bad Schematic shown in Figure 15 is what is typically
drawn using today’s CAD software which has following
issues:
1. There is no grounding scheme shown with the use of only
one ground symbol.
2. There is no hint to where the grounds or critical
connections should be tied together, and as shown at J1,
the grounds could introduce digital noise into the analog
circuits.
3. Decoupling capacitors are shown in a row with no
indication about which component they are associated.
4. There is no flow to the schematic because the circuit
blocks are not interconnected, and there is no left to right
flow. While this schematic is shown on one page,
Sometimes schematics of the circuit blocks are grouped
on unrelated pages. The worse case was a schematic
where each component was shown separately with only
Net List names indicating connections!
5. The CAD Library symbol for the A/D Converter makes no
sense from a circuit function viewpoint since analog and
digital functions are mixed together.
The Good Schematic is shown in Figure 16; the connections
are identical to the Bad Schematic, but it is redrawn to
illustrate proper connections and PCB routing.
The process used in these voltage references is a floating
gate CMOS process, and the buffer amplifier circuitry uses
CMOS transistors for the amplifier and output stage. While
providing excellent accuracy, low TC, and low power, there
are limitations in output noise level due to the MOS device
characteristics. The limitations are addressed with circuit
techniques discussed in this Application Note.
9
AN177.0
June 23, 2005
Application Note 177
A1 In
.22 µF
A1 In
+7.5 v
1K
7 1
3
A1 In
OP07
6
1K
.22 µF
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
A6 In
4 5 .1 µF
A7 In
12K
10K
J1
A4 In
A5 In
CH0 In
2
A3 In
-7.5 v
A8 In
Typical 8 times
ADC Data In
ADC Data Out
20 VCC
+7.5 v
1
2
3
4
5
6
7
8
CH0 In
Typical 8 times
CH0
CH1
CH2
CH3
CH4
CH5
CH6
CH7
ADC Select
14
13
19
18
REF+
REFACLK
SCLK
5Vref
ADC Clk
+7.5 v
ADC Clk
COM 9
CS 15
DOUT 16
-5 v
ADC Select
ADC Data Out
12
V- 11
17 DINDGND AGND 10
10 µF
10 µF
12 Bit A/D Converter
ADC Data In
X60008
2
+5 v
6
Vo
Vin
5Vref
1 nF
Gnd Gnd
1 4
BAD Schematic
.1 µF x 10
+7 5 v
FIGURE 15.
.22 µF
.1 µF
+7.5 v
12 Bit A/D Converter
A4 In
A5 In
A6 In
A7 In
4
.22 µF
Typical 8 times
A3 In
2 –
1K
A2 In
J1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
3 +7 1A
6
OP07
5
.1 µF
12K
-7.5 v
A
10K
Typical 8 times
Typical 8 times
1K
1 CH0
2 CH1
3 CH2
4 CH3
5 CH4
6 CH5
7 CH6
8 CH7
A8 In
9 COM
ADC Data In
ADC Data Out
ADC Select
ADC Clk
+7.5 v
+7.5 v
.1 µF
2
Vin
Vo
6
14 VREF+
13 VREF-
DOUT 16
DIN 17
CS
15
ADC Data Out
ADC Data In
ADC Select
ACLK 19
SCLK 18
ADC Clk
20
+7.5 v
VCC
DGND 10
AGND 11
V- 12
22 µF
0
Gnd Gnd
1
4
1000 pF
-7.5 v
A
X60008
P
Good Schematic
P
10 uF 10 uF
FIGURE 16.
10
AN177.0
June 23, 2005
Application Note 177
Grounding and IR drops
1. The schematic flows from left to right; the input connector
J1 is on the left, and the logic outputs are on the right side
of the schematic.
As discussed earlier in this application note, voltage
references are used to provide a very precise voltage for
measurements to be made against. The accuracy of any
measurement is only as good as the ability to compare it
against a known standard. If the PCB connections are made
incorrectly, the most perfect voltage reference can still have
errors resulting from poor grounding considerations and not
understanding the impact of Ohm’s Law. Any analog or
mixed signal PCB must have a well thought-out grounding
scheme with multiple ground planes or traces. There must
be no heavy DC current or AC current in the analog ground
planes that connect the voltage reference to the system
measurement point.
2. A ground scheme is shown using a Power (or digital)
Ground plane and an Analog Ground plane. The two
ground planes are clearly designated with a “P” and “A”.
3. To be sure there is no digital noise introduced into the
Analog Ground, the two grounds are tied together at only
one point at the A/D Converter. Furthermore, a 0Ω
resistor is used to connect the two grounds; this ensures
a separate Net for each ground so the PCB layout
software or layout person does not arbitrarily connect the
two grounds. The use of a 0Ω resistor is cheap insurance
against a noisy and inaccurate analog system!
4. The Analog Ground pin (pin 9) is shown to connect
directly to the COM pin of the A/D Converter. Likewise,
the X60008 Reference Ground pins (pins 1and 4) are
shown to connect directly to the REF- pin of the A/D
Converter. There are no additional DC or AC currents in
these lines which could cause DC errors or excessive
noise.
The Good Schematic shown in Figure 16 is an example of a
proper voltage reference connection for a data acquisition
system where the voltage reference ground pin is connected
directly to the measurement point on the A/D Converter.
Shown below in Figure 17 is a 10 Bit Adjustable, 0-5 Amp
Active Load circuit that is useful for testing power supplies
and DC/DC converters.
5. Notice the use of diagonal lines on the COM pin and
REF- pin of the A/D Converter; these indicate a
connection directly at the pin – not at a convenient point
on the ground plane, but right at the pin.
The details of this circuit will be discussed in the applications
section, but notice the way that the voltage reference and
digital pot connections are shown. To avoid errors caused by
IR drops, the connections must be made directly at the leads
of the .05Ω current sense resistor. Just 10mΩ of contact
resistance or PCB trace resistance will cause a 20% error in
the current setting as illustrated in Figure 18.
6. The standard Library part for the A/D Converter was not
used in this schematic. Instead, a new library part was
created to allow proper signal flow and connections. It
should be noted that creating this new library part took
several iterations and additional time to get it right, but it
was worth the effort to create proper documentation.
7. While not apparent on this schematic, a design should
never be based on ease of schematic entry!
D.U.T. Voltage
(1 - 5 v)
X60008CIS8-50
+6.5 v
.1 µF
2
Vin
Vo
Gnd Gnd
1 4
6
Iout = 0 - 5 amps
4.75K
+6.5 v
1000 pF
249
Rh
(100K)
Vcc
Rw
Vss Rl
10
1000 pF
IRL3714
(Heatsink)
X9119
2-wire Bus
1K
Kelvin Connection
.05
FIGURE 17.
11
AN177.0
June 23, 2005
Application Note 177
D.U.T. Voltage
(1 - 5 v)
X60008CIS8-50
2
+6.5 v
Vin
0.1 µF
Vo
6
Gnd Gnd
1 4
Iout = 0 - 5 amps
4.75K
+6.5 v
1000 pF
Vcc
Rh
249
Rw
(100K)
10
Vss Rl
1000 pF
IRL3714
(Heatsink)
X9119
1K
2-wire Bus
0.005 ohms of
Contact and trace
resistance
20% Error !! ===>
.05
0.005 ohms of
Contact and trace
resistance
FIGURE 18.
Due to the outstanding initial accuracy of the X60008AIS850 of ±500µV, it takes very little PCB trace resistance to
introduce errors that exceed the specifications of the
X60008AIS8-50. The chart below shows the maximum PCB
trace resistance at a given load current to maintain the
X60008 accuracy. The chart is based on using 1oz. copper
which has a typical sheet resistance of 0.5mΩ /square. The
resistance of the PCB trace can be calculated by:
Remote sensing as shown in Figure 19 is required if high
accuracy at high load currents is required. Notice that
remote sensing is employed on both the +5V Ref side of the
50Ω load and on the ground side of the load.
R = 0.5 mΩ/square * Length / Width
LOAD
CURRENT
MAXIMUM TRACE
RESISTANCE
MAXIMUM LENGTH OF
20 MIL TRACE
(mA)
(mΩ)
(inches)
10
50
2
50
10
0.4
100
5
0.2
500
1
0.04
1 amp
0.5
0.02
12
AN177.0
June 23, 2005
Application Note 177
+7.5 v
X60008CIS8-50
2
+7.5 v
0.1 µF
Vin
Vo
Gnd Gnd
LT1677
3 7
6
10 µF
2
1000 pF
LT1010CN
3
1
6
8
4
+5 v Ref
6
1000 pF
50
2K
FIGURE 19.
PCB Mounting and Location on PCB
DNC Pins
For applications requiring the highest accuracy, the board
mounting location of the voltage reference is critical. Placing
the X60008 voltage reference in areas of the PCB subject to
twisting can cause degradation in accuracy of the reference
voltage due to die stresses. It is normally best to place the
device near the edge of the board or the shortest side. The
axis of bending is most limited in these locations.
DNC or NC pins are truly Do Not Connect pins! On most
high accuracy voltage references, post-package trimming is
achieved with the use of these DNC pins. On some voltage
references, the DNC pins are fusible links to trim the output
voltage.
The following techniques can be used to improve the
accuracy:
1. Mechanically restraining the PCB with mounting screws
and grommets in each corner of the PCB
2. Thicker boards and not using thin or flexprint PCB
3. Sots in the board around the voltage reference
4. Avoid trapping adhesives and solder flux under the
package
Soldering Care
The incredibly tight output voltage (±500µV) means that
great care must be taken in the soldering process to avoid
stress on the die. The key to soldering the parts onto a PCB
is to not do it by hand one pin at a time with a high
temperature soldering iron. Having one pin at high
temperature while other pins are at low temperature puts
very high uneven stress on the device and causes large
(many mV) shifts in the X60008 output voltage.
The best way to solder the X60008 voltage reference is to IR
solder it onto the board with the lowest temperature
possible; +220 °C or below is recommended. Also, only put
the X60008 voltage reference through the IR reflow process
once, not multiple times, to minimize output voltage shift due
to package stress during IR reflow. Therefore, on a PCB that
uses components mounted to both the top side and backside
of the board, make sure the X60008 soldering operation is
the second run through the IR reflow process.
13
Incoming inspection or in-circuit PCB level tests that force
voltages and currents into pins must be avoided at the DNC
pins so as not to alter set voltages or damage the device due
to electrical over-stress.
Voltage Reference Output Filters
Output filters can be used to reduce the voltage output noise
of the X60008; however, much care must be taken since it is
very easy to “lose” 0.5mV in the filter stage. Testing the
output noise of a high quality reference such as the X60008
is often a challenge since to test for 0.1 to 10Hz noise from a
voltage reference, it is necessary to AC couple the output of
the reference before it is applied to a high gain stage as
shown in Figure 20.
X60008
Under Test
10 µF
16K
Noise Out
10 Hz LPF
0.1 Hz HPF
160K
Gain = 50K
1 µF
a
FIGURE 20.
AN177.0
June 23, 2005
Application Note 177
voltage of 100µA * 1600Ω = 160mV is created! Reducing the
capacitor value and increasing the resistor value does not
help because while the leakage current is reduced, the
resistor value is increased! For example, for a 100µF
capacitor in the same Panasonic VS series, the leakage
current is reduced to 10µA, but the resistor value is
increased to 16kΩ. The same 160mV of error is introduced!
Additionally, the high gain stage in a typical noise test circuit
requires a very low voltage noise op amp; however, low
voltage noise op amps exhibit high current noise which
prevent the use of high resistance values in the 0.1Hz AC
coupling filter. Appendix B describes a novel voltage
reference test circuit which eliminates the need for a 0.1Hz
AC and includes a peak to peak voltage detector. Also in
Appendix B test data is shown for various output filter
circuits.
Fortunately there is a solution obtained by bootstrapping two
capacitors as shown in the filter circuit in Figure 21. The
bootstrapping arrangement lowers the applied voltage
across the capacitors and drops the capacitor leakage
current to acceptable levels. This simple filter circuit reduces
the 0.1Hz to 10Hz noise by at least 50%, and attenuates the
higher frequency reference noise by the characteristic of a
single pole low pass filter with a 0.1Hz corner frequency.
To effectively attenuate noise in the 0.1Hz - 10Hz bandwidth,
it is necessary to use large value capacitors and/or large
value resistors. For example, for a one pole low pass filter
with a 0.1Hz corner frequency it is necessary to use resistor
and capacitor values as shown below:
RESISTOR (kΩ)
CAPACITOR (µF)
160
10
16
100
1.6
1000
When designing noise filters for the X60008 voltage
reference remember:
1. Beware of capacitor leakage current working against high
value resistors which generate an error voltage.
2. Use a low offset voltage and low bias current op amp for
the buffer amplifier.
While it seems attractive to use a 1000µF capacitor and
1.6kΩ resistor, the large leakage current of an electrolytic
capacitor will generate an error voltage across the 1.6kΩ
resistor. For example, the leakage current of a typical
1000µF capacitor is 100µA (Panasonic VS series); an error
3. Low frequency filters require a long time to settle to high
accuracy levels; for example ten time constants are
required for 0.01% settling time. A 0.1Hz filter requires 15
seconds to settle to 0.01%!
X60008CIS8-50
7.5 v
Vin
16K
LT1012
Vout
Filter Out
100 µF
160K
10
0.1
Gnd
Gnd 0.01
10
100 µF
2K
a
FIGURE 21.
LP2980-ADJ
Vin
Vout
4.7K
+12 v
+5.7 v
7 - 16 v
39K
SD
1N4148
10
+6 v
Gnd
Adj
1 µF
3.3K
+6.2 v
+12 v
BZT52C6V2
+5 v
10K
a
a
FIGURE 22.
14
AN177.0
June 23, 2005
Application Note 177
Input Voltage Regulators
X60008 from a single +5V supply. The 3.3V charge pump
circuit uses Schottky diodes to minimize the diode losses to
generate 6V from a 3.3V supply. The 5V charge pump circuit
uses two silicon diodes to maximize the diode losses so the
+10V maximum operating voltage specification of the
X60008 is not exceeded.
If the input voltage comes from an unregulated source, it
may be necessary to add a linear regulator before the
X60008 to maintain rated accuracy of ±0.5mV. The Line
Regulation specification for the X60008 is 100µv/V; if the
input voltage ranges from 5V (minimum value) to +10V
(maximum value), the output voltage could have an error of
500µV or 0.5mV. Any simple linear regulator can be used to
stabilize the input voltage to acceptable levels. Several
simple regulator circuits are shown in Figure 22.
Due to the low operating power of the X60008, it is also
possible to “float” the operating voltage for the reference on
virtually any voltage by simple charge pump circuits as
shown above.
It is also possible to operate the X60008 on either 3.3V or 5V
if they are the only supply voltages in the system. Simple
capacitor based charge pump circuits can be designed
which use any digital clock in the system. The circuit shown
below in Figure 23a allows operation in a 3.3V system;
notice the additional resistor and capacitor to attenuate the
switching noise and ripple. Figure 23b shows operating the
A.
1 µF
BAT54ST
Operating on a negative supply or operating below a positive
supply is also possible as shown in Figure 24. Operating
below a positive supply can be useful in ground sourcing
current sources as shown in the Applications Section.
1K
+6 v
3.3 v CLK
10 µF
1 µF
(500 µa max load)
a
3.3 v
B.
10 µF
1N4148
1K
5 v CLK
10 µF
1N4148
10 µF
+8.5 v
(500 µa max load)
a
5v
FIGURE 23.
Vs = +24 v
2
Vin
Vout
Gnd
C1
1
10 µF
2
6
Gnd
4
C2
0.001 µF
Vin
Vout
Gnd
1
Gnd
4
6
Rload > 5K
Rload > 5 * R1/( |Vee| - 5)
C1
10 µF
Rload > 2.6K
Rload > 5 * R1/( Vs - 5)
-Vref = -5.000 v
-Vref = -5.000 v
X60008CIS8-50
U1
C2
0.001 µF
X60008CIS8-50
U1
R1
10K
R1
10K
Negative Reference
Negative Reference
with respect to +24 v
-Vee = -15 v
FIGURE 24.
15
AN177.0
June 23, 2005
Application Note 177
Thermocouple Effects
It must be recognized that thermocouple voltages are
developed by the difference in temperature between the two
ends of dissimilar metal junctions, and not the absolute
ambient temperature. If both ends of the metal junctions are
isothermal (i.e., at the same temperature) there is no
thermocouple voltage developed. Therefore, the first rule to
avoid thermocouple effects is to eliminate hot spots on a
PCB (i.e. linear voltage regulators). If hot spots cannot be
avoided, then the two ends of metal junctions must be
oriented so they are on isothermal lines on the PCB.
8 : 1 Mux
8 Analog Inputs
At any point in a circuit where dissimilar metals come in
contact a small thermocouple voltage is developed.
Fortunately, the copper lead frame of a surface mount device
is the same copper material as PCB etch, and the
thermocouple effect is minimized. However, there are many
other places where thermocouples can be generated; for
example, across a connector finger, across relay contacts, or
even across a resistor! Yes, a poorly constructed resistor
can show many µV/°C of thermocouple voltage. It has been
found that external components (resistors, contacts, sockets,
etc.) can create thermocouple voltages that exceed
10µV/°C. The top grade voltage reference, X60008AIS8-50,
has a maximum TC of only 1ppm/°C which is a voltage
change of only 5µV/°C. Therefore, without proper care,
passive components can easily create errors that exceed the
TC of the X60008AIS8-50.
Instrumentation Amplifier
Voltage Reference
A/D Converter
FIGURE 25.
QUICK ERROR BUDGET ANALYSIS FOR FIGURE 25
COMPONENT
GAIN ERROR
OFFSET ERROR
8:1 Mux
0
0
Instrumentation Amp
±0.03%
±0.36mV ≥
±0.007%
Instrumentation Amp TC
50ppm/°C ≥
±0.18%
4.4µv/°C ≥
±0.006%
Instrumentation Amp Gain 0.1%
Set
0
The second rule to minimize thermocouple effects is to
balance the number of junctions in a loop so that the error
voltages are cancelled or become a common mode voltage
that is reduced by the CMRR of the op amps in the signal
chain. If the number of junctions are not balanced, then it
may be necessary to create a junction by adding a series
resistor that has no effect on circuit operation but balances
the number of junctions.
Instrumentation Amp Gain 10ppm/°C ≥
Set TC
±0.04%
0
Applications
As one can see, for a simple 12 bit Data Acquisition System
using a typical architecture with high performance Integrated
Circuits the accuracy is a pretty miserable ±1%! And, this is
not a comprehensive error analysis; for example, error for
the MUX and the effects of linearity (INL and DNL) are not
included.
Auto-Calibrated 12 Bit Data Acquisition System
The design of a true 12 bit data acquisition is extremely
difficult due to the inaccuracies of the various components in
the signal chain. Figure 25 shows a block diagram for a
typical 8 input channel, 5V Full Scale, 12 bit Data Acquisition
system; a quick error budget analysis for this system is
shown below assuming 0 – 70°C operation.
16
ADC + Voltage Reference
±15 LSB ≥ ±0.4% ±6 LSB ≥ ±0.15%
ADC + Voltage Reference
TC
45ppm/°C ≥
±0.16%
SubTotal of Errors
±0.91%
Total of Errors
±0.16%
±1.07%
AN177.0
June 23, 2005
Application Note 177
Precision Voltage Reference
8 : 1 Mux
Instrumentation Amplifier
High quality ground
6 Analog Inputs
FS Trim
Zero Trim
+Vref
-Vref
Digital Control
A/D Converter
with Internal
Voltage Reference
FIGURE 26.
The Integrated Circuit vendor for the A/D Converter
sidesteps this issue by including a calibration procedure in
the data sheet for the device. Typical application circuits
show adjustment pots for zero trim (offset) and full-scale trim
(gain); the trims must be done at production test which does
not take into account the temperature drift of the various
components shown above. Of course, the adjustment pots
can be replaced with digital pots such as the Intersil X9271
so the production test process can be automated. Zero or
offset errors are easily tweaked out because with care there
is a high quality zero volt source available; i.e., ground! It is
more difficult to calibrate full scale voltage because a high
quality source of full scale voltage is required; this is usually
a calibration standard in the production test equipment.
However, the temperature drift inaccuracies are not
calibrated out once the system leaves the factory floor.
Ideally, both the zero and full scale error would be calibrated
before every high accuracy conversion or on a very regular
basis that is more often than changes in the ambient
temperature.
Figure 26 shows a revised architecture for the Auto
Calibrated Data Acquisition System shown in Figure 25.
Two of the analog inputs are used as calibration source
inputs for full scale adjust with a precision voltage reference
and zero adjust with a high quality ground. Digital
potentiometers (DCPSs) controlled by a microprocessor are
used for zero trim and full scale trim. If non-volatile DCPS
are used, the Auto Calibrated Data Acquisition System will
maintain calibration even with the power removed.
Calibration can be performed as often as required – before
every high precision measurement, once a day, once an
hour, etc. The user decides how often calibration is required.
The secret of this calibration scheme is the Precision Voltage
Source since all the system full scale errors are referred to
this device. The Intersil X60008AIS8-50 is an excellent
17
choice for the reference since the initial accuracy is less than
0.4LSB for a +5V full scale range. Temperature drift of less
than 0.3 LSB is maintained over a temperature range of 0°C
to +70°C due to the low temperature coefficient of 1ppm/°C.
Relatively inaccurate components can be used in the signal
chain because their errors are calibrated out by the autocalibration process.
The complete implementation of the Auto Calibrated Data
Acquisition System is shown in the detailed schematic of
Figure 27.
Two 4:1 differential MUXs (U1, U2) are used for 6 differential
analog inputs. A high precision +5.000 V calibration source
(X60008AIS8-50) is applied to S1A and S1B of U1 for full
scale calibration. S2A and S2B of U1 are connected to a
bias voltage set at +0.6 mV which is ∫ LSB of a 5V input
range; this is used for zero calibration. The remaining 6
channels of U1 and U2 are used for the analog inputs.
Additional analog MUXs could be added for more input
channels. Likewise, if 8 analog inputs are required, a quad
analog switch could be added to the DA and DB outputs with
the calibration sources (+5V and Gnd) applied to their inputs.
The +5.000 V calibration source is obtained from a Intersil
X60008AIS8-50 voltage reference. Input power for the
X60008AIS8-50 is obtained by generating a +5.6V source
with diode D1 and bias resistor R1. An output noise filter
consists of C3, C4, and R2. The +0.6 mV bias voltage for
zero calibration is obtained with R3 and R4. A –5V reference
for the zero adjustment circuit is generated with an inverting
op amp (U5B), R5, and R6.
An Instrumentation Amplifier (U4) converts the differential
outputs from the MUX to a single ended output with a gain of
2.034. The gain of the IA is set by R9 such that:
Gain = (49.4k/R9) + 1
AN177.0
June 23, 2005
Application Note 177
+15 v
R1
4,3K
D1
1N4148
+5 v
C1
10
C2
.1
Gnd
1
Gnd
4
+5 v Ref
2K
R2
FS ADJUST
ZERO ADJUST
CH1+
CH2+
CH1CH2-
14
3 V+
V4 S1A
5
6 S2A
7 S3A
S4A
13
12 S1B
11 S2B
10 S3B
S4B
+15 v
-15 v
CH3+
CH4+
CH5+
CH6+
CH3CH4CH5CH6-
A0 1
16
A1
2
EN
7
5 +
1
-5 v Ref
U6
LT1007
8 LT1112
U5B
a
R9
47.5K
2
+
8
2
4
5
6
3 +
1
7
+15 v 10
C7
+15 v
7
4
1.27K -15 v
R8
Av = 2.034
Ain
Vref
5
a
Data
D7
Bits
D8
Out
D9
D10
BusyL
CSL
RDL
HBEN
4990
R12
51.1K
R11
5110
Gain Adjust
(Av = .482 - .498)
100K, 256 tap, SPI Rw
SI
A0
+5 v
GND 15
a
+15 v Offset Adjust
U5A
R13
402
LT1112 8
100K
R15
3
+
1
2
4
R14
200K
-15 v
a
-5 v Ref
Rh
Vss WP
U/D
Inc
CS-L
a
Logic
A1
Vcc
Rw
Rl
Lines
CS
Sck
SO
a
+5 v Ref
Control
+5 v
U8
X9271T
Vcc
Rh
Hold
Rl
1
A0 16
A1
EN 2
D6
D11
.1
C8
AGnd
U4
LT1167
R10
6
D3/11
D4
D5
-15 v
15
DA 8
DB 9
U2
DG409
EN1
EN2
ADR1
ADR2
R4
10
U7 d
LTC1273
4
6
3
a
14
3 V+
V4
5 S1A
6 S2A
7 S3A
S4A
13
12 S1B
11 S2B
10 S3B
S4B
R5
20K
D2/10
DGnd
R6
20K
R7
1.27K
DA 8
9
DB
GND
R3
82.5K
(.6 mv)
U1
DG409
+15 v
-15 v
D0/8
D1/9
10 .1
C5 C6
+5.000 v Calibration
.01 10
C3 C4
a
Vdd
+5 v
U3
X60008CIS8-50
2
6
Vin
Vout
Logic
d
Gnd
U9
X9318
10K, 100 tap
d
12/29/03
FIGURE 27.
The gain is set slightly higher than 2 so an adjustable 0.5
voltage divider can be used passively vary the overall gain
by 1 ±1% to account for all the errors in the signal chain.
Resistor R10, R11, R12, and D-Pot U8 are an adjustable
voltage divider with a gain of 0.482 to 0.498; this allows the
overall gain to be adjusted from 0.98 to 1.02 under the
control of the D-Pot U8. Since the resistors are in the overall
full scale feedback calibration loop, their tolerance or TC are
not critical as long as there is adequate adjustment range.
The Ref pin of U4 is used for zero adjustments since there is
a 1:1 correspondence between the Ref pin voltage and
output voltage. Resistors R13, R14, R15, and D-Pot U9
provide an adjustable voltage of –10mV to +10mV under the
control of U9. Since the Ref pin of U4 should driven by a low
impedance to maintain the high common mode rejection
ratio, op amp U5B is to buffer the ±10mV source.
The output of the adjustable 0.5 voltage divider is buffered
with U6 since the A/D converter, U7, requires a low
impedance and fast settling driver. The A/D converter is a 12
bit, 300Ks analog to digital converter with 12 bit parallel data
outputs.
The zero calibration must be done first by selecting the +0.6
mV bias voltage on S2 of U1. Adjustment D-Pot U9 is
incremented or decremented until there is an even flicker of
output codes 0000 0000 0000b and 0000 0000 0001b (i.e.,
the LSB flickers evenly) from the A/D converter.
The full scale calibration is done second by selecting the
+5.000V calibration source, X60008AIS8-50 on S1 or U1.
Adjustment D-Pot U8 is varied until there is an even flicker of
output codes 1111 1111 1110b and 1111 1111 1111b (i.e., the
MSB flickers evenly) from the A/D converter. To the purist,
the analog input voltage should be set for 5V – 1.5LSB =
4.99817 V for full scale calibration. However, to maintain the
accuracy of the X60008AIS8-50, it was decided to accept a
full scale input voltage of +5.000V + 0.5LSB = +5.0006V.
It must also be noted that the +5.000 V calibration source,
X60008AIS8-50 and zero source could also be applied to
signal conditioning before the MUX stage thus calibrating out
any error in the signal conditioning circuitry. The autocalibration scheme must be considered a closed feedback
loop and any errors inside the feedback loop are reduced by
the gain (i.e., adjustment range) of the feedback loop.
The calibration scheme is simple.
18
AN177.0
June 23, 2005
Application Note 177
Auto-Calibrated 12 Bit Digital to Analog Converter
The design of a true 12 bit Digital to Analog Converter, like
the design of a true 12 bit data acquisition system, is
extremely difficult due to the inaccuracies of the various
components in the signal chain. Figure 28 shows a block
diagram for a typical 5V Full Scale, 12 bit Digital to Analog
Converter; a quick error budget analysis for this system is
shown below assuming 0 – 70°C operation.
RefOut
Data Bits In
RefIn
Internal
Voltage Reference
0 to +5 v Out
D/A Converter
FIGURE 28.
QUICK ERROR BUDGET ANALYSIS FOR FIGURE 28
COMPONENT
GAIN ERROR
OFFSET ERROR
D/A Converter +
Reference
±0.2%
±2LSB = ±.05%
D/A Converter +
Reference TC
±30ppm/°C ≥
±0.15%
±3 ppm/°C ≥ ±0.015%
SubTotal of Errors
±0.35%
±0.065%
Total of Errors
±0.42%
As you can see, for a simple off the shelf high performance
Integrated Circuit 12 bit D/A Converter using a typical
architecture, the accuracy of ±0.42% is nowhere near 12 bit
resolution of ±0.02%.
Like the previous example for a 12 bit A/D Converter, the
Integrated Circuit vendor for the D/A Converter (different
manufacturer!) sidesteps this issue by including a calibration
procedure in the data sheet for the device. Typical
application circuits show adjustment pots for zero trim
(offset) and full-scale trim (gain); the trims must be done at
production test which does not take into account the
temperature drift of the various components shown above.
Of course, the adjustment pots can be replaced with digital
pots such as the Intersil X9271 so the production test
process can be automated. However, high precision voltage
measurements must be made for both zero volts for offset
errors and +5V for full scale errors which require calibration
measurement standards in the production test equipment.
However, the temperature drift inaccuracies are not
calibrated out once the system leaves the factory floor.
19
Ideally, both the zero and full scale error would be calibrated
on a very regular basis that is more often than changes in
the ambient temperature.
Figure 29 shows a revised architecture for the Auto
Calibrated Digital to Analog Converter shown in Figure 28.
The output voltage from the D/A converter is compared
against a high quality ground for zero trim and a high
accuracy precision voltage for full scale trim. Digital
potentiometers (DCPs) controlled by a microprocessor are
used for zero trim and full scale trim. If non-volatile DCPs are
used, the Auto Calibrated Digital to Analog Converter will
maintain calibration even with the power removed.
Calibration can be performed as often as required – before
every high precision measurement, once a day, once an
hour, etc. The user decides how often calibration is required.
The secret of this calibration scheme is the Precision Voltage
Source since all the system full scale errors are referred to
this device. The Intersil X60008AIS8-50 is an excellent
choice for the reference since the initial accuracy is less than
0.5LSB for a +5.0V full scale range. Temperature drift of less
than 0.3 LSB is maintained over a temperature range of 0°C
to +70°C due to the low temperature coefficient of 1ppm/°C.
Relatively inaccurate components can be used in the signal
chain because their errors are calibrated out by the autocalibration process.
The complete implementation of the Auto Calibrated Digital
to Analog Converter is shown in the detailed schematic of
Figure 30.
U1 is a 12 bit parallel input D/A Converter with an internal
10V reference; laser trimmed resistors on the 20V Span and
10V Span pins allow the user to set many output voltage
ranges. A Bipolar Offset pin provides the ability to generate
bipolar output ranges such as ±5V, or this pin can be used
for zero or offset adjustments. For a complete description of
the pin settings, refer to the AD767 data sheet. While the
AD767 has an internal voltage reference and factory
trimmed span resistors, the overall error is ±0.4% as
illustrated in the Error Budget shown above. Figure 30
shows an auto-calibration technique to eliminate zero and
full scale error sources. The D/A converter output voltage is
compared against a +5.000V calibration voltage,
X60008AIS8-50 and a high quality ground for full scale and
gain adjustments via digital potentiometers U7 and U8.
The +5.000V calibration source is obtained from a Intersil
X60008AIS8-50 voltage reference. Input power for the
X60008AIS8-50 is obtained by generating a +5.6V source
with diode D2 and bias resistor R8. An output noise filter
consists of C5, C6, and R9. A +0.6 mV bias voltage for zero
calibration is obtained with R10 and R11. A –5V reference
for the zero adjustment circuit is generated with an inverting
op amp (U4A), R12, and R13.
AN177.0
June 23, 2005
Application Note 177
D/A Converter
3
+
7 1
RefOut
RefIn
6
2
FS Trim
4
5
Internal
Voltage Reference
Data
Bits
In
Buffer Amplifier
+
Vout
0 to +5 v Out
Hold Capacitor
Comparator
Zero Trim
+Vref
+
-Vref
Digital Control
Precision
Voltage Reference
12/30/03
FIGURE 29.
R17
4990
+12 v
Vcc
Vee
S2B
-12 v
R19
51.1K
Ref In
D0
R18
5110
U8
X9271
+
DGnd
AGnd
d
R20
5360
Av=2.034
a
S2B
Offset Adjust
a
100K
R14
200K
a R15
D2
C3
+5 v
10
1N4148
+
a
+5.000 v Calibration
X60008CIS8-50
Vin
Vout
Gnd
.01
C5
10
C6
Cal
Vout = 0 to + 5 v
C2
3.3 uF
a
U4A
AD706
-5 v Ref
U5A
D1
S1A
IN1
+5 v
U9
3
R6
7 LT1167 1K
+
6
1
5
8
4
2
R5
499
S1B
82.5K
R10
Cal = 0 for Calibration mode
R3
1K
+12 v
a
(+.6 mv)
Gnd
C4
.1 U3
R2
2.2K
Cal
R12
20K
IN1
a
100
20K
R8
4.3K
AD706
+
IN2
R16
R13
+12 v
220 pF
C1
D2
S2A
U7
X9318
10K D-Pot
D1
S1A
U5B
ADG436
+5 v Ref
R21
5110
U2B
U6A
S1B
Bip Off
U1
AD767
U4B
AD706
R1
100
+
Vout
CS-L
ADG436
U2A
AD706
SJ
FS Adjust
U6B
a
10v Span
D11
a
IN2
20 v Span
Data In
100K D-Pot
D2
S2A
Ref Out
1K
R4
a
-12 v
Av = 100
2
8
+
3
46
5
R7
1K
7
1
Comp Out
-12 v
D1
BAT54S
d
a
LT1011
U10
Cal0
2K
R9
R11
10
Cal0 = 1 for Zero Calibration
Cal0 = 0 for FS Calibration
a
FIGURE 30.
20
AN177.0
June 23, 2005
Application Note 177
The output voltage from the D/A Converter, U1 is buffered with
unity gain op amp (U2A) which is configured to drive a
capacitive load, C2. Resistor R1 provides isolation from the
capacitive load; resistor R2 and capacitor C1 are for loop
compensation. Capacitor C2 is a Hold capacitor because
during the calibration mode, switch S1A of U6A disconnects
the D/A Converter output voltage from the system output
voltage, Vout. During the calibration mode, capacitor C2
stores and holds the previous D/A converter output voltage so
that the system output voltage Vout stays constant. Op amp
U2B buffers the hold capacitor voltage. To minimize charge
injection error from the opening of S1A of U6A, a large
capacitor value is used for C2. So, during normal run mode,
switch S1A of U6A is closed, and the D/A converter output
voltage is stored on capacitor C2. The system output voltage
Vout tracks the D/A converter output voltage.
Instead of using manual adjustment potentiometers for the
zero and full scale adjustments, digital potentiometers (DCP’s)
are used under digital control. Zero or offset errors are
adjusted to zero by using the Bipolar Offset pin of U1. D-Pot
U7, resistors R14, R15, and R16 varies the Bipolar Offset pin
voltage by ±10 mV.
Full scale or gain adjustments are made by modifying the Ref
Out voltage of U1 by ±1% before it is applied to the Ref In pin.
The AD7676 data sheet recommends using a 100Ω
potentiometer for this adjustment; however, this is difficult with
a D-Pot because the Ref Out pin is at +10 V. Also, the wiper
resistance of a D-Pot (40-200Ω) prevents it from being used in
varying a low resistance. Therefore, a scheme similar to the
Auto-Calibrated Data Acquisition System is used. The Ref Out
voltage is divided down by two with R17 and R18; D-Pot U8
and R19 allow the divided to be adjusted by ±1%. Then, the
reference voltage is amplified back up by a gain of 2.034
amplifier circuit, U4B, R20, and R21.
During the calibration mode, S1A of U6A is opened and the
system output voltage Vout remains at the previous D/A
converter output voltage. Switch S2A of U5B is closed which
applies the buffered D/A converter output voltage to an ultra
low offset voltage comparator made up from Instrumentation
Amplifier U9 and comparator U10. Since the offset voltage of
the comparator circuit is a direct error source, it is necessary
to minimize its offset voltage; unfortunately, the lowest offset
voltage comparator (LT1011) still has a maximum offset
voltage of 3mV worse case. To reduce the effect of U10’s
offset voltage, a gain of 100 difference amplifier, U9 is used;
the overall effect of the comparator’s offset voltage is
attenuated by 100 to only 30µV. To minimize the voltage
swing applied to the comparator, a Schottky diode clamp
consisting of R6 and D1 is used so the input only swings
±0.3V. The output from the comparator, Comp Out, goes to a
digital control circuit which increments or decrements the
DCPS until a zero crossing is detected by the comparator.
There are two calibrations that must be made; first, the zero or
offset calibration is performed. S1A of U5A is closed so that
21
+0.6mV is applied to the comparator circuit input; the D/A
Converter input code is set to 0000 0000 0000b. D-Pot U7 is
adjusted until there is a transition on the Comp Out signal
indicating that the D/A Converter output voltage is +0.6 mV.
Second, full scale or gain calibration is performed. S1B of
U5A is closed so that +5.000 V is applied to the comparator
circuit input; the D/A Converter input code is set to 1111 1111
1111b. DCP U8 is adjusted until there is a transition on the
Comp Out signal indicating that the D/A Converter output
voltage is +5.000 V. To the purist, the +5.000 V calibration
voltage applied to the comparator circuit should be set for 5V
– 1.5LSB = 4.99817 V for full scale calibration. However, to
maintain the accuracy of the X60008, it was decided to accept
a full scale input voltage of +5.000V + 0.5LSB = +5.0006V.
The auto calibration scheme provides a closed feedback
around the D/A converter, its internal reference voltage, and
the buffer amplifier, U2A. The only remaining error at the
system output voltage, Vout is the offset voltage of U2B
(100µV) and the charge injection loss of switch S1A of U6A
(90µV).
Digital Voltmeter Integrated Circuit Voltage
Reference
Integrated circuits for digital voltmeters are available from
several semiconductor manufacturers; an example of such an
IC is the MAX1494 from Maxim Integrated Products. This is a
4 1/2 digit single chip A/D Converter with LCD drivers and is
intended for digital voltmeters, digital panel meters, etc. A
4 1/2 digit meter can resolve 1 part in ±19,999 or ±.005%
(±50ppm) on a 0.2V or 2V full scale range. The device has an
internal voltage reference of +2.048V, or the user can supply
an external reference. However, when even the simplest error
analysis is performed, the inaccuracy of the IC is apparent.
For example, from the data sheet, the gain error is ±0.5%
using an external reference of 2.048V. The internal reference
is specified at 2.048V ±2% with a temperature drift of
40ppm/°C. If the internal reference was to be used for
measurements, the overall error of the reading would be
±2.5%.
The obvious solution would be to use an external 2.048V
reference instead of the internal reference. However, the
external reference must be very low power so the overall
power budget is not jeopardized by the additional current of
the reference device. The Intersil X60008 voltage reference
provides all the desired functionality – very high initial
accuracy of ±0.01%, low temperature drift of 5 ppm/°C, and
extremely low supply current of 0.5 µA. By using the X60008
as the external reference as shown in Figure 31, the only error
of the DVM measurement system is the gain error of ±0.5%.
If higher accuracy is required for the application, an autocalibration scheme similar to the Auto-Calibrated Data
Acquisition System described earlier in the Application Note
could be used which would reduce the measurement error to
less than ±0.02%.
AN177.0
June 23, 2005
Application Note 177
MAX1494
AIN+
AINU1 X60008
2
+5 v
4.7 µF
(2.048 v)
Vout 6
Vin
REF+
.1 µF
Gnd Gnd
1
4
(Other pins not shown for clarity)
2k
REFGND
10 µF
INTREF
DVM + LCD Driver IC
FIGURE 31.
1 Vin
3 On/Off
U2
LP2980-5
2
Vin
Vo
6
R1
47.5K
Vout 5
Gnd
2
C4
12
9v
C1
10 µF
C2
.1 µF
Gnd Gnd
1 4
C3
1000 pF
U1
X60008CIS8-50
Iout = 0 - 5 amps
Load Voltage
(1 - 50 v)
10 uF
(.25 v)
Rh
14
Vcc
Rw 11
2.49K
R2
(100K)
Vss Rl
7
13
C5
.1 µF
U4
LT1077
7
3 + 1
4
X9111
U3
R3
10
2
5
Q1
IRFZ44
(55 v, 20 mohm, TO220)
C6
1000 pF
Heatsink Required
(see text)
R4
1K
SPI Bus Interface
R5
.05
2 watt
and control logic
Note: Maximum load current and load voltage will be
determined by FET SOA and heatsink.
10 Bit Adjustable
0 to 5 amp Active Load
FIGURE 32.
0 to 5 Amp, 1 to 50 V Active Load 10 bit Resolution
Often when testing power supplies and DC/DC converters it
is helpful to have a programmable current source for an
active load. Figure 32 shows a current source circuit that is
capable of 0 to 5 Amp adjustable output current with 10 bits
resolution (5mA) with 50V compliance voltage. The
maximum simultaneous voltage and current will be limited by
FET SOA considerations, the heatsink and available airflow.
The active load is powered from a standard 9V battery; due
to the very low operating current of the X60008 voltage
reference, the battery current is less than 650µA for long
battery life.
22
The Intersil X60008, U1 provides a precise +5.000V to a
voltage divider R1 and R2 which generates +0.25V. The
output voltage from the wiper terminal of a Intersil digital
potentiometer (D-Pot), U3 varies from 0VDC to +0.25VDC in
250µV increments under SPI bus control. Operating power
for U3 is provided by a low power linear regulator with a +5V
output. Op amp U4, FET Q1, and resistor R5 are a current
source circuit where the output current is:
Iout = N/1023 * 0.25V/0.05Ω
= N/1023 * 5 amps
where N = Wiper Control Register (WCR) value
in decimal
AN177.0
June 23, 2005
Application Note 177
less than 1°C/Watt to keep the junction temperature of the
FET at less than 125°C.
Resistor R3 provides gate isolation to prevent oscillation in
the FET. Resistor R4 and capacitor C6 provide loop
compensation for the current source circuit.
4 to 20 mA. Two Wire Current Transmitter
As mentioned earlier, the maximum output current and load
voltage are limited to the SOA of the FET as shown below:
LOAD VOLTAGE
(Vdc)
OUTPUT CURRENT
(Amps)
OUTPUT POWER
(Watts)
3.3V
5 Amps
16.5
5.0V
5 Amps
25
12V
5 Amps
60
25V
2 Amps
50
50V
1 Amp
50
In industrial control systems and process control systems,
4-20mA current loops are widely used to transmit analog
process data over long distances on a factory floor or in a
manufacturing complex. Current loops are used due to their
noise immunity and suffer no loss of signal due to wire drops
(IR losses). Over the years, current loops have proven to be
a reliable and economical way to transmit analog data over
an already installed copper wire. There are two types of
4-20mA current transmitters – two wire and three wire. Two
wire transmitters work via a single pair of wires by
modulating the current in the loop depending on a process
variable input (temperature, pressure, voltage, etc.). They
steal their operating power from the loop power source as
shown in Figure 33a. A three wire 4-20mA current
transmitter uses an external power supply for its operating
voltage and may sink or source current depending on its
configuration as shown in Figure 33b and Figure 33c.
In addition the FET must be attached to a large heatsink and
equipped with a fan to obtain maximum output power and
limiting the FET junction temperature to a safe temperature.
For example, if the circuit is operating at full output power
(60 watts) and room temperature (25°C), the heatsink and
airflow must have a thermal resistance sink to air (θsa) of
A.
4-20 ma
Loop Supply
Process
Variable
Input
Signal
Cond.
Loop Resistance
Two Wire
(Temperature, Pressure, etc)
B.
C.
Loop Resistance
Loop Supply
Process
Variable
Input
4-20 ma
Signal
Cond.
Loop Supply
Loop Resistance
4-20 ma
Process
Variable
Input
Three Wire - Sourcing Current
Signal
Cond.
Three Wire - Sinking Current
FIGURE 33.
23
AN177.0
June 23, 2005
Application Note 177
R2
U1
Q1
Vloop
Vc
R1
Vref
R3
4-20 ma Transmitter
Concept Diagram
R4
Loop Resistor
FIGURE 34.
The conceptual schematic diagram shown in Figure 34 is for
a two wire 4-20mA transmitter.
A complete schematic for the 2 wire 4-20mA current
transmitter is shown in Figure 35.
Operation of the circuit can best be understood by summing
the currents in the non-inverting input of U1:
You will notice the same components and reference
designations as shown in the concept diagram! The Intersil
X60008 voltage reference provides a precise +5.000V for
Vref. Since the input voltage of the X60008 is limited to +10V
maximum, a low dropout linear regulator U2 is used to
regulate the loop voltage of 7 to 30V to 5.6V. The advantage
of using a 5.6V regulator is that it provides a well stabilized
source of power if additional signal conditioning is required;
this will be demonstrated in the next application circuits for
temperature measurements. The output current from the
+5.6V bias supply is limited to approximately 3mA since the
total current “stolen” from the loop must be less than 4mA.
Due to the exceptionally low supply current of the X60008
voltage reference, the use of a FET for Q1 (instead of a
bipolar transistor), and the low supply current of U3, the total
quiescent current of the loop electronics (U1, U2, U3, etc.) is
less than 250µA! This leaves 3.75mA available for signal
Vc/R2 + Vref/R1 + (-Iloop)*R4/R3 = 0
Solving for Iloop:
Iloop = R3/R4 * (Vref/R1 + Vc/R2)
Summing the currents at the inverting input of U1 is not a
mistake! Q1 provides an additional 180° of phase shift;
therefore, for negative feedback, it is necessary to close the
loop at the inverting input of U1 not the non-inverting input.
Notice the loop current is sensed by R4 so the quiescent
current of U1, Vref, etc. are inside the feedback loop and
cause no output current error. The only current that is not
accounted for is the current in R3; typically this would be
less than 0.1% FS error.
5.6 v Out
U2
LP2951
U1
X60008CIS8-50
6
C1
.001 µF
Vout
Vin 2
(5.6 v) 1
Gnd Gnd
C2
1
4 4.7 µF
Vout
FB
R7 7
360K
Vin
Gnd
4
SD
3
D1
B140
8
C3
4.7 µF
R8
100K
R1 1M
71
3
Q1
+Vin = 7 to 30 v
2
R2
127K
0 to 2.5 v
Control voltage
LT1077
U3
R6
10
6
R3
80.6K
4
5
R5
100K
IRLL014N
(SOT223)
R4
100
4-20 mA Transmitter
0 to 2.5 v Control Voltage
Loop Resistor
FIGURE 35.
24
AN177.0
June 23, 2005
Application Note 177
Temperature in °F is monitored in Figure 4 with an IC
temperature sensor that provides an output voltage of
10mV/°F over a temperature range of +5°F to +200°F. The
loop current will vary from 4mA to 20mA as the temperature
changes as shown in the equation below:
Iloop = 4 + 0.0806 * T (mA)
conditioning circuitry. If lower temperature drift is required for
A/D converters or other industrial sensors, the X60008AIS850 could also be used for less than 1ppm/°C temperature
drift.
The following circuits show several examples of using this 420mA current transmitter to monitor temperature with an
Integrated Circuit temperature sensor (Figure 36) and a
PT100 RTD (Figure 37).
5.6 v Out
U2
LP2951
U1
X60008CIS8-50
Vout
C1
.001 µF
(5.6 v) 1
Vin
Gnd Gnd
FB
R7
360K 7
C2
4.7 µF
Vin
Vout
Gnd
4
SD
3
D1
B140
8
C3
4.7 µF
R8
100K
R1 1M
7
3
2
R2
100K
+Vs
Vout
1
Q1
+Vin = 7 to 30 v
IRLL014N
(SOT223)
45
R3
80.6K
Gnd
LT1077
U3
R6
10
6
R5
100K
U4
LM34 10 mv/F; +5 F to +200 F
R4
100
4-20 mA Transmitter
Temperature (F)
Loop Resistor
FIGURE 36.
(6.6 v)
R9
499
U1
X60008CIS8-50
R8
4.99K
8
1
Q3
2N4403
Vout
C1
.001 µF
2
+ 3
U2
LP2951
1
Vin
Gnd Gnd
C2
4.7 µF
Vout
FB
R7
430K 7
Vin
Gnd
4
SD
3
D1
B140
8
C3
4.7 µF
4
R8
100K
U4A
LT1490A
R1 1M
(1 ma)
3
R2
13.3K
RTD
Pt100
U4B
Q2
2N4401
7
+
LT1077
U3
7
R6
10
+ 1 6
2
R3
80.6K
4
5
5
R5
100K
+Vin = 7 to 30 v
Q1
IRLL014N
(SOT223)
6
LT1490A
R4
100
R7
49.9K
Loop Resistor
4-20 mA Transmitter
Pt100 RTD Input
FIGURE 37.
25
AN177.0
June 23, 2005
Application Note 177
Figure 37 shows interfacing the 4-20mA transmitter to a
Pt100 RTD that is commonly used in high precision
temperature measurements. The resistance of the RTD (α =
0.00392, American standard) is 100Ω at 0°C and varies from
60Ω for –100°C to 267Ω for +450°C. The RTD has an
excitation current of 1 mA from a constant current source
circuit. The Intersil X60008 voltage reference performs
double duty in this circuit; it provides the reference voltage
for the 4 mA offset current, and it provides a reference
voltage for a 100µA current source consisting of U4B, R7,
and Q2. The 100µA output current is converted to 500mV by
R8; this voltage is referenced to the 6.6 V bias supply from
U2. A precision 1mA current source consisting of U4A, Q3,
and R9 provides the excitation current for the RTD. The
output voltage from the RTD will vary from 60mV to 267mV
so the loop current will vary from 7.8 mA at –100°C to 20mA
at +450°C. Notice that the bias voltage from U2 was
increased to 6.6V to allow for headroom in the current
source circuit.
Negative Output Voltage Or Standing the
Reference on its Head!
Even though the Intersil X60008 Voltage Reference is a
positive 5.000V output device, it is also possible to operate it
on a negative voltage for a –5.000V output as shown in
Figure 38.
2
Vin
Vout
Gnd
C1
10 µF
1
6
C2
.001 µF
Gnd
4
Rload > 5K
Rload > 5 * R1/( |Vee| - 5)
Vref = -5.000 V
X60008CIS8-50
U1
R1
10K
Negative Reference
-Vee = -15 V
Note: Extreme care should be taken in
not shorting Vref to Vee. This would
cause 15V across VIN to GND which will
damage the device.
While it would seem that this configuration violates the
X60008 dropout voltage specification of 300mV (i.e., the
input voltage must be 300mV greater than the output
voltage), it must be recognized that this circuit is operating in
a shunt mode. In the shunt mode, only the bottom output
driver FET is active; the top side output driver FET is not
active and therefore not required for circuit operation. The
only requirement for proper operation is that the voltage
divider made up of R1 and Rload always allow 5V between
the Vout pin and Gnd pin. Thus, the load resistor Rload must
satisfy the following equation:
Rload > 5V * R1 / (|Vee| -5 )
For the example in Figure 38:
Rload > 5V * 10k / (|-15 V| - 5) = 5kΩ
Notice that the X60008 Voltage Reference never sees the –
Vee voltage; only R1 sees the voltage, and –Vee can be any
voltage as long as R1 can handle it! For example, -Vee could
be –1000V if R1 = 1MΩ and Rload > 5kΩ!
Perhaps even more useful, is a voltage reference that hangs
below a positive supply rail; a good example is the Precision,
Low Noise Current Source circuit shown in this Application
Note. Figure 39 shows the configuration for a “negative”
reference voltage that is referenced to a positive supply.
In this circuit, the voltage reference output voltage is -5.000V
with respect to +24V. This circuit will work with any supply
voltage greater than 5V; the only limit is the amount of
voltage that R1 can withstand. If the load current from the
voltage reference is very small (i.e., op amp bias current),
the resistor R1 can be a VERY large value since it must only
supply the quiescent current of the X60008 and the leakage
current in C1. For example, in this circuit (assuming no
leakage current in C1), R1 could be as large as 48MΩ! While
an interesting observation, this large resistor value is not
practical because it would take 8 minutes to charge up C1!
Another interesting circuit that is possible due to the ultra low
supply current of the X60008 is the ability to hang the
reference voltage between any voltage, and actually put the
5.000V reference voltage into any point in a circuit as shown
in Figure 40.
FIGURE 38.
26
AN177.0
June 23, 2005
Application Note 177
Vs = +24 v
2
Vin
Gnd
C1
10 µF
1
Vout
6
C2
.001 µF
Gnd
+
Vref = 5V
–
Rload > 2.6K
Rload > 5 * R1/( Vs - 5)
4
See note on page 32.
(19V)
X60008CIS8-50
U1
R1
10K
Negative Reference
with respect to +24 v
FIGURE 39.
U1
X60008CIS8-50
Vs = +100 v
2
R2
180K
B1
3V
Gnd
C1
10 µF 1
(+10 v)
2
Vin
Gnd
C1
10 µF 1
Vout
Gnd
4
6
C2
.001 µF
B2
3V
6
C2
.001 µF
Gnd
4
Vout
Vin
+
Vref = 5.000 V
–
B1, B2: Panasonic BR1225-1HC Coin Cell, 50 mAh
FIGURE 41.
(+5 v)
X60008CIS8-50
U1
R1
10K
FIGURE 40.
Operation from a Battery or Capacitor
The ultra low supply current (less than .5µa!) of the Intersil
X60008 voltage reference makes it a natural part for battery
operated systems such as handheld DVMs, portable medical
monitors, etc. However, its low supply current also allows the
X60008 to be operated on a battery that is buried on a PCB
and NEVER turned off thus eliminating any warm-up drift
effects and enhancing long term stability. The circuit shown
in Figure 41 operates from two 12.5mm coin cells to provide
an input voltage of 6V.
Since the specified batteries (Panasonic BR1225-1HC) are
rated at 50mAh, the battery life exceeds 10 years as shown
below:
Life = 50mAh /0.5µA = 100,000 hours Î 4166 days Î 11
years
27
Of course any load current on the output of the X60008 will
decrease the battery life since it will be added to the supply
current….and, it takes very little load current to drastically
reduce the battery life. For example, just monitoring the
reference voltage with a Digital Voltmeter with a 10MΩ input
resistance will increase the total battery current to 1µA
(0.5µA + 5V/10M), and the battery life will be cut in half!
It must also be noted that this voltage reference circuit is a truly
floating voltage reference – there is no “Ground” on this circuit
so the output voltage can be placed anywhere in a circuit.
It is also possible to operate the X60008 with only a
capacitor supplying the input voltage during short – medium
term power supply interruptions such as brown-outs or
changing a battery as shown in Figure 42.
D1
U1
X60008CIS8-50
2
6
Vin
Vout
BAT54
B1
9v
Gnd
C1
1
10 µF
Gnd
4
+5.000 v
C2
.001 µF
FIGURE 42.
AN177.0
June 23, 2005
Application Note 177
+5 v
1
U1
X60008CIS8-50
6
2
Vin
Vout
6
Q1
2N4401
Gnd
C1
10 µF 1
3
Gnd
4
C2
.001 µF
Vref = 5.000 v
4
Toshiba
TLP191B
R1
180
FIGURE 43.
Since I(t) = C * dv/dt for a capacitor, hold-up time dt = C/I *
dv. In this circuit, hold-up time is 10µF /0.5µA* (9-5.3) = 74
seconds. This is easily enough time to change the battery B1
and not require a new warm-up period for the voltage
reference. Caution must be exercised in attempting to
increase the hold-up time by increasing the capacitance of
C1. Unfortunately, the leakage current of a high value
capacitor (>100µF) is much higher than the quiescent
current of the X60008 so the capacitor leakage current will
dominate. For example, a 1000µF/10V capacitor has a
leakage current of 64µA; the hold-up time for this capacitor
would be 58 seconds. Ideally, a film capacitor would be used
for the lowest leakage current, but high value film capacitors
are not readily available, are very expensive, and are very
large.
Therefore, using a capacitor as the input voltage source for
the X60008 should only be considered in short to medium
hold-up time applications. Also, do not forget to take into
account the voltage reference load current as discussed in
the battery application above.
Optically Isolated Voltage Reference
Another truly unique application for the Intersil X60008AIS850 voltage reference is an optically isolated voltage
reference that can float at any point in a circuit with up to
2500 vac, rms isolation voltage. Once again, the ultra low
supply current of the X60008AIS8-50 makes this possible as
shown in Figure 43.
The heart of this circuit is the optically coupled photodiode
array, Toshiba TLP191B which will generate an open circuit
output voltage of 7 V and a short circuit current of 24µA
when the input LED is operating at 20mA. The Thevenin
equivalent of this voltage source is 7V with a Thevenin
resistance of 290kΩ. Even though this is a very wimpy
voltage source, it is enough to supply the 0.5µA that is
required by the X60008AIS8-50 to operate. In fact, Q1 is
operated in reverse base-emitter breakdown (an excellent
low current 7 V “Zener”) to clamp the X60008AIS8-50 input
voltage to less that 10V; tests showed that the output voltage
28
from the TLP191 exceeded 10 V with no load on the
X60008AIS8-50. Since the X60008AIS8-50 load current
must by sourced by the photodiode array, the load current
must be less than 20µA or greater than 250kΩ. Also, turn-on
time for this circuit is 2 seconds (or less) since capacitor C1
must be charged by the 24µA from the photodiode array.
This demonstrates the “World’s First Isolated 1ppm/°C
Voltage Reference” !
Appendix A
“Precision Voltage Reference Using EEPROM Technology”,
by Jim McCreary. Available at www.Intersil.com
Appendix B
0.1 to 10Hz Noise Test Box with Peak to Peak
Detector
Testing the 0.1 to 10Hz output noise of a high quality
reference such as the X60008 is often a challenge since to
test for 0.1 to 10Hz noise, it is necessary to AC couple the
output of the reference before it is applied to a high gain
stage as shown in Figure 44.
X60008
Under Test
10 µF
16K
Noise Out
10 Hz LPF
.1 Hz HPF
160K
Gain = 50K
1 µF
FIGURE 44.
AN177.0
June 23, 2005
Application Note 177
C
LT1028
Vref In
Vout Noise
Vout
R
C
===>
R
In
Current Noise Model
where In is the current noise of the LT1028
FIGURE 45.
leakage current is reduced to 10µA, but the resistor value is
increased to 16kΩ, and the same 160mV is introduced.
Additionally, the high gain stage in a typical noise test circuit
requires a very low voltage noise op amp; however, low
voltage noise op amps exhibit high current noise which
prevent the use of high resistance values in the 0.1Hz AC
coupling filter. Appendix B describes a novel voltage
reference test circuit which eliminates the need for a 0.1Hz
AC coupling network and includes a peak to peak voltage
detector. Also in Appendix B test data is shown for various
output filter circuits.
Additional noise will be introduced into the measurement by
the current noise of the op amp in the gain stage developing
a noise voltage across the resistor as shown in Figure 45. It
is interesting to note that the frequency characteristics of the
resulting noise voltage will be shaped by the high pass filter
network. At high frequency, the capacitor’s impedance is
very low and there is no resulting voltage noise.
Unfortunately, the voltage noise resulting from the current
noise is shaped by the same filter characteristic as the
measurement!
To effectively block noise in the 0.1Hz - 10Hz bandwidth, it is
necessary to use large value capacitors and/or large value
resistors. For example, for a one pole high pass filter with a
.1Hz corner frequency it is necessary to use resistor and
capacitor values as shown below:
RESISTOR (kΩ)
CAPACITOR (µF)
160
10
16
100
1.6
1000
To eliminate the problems associated with the AC coupling
network (i.e., an error voltage is introduced and noise
voltage is introduced), the simplest solution is to throw away
the culprit – the AC coupling filter. But now you are faced
with the problem of applying a reference voltage of +5V to a
gain stage of 50,000; the output of the op amp will try to go
to 250,000Vdc which of course is not very practical! But, you
can subtract off the DC component of the reference voltage
and leave only the noise voltage of the reference as shown
in the concept diagram in Figure 46.
While it seems attractive to use a 1000µF capacitor and
1.6kΩ resistor, the large leakage current of an electrolytic
capacitor will generate a voltage across the 1.6kΩ resistor
that will gained up by the amplifier that will send the amplifier
output into saturation. For example, the leakage current of a
typical 1000µF capacitor is 100µA (Panasonic VS series); an
error voltage of 100µA * 1600Ω = 160mV is created!
Reducing the capacitor value and increasing the resistor
value does not help because while the leakage current is
reduced, the resistor value is increased! For example, for a
100µF capacitor in the same Panasonic VS series, the
An instrumentation amplifier is used to subtract the Voltage
Reference Under Test from a Precision Low Noise Voltage
Reference with voltage noise that is much less than the
noise of the Voltage Reference Under Test. There are no
filters in the measurement path at this point so there are no
errors associated with RC filter networks; all of the 0.1Hz to
10Hz frequency shaping is done after the high gain stage of
the instrumentation amplifier.
Vr
Voltage Reference Under Test
Instrumentation Amplifier
with gain
+
Vout = Gain * (Vr - Vcal)
Vcal
Precision Low Noise Voltage Reference
FIGURE 46.
29
AN177.0
June 23, 2005
Application Note 177
LP2951CN
1
Vout
8
+9 v
(6.5 v)
Vin
SD GND FB
3 4
7
10
C1
2
Vin
.01
C2
80.6K
R1
U1
10
.1
C3
C4
U2
X60008CIS8-50 DUT
Vout
6
DUT Out
Gnd Gnd
1
4
18.7K
R2
R3
1000 pF
C5
DUT Power
2K
C6
10
Gnd
DUT Gnd
DUT Family Board
+9 v
R4
1.27K
+9 v .01
10
10 Hz LPF
DUT Out
DUT Gnd
1
R6
100
+9 v
2
3
10
.1
C7
C8
VIN
NR
1 (film)
C9
6
VOUT
VTRM 5
4
GND
2
2
10K
R7
1
C10
5
.01
8
5
6
160K
R14
U6B
7
4
R15
20K
-9 v
Av = 500
LT1112
10 Hz LPF
R17
16K
Vout
1
C12
Av = 200
100
R16
.1
-9 v
9v
Gain = 100K
Vout = 1 v / 10 µv Vin
R9
3.83K
249
R10
.1
On/Off
DC Balance
R13
10K
U5BB
5
+
7
6
1
R11 249
4
9v
-9 v
0.1 to 10 Hz
Noise Tester
11/11/03
R12 3.83K
-9 v .1
4
1
+9 v
U5A
LT1490
3
6
1.27K
R5
R8
8
4
U3
LT1167
3 8
+
2
C11
10
10
(+5 v)
+9 v
7
+
8
U4
LT1027H
10K
.1
3
.1 Hz HPF
U6A
R13
16K
(-5 v)
FIGURE 47.
Figure 47 shows the complete schematic for the 0.1 to 10Hz
Noise Tester.
circuit was not really needed, but it is shown here for
completeness.
Overall gain for the tester is 100K so that an input 10µV
yields 1V at the output. Operating power for the Noise Tester
is from two 9V “transistor radio” batteries to ensure complete
isolation from the AC power line, and no ground loops when
an oscilloscope is connected to the output. The Noise Tester
is mounted in a metal chassis with a tight cover to eliminate
pick-up to the AC power line or RF signals such as radio or
TV transmitters. Every integrated circuit is bypassed with a
10µF and 0.1µF capacitor. The X60008 under test (DUT) is
mounted on a Family Board so different reference
configurations can be easily tested. A linear regulator U1
sets the DUT input voltage to 6.5V as set by R1 and R2.
One pole of a 10Hz low pass filter is set with R13 and C10;
U6A is a low bias current, low noise unity gain buffer. R14
and C11 are a one zero high pass filter with a corner
frequency of 0.1Hz. U6B provides a gain of 200 so the total
gain is 500 x 200 = 100,000.
The output voltage from the DUT is applied to the noninverting input of instrumentation amplifier U3. A low noise
reference U4 is connected to the inverting input of the IA so
that the low noise reference output voltage is subtracted
from the DUT output voltage leaving only the noise voltage
of the DUT. R6 sets the gain of the IA at 500. A DC balance
circuit (U5, etc.) is shown to null out the DC difference
between the DUT and low noise reference. In reality, the
output tolerance of both the X60008 voltage reference and
LT1027 low noise reference was so low that the DC balance
30
R17 and C12 provide a second pole for the 10Hz low pass
filter. The second zero for the 0.1Hz high pass filter is set by
observing the Vout waveform for 10 seconds.
Voltage reference noise tests are performed with this Noise
Tester the same as any other noise test box. A short BNC
cable connects the Noise Tester to a storage oscilloscope
input. The DUT is allowed to warm up for approximately 5
minutes to allow the DUT and test box to stabilize after
turning on switch S1. Ten second test runs are made with
the storage scope to measure the peak to peak waveform
over the 10 second interval.
However, this test method is somewhat subjective because
the peak to peak noise reading must be made off the
oscilloscope screen; it is made even more difficult if a
storage scope is not available for these readings. Figure 48
shows a pair of peak detector circuits to store the maximum
AN177.0
June 23, 2005
Application Note 177
2.2K
.01
S1
Measure
Vin
3+
Hold
1M
R1
.001 C1
8
2
1
4
Vout = Vmax
R3
+9 v
D1
1N4148
6
8
10
C2
S2
Peak
.01
LT1013N
U1A
7
5 +
100
R2
-9 v
R8
10K
4
+9 v
R6
10K
+Peak Detect
U1B
10K
R7
Track
R5
2.2K
.01
+9 v
2
LT1013N
U2A
3+
6
1
5 +
100
R4
4
-9 v
45
1N4148
D2
.01
C4
10
1
3+
78
-9 v
Vout = Vpp
6
.01
10K
R9
.001
C3
8
2
.01
U3
LT1006
4
7
8
Vout = Vmin
-Peak Detect
U2B
Peak to Peak Detector
FIGURE 48.
peak voltage (U1, D1, C2) and minimum peak voltage (U2,
D2, C4). A difference amplifier (U3, R6-R9) subtracts the
maximum reading and minimum reading for a DC output
voltage that is equal to the peak-peak noise voltage. The
peak detector circuits use isolation resistors (R2, R4) and
local loop compensation (R3, C1, R5, C3) to drive the heavy
capacitive load of C2 and C4. In the test box, mechanical
switches were used for S1 and S2; analog switches could
also be used if logic control is required.
To use the Peak to Peak Detector circuit with the Noise
Tester, the output of the Noise Tester (Figure 47) is
connected to Vin of Figure 48. When switch S1 is placed in
the Measure position, and S2 is placed in the Track position
the output voltage of U1B and U2B tracks the input voltage.
To measure the peak noise voltage, S2 is placed in the Peak
position, and the output voltage of U1B (Vmax) and U2B
(Vmin) detects and holds the maximum and minimum values
on C2 and C4. After 10 seconds, switch S1 is moved to the
Hold position, and the output voltage, Vout is measured with
a DVM or oscilloscope. The voltage at Vout represents the
peak to peak noise voltage in a 0.1Hz to 10Hz bandwidth for
the Voltage Reference Under Test.
Test Results
Various configurations of X60008 Voltage Reference and
Filters were tested using the Noise Tester and Peak to Peak
Detector. In each test, five test runs were made and the
results averaged as shown in the following tables.
1. The noise test system and strategy were verified by using
a LT1027 as the DUT so that a LT1027 was tested
against a LT1027. The measured peak to peak output
noise was less than 3µV indicating the test system was
working properly.
31
TEST SET-UP CHECK:
TEST CONDITION: LT1027 WITH 1µF NR
AND 4.7µF COUT
PART
ID #
GRADE
VOLTS PP (MV)
3.0
2.7
2.5
AVERAGE
2.6
2.7
2. A sample of ten X60008 Grade C and Grade D were
tested using an output network of .01µF in parallel with
10µF + 2K.
TEST CONDITION: OUTPUT FILTER NONE
PART ID
#
GRADE
VOLTS PP (MV)
AVERAGE
5
D
39
43
37
46
39
40.8
10
D
23
28
21
23
27
24.4
12
D
38
34
34
35
32
34.6
14
D
23
20
24
22
18
21.4
8
D
30
29
30
27
31
29.4
9
C
24
25
24
30
28
26.2
6
C
22
27
22
24
27
24.4
13
C
34
29
29
34
30
31.2
16
C
29
29
33
28
31
30.0
17
C
30
30
26
28
25
27.8
AN177.0
June 23, 2005
Application Note 177
3. A sample of two X60008 Grade D were tested using an
output network of 0.01µF
+
TEST CONDITION: OUTPUT NETWORK =.01µF; OUTPUT
FILTER NONE
PART
ID #
GRADE
5
D
36
38
38
40
36
37.6
8
D
29
32
31
31
33
31.2
LT1012
10K
Vref Out
Noise Tester In
100 µF
100K
100 µF
VOLTS PP (µV)
AVERAGE
4. A sample of two X60008 Grade D were tested using an
output network of 0.01µF in parallel with 10µF + 2K. The
following filter was used.
1K
Vref Out
Noise Tester In
100 µF
10K
PART ID
#
VOLTS PP (µV)
5
18
17
20
19
19
18.6
10
14
13
10
13
11
12.2
12
17
15
13
14
19
15.6
14
10
11
10
10
9
10.0
8
12
17
15
9
12
13.0
6. A sample of two X60008 Grade D were tested using an
output network of 0.01µF in parallel with 10µF + 2K. The
following filter was used.
100 µF
PART ID
#
PART ID
#
VOLTS PP (µV)
AVERAGE
VOLTS PP (µV)
AVERAGE
5
14
11
10
15
10
12.0
AVERAGE
10
9
13
10
11
12
11.0
5
40
35
32
44
35
37.2
12
12
11
9
15
8
11.0
10
20
21
22
18
22
20.6
14
10
10
9
10
7
9.2
8
11
10
8
11
13
10.6
5. A sample of two X60008 Grade D were tested using an
output network of 0.01µF in parallel with 10µF + 2K. The
following filter was used.
As you can see from the Summary below, a noise reduction
of 50% to 75% is achieved with the use of an output filter as
shown in Test 6 above.
10K
Vref Out
Noise Tester In
100 µF
100K
100 µF
32
SUMMARY:
PART ID #
AVERAGE VOLTS PP (µV)
TEST
5
10
12
14
8
No Filter
2
40.8
24.4
34.6
21.4
29.4
1.6 Hz Filter
4
37.2
20.6
.16 Hz Filter
5
18.6
12.2
15.6
10.0
13.0
.16 Hz with
LT1012 Buffer
6
12.0
11.0
11.0
9.2
10.6
AN177.0
June 23, 2005
Application Note 177
Footnotes
25. ADC Block diagram
1. Linear Technology Corp. LT1004 datasheet
26. Auto-Cal ADC block diagram
2. Linear Technology Corp. LT1460 datasheet
27. Auto-Cal DAS schematic
3. Linear Technology Corp. LT1461 datasheet
28. DAC Block Diagram
4. Bob Widler, New Developments in IC Voltage Regulators,
IEEE Journal of Solid State Circuits, Vol. SC-6, February
1971.
29. Auto-Cal DAC block diagram
5. Paul Brokaw, A Simple Three-Terminal IC Bandgap
Voltage Reference, IEEE Journal of Solid State Circuits,
Vol. SC-9, December 1974.
32. Active Load schematic, 0 to 5 amp
30. Auto-Cal DAC schematic
31. Vref for DVM schematic
33. 2 and 3 wire 4-20mA loop transmitter
6. Roya Nasraty, XFETTM References, Analog Dialog.
34. 2 wire 4-20mA loop transmitter concept diagram
7. Linear Technology Corp., Design Note 229, Don’t Be
Fooled by Voltage Reference Long Term-Drift and
Thermal Hysteresis, Jon Wright.
36. Temperature (°F) input 4-20mA loop transmitter
8. Mies van der Robe, NY Herald Tribune, June 28, 1959
35. Voltage input 4-20mA loop transmitter
37. RTD input 4-20mA loop transmitter
38. Negative output voltage reference
39. Voltage reference hanging below a positive supply
voltage
List of Figures
1. Series vs shunt reference
40. Floating voltage reference
2. Bandgap block diagram
41. Battery operation
3. Bandgap TC curve
42. Capacitor operation
4. Bandgap TC curve for three references
43. Optically isolated voltage reference
5. Curvature corrected Bandgap reference TC curve
6. Buried Zener block diagram
7. Floating gate analog reference block diagram
8. Floating gate analog reference block diagram with Vout
programming
9. Bandgap TC curve
10. Bandgap TC curve TC with the Box Method
11. X60008 TC curve
12. X60008 Noise graphs
13. X60008 Noise reduction network
14. X60008 long term stability for 464 hours
15. Bad schematic example
16. Good schematic example
17. 0-5 amp active load schematic
18. 0-5 amp active load schematic with 20% from improper
connections
19. Remote sensing
20. Noise test circuit block diagram
21. 0.1Hz Low pass noise filter
22. Input voltage regulators
23. Charge pump for 3.3V operation
24. Negative operation
Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to
verify that the Application Note or Technical Brief is current before proceeding.
For information regarding Intersil Corporation and its products, see www.intersil.com
33
AN177.0
June 23, 2005
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