HC5503PRC SLIC and the NeWave NW1034 Combo Device TM Application Note September 2000 AN9873 Author: Chris Ludeman Introduction the subscriber line. The desired source and termination impedance at V2W is Z0 as shown in the diagram. The purpose of the feedback block f(Z0) is to measure the loop current IL that flows due to the signal source VS , and operate on it such that the 2*RP+2*RS turns into a source and termination impedance of Z0. The network requirements of many countries require that an analog subscriber line circuit terminate the subscriber line with an impedance for voiceband frequencies which is complex, rather than 600Ω. This requires that the physical resistance that is situated between the SLIC and the subscriber line, comprised of protection and/or sensing resistors, and the output resistance of the SLIC itself, be adapted to present an impedance to the subscriber line that varies with frequency. This is accomplished using feedback around the SLIC circuitry itself and the purpose of this application note is to show a means of accomplishing this task for the HC5503PRC, low cost SLIC for long loops with the minimum amount of added circuitry. This section therefore will develop an expression for VA/VTX , which is equivalent to f(Z0). (EQ. 1) V TX = 2 × ( 2 × R S ) × I L Where: V TR I L = ----------------------------------------------------------( Z0 – 2 × R P – 2 × R S ) (EQ. 2) a matching substituting for IL in (Equation 1) The solution will accomplish the following: • 2-wire complex impedance matching 2 × ( 2 × R S ) × V TR V TX = ----------------------------------------------------------( Z0 – 2 × R P – 2 × R S ) • Flat gain versus frequency in both transmit and receive direction in the presence of a frequency dependent (complex) load (EQ. 3) Set inside SLIC (EQ. 4) V TR = 2 × V A • Flexibility to accommodate other values of protection and feed resistors therefore, • User selectable transmit and receive gains. Impedance Matching Impedance matching of the HC5503PRC to the subscriber load is important for optimization of 2-wire return loss, which in turn cuts down on echoes in the end to end voice communication path. It is also important for maintaining voice signal levels on long loops. Consider the equivalent circuit shown in Figure 1. Z0 2*RP FROM COMBO X2 2*RS FEED AMPS VA VRX F(Z0) XMIT + V2W VS TO COMBO X2 VTX (EQ. 6) 2 × ( RP + RS ) 1 Z0 f ( Z0 ) = --- ----------------- – ------------------------------------2 4 × RS 4 × RS (EQ. 7) 1st term: Z0/4*RS requires gain and has no phase inversion. The VTX signal therefore needs to pass through 2 inversions. The circuitry inside the dotted box is representative of the SLIC feed and transmit amplifiers, that pass the voice signals in the receive and transmit directions respectively. Without the feedback block f(Z0), the signal on the subscriber loop, V2W, would see a source or termination resistance of 2*RP+2*RS , as the feed amplifiers present a very low output impedance to 1-888-INTERSIL or 321-724-7143 VA 1 ( Z0 – 2 × R P – 2 × R S ) f ( Z0 ) = ----------- = --- × ----------------------------------------------------------2 4 × RS V TX Note also that the form of the solution for impedance matching can be deduced from the terms in equation 7. FIGURE 1. IMPEDANCE MATCHING BLOCK DIAGRAM 4-1 (EQ. 5) Note: In equation 6 above it would seem logical to simplify the numerator by trying to combine Z0 and the two subsequent terms together. In practice however, the network Z0 cannot easily have 2*RP and 2*RS subtracted from it since the sum of these resistors is often larger than the value of the series resistance of the complex Z0 network. Also, as will be seen, there is a need to identify a separate term (Z0/4*RS) for equalization in the transmit path without adding more reactive components to the application circuit. VTR IL ZL 2 × ( 2 × RS ) × 2 × VA V TX = ----------------------------------------------------------( Z0 – 2 × R P – 2 × R S ) 2nd term: This term will be ≤1.0 but needs to be operated on by the 1/2 outside the parentheses, resulting in attenuation with phase inversion. This requires an op amp stage. | Intersil and Design is a trademark of Intersil Corporation. | Copyright © Intersil Corporation 2000 Application Note 9873 RP RS 0.47µF TF ZL - VA IL VFRO + RX T V2W SLIC GSR R VS RP VFRO- R RF RS NEWAVE NW1034 2R R*4RS RP+RS INTERSIL HC5503PRC + VFXI- 0.2µF GSX TX VTX 0.47µF 4RS Z0 FIGURE 2. IMPEDANCE MATCHING Receive Gain G(4-2) See Figure 3. Around SLIC op amp: – ( V TX – V RX ) ( 0 – V RX ) V A = ------------------------------------- × 3R – -------------------------- × R 8R 2R –1 V A = ------ × ( 3V TX – 7V RX ) 8 (EQ. 9) (EQ. 10) but V2w V TX = – 400 × -----------ZL (EQ. 11) So substituting for VTX in (Equation 10): 1 ( 1200 × V2w + 7V RX × Z L ) V A = --- × -----------------------------------------------------------------------8 ZL (EQ. 12) To express VA in terms of V2w: ( Z L + 300 ) V TR = V2w × ---------------------------ZL (EQ. 15) ( Z L + 300 ) 300 7 V2w × ---------------------------- – ---------- = --- × V RX ZL ZL 4 (EQ. 16) (EQ. 8) Note that the term 0 above results from the fact that this signal is cancelled by the echo cancellation circuitry connected from VFRO to the VFXI - input of the Combo transmit op amp. (See later.) Also, to simplify the equations, some specific values have been selected for RP (50) and RS (100), such that the term (4 * RS)/(RP + RS) simplifies to 8/3, –1 V A = ------ × ( 3V TX – 3V RX – 4V RX ) 8 V2w ( Z L + 300 ) 1 ( 1200 × V2w + 7V RX × Z L ) ------------ × ---------------------------- = --- × -----------------------------------------------------------------------8 2 ZL ZL (EQ. 13) V2w/VRX = 7/4 and this would normally be preceded by an attenuator to adjust it to a gain of 1.0dB or 0dB (See Figure 6). Note that G(4-2) is not a function of ZL , and therefore is flat over frequency. Transmit Gain G(2-4) See Figure 4. From (Equation 11): 2 × 2 × RS V TX = --------------------------- × V2W ZL Note that the sign is now changed from -VE to +VE compared to the expression for VTX derived in the G(4-2) derivation. A VTX signal that is in fact a transhybrid signal, i.e., is derived from a source on the VRX input to the circuit, undergoes inversion through the SLIC. A VTX signal that results from a source on the 2-wire loop does not undergo inversion through the SLIC. This can be deduced from the direction of IL , the signal current in the 2-wire loop in Figure 4. The output of the Combo transmit op amp GSX is as follows: Z0 × V TX GSX = – k × ------------------------4 × RS and VA = VTR/2, so V2w ( Z L + 300 ) V A = ------------ × ---------------------------2 ZL (EQ. 14) Equating expressions for VA ; (Equation 12) and (Equation 14). 4-2 (EQ. 17) (EQ. 18) Application Note 9873 RS RP ZL + RX T V2w SLIC 0.47µF TF - VA IL VRX R R RF RP RS INTERSIL HC5503PRC 2R R*4RS RP+RS 0.2µF TX VTX 0.47µF 0 FIGURE 3. RECEIVE GAIN G(4-2) Specific Implementation for China Substituting for VTX – k × Z0 × 4 × Rs GSX = ------------------------------------------4 × Rs × Z L (EQ. 19) GSX = -k x Z0/ZL . If Z0 is made equal to ZL as it would be for correct impedance matching, then the transmit gain or G(2-4) can be altered by adjusting the factor k associated with the input resistor 4 x RS . The design criteria for a China specific solution are as follows: • Desired line circuit impedance is 200 + 680//0.1µF. • Receive gain is -3.5dB. • Transmit gain is 0dB. Transhybrid or Echo Cancellation G(4-4) • 0dBm across the 2W load is defined as 1mW into the complex impedance at 1020Hz. See Figure 5. • RP = 50, RS = 100 Since it was established earlier, that the signals VRX and VTX of the application circuit are of opposite phase, if they are summed together in the correct magnitudes at the input to the Combo transmit op amp, they will cancel at the output GSX, and this is necessary for hybrid or echo cancellation. Assuming that the circuit has been set up so that the SLIC matches the load impedance and that both G(4-2) and G(24) are adjusted to be 1.0 and flat over frequency as derived above, then the gain from VFRO to GSX is +1.0 or 0dB, as the VFRO signal goes through 2 inversions to GSX. In order to achieve echo cancellation therefore, VFRO must be added to the VTX signal at the input to the Combo transmit op amp such that the gain from VFRO to GSX is 0. Since the gain before echo cancellation is -1.0, VFRO must be summed in with a gain of -1.0, and this can be done by using an input resistor equal to the feedback resistor Z0.The general solution is shown in Figure 5 with an input resistor ZL , to match the load impedance value. This then gives the general line circuit solution using the Intersil HC5503PRC SLIC and the NeWave NW1034 Quad CODEC devices. This is shown in Figure 6. 4-3 Impedance Matching There is a one to one relationship between the SLIC impedance setting components and the impedance it should present to the 2w loop. The network most responsible for this matching, is the Z0 network in the feedback circuit of the Combo transmit op amp. It is usual to scale this network up by a factor so that the load on the CMOS op amp does not lead to distortion and possible instability effects. In this example the scaling factor will be chosen to be 100. 200 + 680//0.1µF becomes 20K + 68K1//1µF. The other components tied to impedance matching are around the SLIC op amp. These three components are all factors or R and so R can be a common scaling factor for these components. In this example we chose to make R = 100K. 2R becomes therefore 200K and the expression: R × ( 4R S ) --------------------------RP + RS becomes 267kΩ. (EQ. 20) Application Note 9873 RS RP 0.47µF TF ZL V2W VFRO RX T IL VS R RF RP RS NEWAVE NW1034 INTERSIL HC5503PRC + VFXI- GSX 0.2µF TX 0.47µF VTX Z0 4RS/K FIGURE 4. TRANSMIT GAIN G(2-4) RP RS VFRO- 0.47µF TF RX T 0.47µF ZL R RF RP RS ZL NEWAVE NW1034 INTERSIL HC5503PRC ECHO + VFXI- GSX TX 0 VTX 0.47µF 4RS/K Z0 FIGURE 5. ECHO CANCELLATION G(4-4) These component values however are not the final values because they have to be altered to account for the difference between 0dBm on the 2w load and the 0dBm reference level of the Combo. -1.4dB is a ratio of 0.85 or 1/1.175. Transmit Half Path Gain Since this component change also affects the loop gain of the feedback circuit that accomplishes impedance matching, this component change must be compensated for elsewhere in the circuit. The most obvious component to adjust is the 200K resistor that was calculated in the previous section. This must be adjusted in the opposite direction by the same factor. So 200K becomes 169K. 0dBm (complex load) = 0dBm (600) + 1.4dB at 1020Hz reference frequency. So to ensure that a 0dBm signal on the 2w loop is represented by the digital milliwatt on the PCM backplane or DX output of the Combo, a -1.4dB correction needs to be added to the transmit half path gain. 4-4 The most convenient place to make this adjustment is on the input resistor to the combo transmit op amp. So that 40K becomes 47k5. Application Note 9873 Receive Half Path Gain We already know from the prior analysis of the receive path transfer function that G(4-2) is 7/4 or +4.86dB but the desired G(4-2) is; -3.5dB + 1.4dB to convert 0dBm (600) into 0dBm (complex load) = -2.1dB. The gain without adjustment is +4.86dB. The required adjustment is therefore (2.1 - 4.86)dB which is a ratio of 0.448 or approximately 9/20 which can be implemented with a potential divider of 90k1 and 110K resistors or, since the input to the SLIC op amp is very high in the non-inverting configuration, a 182K and 221K resistor divider. the following analysis of the DC levels in the circuit will show whether signal clipping is likely to occur. The DC voltage at the non-inverting terminal of the SLIC op amp is determined by VFRO which is about 2.5VDC. This voltage is; 2.5 × 182K ----------------------------- = 1.129V 403K (EQ. 21) which also appears at the inverting terminal. The only other contributor to the DC circuit conditions is GSX, which also sits at near +2.5V. The DC voltage at the output lead of the SLIC op amp is; Transhybrid or Echo Cancellation – ( 2.5 – 1.129 ) × 100K ---------------------------------------------------------- = 0.81VDC 169K Referring to Figure 6, the only component involved in the echo cancellation function is the network shown as ZL , one of the input resistors to the Combo transmit op amp. To calculate the maximum positive signal swing on the input or output of the SLIC op amp we have to add the voice signal to the DC signal. Having calculated the half path gains, the transhybrid gain from VFRO to GSX is now known. Assuming that the maximum signal out of the Combo without distortion is 0dBm0, and knowing that the potential divider drops this signal in the receive path by a factor of 0.45, the voice signal swing at this input is; G(4-4) = (-3.5 + 1.4 - 1.4 + 0)dB, G(4-4) = -3.5dB. Since the gain from VFRO to GSX is Z0/ZL , and it should be flat over frequency as VFRO is, then ZL has to be the same network as Z0. This then has to be scaled to give the -3.5dB loss from VFRO to GSX, such that the transhybrid signal is cancelled at the output GSX of the combo transmit op amp. 1.129 + 0.775 x 1.414 x 0.45 = 1.62VPEAK . Assuming again that the maximum signal delivered by the combo to the 2w loop without distortion is 0dBm (complex) or 0dBm(600) + 1.4dB, then the maximum voice signal swing on the SLIC op amp output is calculated as follows; -3.5dB is a ratio of 0.668 or 2/3. From before: Since Z0 was originally scaled by a factor of 100, we need to scale ZL by a factor of 150. ( Z L + 300 ) V A = 0.5 × V2w × ---------------------------ZL So 200 + 680//0.1µF becomes 300K + 102k//0.67µF or the closest values. In practice this is the last adjustment to be made to the line circuit after all the other standard component values have been chosen. The transhybrid gain or G(4-4) should then be measured and the ZL network adjusted for optimum cancellation. The values calculated here represent a good starting point. where ZL is complex. Considerations for Single Supply Combos The NeWave NW1034 is a single supply Combo and has DC present on the VFRO , GSX and VFRI- terminals. The HC5503PRC is also a single 5V supply device and has DC present on the RX and TX terminals. It is very important to ensure that a direct connection is not present between the SLIC and the Combo, otherwise latch-up of the Combo may occur during circuit operation. The DC blocking capacitors in Figure 6 are designed to block the DC from the SLIC and the Combo, but still allows a DC signal to be present at the input and output of the SLIC op amp. This was done to allow a reduction in component count. Since there are likely to be other circuit designs that have different component values in the application circuit, 4-5 (EQ. 22) (EQ. 23) This simplifies to: ( 600 + 300 ) V A = 0.5 × 0.775 × 1.414 × ------------------------------- + 1.4dB 600 (EQ. 24) VA = 0.82 + 1.4dB, VA = 0.82 x 1.17, VA = 0.96VPEAK . The peak signal swing on the output lead of the SLIC op amp is therefore this voice signal added to the DC already present. VA = +/-0.96VPEAK - 1.81VDC, VA = +0.15VPEAK/-1.62VPEAK . These signal swings are well within capabilities of this op amp. For reference, a circuit designed for -7.0dB receive gain would only increase the negative signal swing on the output lead by 0.2VPEAK to -1.84VPEAK , while the +IN lead would sit even closer to ground. Application Note 9873 RP RS 4R SLIC 0.47µF TF RX T - VA ZL 3R + VFRO 0.47µF R R RF RP RS 2R ZL NEWAVE NW1034 R*RS INTERSIL HC5503PRC RP+RS VFXI - 0.2µF + GSX TX 0.47µF 4RS/K Z0 FIGURE 6. GENERIC LINE CIRCUIT SOLUTION 50 100 0.47µF TF RX T ZL SLIC 163K + - 150*Z0 100K 267K RF 100 VFRO 0.47µF R 50 200K NEWAVE NW1034 170K INTERSIL HC5503PRC + VFXI - 0.2µF GSX TX 0.47µF 47K 100*Z0 FIGURE 7. LINE CIRCUIT DESIGN FOR CHINA NATIONAL NETWORK All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification. Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see web site www.intersil.com 4-6

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