AN9959: InfiniBand Class I Power Supply using the ISL6160 and HIP6006 ICs

InfiniBand Class I Power Supply Using the
ISL6160 and HIP6006 ICs
TM
Application Note
September 2001
Introduction
The InfiniBand architecture represents a significant evolution
of high-performance, switched-fabric interconnect systems.
The goal is to provide a high-performance, reliable, and
scalable way to connect high-end servers to each other and
to I/O subsystems, routers and switches that connect to the
world outside the data center.
Available from Intersil is the ISL6160, an evolution of IC power
sequencing, control and protection for InfiniBand I/O modules
(IM). The ISL6160 is designed to address the unique power
requirements of the InfiniBand (IB) industry initiative
providing independent power control of both the VB (bulk)
(+12V) and the VA (auxiliary) (+5V) power rails for a single
port. This device can be implemented in both IB Class I (non
isolated) and Class II (isolated) Power Topology
applications.
Intersil also provides the ISL6160EVAL2 concept evaluation
platform. The ISL6160EVAL2 is a complete InfiniBand Class I
(non isolated) power topology evaluation platform which
highlights the operation of the ISL6160 and the HIP6006 single
output PWM controller. See Figure 1 for a simplified block
diagram of the ISL6160EVAL2 platform. This evaluation
platform allows the InfiniBand Module (IM) power supply
designer to evaluate the concept of this design and apply this
concept to a specific IM power requirement. The evaluation
platform is configured for 5V Vout and 3.5A max Iout capability
where it exhibits an efficiency of 85%, all in a small 1.6 sq” area.
See Figure 11 for a complete ISL6160EVAL2 schematic.
Using the ISL6160EVAL2 Concept Board
The ISL6160EVAL2 consists of a bus and load boards,
representing the IB chassis and IM respectively. The bus board
has terminals for VA and VB supplies. The load board with its
staggered length connector fingers to emulate the IM connector
then hot plugs into the socket as shown in Figure 2.
When the load board is inserted into the bus board, the stagger
on the connector fingers, first provides VX_RET, then VX
connections, and finally the shortest finger emulates the
VBx_En_L line connection.
Once VB_In is connected the VB control portion of the circuit is
biased but the VB Secondary Rail (TP1) is held off until the
ISL6160 VB_ON pin is signaled high. Local power enable
signaling is provided through the LCL_PWR_EN jumper either
as a hard tie ‘high’ with the jumper installed or through an
external input signal, on TP6 with the jumper removed. A single
logic gate IC, provides for the XORing of the VBxEN _L and
local power enable signals into the ISL6160 VB_ON pin. At the
time VB_ON is asserted high the ISL6160 turns on the VB
Secondary Rail in a soft start mode protecting the primary
1
AN9959
supply rail from sudden in-rush current. During turn-on, the
external gate capacitor of the N-Channel MOSFET, Q3 (VB
switch) is charged with a 20µA current source resulting in a
programmable ramp (soft start turn-on). An internal charge
pump supplies the gate drive for the 12V VB supply switch
driving the MOSFET gate to VB +5V. Once the VB Secondary
Rail ramps to 10V the DC-DC_En pin is pulled high thus
enabling the accompanying voltage converter. The DC-DC
converter then provides a well regulated output voltage to the
load. For lab evaluation either an electronic or a passive load is
suitable for suppling a load current.
The ISL6160 VA undervoltage lockout feature prevents turn-on
of VA until VA_In > 2.5V. It then enables the VA soft start and
power up. The VA rising voltage output is a current limited ramp
so that both the inrush current and voltage slew rate are limited,
independent of load. This reduces supply droop due to surge
and eliminates the need for additional external EMI filters.
During operation, once a VA OC condition is detected the
output current is limited to 1A for 12ms to allow transient
conditions to pass. If VA is still in current limit after the current
limit period has elapsed, the output is then latched off. The VA
to the IM circuitry is latched off until reset by the disconnection
and reconnection of the IM from the chassis backplane.
VB_IN
DC-DC_ON
VB_ON
VA_IN
EN
UGATE
HIP6006
ISL6160
LGATE
Vout
RL
CL
VAout
RLOAD
FIGURE 1. ISL6160EVAL2 BLOCK DIAGRAM
The VB Secondary Rail is enabled once the VB_ON (TP7) is
signalled high (through the assertion of the local power enable),
then the DC-DC En pin (TP2) is pulled high to VB. The RC
network of R4, R15 and C14 allows for setting the DC-DC
converter enabling signal level and ramp, thus customizing the
time to DC-DC enabling. Once the DC-DC is enabled the
output (TP3) ramps to 5V. The output is supplied with a banana
jack for connecting to an external active or passive load.
Figure 3 illustrates typical operational waveforms of the
ISL6160EVAL2. These are accessible through the labeled test
points (TPX) on the eval board.
See Figures 4 and 5 for ISL6160EVAL2 turn-on and turn-off
output voltage waveforms.
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Intersil and Design is a trademark of Intersil Americas Inc.
Copyright © Intersil Americas Inc. 2001, All Rights Reserved
Application Note AN9959
LCL_PWR_EN (TP6)
VB Secondary Rail (TP1)
VGATE (TP4)
DC-DC_EN (TP2)
Vout (TP3)
Iout (2A / DIV)
5V / DIV
2ms / DIV
FIGURE 5. ISL6160EVAL2 Vout TURN-OFF
ISL6160EVAL2 Performance
FIGURE 2. ISL6160EVAL2 PHOTOGRAPH
IOUT (1A/DIV)
VB INPUT CURRENT (1A/DIV)
Efficiency
Figure 6 displays the ISL6160EVAL2 efficiency versus load
current. It highlights the efficiency advantages of a switching
regulator at a higher load current. The designed current limit
of this evaluation bd is ~3.5A. The dashed portion of the
curve was collected from a modified evaluation board with
an increased overcurrent protection limit. The curve
indicates maximum efficiency at about 4.5A of output current
and approximately 25W of input power.
VPHASE
(10V/DIV)
(TP9)
VB RAIL
5V/DIV
90
85
VOUT (5V/DIV) (TP3)
TIME (4µs/DIV)
FIGURE 3. ISL6160EVAL2 OPERATIONAL WAVEFORMS
EFFICIENCY (%)
VB RAIL (5V/DIV)
80
25W
75
70
LCL_PWR_EN (TP6)
MEAN CURRENT INTO VB SWITCH * VB
MEAN LOAD CURRENT * VOUT
65
VGATE (TP4)
1
1.5
2
2.5
3
3.5
LOAD CURRENT (A)
4
4.5
5
FIGURE 6. ISL6160EVAL2 EFFICIENCY vs LOAD CURRENT
VB Secondary Rail (TP1)
DC-DC_EN (TP2)
Vout (TP3)
ISL6160 related efficiency improvements can only come
from lowering the RDSon of the VB FET (Q3) switch and the
threshold voltage across the sense resistor that invokes
current regulation and shutdown. HIP6006 related efficiency
improvements are explained in the Power Supply Design
Considerations section of this document.
Transient Response
5V / DIV
20ms / DIV
FIGURE 4. ISL6160EVAL2 Vout TURN-ON
2
Figure 7 shows a laboratory oscillogram of the
ISL6160EVAL2 in response to a 0-3.5A, 250A/ms load
transient. The output voltage responds rapidly and is within
2% of its nominal value in less than 150µs.
Application Note AN9959
This lower limit is based on the achieved efficiency of the
down stream converter design and the max. power capability
of that converter output. At point of failure, by providing a
lower current regulation limit on the I/O module the risk of
passing through any rail voltage disruptions is reduced or
eliminated by not having to rely on the overhead capacity of
the chassis supply.
5V
VOUT
(1V/DIV)
VOUT
(200mV/DIV)
5V
HIP6006 OC Protection
ILOAD
(2A/DIV)
0A
TIME (40us/DIV)
FIGURE 7. ISL6160EVAL2 TRANSIENT RESPONSE
Output Current and Voltage Ripple
The output current and voltage ripple of the HIP6160EVAL2
is shown in Figure 8. The load current is 3.5A for this
oscillogram. Peak-to-peak voltage ripple is about 60mV
under these conditions.
VOUT
(50mV/DIV)
The HIP6006 has a loss less overcurrent (OC) protection
feature. This is accomplished via the current-sense function
of the HIP600x family. The HIP6006 senses converter load
current by monitoring the drop across the upper MOSFET
(Q2a in the Figure 11 schematic) enhancing the converter’s
efficiency and reducing cost by eliminating a current sensing
resistor.
The over-current function cycles the soft-start function in a
hiccup mode to provide fault protection. A resistor (ROCSET,
R6) programs the over-current trip level. An internal 200µA
(typical) current sink develops a voltage across ROCSET that
is referenced to the VB secondary rail. When the voltage
across the upper MOSFET (also referenced to VB
secondary rail) exceeds the voltage across R OCSET, the
over-current function initiates a soft-start sequence. The
soft-start function discharges CSS with a 10µA current sink
and inhibits PWM operation. The soft-start function
recharges CSS, and PWM operation resumes with the error
amplifier clamped to the SS voltage. Should an overload
occur while recharging CSS, the soft start function inhibits
PWM operation while fully charging CSS to 4V to complete
its cycle. The converter dissipates very little power with this
method.
ILOAD
(50mA/DIV)
TIME (2us/DIV)
FIGURE 8. ISL6160EVAL2 OUTPUT RIPPLE
OC Protection
With the ISL6160EVAL2 Class I power supply concept there
are two areas of OC protection. The ISL6160 limits the
current into the port, whereas the HIP6006 will limit current
to the load.
The over-current function will trip at a peak inductor current
(IPEAK) determined by:
I OCSET • R OCSET
I PEAK = --------------------------------------------------r DS ( ON )
where IOCSET is the internal OCSET current source (200µA
- typical). The OC trip point varies mainly due to the
MOSFETs rDS(ON) variations. To avoid over-current tripping
in the normal operating load range, find the R OCSET resistor
from the equation above with:
1. The maximum rDS(ON) at the highest junction
temperature.
ISL6160 OC Protection
The ISL6160EVAL2 is designed to input current limit to 2.8A,
the max. specified peak current for a 25W port. This allows a
maximum output current of ~3.5A at 5V output voltage. As
Iout increases above 3.5A the input current ripple peaks
increase and are limited to 2.8A, beyond this point the
ISL6160 reduces Q3 gate drive for current regulation (CR),
causing a decrease in overall efficiency but protecting the
VB primary rail. A lower limit based on the particular IM
needs can be implemented to ‘tighten’ power budget control.
3
2. The minimum IOCSET from the specification table.
3. Determine IPEAK for I PEAK > I OU T ( MAX ) + ( ∆I ) ⁄ 2
where ∆I is the output inductor ripple current.
,
A small ceramic capacitor should be placed in parallel with
ROCSET to smooth the voltage across ROCSET in the
presence of switching noise on the input voltage.
Figure 9 illustrates the ISL6160EVAL2 OC operational
waveforms. The 5V DC-DC output is shorted and the
Application Note AN9959
HIP6006 current limits it to 5A. When the Secondary Rail
voltage decreases to 10V(TP1) the ISL6160 deasserts the
DC-DC_EN pin (TP2) and shuts off the converter. The 1.6ms
delay prevent spurious events from latching off the power
supply.
RFP45N06’s gain in switching losses offsets its decreased
conduction losses at load currents up to about 9A. This data
reinforces the need to consider both switching and
conduction losses of the MOSFETs. This data is taken from
the HIP6006EVAL1 platform.
IOUT (1A/DIV)
VB SECONDARY RAIL (5V/DIV)
VB PRIMARY RAIL 5V/DIV
EFFICIENCY (%)
90
85
RFP25N05
80
RFP45N06
75
5V VOUT (5V/DIV)
DC-DC_EN (5V/DIV)
2
4
6
LOAD CURRENT (A)
8
10
TIME (0.4ms/DIV)
FIGURE 9. ISL6160EVAL2 OVER-CURRENT OPERATION
Power Supply Design Considerations
The concept of the power supply demonstrated by the
ISL6160EVAL2 can be scaled across the entire range of
1.3V to 12V of output voltage up to a 50W port power level.
To encompass this entire range there are several component
variables and trade-offs to consider. These variables and
trade-offs are briefly discussed in this document, but for a
more detailed and extensive explanation please refer to the
several listed documents [2], [4], [5] on page 5.
FIGURE 10. HIP6006EVAL1 EFFICIENCY WITH EITHER
RFP25N05 OR RFP45N06 MOSFETs
Setting the Output Voltage
Simple resistor value changes allow for outputs as low as
1.3V or as high as the 12V input voltage. The steady-state
DC output voltage can be set using the following simple
formula:
R8
V OUT = V R EF •  1 + -------- , where

R5
VOUT = desired DC output voltage of the converter
Input Capacitor Selection
VREF = HIP6006 internal reference voltage (typically 1.27V)
Use a mix of HIP6006 input (VB secondary rail) bypass
capacitors to control the voltage overshoot across the
MOSFETs. Use small ceramic capacitors for high frequency
decoupling and bulk capacitors to supply the current needed
each time Q1 turns on. The number of input capacitors and
their capacitance are usually determined by their maximum
RMS current rating. A conservative approach is to determine
the converter maximum input RMS current, and assume it
would all have to be supplied from the input capacitors. By
providing enough capacitors to meet the required RMS
current rating, one usually provides enough capacitance for
proper power de-coupling.
Output Capacitor Selection
MOSFET Selection Effect on Efficiency [4]
This section shows graphically that a larger, lower RDSon)
MOSFET does not always improve converter efficiency.
Figure 10 shows that smaller RFP25N05 MOSFETs are
more efficient over most of the line and load range than
larger RFP45N06 MOSFETs. The RFP25N05 has a rDS(ON)
of 47mΩ (maximum at 25oC) versus 28mΩ for the
RFP45N06. In comparison to the RFP25N05, the
4
Output capacitors are required to filter the output and supply
the load transient current. The filtering requirements are a
function of the switching frequency and the ripple current.
The load transient requirements are a function of the slew
rate (di/dt) and the magnitude of the transient load current.
These requirements are generally met with a mix of
capacitors and careful layout. As with the input capacitors,
the number of output capacitors is determined by a
parameter different than sheer capacitance. Based on the
desired output ripple and output transient response, a
maximum ESR can be determined. Based on the design’s
dimensional restraints, an optimum compromise between
the number and size of the output capacitors can be
reached. Conservative approaches dictate using the data
book’s maximum values for ESR; this way the design will still
meet the initial criteria even at the end of capacitor’s active
life. High frequency decoupling of the output may not be
implemented if the application provides high frequency
decoupling components at the load end of the output. In
applications requiring good high frequency decoupling, the
Application Note AN9959
output should be accordingly decoupled using a few ceramic
capacitors. This measure is especially necessary if high ESL
output capacitors are used.
Output Inductor Selection
The output inductor is selected to meet the output voltage
ripple requirements and minimize the converter’s response
time to the load transient. The inductor value determines the
converter’s ripple current and the ripple voltage is a function
of the ripple current. Increasing the value of inductance
reduces the ripple current and voltage. However, the large
inductance values reduce the converter’s response time to a
load transient. One of the parameters limiting the converter’s
response to a load transient is the time required to change
the inductor current from an initial current value to the
transient current level. During this interval the difference
between the inductor current and the transient current level
must be supplied by the output capacitor. Minimizing the
response time can minimize the output capacitance
required.
Output Ripple Voltage
The amount of ripple voltage on the output of the DC-DC
converter varies with, switching frequency, output inductor,
and output capacitors.
by the output load is initially delivered from the output
capacitors. This is due to the finite amount of time required
for the inductor current to slew up to the level of output
current required by the load, and results in a temporary dip
(∆VLOW) in the output voltage, see Figure 7. Conversely, a
sudden removal of the same output load, the energy stored
in the inductor is dumped into the output capacitors, creating
a temporary hump (∆VHIGH) in the output voltage.
Conclusion
The ISL6160EVAL2 board lends itself well to the evaluation
of a complete single fixed voltage IB Class I power supply
and providing a conceptual platform for your specific IM
power control and supply needs.
In addition, with the availability of multiple output voltage
converters such as the IPM6220A coupled with the ISL6160,
Intersil provides an application solution for almost every
InfiniBand I/O module.
References
For Intersil documents available on the web, see
http://www.intersil.com/
[1] ISL6160 Data Sheet, Intersil Corporation, FN9028
[2] HIP6006 Data Sheet, Intersil Corporation, FN4306.
Output Load Transient Response
[3] IPM6220A Data Sheet, Intersil Corporation, FN9032
The application of a sudden load requiring the converter to
supply maximum output current, most of the energy required
[4] Application Note, Intersil Corporation, AN9722.
5
[5] Application Note, Intersil Corporation, AN9761
Application Note AN9959
TP4
+
VB_IN
(12V)
R2
0.01
Q3
C3
R3
50
R1
1.4K
47µF
VB_Ret
VB_In
GATE
ISEN
U1
ISL6160
VA_En
ISET
VA_Fault
VA_In
VA_IN +
(5V)
C1
1000pF
CTIM
VA_Out
C2
100µF
TP8
VB_On
VA_Ret
C13
0.1µF
DC-DC En
R12
50
C14
1000pF
TP7
VBxEN_L
U3
VA_RET
TP2
VB_RET
TP1
TP6
Local Pwr En
(jumper)
C4
470µF
R4
10K
C5
1µF
1206
C7
1µF
1206
C6
VCC
EN 6
SS 3
R15
6.98K
D2
4148
1000pF
14
2 OCSET
MONITOR AND
PROTECTION
R6
4.1K
10 BOOT
RT 1
C8
0.1µF
OSC
U2
HIP6006
REF
R5
1K
C10
C11
R8
1.6K
L1
8 PHASE
33pF
12 LGATE
+
4
COMP
11 PGND
7
GND
R7
0.001µF
C9
20K
SPARE
R9
1.6K
FIGURE 11. ISL6160EVAL2 SCHEMATIC
6
C15
0.1µF
5VOUT
13 PVCC
+
-
FB 5
TP3
TP9
Q2a
9 UGATE
Q2b
C12
820µF
VB_RET
Application Note AN9959
Bill of Materials for HIP6006EVAL1
PART #
DESCRIPTION
PACKAGE
QTY
REF
VENDOR
ISL6160IB
InfiniBand Power Controller
14NSOIC
1
U1
INTERSIL
HIP6006CV
Synchronous Rectified Buck Controller
14TSSOP
1
U2
INTERSIL
SN74AHC1G86 or equiv
Single XOR gate
5SOT-23
1
U3
Various
Si4922DY or equiv
Dual 8A, 30V, 0.018Ω, N-Channel MOSFET
8SOIC
1
Q2
Various
ITF86130SK8T or equiv
14A, 40V, 0.008Ω, N-Channel MOSFET
8SOIC
1
Q3
Various
1N4148
Rectifier, 100mA, 75V
DO35
1
D2
Various
10µH
Output Filter Inductor
Wound Toroid
1
L1
Various
1.4K
VB Current Set Resistor, 1%, 1/16W
0603
1
R1
Various
0.01Ω
VB Current Sense Resistor, 1%, 1W
2512
1
R2
Various
50Ω
SMD Resistor, 5%, 1/16W
0603
2
R3, R10
Various
10KΩ
SMD Resistor, 5%, 1/16W
0603
1
R4
Various
1KΩ
SMD Resistor, 5%, 1/16W
0603
1
R5
Various
4.1Ω
SMD Resistor, 5%, 1/16W
0603
1
R6
Various
20KΩ
SMD Resistor, 5%, 1/16W
0603
1
R7
Various
Various
3.0KΩ
SMD Resistor, 5%, 1/16W
0603
1
R8
DNP
SMD Resistor, 5%, 1/16W
0603
1
R9
Various
50Ω
Through hole Resistor, 5%, 1W
-
1
R12
Various
6.98KΩ
SMD Resistor, 5%, 1/10W
0805
1
R15
Various
100µF
Electrolytic Aluminum Capacitor, 16V
Radial
1
C2
Various
470µF
Electrolytic Aluminum Capacitor, 16V
Radial
1
C4
Various
820µF
Electrolytic Aluminum Capacitor, 16V
Radial
1
C12
Various
1000pF
Ceramic Capacitor, 50V
0603
2
C1, C6, C14
Various
47µF
Ceramic Capacitor, 50V
0603
1
C3
Various
1µF
Ceramic Capacitor, 50V
0603
2
C5, C7
Various
0.1µF
Ceramic Capacitor, 50V
0603
2
C8, C13, C15
Various
33pF
Ceramic Capacitor, 50V
0603
1
C10
Various
0.001µF
Ceramic Capacitor, 50V
0603
1
C11
Various
-
Local power enable Jumper
-
1
PWR_EN
Various
-
Test Points
-
9
TP1- TP9
Various
1314353-00
Scope Probe Test Point
-
1
TP3, VOUT
Tektronics
-
Banana Jacks
-
4
Various
VB_IN, VA_IN,
VB_RET, VA_RET
EZM06DRXH
Edge Connector
-
1
-
Sullins
All Intersil products are manufactured, assembled and tested utilizing ISO9000 quality systems.
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice.
Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable.
However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its
use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
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