AN9991: HC55185 Ringing SLIC and the AK2306/2306LV Dual PCM CODEC

HC55185 Ringing SLIC & the AK2306/2306LV
Dual PCM CODEC
TM
Application Note
December 2001
AN9991
Author: Don LaFontaine
Reference Design using the HC55185 and
the AK2306/2306LV Dual PCM CODEC
equal to the desired terminating impedance ZL, minus the
value of the protection resistors (RP). The formula to
calculate the proper RS for matching the 2-wire impedance
is shown in Equation 1.
The purpose of this application note is to provide a reference
design for the HC55185 and AK2306/2306LV Dual PCM
CODEC.
(EQ. 1)
R S = 133.3 • ( Z L – 2RP )
The network requirements of many countries require the
analog subscriber line circuit (SLIC) to terminate the
subscriber line with an impedance for voiceband frequencies
which is complex, rather than resistive (e.g. 600Ω). The
HC55185 accomplishes this impedance matching with a
single network (RS Figure 1) connected between the VTX
pin and the -IN pin.
Equation 1 can be used to match the impedance of the SLIC
and the protection resistors (ZTR) to any known line
impedance (ZL). Figure 1 shows the calculations of RS to
match a resistive and 2 complex loads.
The AK2306/2306LV Dual PCM CODEC includes Selectable
A-law/µ-law function, Internal Gain Adjustment from +6dB to
-18dB by 1dB steps control and a selectable 16Hz/20Hz
Ring Tone Generator.
1
R S = 133.3  600 + ----------------------------------- – ( 2 ) ( 49 )


–6
jω2.16X10
EXAMPLE 1:
Calculate RS to make ZTR = 600Ω in series with 2.16µF.
RP = 49Ω.
(EQ. 2)
RS = 66.9kΩ in series with 16.2nF. Note: Some impedance
models, with a series capacitor, will cause the op amp feedback
to behave as an open circuit DC. A resistor with a value of
about 10 times the reactance of the RS capacitor
(2.16µF/133.3 = 16.2nF) at the low frequency of interest
(200Hz for example) can be placed in parallel with the capacitor
in order to solve the problem (491kΩ for a 16.2nF capacitor).
Discussed in this application note are the following:
• 2-wire impedance matching
• Receive gain (4-wire to 2-wire) and transmit gain (2-wire to
4-wire) calculations
• Reference design for both 600Ω and
220Ω +820Ω||115nF Complex Impedance
EXAMPLE 2:
Impedance Matching
Calculate RS to make ZTR = 220 + 820//115nF
RP = 49Ω.
Impedance matching of the HC55185 to the subscriber load
is important for optimization of 2 wire return loss, which in
turn cuts down on echoes in the end to end voice
communication path. Impedance matching of the HC55185 is
accomplished by making the SLIC’s impedance (ZO, Figure 1)
EG
RS
COMPLEX
RS = 133.3(600 - 2*49)
VRX
RS
+
VTR
-
ZL
RS = 16.26kΩ in series with the parallel combination of
109.3kΩ and 862pF.
ZL = ZTR = 600Ω
RP
49Ω
TIP
66.9kΩ
STD VALUE
66.5kΩ
ZL = ZTR = 600Ω + 2.16µF
RS
RS = 133.3(600 - 2*49) +
2.16µF/133.3
COMPLEX
RS
RING
RP
49Ω
ZTR
66.9kΩ
ZL = ZTR = 220Ω + 820//115nF
RS = 133.3(220 - 2*49)+
133.3(820) // 115nF/133.3
ZT
VTX
RS
ZO
CTX
491kΩ
16.2nF
-IN
16.26kΩ
862pF
CFB
ZO = ZL - 2RP
(EQ. 3)
RESISTIVE
INTERSIL
HC55185
+
V2W
-
820
Z T = 133.3  200 + ----------------------------------------------------------- – ( 2 ) ( 49 )
–9
1 + jω820 ( 115 )X10
109.3kΩ
VFB
FIGURE 1. IMPEDANCE MATCHING
1
1-888-INTERSIL or 321-724-7143
|
Intersil (and design) is a trademark of Intersil Americas Inc.
Copyright © Intersil Americas Inc. 2001. All Rights Reserved
Application Note 9991
SLIC in the Active Mode
Substitute Equation 10 into Equation 14
Figure 2 shows a simplified AC transmission model of the
HC55185 and the connection of the AK2306 to the SLIC.
Figure 3 shows a simplified AC transmission model of the
HC55185 and the connection of the “Low Voltage”
AK2306LV to the SLIC. The Low Voltage AK2306LV CODEC
requires a different connection to the HC55185 to achieve
the voltage gain required at tip and ring without clipping the
output signal of the CODEC.
The following analysis is performed with the AK2306
CODEC connection. Circuit analysis of the “Low Voltage”
circuit is left for the reader. Circuit analysis of the HC55185
yields the following design equations:
The Sense Amplifier is configured as a 4 input differential
amplifier with a gain of 3/4. The voltage at the output of the
sense amplifier (VSA) is calculated using superposition.
VSA1 is the voltage resulting from V1, VSA2 is the voltage
resulting from V2 and so on (reference Figure 2).
V RX
R S ∆I M 30
I X = ----------- –  -------------------------
R8K
R
(EQ. 15)
Loop Equation at HC55185 feed amplifiers and load
I X R - V TR + I X R = 0
(EQ. 16)
Substitute Equation 15 into Equation 16
R S ∆I M 60
V TR = 2V RX –  -------------------------


8K
(EQ. 17)
Substitute Equation 12 for RS and -V2w/ZL for ∆IM into
Equation 17.
Z O V 2W
V TR = 2V RX + -------------------Z
(EQ. 18)
L
Loop Equation at Tip/Ring interface
(EQ. 19)
V 2W -I M 2R P + V TR = 0
Substitute Equation 18 into Equation 19 and combine terms
3
V SA 1 = – --- ( V 1 )
4
(EQ. 4)
3
V SA 2 = --- ( V 2 )
4
(EQ. 5)
3
V SA 3 = – --- ( V 3 )
4
(EQ. 6)
VRX = The input voltage at the VRX pin.
3
V SA 4 = --- ( V 4 )
4
(EQ. 7)
VSA = An internal node voltage that is a function of the loop
current and the output of the Sense Amplifier.
3
3
V SA = [ ( V 2 – V 1 ) + ( V 4 – V 3 ) ] --- = [ ∆V + ∆V ] --4
4
(EQ. 8)
Z L + Z O + 2R P
V 2W -------------------------------------- = – 2V RX
ZL
(EQ. 20)
where:
Where ∆V is equal to IMRSENSE (RSENSE = 20Ω)
3
V SA = 2 ( ∆IM × 20 ) --- = ∆I M 30
4
(EQ. 9)
IX = Internal current in the SLIC that is the difference
between the input receive current and the feedback current.
IM = The AC metallic current.
RP = A protection resistor (typical 49.9Ω).
The voltage at VTX is equal to:
RS
RS
V TX = – V SA  -------- = –  -------- ∆I M 30
 8K
 8K
(EQ. 10)
VTR is defined in Figure 2, note polarity assigned to VTR
V TR = 2 ( V RX + V TX )
(EQ. 11)
Setting VRX equal to zero, substituting Equation 10 into
Equation 11 and defining ZO = -VTR/∆IM will enable the user
to determine the require feedback to match the line
impedance at V2W.
1
Z O = ------------------ R S
133.33
(EQ. 12)
ZO is the source impedance of the device and is defined as
ZO = ZL - 2Rp. ZL is the line impedance. RS is defined as:
R S = 133.33 ( Z L – 2R P )
(EQ. 13)
Node Equation at HC55185 VRX input
V RX V TX
I X = ----------- + ----------R
R
(EQ. 14)
2
RS = An external resistor/network for matching the line
impedance.
VTR = The tip to ring voltage at the output pins of the SLIC.
V2W = The tip to ring voltage including the voltage across
the protection resistors.
ZL = The line impedance.
ZO = The source impedance of the device.
HC55185 Receive Gain (VRX to V2W)
4-wire to 2-wire gain across the HC55185 is equal to the
V2W divided by the input voltage VRX, reference Figure 2.
The receive gain is calculated using Equation 20.
Equation 21 expresses the receive gain (VRX to V2W) in
terms of network impedances. From Equation 13, the value
of RS was set to match the line impedance (ZL) to the
HC55185 plus the protection resistors (Z0 + RP). This results
in a 4-wire to 2-wire gain of -1, as shown in Equation 21.
V 2W
ZL
ZL
G 4-2 = ------------ = -2 ---------------------------------------- = -2 -------------------- = – 1
V RX
Z L + Z O + 2 RP
ZL + ZL
(EQ. 21)
Application Note 9991
R
I
+ M
-
V2
ZL
IM
+
R
R6
33K
VRX
GSR
+ CRX
VRX 0.47µF
-
VTR
+
CA
0.47µF
RA
120K
AMPR
AMPLIFIER
PCM I/F
FS
R
+
FEED
AMPLIFIER
RSENSE
V3
V4
+
20Ω
IX
- IM +
+
- IM +
RP
R
VTX
4R
8K
+
3R
AMPT
AMPLIFIER
VFTN
VFTP
TRANSMIT PATH
DX
RS
66.5K
-IN
CFB
+
3R
4R
4R
120K
+ CTX
VTX 0.47µF
-
TA
FEEDBACK AMPLIFIER
4R
R8
49.9K
BCLK
GST
RF
E
- G
RING
DR
VFR
VIN
1:1
FEED
AMPLIFIER
-
RECEIVE PATH
R7
33K
IX
Z0
+
+
V2W
-
I
+ M
IX RECEIVE BLOCK
V1
20Ω
RP
-
RSENSE
AK2306
VRO
+
-
TIP
INTERSIL
+ HC55185 (1 OF 2)
+
-
IX
-
VFB
VSA = ∆IM30
SENSE AMPLIFIER
FIGURE 2. HC55185 SIMPLIFIED AC TRANSMISSION CIRCUIT AND AK2306
R
I
+ M
-
V2
20Ω
RP
IM
-
IX RECEIVE BLOCK
V1
+
FEED
AMPLIFIER
R
R6
33K
VRX
GSR
+ CRX
VRX 0.47µF
-
-
RA
42.2K
RF
E
- G
RING
CA
0.47µF
RP
AMPR
AMPLIFIER
PCM I/F
FS
R
+
- IM +
DR
VFR
VIN
1:1
VTR
+
RECEIVE PATH
0dB
R7
33K
IX
Z0
+
+
V2W
-
I
+ M
ZL
-
RSENSE
AK2306LV
VRO
FEED
AMPLIFIER
RSENSE
V3
V4
+
20Ω
IX
- IM +
+
R
TA
FEEDBACK AMPLIFIER
3R
4R
4R
4R
+
3R
R8
36.5K
+ CTX
VTX 0.47µF
-
+
4R
VTX
8K
VSA = ∆IM30
SENSE AMPLIFIER
RS
66.5K
-IN
BCLK
GST
30.1K
VFTN
VFTP
+
-
TIP
INTERSIL
+ HC55185 (1 OF 2)
+
-
IX
-
TRANSMIT PATH
0dB
DX
RIN
45.3K
CFB CIN
VFB 0.47µF
RECEIVE GAIN FROM DR TO T/R IS +3.3dB
TRANSMIT GAIN FROM T/R TO DX IS -9.3dB
AK2306LV
LOW VOLTAGE CONNECTION
FIGURE 3. HC55185 SIMPLIFIED AC TRANSMISSION CIRCUIT AND AK2306LV
3
AMPT
AMPLIFIER
Application Note 9991
Receive Gain Across the System
Combining Equations 24 and 25 results in Equation 26.
The receive gain across the system is defined as the gain
from DR to the phone (V2W). With the receive gain through
the HC55185 set to 1, the receive gain across the system is
entirely controlled by programming the AK2306. The
AK2306 can program the receive gain across the system
from +6dB to -18dB in 1 dB increments (reference Figure 4).
ZO
V TX
Z L – 2R P
(EQ. 26)
G 2-4 = ---------- = – ------------------------------------------------ = – -----------------------------------------------EG
2 ( Z L + 2R P + Z O )
2 ( Z L + 2R P + Z O )
If more precise gain increments are required, the AMPR
amplifier can be used to adjust the overall Receive gain
(R6/R7).
Transmit Gain Across HC55185
(EG to VTX)
(EQ. 22)
– E G + Z L I M + 2RP I M – VTR = 0
From Equation 18 with VRX = 0
Z O V 2W
V TR = -------------------ZL
 Z O + 2 RP 
V 2W =  ---------------------------------------- E G
 Z L + Z O + 2 RP
(EQ. 27)
Substituting ZL = ZO + 2RP and rearranging Equation 27 in
terms of EG results in Equation 28.
(EQ. 28)
E G = 2V2W
The 2-wire to 4-wire gain is equal to VTX/EG with VRX = 0,
reference Figure 2.
Loop Equation
A more useful form of the equation is rewritten in terms of
VTX /V2W. A voltage divider equation is written to convert
from EG to V2W as shown in Equation 27.
(EQ. 23)
Substituting Equation 28 into Equation 26 results in an equation
for 2-wire to 4-wire gain that’s a function of the synthesized
input impedance of the SLIC and the protection resistors.
V TX
ZO
G 2-4 = ------------ = – -------------------------------------------- = 0.416
V 2W
( Z L + 2R P + Z O )
(EQ. 29)
ZL is set to 600Ω, ZO is programmed with RS to be 498.76Ω
(66.5kΩ/133.33), and RP is equal to 49.9Ω. This results in a
2-wire to 4-wire gain of 0.416 or -7.6dB.
Substituting Equation 23 into Equation 22 and simplifying.
Transmit Gain Across the System
Z L + 2R P + Z O
E G = – V 2W --------------------------------------ZL
The transmit gain across the system is defined as the gain
from the phone or 2-wire side (V2W) to the PCM highway
(DX). Setting the gain of the AK2306 will have to account for
the attenuated signal through the HC55185. The system
gain is entirely controlled by programming the AK2306. The
AK2306 can program the transmit gain across the system
from +6dB to -18dB in 1 dB increments (reference Figure 4).
(EQ. 24)
Substituting Equation 12 into Equation 10 and defining
∆IM = -V2W/ZL results in Equation 25 for VTX.
V 2W Z L – 2R P
V TX = ------------ -----------------------2
ZL
(EQ. 25)
If more precise gain increments are required, the AMPT
amplifier can be used to adjust the overall Transmit gain
(Rf/R8).
AK2306
VRO
VRX
_
ZL
CRX
0.47µF
VTR
+
EG
RING
ZTR
RS
66.5K
-IN
ZO
ZO = ZL - 2RP
VFB
GSR
CA
0.47µF
CFB
4.7µF
RF
R8
49.9K
AMPR AMPLIFIER
CTX
0.47µF
GST
120K
VFTN
VFTP
TRANSMIT PATH
GAIN
+6dB to -18dB
AMPT AMPLIFIER
FIGURE 4. RECEIVE GAIN G(4-2), TRANSMIT GAIN (2-4)
4
DR
RA
120K
VTX
RP
49Ω
VFR
+
-
TIP
R6
33K
+
-
INTERSIL
HC55185 (1 OF 2)
RP
49Ω
+
V2W
-
R7
33K
RECEIVE PATH
GAIN
+6dB to -18dB
DX
Application Note 9991
Transhybrid Balance G(4-4)
across the system, with the transmit gain of the AK2306 set
to 0dB, we set R8 equal to 49.9kΩ. as shown in Equation 30.
Transhybrid balance is a measure of how well the input
signal is canceled (that being received by the SLIC) from the
transmit signal (that being transmitted from the SLIC to the
CODEC). Without this function, voice communication would
be difficult because of the echo.
RF
120k
G VTX = G 4 – 4  -------- = G 4 – 4  --------------- = 0.416 ( 2.404 ) = 1.0
 R8
 49.9k
(EQ. 30)
The gain through the AMPT amplifier from VGSR must equal
the gain from VTX to achieve transhybrid balance. RA is
therefore equal to RF, as shown in Equation 31.
The signals at VGSR and VTX (Figure 4) are opposite in
phase. Transhybrid balance is achieved by summing two
signals that are equal in magnitude and opposite in phase
into the AMPT amplifier inside the AK2306.
GV
• 4-wire to 2-wire gain (DR to V2W) equal 0dB
• 2-wire to 4-wire gain (V2W to DX ) equal 0dB
• Rp = 49.9Ω
RF
Figure 6 gives the reference design using the Intersil
HC55185 and the AK2306 Dual PCM CODEC. Also shown in
Figure 6 are the voltage levels at specific points in the circuit.
VGSR
VFTN
VTX
VFTP
(EQ. 31)
The design criteria is as follows:
For discussion purpose, the AMPT amplifier is redrawn with
the external resistors in Figure 5.
R8
RF
120k
= V GSR  -------- = V GSR  ------------- = 1
 RA
 120k
Reference Design of the HC55185 and the
AK2306 With a 600Ω Load
Transhybrid balance is achieved by summing the VGSR
signal with the output signal from the HC55185 when proper
gain adjustments are made to match VGSR and VTX
magnitudes.
RA
GSR
GAOT
+
AMPT
Impedance Matching
The 2-wire impedance is matched to the line impedance Z0
using Equation 1, repeated here in Equation 32.
FIGURE 5. TRANSHYBRID BALANCE CIRCUIT
R S = 133.3 • ( Z L – 2RP )
Transhybrid balance is achieved by adjusting the magnitude
from both VTX and VGSR so their equal to each other.
(EQ. 32)
For a line impedance of 600Ω, RS equals:
The gain across the system is set by the gain through the
SLIC (0.416) and the AMPT amplifier through RF/R8. RF is
randomly selected to be 120kΩ. To achieve a 0dB gain
R S = 133.3 • ( 600 – 98 ) = 66.9kΩ
(EQ. 33)
The closest standard value for RS would be 66.5kΩ.
G4-2
R7
33K
0.7745VRMS
INTERSIL
HC55185 (1 OF 8)
RP
49Ω
R6
33K
VRX
TIP
+
V2W
-
CRX
0.47µF
+
ZL
VTR
-
EG
VFR
GSR
AMPR AMPLIFIER
PCM
BUS
RA
120K
RING
RF
R8
49.9K
ZO
0.7745VRMS
DR
RECIEVE PATH
GAIN
0dB
CA
0.47µF
RP
49Ω
ZTR
0dBm0(600Ω)
AK2306
VRO
0dBm0(600Ω)
ZO = ZL - 2RP
AMPT AMPLIFIER
120K
VTX
RS
66.5K
GST
CTX
0.47µF
VFTN
VFTP
+
-
0.7745VRMS
SYSTEM REQUIREMENTS:
IMPEDANCE: 600Ω
TRANSMIT GAIN (A/D): +5.0dB
RECEIVE GAIN (D/A): 0dB
+
-
0dBm0(600Ω)
TRANSMIT PATH
GAIN
0dB
DX
-IN
0dBm0(600Ω)
CFB
0.7745VRMS
4.7µF
VFB
-7.619dBm0(600Ω)
0dBm0(600Ω)
0dBm0(600Ω)
0.32219VRMS
0.7748VRMS
0.7748VRMS
G2-4
FIGURE 6. REFERENCE DESIGN OF THE HC55185 AND THE AK2306/2306LV WITH A 600Ω LOAD IMPEDANCE
5
Application Note 9991
Reference Design of the HC55185 and the
AK2306 With a Complex Load
Adjustment to Get -3.5dBm0 at the Load
Referenced to 600Ω
The design criteria for a Complex load solution are as
follows:
The voltage equivalent to 0dBm0 into 897Ω (0dBm0(897Ω))
is calculated using Equation 34 (897Ω is the impedance of
complex load at 1020Hz).
• Desired line circuit impedance is 220 + 820//115nF
2
V
0dBm ( 897Ω ) = 10 log ------------------------------ = 0.9471V RMS
897 ( 0.001 )
• Receive gain V2W / DR is -3.5dB
(EQ. 34)
• Transmit gain DX / V2W is 0dB
The gain referenced back to 0dBm0(600Ω) is equal to:
• 0dBm0 is defined as 1mW into the complex impedance at
1020Hz
0.9471V RMS
GAIN = 20 log ----------------------------------- = 1.747dB
0.7745V RMS
• Rp = 49.9Ω
(EQ. 35)
The adjustment to get -3.5dBm0 at the load referenced to
600Ω is:
Figure 7 gives the reference design using the Intersil
HC55185 and the AK2306 Dual PCM CODEC. Also shown
in Figure 7 are the voltage levels at specific points in the
circuit. Note: The transmit gain of the system is 0dB
(-1.79dB(897Ω) = -3.5dB(600Ω)) as explained in the following
section.
Adjustment = – 3.5dBm0 + 1.747dBm0 = – 1.75 dB
(EQ. 36)
The voltage at the load (referenced to 600Ω) is given in
Equation 37
2
V
– 1.75d Bm ( 600Ω ) = 10 log ------------------------------ = 0.63306V RMS (EQ. 37)
600 ( 0.001 )
Setting the Receive Path Gain equal to -1dB and adjusting
R6/R7 with standard resistor values results in a voltage of
0.62969Vrms or -1.70dBm0 (600Ω).
-1dBm0(600Ω)
0.69036VRMS
-1.79dBm0(600Ω)
-1.79dBm0(600Ω)
0.62969VRMS
R7
33K
0.62969VRMS
RP
49Ω
R6
30.1K
TIP
VRX
+
ZL
EG
ZTR
RF
INTERSIL
HC55185
ZO
GSR
0.7745VRMS
DR
AMPR AMPLIFIER
PCM
BUS
RA
31.2K
RING
RP
49Ω
VFR
CA
0.47µF
CRX
0.47µF
VTR
-
RECEIVE PATH
GAIN
-1dB
R8
13K
VTX
RS
90.9kΩ
ZO = ZL - 2RP
GST
AMPT AMPLIFIER
25.5K
CTX
0.47µF
VFTN
VFTP
+
-
+
V2W
-
0dBm0(600Ω)
AK2306
VRO
+
-
G4-2
TRANSMIT PATH
GAIN
0dB
DX
-IN
CFB
VFB
-1.79dBm0(600Ω)
4.7µF
-9.41dBm0(600Ω)
-3.56dBm0(600Ω)
0.26195VRMS
0.51382VRMS
-3.56dBm0(600Ω)
0.51382VRMS
0.62969VRMS
FIGURE 7. REFERENCE DESIGN OF THE HC55185 AND THE AK2306 WITH A COMPLEX LOAD IMPEDANCE
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
6
Similar pages