Technical Reference Guide

OMAP-L137
Evaluation Module
Technical
Reference
2008
DSP Development Systems
OMAP-L137 Evaluation
Module Technical Reference
511345-0001 Rev. A
November 2008
SPECTRUM DIGITAL, INC.
12502 Exchange Drive, Suite 440 Stafford, TX. 77477
Tel: 281.494.4505
Fax: 281.494.5310
[email protected] www.spectrumdigital.com
IMPORTANT NOTICE
Spectrum Digital, Inc. reserves the right to make changes to its products or to discontinue any
product or service without notice. Customers are advised to obtain the latest version of relevant
information to verify that the data being relied on is current before placing orders.
Spectrum Digital, Inc. warrants performance of its products and related software to current
specifications in accordance with Spectrum Digital’s standard warranty. Testing and other quality
control techniques are utilized to the extent deemed necessary to support this warranty.
Please be aware that the products described herein are not intended for use in life-support
appliances, devices, or systems. Spectrum Digital does not warrant nor is Spectrum Digital liable for
the product described herein to be used in other than a development environment.
Spectrum Digital, Inc. assumes no liability for applications assistance, customer product design,
software performance, or infringement of patents or services described herein. Nor does Spectrum
Digital warrant or represent any license, either express or implied, is granted under any patent right,
copyright, or other intellectual property right of Spectrum Digital, Inc. covering or relating to any
combination, machine, or process in which such Digital Signal Processing development products or
services might be or are used.
WARNING
This equipment is intended for use in a laboratory test environment only. It generates, uses, and can
radiate radio frequency energy and has not been tested for compliance with the limits of computing
devices pursuant to subpart J of part 15 of FCC rules, which are designed to provide reasonable
protection against radio frequency interference. Operation of this equipment in other environments
may cause interference with radio communications, in which case the user at his own expense will be
required to take whatever measures necessary to correct this interference.
Copyright © 2008 Spectrum Digital, Inc.
Contents
1
Introduction to the OMAP-L137 Evaluation Module
............................
1-1
Provides you with a description of the OMAP-L137 Evaluation Module, key features, and
block diagram.
1.1 Key Features
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-2
1.2 Functional Overview of the OMAP-L137 EVM
.............................
1-4
1.3 Basic Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-4
1.4 Memory Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1-5
1.5 Configuration Switch Settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1-6
1.6 Power Supply
.........................................................
1-6
2
Board Components . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2-1
Describes the operation of the major board components on the OMAP-L137 Evaluation Module.
2.1 EMIF-A Interfaces . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-2
2.1.1 EMIF-B SDRAM Memory Interface
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-2
2.1.2 Memory Card Interface
..............................................
2-2
2.1.3 UART Interface
...................................................
2-2
2.1.4 USB Interface
.....................................................
2-3
2.2 AIC3106 Interface
......................................................
2-3
2.3 Ethernet Interface
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-4
2.4 I2C Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2-5
2.5 Daughter Card Interface
................................................
2-6
3
Physical Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Describes the physical layout of the OMAP-L137 Evaluation Module and its connectors.
3.1 Board Layout
........................................................
3.2 Connectors
........................................................
3.2.1 J1, USB Capacitance Select
...........................................
3.2.2 J2, USB 2.0 Connector and Jumpers
.....................................
3.2.3 J3, USB Connector
...................................................
3.2.4 J4, 14 Pin External JTAG Connector
......................................
3.2.5 J5, ARM JTAG Emulation Header
........................................
3.2.6 J6, +5 Volt Input
.....................................................
3.2.7 P1, RS-232 UART
...................................................
3.2.8 P2, MMC/SD Connector
...............................................
3.2.9 P3, Line In
..........................................................
3.2.10 P4, Microphone In
..................................................
3.2.11 P5, Headphone Out
................................................
3.2.12 P6, Line Out
.......................................................
3.2.13 P8, RJ9 Connector
.................................................
3.2.14 P9, Ethernet Interface
..............................................
3.2.15 P10, Ethernet Interface
..............................................
3.2.16 Expansion Connector Overview
......................................
3.2.16.1 P11, Audio / Expansion Connector
..................................
3.2.16.2 P12, Expansion 2 Connector
.......................................
3.2.16.3 P13, Expansion 3 Connector
........................................
3.2.17 P14, Phono Jack In
.................................................
3.2.18 P15, Phono Jack In
.................................................
3.2.19 J201, Embedded JTAG Emulation Interface
.............................
3.3 LEDs
................................................................
3.4 Switches
.............................................................
3.4.1 SW1, EMU0/1 Select Switch
...........................................
3.4.2 SW2, Boot Mode Select Switch
........................................
3.4.3 SW3, User Readable 4 Position DIP Switch
..............................
3.4.4 SW4, Reset Switch
..................................................
3.4.5 SW5, Pull-Up Switch
.................................................
3.4.6 SW6, On/Off Switch
.................................................
3.5 Test Points
........................................................
A Schematics
..............................................................
Contains the schematics for the OMAP-L137 Evaluation Module
B Mechanical Information
..................................................
Contains the mechanical information about the OMAP-L137 Evaluation Module
3-1
3-3
3-4
3-5
3-6
3-6
3-7
3-7
3-8
3-8
3-9
3-10
3-10
3-11
3-11
3-12
3-12
3-13
3-14
3-15
3-16
3-17
3-18
3-18
3-18
3-18
3-19
3-19
3-20
3-22
3-22
3-23
3-23
3-24
A-1
B-1
About This Manual
This document describes the board level operations of the OMAP-L137 Evaluation
Module (EVM). The EVM is based on the Texas Instruments OMAP-L137 Processor.
The OMAP-L137 Evaluation Module is a table top card that allows engineers and
software developers to evaluate certain characteristics of the OMAP-L137 processor to
determine if the processor meets the designers application requirements. Evaluators
can create software to execute on board or expand the system in a variety of ways.
Notational Conventions
This document uses the following conventions.
The OMAP-L137 Evaluation Module will sometimes be referred to as the OMAP-L137
EVM or EVM.
Program listings, program examples, and interactive displays are shown in a special
italic typeface. Here is a sample program listing.
equations
!rd = !strobe&rw;
Information About Cautions
This book may contain cautions.
This is an example of a caution statement.
A caution statement describes a situation that could potentially damage your software,
or hardware, or other equipment. The information in a caution is provided for your
protection. Please read each caution carefully.
Related Documents, Application Notes and User Guides
Information regarding the OMAP-L137 can be found at the following Texas
Instruments website:
http://www.ti.com
Table 1: Manual History
Revision
A
History
Beta
Table 2: Board History
PWB
Revision
D
History
Beta Release
Chapter 1
Introduction to the
OMAP-L137 EVM
Chapter One provides a description of the OMAP-L137 EVM along with the
key features and a block diagram of the circuit board.
Topic
1.1
1.2
1.3
1.4
1.5
1.6
Page
Key Features
Functional Overview of the OMAP-L137 EVM
Basic Operation
Memory Map
Boot Switch Settings
Power Supply
1-2
1-4
1-4
1-5
1-6
1-6
1-1
Spectrum Digital, Inc
1.1 Key Features
The OMAP-L137 EVM is a standalone development platform that enables users to
evaluate and develop applications for the OMAP-L137 processor. Schematics and
application notes are available to ease hardware development and reduce time to
market.
SD/MMC
On-board
JTAG
DIP
EMIFA Expansion
LEDs
I2C
ROM
EMIFA
SD/MMC
ARM JTAG
SDRAM
SDRAM
CFG
OMAP
-L137
RTC
PWR
JTAG
McASP0/1
TPS65023
VREG
I2C Bus
AIC3106
CODEC
MII
PWR
UART
S/PDIF
HP OUT
MIC IN
LINE IN
ENET
RJ45
Handset
MIC
ENET
RJ45
Handset
SPKR
RS-232
USB1 / USB0
Micrel ENET
PHY + Switch
LINE OUT
PWR SW
Audio Expansion
Embedded
JTAG
Emulator
BOOT
EMIFB
32
TI JTAG
Serial Exp.
USB1
USB0
Figure 1-1, Block Diagram OMAP-L137 EVM
The EVM comes with a full complement of on board devices that suit a wide variety of
application environments. Key features include:
• A Texas Instruments OMAP-L137 device with a C674x VLIW DSP floating point
processor and an ARM926EJ-S processor operating up to 300 Mhz.
• 64 Megabytes SDRAM
• SPI Boot EEPROM
• 2 Port Ethernet Phy/switch
• SD/MMC/MMC Plus media card interfaces
• TLV320AIC3106 Stereo Codec
• USB 1.1 High speed interface
• USB2 2.0 Full speed interface
• RS-232 Interface
1-2
OMAP-L137 EVM Technical Reference
Spectrum Digital, Inc
• On chip real time clock
• Configurable boot load options
• 4 user LEDs/4 position user DIP switch
• Single voltage power supply (+5V)
• Expansion connectors for daughter card use
• Embedded JTAG Emulation
• 14 Pin TI JTAG/20 Pin ARM JTAG Interfaces
Figure 1-2, OMAP-L137 EVM
1-3
Spectrum Digital, Inc
1.2 Functional Overview of the OMAP-L137 EVM
The OMAP-L137 on the EVM interfaces to on-board peripherals through the 16-bit
wide multiplexed EMIF interface pins. The SDRAM memory is connected to its own
dedicated 32 bit wide bus.
An on-board AIC3106 codec allows the DSP to transmit and receive analog audio
signals. The I2C bus is used for the codec control interface, while the McASP controls
the audio stream. Signal interfacing is done through 3.5mm audio jacks that correspond
to microphone input, headphone output, line input, and line output.
The EVM includes 4 user LEDs, a 4 position user DIP switch, and on chip real time
clock. On board multi-plexing allows ease of interfacing to the daughter cards.
An included +5V external power supply is used to power the board. On-board switching
voltage regulators provide the CPU core voltage, +3.3V, +1.8V for peripheral
interfacing. The board is held in reset by the on board power controller until these
supplies are within operating specifications.
Code Composer Studio communicates with the EVM through an embedded emulator
or via the TI 14 pin or ARM 20 pin external JTAG connectors.
1.3 Basic Operation
The EVM is designed to work with TI’s Code Composer Studio IDETM, or
MontaVista tool environments. Code Composer communicates with the board
through an on board JTAG emulator. This EVM is shipped with an EVM specific Code
Composer Studio environment. To start, follow the instructions in the Quick Start
Guide to install Code Composer. This process will install all of the necessary
development tools, documentation and drivers.
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OMAP-L137 EVM Technical Reference
Spectrum Digital, Inc
1.4 Memory Map
The OMAP-L137 processor has a byte addressable address space. However, there are
some limitations to byte addressing determined by peripheral interconnection to the
OMAP-L137 device. Program code and data can be placed anywhere in the unified
address space. Addresses are multiple sizes depending on hardware implementation.
Refer to the appropriate device data sheets for more details.
The memory map shows the address space of a generic OMAP-L137 processor on the
left with specific details of how each region is used on the right. By default, the internal
memory sits at the beginning of the address space. Portions of memory can be
remapped in software as L2 cache rather than fixed RAM.
The part incorporates a dual EMIF interface. One dedicated EMIF, EMIF-B, directly
interfaces to the SDRAM memory. EMIF-A has 3 separate addressable regions called
chip enable spaces (CE0, CS2, CS3), however the EVM uses this interface as a
peripheral interface to daughter card connectors. The memory map of the OMAP-L137
EVM is shown in the table below.
Table 1: OMAP-L137 EVM Memory Map
ARM Mem
Map
DSP Mem
Map
Start Address
End Address
0x0080 0000
0x0083 FFFF
DSP L2 RAM
0x00E0 0000
0x00f0 7FFFF
DSP L1P RAM
0x00F0 0000
0x00F0 8000
DSP L1D RAM
0x0184 0000
0x0184 FFFF
DSP Memory System
0x1180 0000
0x1183 FFFF
DSP L2 RAM
0x11E0 0000
0x11E0 7FFF
DSP L1P RAM
0x1FF0 0000
0x11F0 7FFF
DSP L1D RAM
0x8000 0000
0x8001 FFFF
Shared RAM
0xB000 0000
0xB000 7FFF
EMIFB control regs
0xC000 0000
0xDFFF FFFF
EMIFB SDRAM Data
0xFFFE E000
0xFFFF 0000
0xFFFE FFFF
0xFFFF 1FFF
ARM Interrupt Controller
ARM Local RAM
1-5
Spectrum Digital, Inc
1.5 Boot Switch Settings
The EVM has a 5 position switch that allow users to configure the operational state of
the processor when it is released from reset and determine the source for processor
booting. Switch SW2 configures the boot mode that will be used when the DSP starts
executing. By default the switches are configured to serial EEPROM boot. The table
below shows the boot mode sources and their respective switch positions.
Table 2: SW2, Boot Mode Select
Pos 1
Boot[7]
Pos 2
Boot[2]
Pos 3
Boot[1]
Pos 4
Boot[0]
Pos 5
Boot[3]
Boot Pin
BTMODE[7,2,1,0,3]
Boot Mode
OFF
OFF
OFF
OFF
OFF
ON
NA
0 0 0 1 x
NOR
ON
OFF
NA
0 0 1 0 x
HPI
OFF
ON
OFF
ON
NA
0 1 0 1 x
SPI0 Flash
OFF
ON
ON
OFF
NA
0 1 1 0 x
SPI1 Flash
OFF
ON
ON
ON
NA
0 1 1 1 x
NAND 8-bit
OFF
OFF
OFF
OFF
OFF
0 0 0 0 0
I2C0 Master
OFF
OFF
OFF
OFF
ON
0 0 0 0 1
I2C0 Slave
OFF
OFF
ON
ON
OFF
0 0 1 1 0
I2C1 Master
OFF
OFF
ON
ON
ON
0 0 1 1 1
I2C1 Slave
OFF
ON
OFF
OFF
OFF
0 1 0 0 0
SPI0 EEPROM *
OFF
ON
OFF
OFF
ON
0 1 0 0 1
SPI1 EEPROM
ON
OFF
OFF
ON
OFF
1 0 0 1 0
SPI0 Slave
ON
OFF
OFF
ON
ON
1 0 0 1 1
SPI1 Slave
ON
OFF
ON
ON
OFF
1 0 1 1 0
UART0
ON
OFF
ON
ON
ON
1 0 1 1 1
UART1
ON
OFF
ON
OFF
OFF
1 0 1 0 0
UART2 *
ON
ON
ON
ON
OFF
1 1 1 1 0
Emulation Debug *
* Supported on Standalone EVM
1.6 Power Supply
The EVM operates from a single +5V external power supply connected to the main
power input (J6), a 2.5 MM. barrel-type plug. Internally, the +5V input is converted
into core voltage, +1.8V and +3.3V using Texas Instruments TPS65023 Power
Management Unit. The +3.3V and +1.8V supply are used for the DSP's I/O
buffers and other chips on the board.
1-6
OMAP-L137 EVM Technical Reference
Chapter 2
Board Components
This chapter describes the operation of the major board components on
the OMAP-L137 EVM.
Topic
2.1
2.1.1
2.1.2
2.1.3
2.1.4
2.2
2.3
2.4
2.5
Page
EMIF-A Interfaces
EMIF-B SDRAM Memory Interface
Memory Card Interface
UART Interface
USB Interface
AIC3106 Interface
Ethernet Interface
I2C Interface
Daughter Card Interface
2-2
2-2
2-2
2-2
2-2
2-3
2-4
2-5
2-6
2-1
Spectrum Digital, Inc
2.1 EMIF-A Interfaces
A separate 16 bit EMIF with three chip enables divide up the address space and allow
for asynchronous accesses on the EVM. The EVM uses this interface for peripheral
interfaces to the daughter card.
2.1.1 EMIF-B SDRAM Memory Interface
The OMAP-L137 device incorporates a dedicated 32 bit wide SDRAM memory bus.
The EVM uses two 256 Megabit, 16 bit wide memories on this bus, for a total of 64
megabytes of memory for program, data, and video storage. The internal SDRAM
controller uses a PLL to control the SDRAM memory timing. Memory refresh for
SDRAM is handled automatically by the OMAP-L137 internal SDRAM controller.
2.1.2 Memory Card Interface
The EVM supports SD/MMC/MMC PLUS media card interfaces. This interface is
multiplexed with other function the EMIFA bus.
2.1.3 UART Interface
The internal UART2 on the OMAP-L137 device is driven to connector P1. The UART’s
interface is routed to the RS-232 line drivers prior to being brought out to a DB-9
connector, P1.
2.1.4 USB Interface
The OMAP-L137 incorporates two on chip USB controllers. The USB 2.0 interface is
brought out to a micro A/B connector. A jumper is provided to make a flexible host,
peripheral, and USB on the go interface. The second USB 1.1 interface is brought
out to an A type host interface connector.
2-2
OMAP-L137 EVM Technical Reference
Spectrum Digital, Inc
2.2 AIC3106 Interface
The EVM incorporates a Texas Instruments TLV320AIC3106 stereo codec for input and
output of audio signals. The codec samples analog signals on the microphone or line
inputs and converts them into digital data so it can be processed by the DSP. When the
DSP is finished with the data it uses the codec to convert the samples back into analog
signals on the line output so the user can hear the output.
The codec communicates using two serial channels, one to control the codec’s internal
configuration registers and one to send and receive digital audio samples. The I2C bus
is used as the AIC3106’s control channel. The control channel is generally only used
when configuring the codec, it is typically idle when audio data is being transmitted,
McASP1 is used as the bi-directional data channel. All audio data flows through the
data channel. Many data formats are supported based on the three variables of
sample width, clock signal source and serial data format. The EVM examples generally
use a 16-bit sample width with the codec in master mode so it generates the frame
sync and bit clocks at the correct sample rate without effort on the DSP side.
The codec is clocked via a 24.576 Mhz oscillator. The internal sample rate generator
subdivides the default system clock to generate common audio frequencies. The
sample rate is set by a codec register. The figure below shows the codec interface on
the OMAP-L137 EVM.
AIC3106 Codec
MIC IN
2
IC
SCL
SDA
Control
I2C Format
SCL
SDA
LINE IN
Control Registers
Digital
Analog
LINE OUT
McASP
AXR[0]
AXR[5]
ACLKR
ACLKX
AFSR
AFSX
DOUT
DIN
BCLK
WCLK
MIC IN
ADC
LINE IN
DAC
LINE OUT
HP OUT
HP OUT
Figure 2-1, OMAP-L137 EVM CODEC INTERFACE
2-3
Spectrum Digital, Inc
2.3 Ethernet Interface
The OMAP-L137 incorporates an ethernet MAC which interfaces to a Micrel
KSZ8893MQL ethernet switch. The multi-port 10/100 Mbit interface is isolated and
brought out to two RJ-45 standard ethernet connectors, P9, P10. The ethernet
addresses is stored in the on board I2C EEPROM. The 2 ethernet addresses stored in
the EEPROM are the first address and the address + 1. The first address should
always be an even number. The I2C bus is also used to control configuration registers
in the switch that are not accessible via the MDIO module.
Two ports provide the ability to input and pass data for Voice Over IP (VOIP) or other
daisy chained applications. Connector P9 is the primary port for normal operation.
The RJ-45 jacks have 2 LEDs integrated into their connector. The LEDs are green and
yellow and provide link and transmit status from the ethernet controller.
The MAC address for each EVM is also written on a label on the bottom of the board.
The figure below shows an examples of this.
Figure 2-2, OMAP-L137 MAC Address
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OMAP-L137 EVM Technical Reference
Spectrum Digital, Inc
2.4 I2C0 Interface
The I2C0 bus on the OMAP-L137 is ideal for interfacing to the control registers of many
devices. On the OMAP-L137 EVM the I2C0 bus is used to configure the ethernet phy
and Codec. An I2C ROM is also interfaced via the serial bus. The format of the bus is
shown in the figure below.
Start Slave Address W
ACK Sub Address ACK-S Data ACK-S Stop
Write Sequence
Start Slave Address R
Data
STOP
Read Sequence
Figure 2-3, I2C Bus Format
The addresses of the on board peripherals are shown in the table below.
Table 1: I2C0 Memory Map
Device
Address
R/W
Function
KSZ8893MQL
0x5D
R/W
Ethernet Switch
TLV320AIC3106
0x1B
R/W
CODEC
I2C EEPROM
0x25
R/W
I2C EEPROM
2-5
Spectrum Digital, Inc
2.5 Daughter Card Interfaces
The EVM provides expansion connectors that can be used to accept plug-in daughter
cards. The daughter card allows users to build on their EVM platform to extend its
capabilities and provide customer and application specific I/O. The expansion
connectors are interfaces which include McASP, and serial I/O expansion. The EMIF-A
signals are brought out as LCD, peripheral, or EMIF signals.
The daughter card connectors used on the EVM are shown in the table below.
Table 2: Daughter Card Connectors
Reference
Designator
Part Numbers Used
On EVM
Manufacturer
P11
QSE-040-01-L-D-A-K
Samtec
P12
QSE-020-01-L-D-A-K
Samtec
P13
QSE-040-01-L-D-A-K
Samtec
One of the compatible mating daughter card connectors used to interface to the EVM
are shown in the table below (other heights are available).
Table 3: Mating Daughter Card Connectors
2-6
Reference
Designator
Part Numbers Used
On EVM
Manufacturer
XP11
QTE-040-02-L-D-A-K
Samtec
XP12
QTE-020-02-L-D-A-K
Samtec
XP13
QTE-040-02-L-D-A-K
Samtec
OMAP-L137 EVM Technical Reference
Chapter 3
Physical Description
This chapter describes the physical layout of the OMAP-L137 EVM and its
interfaces.
Topic
3.1
Board Layout
3.2
Connectors
3.2.1 J1, USB Capacitance Select
3.2.2 J2, USB 2.0 Connector and Jumpers
3.2.3 J3, USB 1.1 Connector
3.2.4 J4, 14 Pin External JTAG Connector
3.2.5 J5, ARM JTAG Emulation Header
3.2.6 J6, +5V Input
3.2.7 P1, RS-232 UART
3.2.8 P2, MMC/SD Connector
3.2.9 P3, Line In
3.2.10 P4, Microphone In
3.2.11 P5, Headphone Out
3.2.12 P6, Line Out
3.2.13 P8, RJ9 Connector
3.2.14 P9, Ethernet Interface
3.2.15 P10, Ethernet Interface
3.2.16 Expansion Connector Overview
3.2.16.1 P11, Audio / Expansion Connector
3.2.16.2 P12, Expansion 2 Connector
3.2.16.3 P13, Expansion 3 Connector
3.2.17 P14, Phono Jack In
3.2.18 P15, Phono Jack In
3.2.19 J201, Embedded JTAG Emulation Interface
Page
3-3
3-4
3-5
3-6
3-6
3-7
3-7
3-8
3-8
3-9
3-10
3-10
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3-11
3-12
3-12
3-13
3-14
3-15
3-16
3-17
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Spectrum Digital, Inc
Topic
3.3
3.4
3.4.1
3.4.2
3.4.3
3.4.4
3.4.5
3.4.5
3.5
3-2
LEDs
Switches
SW1, EMU0/1 Select Switch
SW2, Boot Mode Select Switch
SW3, User Readable 4 Position DIP Switch
SW4, RESET Switch
SW5, Mux Control Switch
SW6, On/Off Switch
Test Points
Page
3-18
3-19
3-19
3-20
3-22
3-22
3-23
3-23
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OMAP-L137 EVM Technical Reference
Spectrum Digital, Inc
3.1 Board Layout
The OMAP-L137 EVM is a 5.0 x 8.55 inch (127 x 217 mm.) ten (10) layer printed circuit
board which is powered by an external +5 volt only power supply. Figure 3-1 shows the
layout of the top side of the OMAP-L137 EVM.
SW6
J6
DS7
SW4
J201
P1
J205
DS501
P9
SW1
P2
P10
J5
P8
DS1-4
SW3
P14
J4
P3
DS5,8,9
DS5
P4
P13
P5
SW2
P15
P6
P12
J3
SW5
J1
J2
P11
Figure 3-1, OMAP-L137 EVM, Interfaces Top Side
3-3
Spectrum Digital, Inc
3.2 Connectors
The EVM has numerous connectors and option jumpers to control and provide
connections to various peripherals. These connectors and jumpers are described in the
following sections.
Table 1: Connectors
Connector
Size
Function
J1
1x2
USB Capacitance Select
J2
2
USB Interface
J3
6
USB Interface
J4
2x7
TI 14 Pin JTAG
J5
2x8
ARM JTAG Emulation Header
J6
2
+5V In
P1
9
RS-232 UART
P2
28
SD/MMC Connector
P3
4
Line In
P4
4
Microphone In
P5
4
Headphone Out
P6
4
Line Out
P8
4
RJ9 Connector
P9
12
Ethernet
P10
12
Ethernet
P11
2 x 45
Audio Expansion Connector
P12
2 x 22
Expansion 2
P13
2 x 45
Expansion 3
P14
3
Phono Jack
P15
3
Phono Jack
J201
J205
3-4
Embedded JTAG Interface
2x5
Not populated, factory use only
OMAP-L137 EVM Technical Reference
Spectrum Digital, Inc
3.2.1 J1, USB Capacitance Select
Connector J1 is a jumper is used to provide more capacitance when the USB connector
is used in the host mode. When the jumper is shorted the extra capacitance is
provided. These open and shorted position are shown below.
Shorted
Open
USB VBUS
USB VBUS
J1
J1
Figure 3-2, J1, USB Capacitance Select
Table 2: J1, USB Capacitance Select
Position
Function
Open
6.8 uF Capacitance
Shorted
106.8 uF Capacitance
3-5
Spectrum Digital, Inc
3.2.2 J2, USB 2.0 Connector and Jumpers
Connector J2 is a micro A/B USB connector. The pinout for the J2 connector is shown
in the table below.
Table 3: J2, USB Connector
Pins
Signal
1
USB_VBUS
2
USB_DM
3
USB_DP
4
USB_ID
5-9
USB_SHIELD
* Use internal register to swap DM/DP pair. This feature was used to improve printed
circuit board routing.
The EVM supplies up to 500 ma of current to the USB_VBUS via a TPS2065. This is
enabled via the OMAP-L137’s DRV_VBUS pin. J1 supplies extra capacitance for host
mode operations. Remove J1 for “USB On The Go” operations.
3.2.3 J3, USB 1.1 Connector
Connector J3 is a USB-A connector. This connector is connected directly to the OMAP
L137 processor. A TPS2065 switches on host power via the L137 GPIO[15]. The pinout
for the J3 connector is shown in the table below.
Table 4: J3, USB Connector
3-6
Pins
Signal
1
VBUS
2
D-, USB1_DM
3
D+, USB1_DP
4
GND, Ground
5
USB_Shield
6
USB_Shield
OMAP-L137 EVM Technical Reference
Spectrum Digital, Inc
3.2.4 J4, 14 Pin External JTAG Connector
Connector J4 is a 2 x 7 double row male header. This is the standard interface used by
JTAG emulators to interface to Texas Instruments DSPs. The pinout for the connector
is shown in the figure below.
TMS
TDI
PD (+3.3V)
TDO
TCK-RET
TCK
EMU0
1
3
5
7
9
11
13
2
4
6
8
10
12
14
TRSTGND
no pin (key)
GND
GND
GND
EMU1
Header Dimensions
Pin-to-Pin spacing, 0.100 in. (X,Y)
Pin width, 0.025-in. square post
Pin length, 0.235-in. nominal
Figure 3-3, 14 Pin External JTAG Connector
3.2.5 J5, ARM JTAG Emulation Header
The J5 emulation header is located on the top side of the board and is used to provide
an interface to ARM compatible JTAG emulators. The pinout for this connector is
shown in the table below.
Table 5: J5, ARM JTAG Emulation Header
Pin #
Signal
Pin #
Signal
1
VCC_3V3
2
VCC_3V3
3
ARM_TRSTn
4
Ground
5
ARM_TDI
6
Ground
7
ARM_TMS
8
Ground
9
ARM_TCK
10
Ground
11
ARM_TCKRET
12
Ground
13
ARM_TDO
14
Ground
15
ARM_RSTn
16
Ground
17
NC
18
Ground
19
NC
20
Ground
3-7
Spectrum Digital, Inc
3.2.6 J6, +5V Input
Connector J6 is the input power connector. This connector brings in +5 volts to the
EVM. This is a 2.5mm. jack. The inside of the jack is tied to through a fuse to VCC_5V.
The other side is tied to ground and LED DS7. The figure below shows this connector
as viewed from the card edge.
+5V
J6
Ground
PC Board
Front View
Figure 3-4, J6, +5 Volt Input Connector
3.2.7 P1, RS-232 UART
The P1 connector is a 9 pin male D-connector which provides a UART interface to the
EVM. This connector interfaces to the MAX 3221 RS-232 line driver (U28) and is
located on the top side of the board. A view of the connector from the card edge is
shown in the figure below. The signals present on this connector are defined in the
following table.
5
3
4
9
8
2
7
1
6
Figure 3-5, P1, DB9 Male Connector
The pin numbers and their corresponding signals are shown in the table below. This
corresponds to a standard dual row to DB-9 connector interface used on personal
computers.
Table 6: P1, RS-232 Pinout
3-8
Pin #
Signal Name
1
NC
2
R_IN, Rx Data
3
T_OUT, Tx Data
4
NC
5
GND
6
NC
7
Pin 8
8
Pin 7
9
NC
OMAP-L137 EVM Technical Reference
Spectrum Digital, Inc
3.2.8 P2, MMC/SD Connector
The P2 MMC/SD connector is located on the top side of the board and is used to
provide an interface to the following interfaces: MMC+, SD, and MMC. The pinout for
the P2 connector is shown in the table below.
Table 7: P2, MMC/SD Connector
Pin #
Signal
1
MMC_SD_DATA3 - #1_MMC+/MMC/SD
2
MMC_SD_CMD - #2_MMC+/MMC/SD
3
GND - #3_MMC+/MMC/SD
4
DSK_3V3 - #4_MMC+/MMC/SD
5
MMC_SD_CLK - #5_MMC+/MMC/SD
6
GND - #6_MMC+/MMC/SD
7
MMC_SD_DATA0 - #7_MMC+/MMC/SD
8
MMC_SD_DATA1 - #8_MMC+/SD
9
MMC_SD_DATA2 - #9_MMC+/SD
10
MMC_SD_DATA4 - #10_MMC+
11
MMC_SD_DATA5 - #11_MMC+
12
MMC_SD_DATA6 - #12_MMC+
13
MMC_SD_DATA7 - #13_MMC+/
14
MMC_SD_WP - SD_WP
15
MMC_SD_INS - CD
16
Reserved
17
Reserved
18
GND
19
DSK_3V3
20
Reserved
21
GND
22
Reserved
23
Reserved
24
Reserved
25
NC -
26
NC -
27
GND
28
GND
3-9
Spectrum Digital, Inc
3.2.9 P3, Line In
Connector P3 is an stereo audio line input. The input connector is a 3.5 mm stereo jack.
The signals on the mating plug are shown in the figure below.
Ground (sleeve)
Left Line In (ring)
Right Line In (tip)
Figure 3-6, P3, Audio Line In Stereo Jack
Table 8: P3, Line In Interface
Pin #
AIC3106 Signal
1 (sleeve)
GND_AC
2 (ring)
LINE1L+
3 (tip)
LINE1R+
4 (sleeve)
GND_AC
3.2.10 P4, Microphone In
Connector P4 is an stereo microphone line input. The input connector is a 3.5 mm
stereo jack. The signals on the mating plug are shown in the figure below.
Ground (sleeve)
Left Line In (ring)
Right Line In (tip)
Figure 3-7, P4, Microphone In Stereo Jack
Table 9: P4, Microphone In Interface
3-10
Pin #
AIC3106 Signal
1 (sleeve)
GND_AC
2 (ring)
MIC3L/MIC3R
3 (tip)
MIC3L/MIC3R
4 (sleeve)
GND_AC
OMAP-L137 EVM Technical Reference
Spectrum Digital, Inc
3.2.11 P5, Headphone Out
The P5 connector is a 3.5 mm. stereo headphone output from the TVL320AIC3106 on
the EVM. The signals on the mating plug are shown in the figure below The signals
present on this connector are defined in the following table.
Ground (sleeve)
Right Line Out (ring)
Left Line Out (tip)
Figure 3-8, P5, Headphone Out Stereo Jack
Table 10: P5, Headphone Out Interface
Pin #
AIC3106 Signal
1(sleeve)
GND_AC
2(ring
HPLOUT
3(tip)
HPROUT
4
NC
3.2.12 P6, Line Out
The audio line out connector P6, is a stereo output. The output connector is a 3.5 mm
stereo jack. The signals on the mating plug are shown in the figure below.
Ground (sleeve)
Right Line Out (ring)
Left Line Out (tip)
Figure 3-9, P6, Audio Line Out Stereo Jack
Table 11: P6, Audio Line Out Stereo Jack
Pin #
AIC33 Signal
1 (sleeve)
GND_AC
2 (ring)
LEFT_LO+
3 (tip)
RIGHT_LO+
4 (sleeve)
NC
3-11
Spectrum Digital, Inc
3.2.13 P8, RJ9 Connector
The headset interface, P8, is a standard RJ9-4 connector which is not populated as
shipped.
3.2.14 P9, Ethernet Interface
The P9 connector is located on the top side of the board and is used to provide an
Ethernet interface. P9 integrates the magnetics and standard RJ-45 connector. The
two tables below show the signals present on the magnetics interface and the
connector side.
Table 12: P9, Magnetics/LEDs Interface Signals
Pin #
Signal
Pin #
Signal
1
TXP1 (TXD+)
2
TXM1 (TXD-)
3
RXP1 (RXD+)
4
ENET_VDDATR (TXD-CT)
5
ENET_VDDATR (RXD-CT)
6
RXM1 (RXD-)
7
NC1
8
GND
9
VCC_3V3(LED1+)
10
P1LED2(LED1-)
11
DSK_3V3(LED2+)
12
P1LED3(LED2-)
The ethernet connector incorporates 2 LEDs which give link and transmit status from
the ethernet controller.
Table 13: P9, RJ-45 Connector
3-12
Pin #
Signal
Pin #
Signal
1
TX_DATA+
2
TX_DATA-
3
RX_DATA+
4
NC
5
NC
6
RX_DATA-
7
NC
8
NC
OMAP-L137 EVM Technical Reference
Spectrum Digital, Inc
3.2.15 P10, Ethernet Interface
The P10 connector is located on the top side of the board and is used to provide an
Ethernet interface. P10 integrates the magnetics and standard RJ-45 connector. The
two tables below show the signals present on the magnetics interface and the
connector side.
Table 14: P10, Magnetics/LEDs Interface Signals
Pin #
Signal
Pin #
Signal
1
TXP2 (TXD+)
2
TXM2 (TXD-)
3
RXP2 (RXD+)
4
ENET_VDDATR (TXD-CT)
5
ENET_VDDATR (RXD-CT)
6
RXM2 (RXD-)
7
NC1
8
GND
9
VCC_3V3(LED1+)
10
P2LED2(LED1-)
11
DSK_3V3(LED2+)
12
P2LED3(LED2-)
The ethernet connector incorporates 2 LEDs which give link and transmit status from
the ethernet controller.
Table 15: P10, RJ-45 Connector
Pin #
Signal
Pin #
Signal
1
TX_DATA+
2
TX_DATA-
3
RX_DATA+
4
NC
5
NC
6
RX_DATA-
7
NC
8
NC
3-13
Spectrum Digital, Inc
3.2.16 Expansion Connector Overview
The EVM has three expansion connectors which allow the user to interface to other
logic which is unique to his application
Some of the signals on the EVM are multiplexed with an on board resource or they
have multiple options on the L137 device. To enable these signals there are several
control lines on the expansion connector. Pulling the control lines high enables the
functions marked in the Mux_Ctl column tables. The number in the Mux_Ctl column
indicates which pins it controls. An ‘N’ in front of the column indicates the pin is
available when the control line is not pulled high. Each control line is pulled down on
the EVM, therefore a pull-up resistor of approximately 500 ohms is required to enable
the control line to a logic ‘1’. A ‘*’ in the Mux_Ctl column indicates this is a control line
on the expansion connectors.
The next 3 tables indicate the interface signal and the appropriate control line on the
pins of the expansion connectors.
3-14
OMAP-L137 EVM Technical Reference
Spectrum Digital, Inc
3.2.16.1 P11, Audio / Expansion Connector
Table 16: P11, Audio / Expansion Connector
Pin
Signal
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
VCC_5V
VCC_5V
NC
SEL_ENETn_MCASP0
T_AMUTE0
Ground
EXP1_AFSX0
Ground
T_ACLKX0
Ground
EXP_AXR0[0]
EXP_AXR0[1]
EXP_AXR0[2]
EXP_AXR0[3]
EXP_AXR0[4]
EXP_AXR0[5]
EXP_AXR0[6]
EXP_AXR0[7]
Ground
AHCLKR2
EXP1_SPI1_SCSn
EXP1_SPI1_CLK
EXP_RESETn
Ground
T_AMUTE1
Ground
EXP_AFSX1
Ground
EXP_ACLKX1
Ground
EXP_AXR1[0]
EXP_AXR1[1]
EXP_AXR1[2]
EXP_AXR1[3]
EXP_AXR1[4]
EXP_AXR1[5]
EXP1_SEL_MCASP1
NC
VCC_5V
VCC_5V
Ground
Ground
Ground
Ground
NC
Mux_Ctl
*1
1
1
1
1
1
1
1
1
3
2
2
2
N5
N5
2
*2
* 1 Control line for Mux_Ctl 1 signals,
* 3 Control line for Mux_Ctl 3 signals,
* N7 is not control signal 7 (default),
* N12 is not control signal 12 (default)
Pin
Signal
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
VCC_5V
VCC_5V
I2C0_SDA
I2C0_SCL
EXP_ACHLKR0
Ground
T_AFSR0
Ground
T_ACLKR0
Ground
EXP_AXR[8]
EXP_AXR0_9
EXP_AXR0_10
EXP1_AXR0_12
EXP1_AXR0_13
EXP1_AXR0_14
EXP1_AXR0_15
T_AXR0_11/AXR2_0/GPIO3_11
Ground
EXP1_AMUTE2_8
EXP1_SPI1_ENAn
EXP1_SPI1_SIMO
EXP1_SPI1_SOMI
Ground
EXP_AHCLKX1
Ground
T_AFSR1
Ground
T_ACLKR1
Ground
T_AXR1[6]
T_AXR1[7]
T_AXR1[8]
T_AXR1[9]
T_AXR1[10]
T_AXR1[11]
SEL_SPI1_EXP1
NC
VCC_5V
VCC_5V
Ground
Ground
Ground
Ground
NC
Mux_Ctl
1
1
N7
N7
N11
N11
N11
N11
N12
3
2
*3
* 2 Control line for Mux_Ctl 2 signals
* N5 is not control signal 5 (default)
* N11 is not control signal 11 (default)
3-15
Spectrum Digital, Inc
3.2.16.2 P12, Expansion 2 Connector
Table 17: P12, Expansion 2 Connector
Pin
Signal
Mux_Ctl
Pin
Signal
Mux_Ctl
2
VCC_5V
1
VCC_5V
4
VCC_5V
3
VCC_5V
6
Ground
5
Ground
8
EXP_SPI1_SOMI
9
7
EXP2_SPI0_SOMI
6
10
EXP2_SPI1_SIMO
9
9
EXP2_SPI0_SOMO
6
12
EXP_SPI1_CLK
9
11
EXP2_SPI0_CLK
6
14
EXP2_SPI1_SCSn
4
13
EQEP0A
6
16
EXP2_SPI1_ENAn
4
15
EQEP0B
6
18
Ground
17
Ground
20
SEL_SPI1_EXP2
*4
19
IC20_SCL
22
EXP_EQEP1A
5
21
IC20_SDA
24
EXP_EQE1B
5
23
NC
26
SEL_EXP2_QEP1
*5
25
SEL_EXP2_QEP0
28
EXP2_UART1_RXD
7
27
EXP2_TMP640_OUT12
9
30
EXP2_UART1_TXD
7
29
EXP2_TMP640_IN12
9
31
Ground
*7
33
SEL_SPI1_EXP2_B
*8
*9
32
Ground
34
SEL_EXP2_UART1
36
EXP_RESETn
35
SEL_EXP2_TIMER
38
VCC_5V
37
VCC_5V
40
VCC_5V
39
VCC_5V
42
Ground
41
Ground
44
Ground
43
Ground
*6
* 4 Control line for Mux_Ctl 4 signals
* 5 Control line for Mux_Ctl 5 signals
* 6 Control line for Mux_Ctl 6 signals
* 7 Control line for Mux_Ctl 7 signals
* 8 Control line for Mux_Ctl 8 signals
* 9 Control line for Mux_Ctl 9 signals
3-16
OMAP-L137 EVM Technical Reference
Spectrum Digital, Inc
3.2.16.3 P13, Expansion 3 Connector
Table 18: P13, Expansion 3 Connector
Pin
Signal
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
VCC_5V
VCC_5V
EXP3_SEL_MEMD0_7
EXP3_SEL_MEM
Ground
EXP_EMIFA_D0
EXP_EMIFA_D2
EXP_EMIFA_D4
EXP_EMIFA_D6
Ground
EXP_EMIFA_D8
EXP_EMIFA_D10
EXP_EMIFA_D12
EXP_EMIFA_D14
Ground
EXP3_SEL_MEMD8_D11
EXP3_SEL_MEMD12_D16
Ground
EXP3_EMIFA_CLK
Ground
Ground
EXP3_EMIFA_OEn
EXP3_EMIFA_WEn
Ground
EMIFA_WAIT0
EMIFA_CS0n
NC
EMIFA_BA0
EMIFA_A0
EXP_EMIFA_A2
EMIFA_A3
EMIFA_A5
EMIFA_A7
EMIFA_A9
EMIFA_A11
Ground
EXP_RESETn
NC
VCC_5V
VCC_5V
Ground
Ground
Ground
Ground
NC
Mux_Ctl
* 10
* 11
10
10
10
10
13
13
14
14
* 13
* 14
11
11
10
Pin
Signal
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
VCC_5V
VCC_5V
NC
EXP3_SEL_MEM_CTL
Ground
EXP_EMIFA_D1
EXP_EMIFA_D3
EXP_EMIFA_D5
EXP_EMIFA_D7
Ground
EXP_EMIFA_D9
EXP_EMIFA_D11
EXP_EMIFA_D13
EXP_EMIFA_D15
Ground
EXP_EMIFA_WEn_DQM0
EXP_EMIFA_WEn_DQM1
Ground
EMIFA_SDCKE
Ground
Ground
EMIFA_CS4n
EMIFA_CS5n
NC
EMIFA_CS2n
EXP3_EMIFA_CS3n
NC
EMIFA_BA1
EXP_EMIFA_A1
EMIFA_A4
EMIFA_A6
EMIFA_A8
EMIFA_A10
EMIFA_A12
NC
Ground
NC
NC
VCC_5V
VCC_5V
Ground
Ground
Ground
Ground
NC
Mux_Ctl
* 12
10
10
10
10
13
13
14
14
11
11
10
10
12
10
* 10 Control line for Mux_Ctl 10 signals
* 11 Control line for Mux_Ctl 11 signals
* 12 Control line for Mux_Ctl 12 signals
* 13 Control line for Mux_Ctl 13 signals
* 14 Control line for Mux_Ctl 14 signals
3-17
Spectrum Digital, Inc
3.2.17 P14, Phono Jack In
Connector P14 is a phono jack input. This connector is not populated as shipped.
3.2.18 P15, Phono Jack In
Connector P15 is a phono jack input. This connector is not populated as shipped.
3.2.21 J201, Embedded JTAG Emulation Interface
Connector J201 is a USB interface providing JTAG access to the processor. This allows
the user to develop and debug using Code Composer Studio on a PC.
3.3 LEDs
The EVM has ten (10) LEDs which are located on the top side of the board.
Information regarding the LEDs are shown in the table below.
Table 19: LEDs
3-18
LED #
Use
Color
DS1
User control, EMIFA D12
Green
DS2
User control, EMIFA D13
Green
DS3
User control, EMIFA D14
Green
DS4
User control, EMIFA D15
Green
DS5
USB-EMU ON/OFF
Green
DS6
VCC_1V2
Green
DS7
VCC_5V
Green
DS8
VCC_1V8
Green
DS9
VCC_3V3
Green
DS501
On board EMU status
Green
OMAP-L137 EVM Technical Reference
Spectrum Digital, Inc
3.4 Switches
The EVM has six (6) switches. The function of these switches are shown in the table
below.
Table 20: Switches
Switch
Function
Type
SW1
EMU0/EMU1 Control
4 Position DIP
SW2
Boot Mode Select
6 Position DIP
SW3
User Readable
4 Position DIP
SW4
RESET Switch
Push Button/Momentary
SW5
Pull Up Select
6 Position DIP
SW6
On/Off Power Switch
Toggle
3.4.1 SW1, EMU0/1 Select Switch
SW1 is a 2 position DIP switch providing 4 options in selecting the state of the EMU0
and EMU1 pins on the OMAP-L137 processor. This switch is not needed for the
OMAP-L137 processor.
The default is to select pull ups on the EMU0 and EMU1.
3-19
Spectrum Digital, Inc
3.4.2 SW2, Boot Mode Select Switch
Switch SW2 is a 6 position DIP switch. Only 5 of the positions are used. Note that only
5 combinations provide valid options. The boot mode options are described in the table
below.
Table 21: SW2, Boot Mode Select DIP Switch
Position
Pins
Signal
1
1-12
BOOTMODE[7]
2
2-11
BOOTMODE[2]
3
3-10
BOOTMODE[1]
4
4-9
BOOTMODE[0]
5
5-8
BOOTMODE[3]
6
6-7
NC
The figure below shows the SW2 switch.
Raised
Actuator
SW2
1 1
12
2 2
11
3 3
10
4 4
9
5 5
8
6 6
7
Figure 3-10, SW2, Boot Mode Select Switch
3-20
OMAP-L137 EVM Technical Reference
Spectrum Digital, Inc
The table below shows the position settings which select the various boot modes.
Table 22: SW2, Boot Mode Select
Pos 1
Boot[7]
Pos 2
Boot[2]
Pos 3
Boot[1]
Pos 4
Boot[0]
Pos 5
Boot[3]
Boot Pin
BTMODE[7,2,1,0,3]
Boot Mode
OFF
OFF
OFF
ON
NA
0 0 0 1 x
NOR
OFF
OFF
ON
OFF
NA
0 0 1 0 x
HPI
OFF
ON
OFF
ON
NA
0 1 0 1 x
SPI0 Flash
OFF
ON
ON
OFF
NA
0 1 1 0 x
SPI1 Flash
OFF
ON
ON
ON
NA
0 1 1 1 x
NAND 8-bit
OFF
OFF
OFF
OFF
OFF
0 0 0 0 0
I2C0 Master
OFF
OFF
OFF
OFF
ON
0 0 0 0 1
I2C0 Slave
OFF
OFF
ON
ON
OFF
0 0 1 1 0
I2C1 Master
OFF
OFF
ON
ON
ON
0 0 1 1 1
I2C1 Slave
OFF
ON
OFF
OFF
OFF
0 1 0 0 0
SPI0 EEPROM *
OFF
ON
OFF
OFF
ON
0 1 0 0 1
SPI1 EEPROM
ON
OFF
OFF
ON
OFF
1 0 0 1 0
SPI0 Slave
ON
OFF
OFF
ON
ON
1 0 0 1 1
SPI1 Slave
ON
OFF
ON
ON
OFF
1 0 1 1 0
UART0
ON
OFF
ON
ON
ON
1 0 1 1 1
UART1
ON
OFF
ON
OFF
OFF
1 0 1 0 0
UART2 *
ON
ON
ON
ON
OFF
1 1 1 1 0
Emulation Debug *
* Supported in standalone EVM
3-21
Spectrum Digital, Inc
3.4.3 SW3, User Readable 4 Position DIP Switch
Switch SW6 is a 4 position DIP switch mapped to EMIFA data bus lines D8-D11 via
a multiplexer. The table below shows what signal each position appears on.
Raised
Actuator
ON
1
3
2
SW3
4
Figure 3-11, SW3, User Readable 4 Position DIP Switch
Table 23: SW3, User Readable 4 Position DIP Switch
Position
Signal
1
SW_DIP0, EMIFA - D8
2
SW_DIP1, EMIFA - D9
3
SW_DIP2, EMIFA - D10
4
SW_DIP3, EMIFA - D11
3.4.4 SW4, RESET Switch
Switch SW4 is a push button reset switch that will RESET the board.
3-22
OMAP-L137 EVM Technical Reference
Spectrum Digital, Inc
3.4.5 SW5, Mux Control Switch
Switch SW5 is a 6 position DIP switch that allows mux control signals to be pulled up to
+3.3 volts. This switch allows enabling on mux control signals. The six signals that can
be pulled up are shown in the table below. Alternatively the multiplexer control lines can
be enabled via daughter card connectors. Additional control lines are mapped to the
daughter card connectors. Refer to the expansion connector sections 3.2.16.1 to
3.2.16.2 for more information.
Table 24: SW5, Pull-Up Switch
Position
Signal
Mux_Ctl
SW5-1
SEL_ENETn_MCASP0
*1
SW5-2
SEL_EXP2_TIMER
*9
SW5-3
SEL_EXP2_UART1
*7
SW5-4
ON_BD_OFF_BD
U19 control for USB
SW5-5
EXP3_SEL_MEMD8-D11
* 13
SW5-6
EXP3_SEL_MEMD12-D15
* 14
The figure below shows the SW5 switch.
SW5
Raised
Actuator
CFG_EN
1 1
12
2 2
11
3 3
10
4 4
9
5 5
8
6 6
7
Figure 3-12, SW5, Pull-Up Switch
3.4.6 SW6, On/Off Switch
Switch SW6 is an on/off toggle switch that allows +5 volts from the J6 connector to be
applied to the board.
3-23
Spectrum Digital, Inc
3.5 Test Points
The EVM has 49 test points. All test points appear on the top of the board. The
following figure identifies the position of each test point. The next table lists each test
point and the signal appearing on that test point.
TP31
TP27
TP32
TP34
TP20
TP515
TP14
TP13
TP33
TP16
TP520
TP15
TP35-38
TP517
TP26
TP24
TP21
TP17
TP22
TP18
TP23
TP9-12
TP25
TP514
TP6
PTP4
PTP5
TP7
PTP8
TP8
PTP2
PTP10
TP40
TP39
TP4
PTP9
TP5
PTP7
PTP1
PTP3
PTP6
TP2
TP1
Figure 3-13, OMAP-L137 EVM, Test Points
3-24
OMAP-L137 EVM Technical Reference
Spectrum Digital, Inc
Table 25: OMAP-L137 EVM Test Points
Test Point
#
Signal
Test Point
#
Signal
TP1
TP2
U13, Pin 6,7,8, VBUS From J2
TP16
U41, Pin 6, P2LED0
DSK_3V3, U13, Pin 5, OCn
TP27
U44, Pin 28, INTn
TP4
U14, Pin 6,7,8, VBUS from J3
TP28
U44, Pin 20, VLDO1
TP5
DSK_3V3, U14, Pin 5, OCn
TP29
U44, Pin 18, VLDO2
TP6
U1, F7, RSV1
TP33
VCC_5V
TP7
U38, Pin 35, GPIO1
TP34
U54, Pin 5, ALT_CPU_1V2
TP8
U38, Pin 35, GPIO2
TP35
USB1, TAIN0
TP9
U38, Pin 45, MFP0
TP36
USB1, TAIN1
TP10
U38, Pin 46, MFP1
TP37
USB1, TAIN2
TP11
U38, Pin 47, MFP2
TP38
USB1, TAIN3
TP12
U38, Pin 48, MFP3
TP39
U38, Pin 27, MONO_LO+
TP13
U41, Pin 2, P1LED1
TP40
U38, Pin 28, MONO_LO-
TP14
U41, Pin 3, P1LED0
TP515
Factory Use
TP15
U41, Pin 5, P2LED1
TP517
Factory Use
TP520
Factory Use
There are 10 power test point pairs for major power domains on the EVM. These test
points provide a convenient mechanism to check the EVM’s multiple power supplies.
The table below shows the voltages for each test point and what the supply is used for.
Table 26: Power Test Points
Access
Test Points
Voltage
Shunt
Comments
TP17, TP18
DSK_3V3
0.025 ohms
All EVM 3.3V supplies except CPU
TP19, TP20
CPU_1V2
0.025 ohms
All CPU 1.2V supplies
TP21, TP22
CPU_3V3
0.025 ohms
All CPU 3.3V supplies
TP23, TP24
DSK_1V8
0.025 ohms
All EVM 1.8V supplies except CPU
TP25, TP26
CPU_1V8
0.025 ohms
All CPU 1.8V supplies
3-25
Spectrum Digital, Inc
Furthermore the EVM has ten 2 pin power test points for specific power domains on
the L137 device. These voltages are measured across a resistor which is why there are
two points to each test position. The square pad is the ground. The round pad
is the measured voltage. The figure below shows what a typical power test point looks
like.
Measured voltage
Pin 2
Ground
Pin 1
Figure 3-14, Power Test Point
The table below shows the power test points and the voltage measured.
Table 27: Power Test Points
3-26
Power
Test Point
Voltage
Measured
PTP1
CPU_3V3
PTP2
CPU_1V2
PTP3
CPU_1V2
PTP4
CPU_1V2
PTP5
CPU_1V2
PTP6
CPU_1V2
PTP7
CPU_3V3
PTP8
CPU_1V8
PTP9
CPU_3V3
PTP10
CPU_1V8
OMAP-L137 EVM Technical Reference
Appendix A
Schematics
This appendix contains the schematics for the OMAP-L137 EVM.
A-1
A-2
A
B
C
D
1
SH
2
B
D
REV
A
12
C
11
SH
22
21
SH
REV
B
32
B
A
31
SH
B
4
3
14
D
24
B
B
13
A
23
B
5
5
B
6
7
D
17
16
B
A
A
A
15
27
A
26
A
25
A
REVISION STATUS OF SHEETS
REV
B
REV
5
8
B
18
A
28
A
9
A
19
B
29
B
10
A
20
A
30
B
APPLICATION
NEXT ASSY
4
RLSE
MFG
QA
ENGR-MGR
ENGR
CHK
DWN
SHEET01
SHEET02
SHEET03
SHEET04
SHEET05
SHEET06
SHEET07
SHEET08
SHEET09
SHEET10
SHEET11
SHEET12
SHEET13
SHEET14
SHEET15
SHEET16
SHEET17
SHEET18
SHEET19
SHEET20
SHEET21
SHEET22
SHEET23
SHEET24
SHEET25
SHEET26
SHEET27
SHEET28
SHEET29
SHEET30
SHEET31
SHEET32
3
R.R.P.
R.R.P.
C.M.D.
R.R.P.
R.R.P.
T.W.K.
DATE
06/01/2008
DATE
06/01/2008
DATE
12/01/2006
DATE
06/01/2008
DATE
06/01/2008
DATE
06/01/2008
DATE
06/01/2008
3
TITLE PAGE
L137 McASP/ETHERNET
ETHERNET/McASP MUX
L137 SERIAL I/O
SPI MUXING
L137 USB 2.0 PORT
L137 USB 1.0 PORT
L137 EMIF A
L137 EMIF B
L137 JTAG/CLOCKS
L137 POWER PINS
L137 GROUND PINS
L137 DECOUPLING CAPACITORS
BOOT MODE SWITCHES
EMIFB SDRAM
SPI ROM
USER SWITCHES/LEDS
RS232 INTERFACE
SD/MMC MUXING
SD/MMC/MMC Plus CARD INTERFACE
JTAG CONNECTOR INTERFACE
AIC3106 AUDIO CODEC
AIC PHONE/AUDIO JACK
ETHERNET PHY/SWITCH
ETHERNET POWER
ETHER NET PORTS
EXPANSION CONNECTOR 1
EXPANSION CONNECTOR 2
EXPANSION CONNECTOR 3
POWER
POWER II
POWER IN
R.R.P.
-
SCHEMATIC CONTENTS
USED ON
4
2
2
Date:
Size:B
DWG NO
TITLE PAGE
1
511342-0001
OMAP-L137 EVM
Sheet
SPECTRUM DIGITAL INCORPORATED
Monday, Novem ber 24, 2008
Page Contents:
Title:
1
1
of
32
Revision:
D
A
B
C
D
Spectrum Digital, Inc
OMAP-L137 EVM Technical Reference
22
22
R12
R14
3,14,16,19,31 BOOT_DISABLE
A
R19
2K
2
27 EXP1_SEL_MCASP1
U4
SN74LVC1G32DCKRG4
DSK_3V3
T_AXR0[7]/RMII_MDIO_CLK
T_AXR0[8]/RMII_MDIO_D
R17
2K
2
1
22
R11
4
22
22
R9
R10
T_AXR0[0]/RMII_TXD[0]
T_AXR0[1]/RMII_TXD[1]
C3
.1uF
22
R8
T_AXR0[2]/RMII_TXEN
1
5
3 T_AXR0[7]/RMII_MDIO_CLK
3 T_AXR0[8]/RMII_MDIO_D
3 T_AHCLKR0/RMII_MHZ_50
22
22
R6
R7
D7
4
U5
SN74LVC1G00DCKRG4
4
C4
.1uF
13
14
17
18
21
22
1
3
4
7
8
11
AXR0_8/MDIO_D/GPIO3_8
AXR0_7/MDIO_CLK/GPIO3_7
Vcc
GND
2B1
2B2
2B3
2B4
2B5
1B1
1B2
1B3
1B4
1B5
12
15
16
19
20
23
2
5
6
9
10
24
3
3
SN74CBTLV3384PW
2OE
2A1
2A2
2A3
2A4
2A5
1OE
1A1
1A2
1A3
1A4
1A5
U3
AHCLKR0/RMII_MHZ_50CLK/GPIO2_14/BOOT_11
AXR0_0/RMII_TXD0/AFSR2/GPIO3_0
AXR0_1/RMII_TXD1/ACLKX2/GPIO3_1
AXR0_2/RMII_TXEN/AXR2_3/GPIO3_2
AXR0_4/RMII_RXD_0/AXR2_1/GPIO3_4
AXR0_5/RMII_RXD1/AFSX2/GPIO3_5
AXR0_3/RMII_CRS_DV/AXR2_2/GPIO3_3
AXR0_6/RMII_RXER/ACLKR2/GPIO3_6
AFSX0/GPIO2_13/BOOT_10
ACLKX0/ECAP0/APWM0/GPIO2_12
AFSR0/GPIO3_12
ACLKR0/ECAP1/APWM1/GPIO2_15
AMUTE0__RESETOUT
T_AHCLKX1
T_AFSX1
T_AXR1[0]
T_AXR1[5]
T_ACLKX1
RMII_MDIO_D B6
RMII_MDIO_CLK A6
A4
B8
C8
RMII_MHZ_50
D8
B7
C7
RMII_TXEN
RMII_RXD[0]
RMII_RXD[1]
RMII_CRS_DV A7
RMII_RXER
L4
D5
C5
C4
B4
RMII_TXD[0]
RMII_TXD[1]
DSK_3V3
22
R5
22
T_AXR0[4]/RMII_RXD[0]
T_AXR0[5]/RMII_RXD[1]
T_AHCLKR0/RMII_MHZ_50
4
AMUTE0
RPACK4-22
AFSX0
4
ACLKX0
3
AFSR0
2
ACLKR0
1
T_AXR0[3]/RMII_CRS_DV
RN2
5
6
7
8
22
R4
T_ACLKX0
T_AFSR0
T_ACLKR0
R3
2K
R2
NO-POP
R1
T_AXR0[6]/RMII_RXER
R13
NO-POP
DSK_3V3
3 T_AXR0[0]/RMII_TXD[0]
3 T_AXR0[1]/RMII_TXD[1]
3 T_AXR0[2]/RMII_TXEN
3 T_AXR0[4]/RMII_RXD[0]
3 T_AXR0[5]/RMII_RXD[1]
3 T_AXR0[3]/RMII_CRS_DV
3 T_AXR0[6]/RMII_RXER
6,27 T_ACLKX0
27 T_AFSR0
27 T_ACLKR0
T_AFSX0
27
T_AFSX0
DSK_3V3
T_AMUTE0
,4,5,8,16,19,27,31 BOOT_DISABLEn
B
C
D
5
5
3
T_AMUTE0
5
3
27
C2
0.1uF
EXP_ACLKX1 27
EXP_AXR1[5] 27
EXP_AXR1[0] 27
EXP_AFSX1 27
EXP_AHCLKX1 27
T_AIC_MCLK 22
T_AIC_WCLK 22
T_AIC_DOUT 22
T_AIC_DIN 22
T_AIC_BCLK 22
OMAPL137ZKB
A5
B5
K2
K3
K4
D4
L1
L2
L3
R15
22
0
R16
AHCLKX1
ACLKX1
AFSX1
AMUTE1
AHCLKR1
ACLKR1
AFSR1
AXR1[8]
AXR1[9]
AXR1[10]
AXR1[11]
AXR1[4]
AXR1[5]
AXR1[6]
AXR1[7]
N2
N1
M4
M3
M2
M1
N3
T4
AXR1[0]
AXR1[1]
AXR1[2]
AXR1[3]
T3
R2
P2
P1
4
3
2
1
4
3
2
1
4
3
2
1
4
3
2
1
4
3
2
1
T_AXR1[4]
T_AXR1[3]
VCC_3V3
GND
4A
3A
2A
1A
VCC
U2
S
OE
1B1
1B2
2B1
2B2
3B1
3B2
4B1
4B2
1
15
2
3
5
6
11
10
14
13
SN74CBTLV3257PW
8
12
9
7
4
16
28 SEL_EXP2_QEP1
3,4,5,8,16,19,27,31 BOOT_DISABLEn
0.1uF
C1
T_AHCLKX1
T_ACLKX1
T_AFSX1
T_AMUTE1
RPACK4-22
5
6
7
8
RPACK4-22
T_AXR1[8]
5
T_AXR1[9]
6
T_AXR1[10]
7
T_AXR1[11]
8
RPACK4-22
5 T_AHCLKR1
T_ACLKR1
6
T_AFSR1
7
8
RPACK4-22
T_AXR1[4]
5
T_AXR1[5]
6
T_AXR1[6]
7
T_AXR1[7]
8
RPACK4-22
T_AXR1[0]
5
T_AXR1[1]
6
T_AXR1[2]
7
T_AXR1[3]
8
T_AXR0_11/AXR2_0/GPIO3_11
RN6
RN5
RN4
RN3
RN1
27
27
27
27
27
27
27
27
27
2
Date:
Monday, Novem ber 24, 2008
1
Sheet
2
of
R18
2K
27
28
27
28
32
Revision:
A
EXP_AXR1[3]
EXP_EQEP1A
EXP_AXR1[4]
EXP_EQEP1B
T_AXR0_11/AXR2_0/GPIO3_11 27
T_AMUTE1
T_AHCLKR1 27
T_ACLKR1 27
T_AFSR1
27
T_AXR1[8]
T_AXR1[9]
T_AXR1[10]
T_AXR1[11]
T_AXR1[6]
T_AXR1[7]
T_AXR1[1]
T_AXR1[2]
1
MCLK: AHCLKX1 (drive this clock into McASP)
SPECTRUM DIGITAL INCORPORATED
BCLK: ACLKX1 (McASP will drive this into the AIC)
WCLK: AFSX1 (McASP will drive this into the AIC)
DIN: AXR1[5] (McASP)
OMAP-L137 EVM
Title:
DOUT: AXR1[0] (McASP)
Page Contents:
McASP/Ethernet MAC
Drive the MCLK into McASP1 Tx.
McASP generates the Tx bit and frame clocks.
Configure McASP such that the Rx section
Size: B
DWG NO
511342-0001
operates off of the Tx section clocks.
EXP_AHCLKX1
EXP_ACLKX1
T_AIC_BCLK
T_AIC_MCLK
DSK_3V3
AXR0_11/AXR2_0/GPIO3_11
AHCLKX0/AHCLKX2/USB_REFCLKIN/GPIO2_11
AHCLKX1/EPWM0B/GPIO3_14
ACLKX1/EPWM0A/GPIO3_15
AFSX1/EPWMSYNCI/EPWMSYNC0/GPIO4_10
AMUTE1/EHRPWMTZ/GPIO4_14
AHCLKR1/GPIO4_11
ACLKR1/ECAP2/APWM2/GPIO4_12
AFSR1/GPIO4_13
AXR1_8/EPWM1A/GPIO4_8
AXR1_9/GPIO4_9
AXR1_10__GPIO5_10
AXR1_11/GPIO5_11
AXR1_4/EQEP1B/GPIO4_4
AXR1_5/EPWM2B/GPIO4_5
AXR1_6/EPWM2A/GPIO4_6
AXR1_7/EPWM1B/GPIO4_7
AXR1_0/GPIO4_0
AXR1_1/GPIO4_1
AXR1_2/GPIO4_2
AXR1_3/EQEP1A/GPIO4_3
U1-6
2
A
B
C
D
Spectrum Digital, Inc
A-3
A
B
C
D
5
2,4,5,8,16,19,27,31 BOOT_DISABLEn
14,27 SEL_ENETn_MCASP0
2,14,16,19,31 BOOT_DISABLE
R21
360
R20
2K
2
1
2
1
DSK_3V3
4
C5
0.1uF
4
C6
0.1uF
4
2 T_AXR0[8]/RMII_MDIO_D
2 T_AXR0[7]/RMII_MDIO_CLK
2 T_AXR0[0]/RMII_TXD[0]
2 T_AXR0[1]/RMII_TXD[1]
2 T_AXR0[2]/RMII_TXEN
2 T_AXR0[3]/RMII_CRS_DV
2 T_AXR0[4]/RMII_RXD[0]
2 T_AXR0[5]/RMII_RXD[1]
2 T_AXR0[6]/RMII_RXER
2 T_AHCLKR0/RMII_MHZ_50
SN74LVC1G02DCKR
U7
4
SN74LVC1G08DCKRG4
U6
DSK_3V3
5
3
5
A-4
3
5
R23
360
T_AXR0[8]/RMII_MDIO_D
T_AXR0[7]/RMII_MDIO_CLK
T_AXR0[0]/RMII_TXD[0]
T_AXR0[1]/RMII_TXD[1]
T_AXR0[2]/RMII_TXEN
T_AXR0[3]/RMII_CRS_DV
T_AXR0[4]/RMII_RXD[0]
T_AXR0[5]/RMII_RXD[1]
T_AXR0[6]/RMII_RXER
T_AHCLKR0/RMII_MHZ_50
1A2
2A2
3A2
4A2
5A2
6A2
7A2
8A2
9A2
10A2
11A2
12A2
1A1
2A1
3A1
4A1
5A1
6A1
7A1
8A1
9A1
10A1
11A1
12A1
S0
S1
S2
U8
3
FUNCTION
GND.1
GND.2
GND.3
GND.4
1B2
2B2
3B2
4B2
5B2
6B2
7B2
8B2
9B2
10B2
11B2
12B2
1B1
2B1
3B1
4B1
5B1
6B1
7B1
8B1
9B1
10B1
11B1
12B1
VCC.1
8
19
38
49
53
51
48
46
44
42
40
37
35
33
31
29
54
52
50
47
45
43
41
39
36
34
32
30
17
EXP_AXR0[8]
EXP_AXR0[7]
EXP_AXR0[0]
EXP_AXR0[1]
EXP_AXR0[2]
EXP_AXR0[3]
EXP_AXR0[4]
EXP_AXR0[5]
EXP_AXR0[6]
EXP_AHCLKR0
B_RMII_TXD[0]
B_RMII_TXD[1]
B_RMII_TXEN
B_RMII_CRS_DV
B_RMII_RXD[0]
B_RMII_RXD[1]
B_RMII_RXER
B_RMII_MHZ_50
DSK_3V3
Disconnect
A1 port = B1 port
A1 port = B2 port
A2 port = B1 port
A2 port = B2 port
Disconnect
A1 port = B1 port/A2 port = B2 port
A1 port = B2 port/ A2 port = B1 port
SN74CBTLV16212DGGR
3
5
7
10
12
14
16
20
22
24
26
28
2
4
6
9
11
13
15
18
21
23
25
27
1
56
55
FUNCTION TABLE
INPUTS
INPUTS/OUTPUTS
S2 S1 S0
A1 A2
L L L
Z Z
L L H
B1 Z
L H L
B2 Z
L H H
Z B1
H L L
Z B2
H L H
Z Z
H H L
B1 B2
H H H
B2 B1
3
C7
0.1uF
27
27
27
27
27
27
27
2
EXP_AXR0[8] 27
EXP_AXR0[7] 27
EXP_AXR0[0]
EXP_AXR0[1]
EXP_AXR0[2]
EXP_AXR0[3]
EXP_AXR0[4]
EXP_AXR0[5]
EXP_AXR0[6]
EXP_AHCLKR0 27
2
DWG NO
1
511342-0001
Monday, Novem ber 24, 2008
Ethernet Muxes
OMAP-L137 EVM
Size: B
Date:
B_RMII_MHZ_50 24
Sheet
3
of
32
Revision:
B
B_RMII_MDIO_D 24
B_RMII_MDIO_CLK 24
B_RMII_TXD[0] 24
B_RMII_TXD[1] 24
B_RMII_TXEN 24
B_RMII_CRS_DV 24
B_RMII_RXD[0] 24
B_RMII_RXD[1] 24
SPECTRUM DIGITAL INCORPORATED
R22
1K
Page Contents:
Title:
C8
.01uF
1
A
B
C
D
Spectrum Digital, Inc
OMAP-L137 EVM Technical Reference
A
B
C
D
5
14,28 SEL_EXP2_UART1
5
2,3,5,8,16,19,27,31 BOOT_DISABLEn
5 T_SPI1_SCSn
R46
2K
R44
360
0.1uF
C9
7
4A
3A
2A
1A
VCC
22
1B1
1B2
2B1
2B2
3B1
3B2
4B1
4B2
U9
1
15
2
3
5
6
11
10
14
13
RPACK4-22
4
3
2
1
RPACK4-22
4
3
2
1
8
S
GND
OE
SN74CBTLV3257PW
12
9
4
16
VCC_3V3
22
AXR0_10
R39
R36
NO-POP
R35
20K
RN8
5
6
7
8
AXR0_9
R38
NO-POP
R37
20K
DSK_3V3
RN7
5
6
7
8
R27
DSK_3V3
T_SPI1_ENAn
R28
NO-POP
R24
20K
DSK_3V3
T_SPI1_SCSn
SPI1_SOMI
5 SPI1_SIMO
5
5 T_SPI1_ENAn
5,14 BOOTMODE[7]
5,14 SPI1_CLK
16 SPI0_SCSn
14,16 BOOTMODE[1]
14,16 SPI0_SIMO
14,16 BOOTMODE[0]
14,16 SPI0_SOMI
14,16 BOOTMODE[3]
14,16 SPI0_ENAn
14,16 BOOTMODE[2]
14,16 SPI0_CLK
4
T6
R4
P5
N5
P4
T5
R5
R6
P6
N4
4
OMAPL137ZKB
14,28 SEL_EXP2_TIMER
2,3,5,8,16,19,27,31 BOOT_DISABLEn
EXP_AXR0_9 27
EXP2_UART1_RXD 28
EXP_AXR0_10 27
EXP2_UART1_TXD 28
SPI1_CLK/EQEP1S/GPIO5_7/BOOT_7
SPI1_ENAn/UART2_RXD/GPIO5_12
SPI1_SOMI/I2C1_SCL/GPIO5_5/BOOT_5
SPI1_SIMO/I2C1_SDA/GPIO5_6/BOOT_6
SPI1_SCSn/UART2_TXD/GPIO5_13
SPI0_CLK/EQEP1I/GPIO5_2/BOOT_2
SPI0_ENAn/UART0_CTSn/EQEP0A/GPIO5_3/BOOT_3
SPI0_SOMI/EQEP0I/GPIO5_0/BOOT_0
SPI0_SIMO/EQEP0S/GPIO5_1/BOOT_1
SPI0_SCSn/UART0_RTSn/EQEP0B/GPIO5_4/BOOT_4
U1-9
3
3
R47
2K
R45
360
UART0_RXD_I2C0_SDA
UART0_TXD_I2C0_SCL
0.1uF
C10
VCC_3V3
GND
4A
3A
2A
1A
VCC
U10
S
OE
1B1
1B2
2B1
2B2
3B1
3B2
4B1
4B2
1
15
2
3
5
6
11
10
14
13
SN74CBTLV3257PW
8
12
9
7
4
16
2
UART0_RXD/I2C0_SDA/TM64P0_IN12/GPIO5_8/BOOT_8
UART0_TXD/I2C0_SCL/TM64P0_OUT12/GPIO5_9/BOOT_9
UART1_RXD/AXR0_9/GPIO3_9
UART1_TXD/AXR0_10/GPIO3_10
2
DSK_3V3
R40
2.2K
R41
2.2K
DSK_3V3
DWG NO
1
511342-0001
Monday, Novem ber 24, 2008
Serial I/O
OMAP-L137 EVM
Size: B
Date:
Sheet
4
of
32
Revision:
A
I2C0_SCL 16,22,24,27,28,30
EXP2_TMP64P0_OUT12 28
I2C0_SDA 16,22,24,27,28,30
EXP2_TMP64P0_IN12 28
R34
NO-POP
UART0_RXD_I2C0_SDA
UART0_TXD_I2C0_SCL
AXR0_9
AXR0_10
R26
20K
SPECTRUM DIGITAL INCORPORATED
R43
2.2K
DSK_3V3
R33
NO-POP
Page Contents:
Title:
R42
2.2K
DSK_3V3
22
22
R31
P3
R32
22
R30
R3
22
R29
D6
C6
R25
20K
DSK_3V3
1
A
B
C
D
Spectrum Digital, Inc
A-5
A-6
A
B
C
D
5
5
4 T_SPI1_ENAn
4 T_SPI1_SCSn
SPI1_SOMI
0.1uF
C11
R48
360
VCC_3V3
4
8
16
GND
4A
3A
2A
1A
VCC
U11
S
OE
1B1
1B2
2B1
2B2
3B1
3B2
4B1
4B2
1
15
2
3
5
6
11
10
14
13
10E
2OE
S0
S1
2B1
2B2
2B3
2B4
1B1
1B2
1B3
1B4
U12
74CBTLV3253
GND
VIN
2A
1A
28 SEL_SPI1_EXP2
27 SEL_SPI1_EXP1
1
15
14
2
10
11
12
13
6
5
4
3
SN74CBTLV3257PW
8
12
9
7
4
16
2,3,4,8,16,19,27,31 BOOT_DISABLEn
0.1uF
C12
9
T_SPI1_ENAn
VCC_3V3
7
T_SPI1_SCSn
28 SEL_SPI1_EXP2_B
2,3,4,8,16,19,27,31 BOOT_DISABLEn
4
4 SPI1_SIMO
4,14 SPI1_CLK
4
3
3
R50
2K
R51
2K
UART2_RXD 18
EXP1_SPI1_ENAn 27
EXP2_SPI1_ENAn 28
UART2_TXD 18
EXP1_SPI1_SCSn 27
EXP2_SPI1_SCSn 28
R49
2K
EXP1_SPI1_CLK 27
EXP2_SPI1_CLK 28
EXP1_SPI1_SIMO 27
EXP2_SPI1_SIMO 28
EXP_SPI1_SOMI 27
EXP2_SPI1_SOMI 28
2
2
1
511342-0001
Monday, Novem ber 24, 2008
DWG NO
Date:
SPI MUXING
Size: B
OMAP-L137 EVM
Sheet
SPECTRUM DIGITAL INCORPORATED
Page Contents:
Title:
1
5
of
32
Revision:
A
A
B
C
D
Spectrum Digital, Inc
OMAP-L137 EVM Technical Reference
A
B
C
CPU_1V8
CPU_3V3
0.02
0.02
2
2
1
1
1
1
R57
HEADER 2
2
PTP8
R55
HEADER 2
2
PTP7
5
3
3
C17
0.001uF
C21
0.001uF
L594
BLM18AG121SN1D
E2
NFM21PC474R1C3D
1
BLM18AG121SN1D
L593
4
C22
0.1uF
C19
0.01uF
C26
NO-POP
4
C27
.22uF
C24
1uF
C20
1uF
ON_BD_OFF_BD 8,14
C23
0.01uF
2
10uF
+C13
C3
F3
E3
H4
H5
OMAPL137ZKB
USB0_VDDA12
USB0_VSSA
USB0_VDDA18
USB0_VSSA33
USB0_VDDA33
U1-7
R56
10K
U13
GND
IN1
IN2
OUT1
OUT2
OUT3
3
3
D2
F4
G4
E4
R59
NO-POP
DSK_3V3
USB0_ID
USB0_DP
USB0_DM
D3
R53
10K
DSK_3V3
USB0_VBUS
TP2
VBUS_OCn2
8
7
6
USB0_DRVVBUS/GPIO4_15
R54
NO-POP
DSK_3V3
TPS2065D
1
2
3
EN
4
VCC_5V
OCn
5
DSK_3V3
5
3
1
C18
0.1uF
U59
74CBTLV1G125CRG4
C266
.1uF
E1
NFM21PC474R1C3D
1
2,27 T_ACLKX0
2
2
4
J1
C16
100uF
HEADER 2
1
2
R58
NO-POP
USB0_DP
USB0_DM
+
TP1
VBUS
C14
6.8uF
2
2
3
NC.2
IO1
5
2
R52
100K
L1
C264
0.1uF
TPD2E001DRL
IO2
C15
0.1uF
U55
Differential Pair
+
1
VCC
GND
4
GND
ID
D+
D-
VBUS
J2A
GND
DD+
SHIELD4
SHIELD3
VBUS-A
J2C
4
3
DWG NO
Monday, Novem ber 24, 2008
1
511342-0001
PRIMUS USB 2.0 INTERFACE
OMAP-L137 EVM
Size: B
Date:
Sheet
6
of
USB_SHIELD
USB_SHIELD
SPECTRUM DIGITAL INCORPORATED
1M
.1uF
FULL SIZE A CONNECTOR
R391
C270
USB_ SHIELD
USB_SHIELD
32
Revision:
B
USB-micro/A/B connector
USB-micro/A/B connector
4A
2A
3A
1A
2
1
MICRO A-B CONNECTOR
Page Contents:
Title:
SHIELD2
SHIELD1
FULL SIZE B CONNECTOR
GND
DD+
USB_SHIELD
5AB
4AB
3AB
2AB
1AB
J2B
ATTACH
USB-micro/A/B connector
4B
2B
3B
1B
THESE FOOTPRINTS ARE OVERLAYED
ONLY 1 OF 3 IS POPULATED AT 1 TIME
BLM21PG221SN1
1
SHIELD5
SHIELD6
SHIELD7
SHIELD8
MH1
MH2
5
6
7
8
9
10
D
5
A
B
C
D
Spectrum Digital, Inc
A-7
A
B
C
CPU_1V8
CPU_3V3
5
0.02
0.02
2
2
1
1
1
1
R64
HEADER 2
2
PTP10
R63
HEADER 2
2
PTP9
8 ON_BD_USB_OVC
8 ON_BD_USB_DRV
E3
NFM21PC474R1C3D
3
1
10uF
+C28
E4
NFM21PC474R1C3D
3
1
C35
0.001uF
C31
0.001uF
R62
10K
4
C36
0.1uF
C32
0.1uF
C37
0.01uF
C33
0.01uF
C38
1uF
C34
1uF
1
2
3
GND
IN1
IN2
U14
OUT1
OUT2
OUT3
TPS2065D
EN
4
D
OCn
5
VCC_5V
2
2
4
8
7
6
3
C2
C1
R61
10K
DSK_3V3
3
C29
100uF
OMAPL137ZKB
USB1_VDDA18
USB1_VDDA33
U1-8
VBUS_OCn1
TP5
+
TP4
VBUS
USB1_DM
USB1_DP
B3
A3
C30
0.1uF
R60
100K
R393
15K
R223
R375
R120
15K
2
24.9 1%
24.9 1%
Differential Route 90 ohms
2
NC.2
IO1
U56
TPD2E001DRL
5
DWG NO
Monday, Novem ber 24, 2008
1
511342-0001
USB 1.0 HOST INTERFACE
OMAP-L137 EVM
Size: B
Date:
R392
C271
S2
VBUS
DD+
GND
S1
J3
Sheet
SPECTRUM DIGITAL INCORPORATED
IO2
C263
0.1uF
5
1
2
3
4
6
7
of
1M
.1uF
32
Revision:
A
USB-A connector
USB1_SH
USB1_SH
1
Page Contents:
Title:
2
3
USB_DM
USB_DP
1
VCC
GND
A-8
4
5
A
B
C
D
Spectrum Digital, Inc
OMAP-L137 EVM Technical Reference
A
B
C
D
0.1uF
C42
0.1uF
C40
19
19
19
19
19
19
19
19
9
12
EMIFA_D10
EMIFA_D11
GND
4A
3A
2A
1A
VCC
S
OE
1B1
1B2
2B1
2B2
3B1
3B2
4B1
4B2
U16
1
15
2
3
5
6
11
10
14
13
EMIFA_D8
EMIFA_D9
EMIFA_D10
EMIFA_D11
EMIFA_D12
EMIFA_D13
EMIFA_D14
EMIFA_D15
R71
NO-POP
EMIFA_D0
EMIFA_D1
EMIFA_D2
EMIFA_D3
EMIFA_D4
EMIFA_D5
EMIFA_D6
EMIFA_D7
R68
NO-POP
RN12
9
EMIFA_D14
GND
4A
3A
2A
1A
VCC
S
OE
1B1
1B2
2B1
2B2
3B1
3B2
4B1
4B2
U18
14,29 EXP3_SEL_MEMD12_D15
5
1
15
2
3
5
6
11
10
14
13
SN74CBTLV3257PW
8
12
7
EMIFA_D13
EMIFA_D15
4
EMIFA_D12
16
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
RN10
VCC_3V3
14,29 EXP3_SEL_MEMD8_D11
SN74CBTLV3257PW
8
7
4
16
R70
20K
R67
20K
EMIFA_D9
EMIFA_D8
VCC_3V3
DC_3V3
EMIFA_D0
EMIFA_D1
EMIFA_D2
EMIFA_D3
EMIFA_D4
EMIFA_D5
EMIFA_D6
EMIFA_D7
DC_3V3
R66
R65
10K
DSK_3V3
N6
2K
R88
USER_LED1 17
EXP_EMIFA_D12
USER_LED2 17
EXP_EMIFA_D13
USER_LED3 17
EXP_EMIFA_D14
USER_LED4 17
EXP_EMIFA_D15
R83
2K
29
29
29
29
N12
T14
R14
P16
P14
N16
N14
M16
T13
R15
R13
P15
P13
N15
N13
M15
USER_SW1 17
EXP_EMIFA_D8
USER_SW2 17
EXP_EMIFA_D9
USER_SW3 17
EXP_EMIFA_D10
USER_SW4 17
EXP_EMIFA_D11
RPACK8-22
16
15
14
13
12
11
10
9
16
15
14
13
12
11
10
9
RPACK8-22
22
0.1uF
C43
29
29
29
EMIFA_WEn_DQM0
4
VCC_3V3
EMIFA_CS0n
EMIFA_CLK
EMIFA_OEn
EMIFA_WEn
EMIFA_WEn_DQM1
0.1uF
VCC_3V3
GND
4A
3A
2A
1A
VCC
S
OE
1B1
1B2
2B1
2B2
3B1
3B2
4B1
4B2
U17
1
15
2
3
5
6
11
10
14
13
8
16
9
7
S0
S1
10E
2OE
2B1
2B2
2B3
2B4
1B1
1B2
1B3
1B4
74CBTLV3253
GND
VIN
2A
1A
U19
14
2
1
15
10
11
12
13
6
5
4
3
29 EXP3_SEL_MEM
SN74CBTLV3257PW
8
12
9
7
4
16
OMAPL137ZKB
EMA_D8/UHPI_HD8/LCD_D8/GPIO0_8
EMA_D9/UHPI_HD9/LCD_D9/GPIO0_9
EMA_D10/UHPI_HD_10/LCD_D10/GPIO0_10
EMA_D11/UHPI_HD11/LCD_D11/GPIO0_11
EMA_D12/UHPI_HD12/LCD_D12/GPIO0_12
EMA_D13/UHPI_HD13/LCD_D13/GPIO0_13
EMA_D14/UHPI_HD14/LCD_D14/GPIO0_14
EMA_D15/UHPI_HD15/LCD_D15/GPIO0_15
EMA_D0/MMCSD_DAT0/UHPI_HD0/GPIO00/BOOT_12
EMA_D1/MMCSD_DAT1/UHPI_HD1/GPIO0_1
EMA_D2/MMCSD_DAT2/UHPI_HD2/GPIO0_2
EMA_D3/MMCSD_DAT3/UHPI_HD3/GPIO0_3
EMA_D4/MMCSD_DAT4/UHPI_HD4/GPIO0_4
EMA_D5/MMCSD_DAT5/UHPI_HD5/GPIO0_5
EMA_D6/MMCSD_DAT6/UHPI_HD6/GPIO0_6
EMA_D7/MMCSD_DAT7/UHPI_HD7/GPIO0_7/BOOT_13
C41
29
U1-3
EMA_WAIT0/UHPIHRDYn/GPIO2_10
4
3
EXP_EMIFA_CS0n 29
ON_BD_USB_OVC 7
EXP3_EMIFA_CLK 29
ON_BD_USB_DRV 7
AHCLKR2 27
R84
2K
R384
2K
GND
4A
3A
2A
1A
VCC
S
OE
1B1
1B2
2B1
2B2
3B1
3B2
4B1
4B2
SN74CBTLV3257PW
8
12
9
7
4
16
U58
M14
P12
M13
R7
T12
R12
T8
P7
T7
L16
N7
P10
N10
T11
R11
N8
P11
N11
T9
R9
P9
N9
T10
R10
R8
P8
1
15
2
3
5
6
11
10
14
13
R89
2K
2
2
EXP3_SEL_MEM_CTL2 29
29 EXP3_SEL_MEM_CTL
ON_BD_OFF_BD 6,14
R152
360
EMIFA_CS3n
C265
0.1uF
VCC_3V3
EMA_WE_DQM0n/UHPI_HINTn/AXR0_15/GPIO2_9
EMA_WE_DQM1n/UHPI_HDS2n/AXR0_14/GPIO2_8
EMA_WE/UHPI_HRWn/AXR0_12/GPIO2_3/BOOT_14
EMA_OEn/UHPI_HDS1n/AXR0_13/GPIO2_7
EMA_SDCKE/GPIO2_0
EMA_CLK/OBSCLK/AHCLKR2/GPIO1_15
EMA_CS0n/UHPIHASn/GPIO2_4
EMA_CS2n/UHPI_HCSn/GPIO2_5/BOOT_15
EMA_CS3n/AMUTE2/GPIO2_6
EMA_CASn/EMA_CS4n/GPIO2_1
EMA_RASn/EMA_CS5n/GPIO2_2
EMA_A6/LCD_D1/GPIO1_6
EMA_A7/LCD_D0/GPIO1_7
EMA_A8/LCD_PCLK/GPIO1_8
EMA_A9/LCD_HSYNC/GPIO1_9
EMA_A10/LCD_VSYNC/GPIO1_10
EMA_A11/LCD_ACn/ENB_CSn/GPIO1_11
EMA_A12/LCD_MCLK/GPIO1_12
EMA_A0/LCD_D7/GPIO1_0
EMA_A1/MMCSD_CLK/UHPI_HCNTL0/GPIO1_1
EMA_A2/MMCSD_CMD/UHPI_HCNTL1/GPIO1_2
EMA_A3/LCD_D6/GPIO1_3
EMA_A4/LCD_D3/GPIO1_4
EMA_A5/LCD_D2/GPIO1_5
EMA_BA0/LCD_D4/GPIO1_14
EMA_BA1/LCD_D5/UHPI_HHWIL/GPIO1_13
EXP1_AXR0_15 27
EXP3_EMIFA_WEn_DQM0 29
EXP1_AXR0_14 27
EXP3_EMIFA_WEn_DQM1 29
EXP1_AXR0_12 27
EXP3_EMIFA_WEn 29
EXP1_AXR0_13 27
EXP3_EMIFA_OEn 29
3
R72
R86
R87
22
R74
NO-POP
R73
20K
DC_3V3
R69
Date:
Size: B
DWG NO
CPU EMIF A
R85
NO-POP
1
Sheet
8
of
EMIFA_SDCKE 29
EMIFA_CS4n 19
EMIFA_CS5n 19
R81
20K
DC_3V3
511342-0001
OMAP-L137 EVM
32
Revision:
B
EMIFA_CS2n 29
U15
SN74CBTLV1G125
4
29
29
29
29
29
29
29
C39
.1uF
EMIFA_A6
EMIFA_A7
EMIFA_A8
EMIFA_A9
EMIFA_A10
EMIFA_A11
EMIFA_A12
EMIFA_BA0 29
EMIFA_BA1 29
EMIFA_A0 29
EMIFA_A1 19
EMIFA_A2 19
EMIFA_A3 29
EMIFA_A4 29
EMIFA_A5 29
SPECTRUM DIGITAL INCORPORATED
EMIFA_WEn
EMIFA_OEn
EMIFA_CLK
EMIFA_CS3n
Monday, Novem ber 24, 2008
Page Contents:
Title:
22
22
22
22
22
22
22
EMIFA_WEn_DQM0
EMIFA_WEn_DQM1
EXP1_AMUTE2 27
EXP3_EMIFA_CS3n 29
22
22
R82
R80
R79
R78
R75
R76
R77
2
1
DSK_3V3
EMIFA_CS0n
2,3,4,5,16,19,27,31 BOOT_DISABLEn
22
RPACK8-22
9
10
11
12
13
14
15
16
RPACK8-22
9
10
11
12
13
14
15
16
8
7
6
5
4
3
2
1
RN11
8
7
6
5
4
3
2
1
RN9
5
1
3
29 EMIFA_WAIT0
5
A
B
C
D
Spectrum Digital, Inc
A-9
A-10
A
B
C
D
EMIFB_D0
EMIFB_D1
EMIFB_D2
EMIFB_D3
EMIFB_D4
EMIFB_D5
EMIFB_D6
EMIFB_D7
15 EMIFB_D24
15 EMIFB_D25
15 EMIFB_D26
15 EMIFB_D27
15 EMIFB_D28
15 EMIFB_D29
15 EMIFB_D30
15 EMIFB_D31
15 EMIFB_D16
15 EMIFB_D17
15 EMIFB_D18
15 EMIFB_D19
15 EMIFB_D20
15 EMIFB_D21
15 EMIFB_D22
15 EMIFB_D23
15 EMIFB_D8
15 EMIFB_D9
15 EMIFB_D10
15 EMIFB_D11
15 EMIFB_D12
15 EMIFB_D13
15 EMIFB_D14
15 EMIFB_D15
15
15
15
15
15
15
15
15
5
5
EMIFB_D24
EMIFB_D25
EMIFB_D26
EMIFB_D27
EMIFB_D28
EMIFB_D29
EMIFB_D30
EMIFB_D31
1
2
3
4
5
6
7
8
RN18
16
15
14
13
12
11
10
9
RPACK8-10
16
15
14
13
12
11
10
9
RPACK8-10
RN17
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
RN15
EMIFB_D8
EMIFB_D9
EMIFB_D10
EMIFB_D11
EMIFB_D12
EMIFB_D13
EMIFB_D14
EMIFB_D15
EMIFB_D16
EMIFB_D17
EMIFB_D18
EMIFB_D19
EMIFB_D20
EMIFB_D21
EMIFB_D22
EMIFB_D23
RPACK8-10
16
15
14
13
12
11
10
9
1
2
3
4
5
6
7
8
RPACK8-10
16
15
14
13
12
11
10
9
EMIFB_D0
EMIFB_D1
EMIFB_D2
EMIFB_D3
EMIFB_D4
EMIFB_D5
EMIFB_D6
EMIFB_D7
RN13
4
4
A13
B14
A14
E14
E15
F14
F15
G14
G15
H14
H15
J14
K13
K16
L14
L15
C16
D13
D14
D15
D16
E13
E16
F13
F16
G13
G16
H13
H16
J13
J15
J16
OMAPL137ZKB
EMB_D24
EMB_D25
EMB_D26
EMB_D27
EMB_D28
EMB_D29
EMB_D30
EMB_D31
EMB_D16
EMB_D17
EMB_D18
EMB_D19
EMB_D20
EMB_D21
EMB_D22
EMB_D23
EMB_D8/GPIO6_8
EMB_D9/GPIO6_9
EMB_D10/GPIO6_10
EMB_D11/GPIO6_11
EMB_D12/GPIO6_12
EMB_D13/GPIO6_13
EMB_D14/GPIO6_14
EMB_D15/GPIO6_15
EMB_D0/GPIO6_0
EMB_D1/GPIO6_1
EMB_D2/GPIO6_2
EMB_D3/GPIO6_3
EMB_D4/GPIO6_4
EMB_D5/GPIO6_5
EMB_D6/GPIO6_6
EMB_D7/GPIO6_7
U1-4
3
EMB_WEn
EMB_WE_DQM3n
EMB_WE_DQM2n
EMB_WE_DQM1n/GPIO5_14
EMB_WE_DQM0n/GPIO5_15
EMB_RASn
EMB_CASn
EMB_CS0n
EMB_CLK
EMB_SDCKE
EMB_A8/GPIO7_10
EMB_A9/GPIO7_11
EMB_A10/GPIO7_12
EMB_A11/GPIO7_13
EMB_A12/GPIO3_13
EMB_A0/GPIO7_2
EMB_A1/GPIO7_3
EMB_A2/GPIO7_4
EMB_A3/GPIO7_5
EMB_A4/GPIO7_6
EMB_A5/GPIO7_7
EMB_A6/GPIO7_8
EMB_A7/GPIO7_9
EMB_BA0/GPIO7_1
EMB_BA1/GPIO7_0
3
CPU_EMIFB_A0
CPU_EMIFB_A1
CPU_EMIFB_A2
CPU_EMIFB_A3
CPU_EMIFB_A4
CPU_EMIFB_A5
CPU_EMIFB_A6
CPU_EMIFB_A7
CPU_EMIFB_A8
CPU_EMIFB_A9
CPU_EMIFB_A10
CPU_EMIFB_A11
CPU_EMIFB_A12
D10
C10
B10
A10
D11
C11
B11
A11
D12
C12
A9
B12
B15
2
22
22
22
22
22
R95
R96
R97
R98
R99
B13
A12
K15
22
R94
A8
C15
22
R93
L13
K14
22
22
22
R92
R91
R90
16
15
14
13
12
11
10
9
R629
10K
1
511342-0001
Monday, Novem ber 24, 2008
DWG NO
OMAP-L137 EVM
CPU EMIF-B
Date:
R630
10K
DSK_3V3
R625
10K
Sheet
9
of
32
Revision:
A
EMIFB_WEn 15
EMIFB_WEn_DQM3 15
EMIFB_WEn_DQM2 15
EMIFB_WEn_DQM1 15
EMIFB_WEn_DQM0 15
EMIFB_RASn 15
EMIFB_CASn 15
EMIFB_CS0n 15
EMIFB_CLK 15
EMIFB_SDCKE 15
EMIFB_A10 15
EMIFB_A7 15
EMIFB_A6 15
EMIFB_A11 15
EMIFB_A12 15
EMIFB_A9 15
EMIFB_A8 15
EMIFB_A5 15
EMIFB_A4 15
EMIFB_A0 15
EMIFB_A1 15
EMIFB_A2 15
EMIFB_A3 15
EMIFB_BA0 15
EMIFB_BA1 15
1
SPECTRUM DIGITAL INCORPORATED
R628
10K
R624
10K
DSK_3V3
EMIFB_A10
EMIFB_A7
EMIFB_A6
EMIFB_A11
EMIFB_A12
EMIFB_A9
EMIFB_A8
Size: B
R627
10K
R623
10K
RN16
1
2
3
4
5
6
7
8
RN14
EMIFB_A5
8
EMIFB_A4
7
EMIFB_A0
6
EMIFB_A1
5
EMIFB_A2
4
EMIFB_A3
3
EMIFB_BA0
2
EMIFB_BA1
1
Page Contents:
Title:
R626
10K
R622
10K
RPACK8-22
R621
10K
CPU_EMIFB_A10
CPU_EMIFB_A7
CPU_EMIFB_A6
CPU_EMIFB_A11
CPU_EMIFB_A12
CPU_EMIFB_A9
CPU_EMIFB_A8
RPACK8-22
CPU_EMIFB_A5
9
CPU_EMIFB_A4
10
CPU_EMIFB_A0
11
CPU_EMIFB_A1
12
CPU_EMIFB_A2
13
CPU_EMIFB_A3
14
CPU_EMIFB_BA0
15
CPU_EMIFB_BA1
16
D9
C14
C13
CPU_EMIFB_BA0
CPU_EMIFB_BA1
C9
B9
2
A
B
C
D
Spectrum Digital, Inc
OMAP-L137 EVM Technical Reference
A
B
C
D
DSP_TDI
21 DSP_RTCK
21 DSP_EMU0
21 DSP_EMU1
21 DSP_TCK
21 DSP_TRST#
21 DSP_TDO
21
21 DSP_TMS
5
R112
14,31 CPU_RESET
U20
4
SN74LVC1G32
33
C51
0.1uF
22pF
C50
R107
100
DSP_TRST#
DSP_TDO
DSP_TDI
DSP_TMS
DSK_3V3
5
3
5
2
1
R102
NO-POP
R101
10K
DSK_3V3
4
4
DSP_EMU1
4
5
6
CASD20TB
R113
2.2K
1
2
3
R110
10K
SW1
R111
10K
OSCVSS
OSCOUT
OSCIN
RTC_VSS
RTC_XO
RTC_XI
RTC_CVDD
R114
2.2K
DSP_EMU0
OMAPL137ZKB
EMU_0/GPIO7_15
RTCK/GPIO7_14
TCK
TRST
TDO
TDI
TMS
RESET
DSK_3V3
J5
K1
H3
J4
J3
J2
J1
G3
U1-5
E2
F1
F2
G2
H2
H1
G1
3
3
R106
NO-POP
R103
NO-POP
R108
R104
18 pF
18 pF
18 pF
0
0
C49
C48
C47
C46
C45
0.01uF
Y1
32KHZ
18 pF
Y2
24MHz
C44
0.1uF
R109
SD Gold
Panasonic
supercap
2
2
C607
.33F
3
R105
+
D21
MMBD4148
2
NO-POP
NO-POP
1 0.02
Date:
Size: B
1
DWG NO
1
511342-0001
CPU JTAG/CLOCKS
OMAP-L137 EVM
Sheet
SPECTRUM DIGITAL INCORPORATED
Monday, Novem ber 24, 2008
Page Contents:
Title:
R100
CPU_RTC_1V8
10 o f
32
Revision:
A
A
B
C
D
Spectrum Digital, Inc
A-11
A-12
A
B
C
D
CPU_3V3
5
5
2
0.025
1
1
CPU_1V2
HEADER 2
2
PTP1
R115
C57
0.1uF
4
4
C58
0.01uF
DVDD
B1
R1
R16
M5
M8
M9
M12
L5
L11
L12
K5
K12
G5
G12
F5
F11
F12
E5
E8
E9
E12
B16
RSV2
DVDD.1
DVDD.2
DVDD.3
DVDD.4
DVDD.5
DVDD.6
DVDD.7
DVDD.8
DVDD.9
DVDD.10
DVDD.11
DVDD.12
DVDD.13
DVDD.14
DVDD.15
DVDD.16
DVDD.17
DVDD.18
DVDD.19
DVDD.20
DVDD.21
3
OMAPL137ZKB
RSV1
PLL0_VSSA
PLL0_VDDA
RVDD.1
RVDD.2
CVDD.1
CVDD.2
CVDD.3
CVDD.4
CVDD.5
CVDD.6
CVDD.7
CVDD.8
CVDD.9
CVDD.10
CVDD.11
CVDD.12
CVDD.13
CVDD.14
CVDD.15
CVDD.16
CVDD.17
CVDD.18
U1-2
3
F7
E1
D1
H6
H12
L6
K6
K7
K10
K11
J6
J7
J10
J11
J12
H7
H10
H11
G6
G7
G10
G11
F6
CVDD
1
C52
1uF
TP6
TEST POINT
C56
0.1uF
C53
0.01uF
2
2
L24
2
2
2
1
1
2
DWG NO
Monday, Novem ber 24, 2008
1
511342-0001
CPU POWER PINS
OMAP-L137 EVM
Sheet
11 o f
ALT_CPU_1V2
SPECTRUM DIGITAL INCORPORATED
2
R119
PTP3
CPU_1V2
CPU_1V2
ALT_CPU_1V2
NO-POP
R116
0.02
HEADER 2
1
PTP4
Size: B
Date:
2
HEADER 2
0.02
1
2
HEADER 2
1
PTP5
Page Contents:
Title:
BLMG1P500SPT
L25
BLMG1P500SPT
C55
0.001uF
C272
0.01uF
C54
0.1uF
R118
R117
1
2
HEADER 2
1
PTP6
0.025
1
1
32
Revision:
C
A
B
C
D
Spectrum Digital, Inc
OMAP-L137 EVM Technical Reference
A
B
C
D
5
5
4
4
H8
H9
G8
G9
F8
F9
F10
E6
E7
E10
E11
B2
A1
A2
A15
A16
OMAPL137ZKB
VSS.1
VSS.2
VSS.3
VSS.4
VSS.5
VSS.6
VSS.7
VSS.8
VSS.9
VSS.10
VSS.11
VSS.12
VSS.13
VSS.14
VSS.15
VSS.16
U1-1
VSS.17
VSS.18
VSS.19
VSS.20
VSS.21
VSS.22
VSS.23
VSS.24
VSS.25
VSS.26
VSS.27
VSS.28
VSS.29
VSS.30
VSS.31
VSS.32
K8
K9
J8
J9
L7
L8
L9
L10
M6
M7
M10
M11
T1
T2
T15
T16
3
3
2
2
Monday, Novem ber 24, 2008
1
511342-0001
DWG NO
Date:
L137 GROUND PINS
Size: B
OMAP-L137 EVM
Sheet
SPECTRUM DIGITAL INCORPORATED
Page Contents:
Title:
1
12 o f
32
Revision:
A
A
B
C
D
Spectrum Digital, Inc
A-13
A-14
A
B
C
D
5
5
C98
0.1uF
DVDD
C88
0.1uF
DVDD
C78
0.1uF
DVDD
C73
0.1uF
CVDD
C59
0.1uF
CVDD
C99
0.1uF
C89
0.1uF
C79
0.1uF
C74
0.1uF
C60
0.1uF
C90
0.1uF
C80
0.1uF
C75
0.1uF
C61
0.1uF
4
4
C91
0.1uF
C81
0.1uF
C76
0.1uF
C62
0.1uF
C92
0.1uF
C82
0.1uF
C77
0.1uF
C63
0.1uF
C93
0.1uF
C83
0.1uF
C64
0.1uF
+
C100
33uF
C94
0.1uF
C84
0.1uF
C69
33uF
DVDD
+
CVDD
C65
0.1uF
+
+
3
C101
33uF
C95
0.1uF
C85
0.1uF
C70
33uF
C66
0.1uF
3
+
+
C102
33uF
C96
0.1uF
C86
0.1uF
C71
33uF
C67
0.1uF
+
+
C103
33uF
C97
0.1uF
C87
0.1uF
C72
33uF
C68
0.1uF
2
2
Monday, Novem ber 24, 2008
1
511342-0001
Sheet
DWG NO
Date:
L137 DECOUPLING CAPACITORS
Size: B
OMAP-L137 EVM
SPECTRUM DIGITAL INCORPORATED
Page Contents:
Title:
1
13 o f
32
Revision:
A
A
B
C
D
Spectrum Digital, Inc
OMAP-L137 EVM Technical Reference
A
B
C
5
4
10,31 CPU_RESET
2,3,16,19,31 BOOT_DISABLE
R121
R122
R123
R125
R126
DSK_3V3
DSK_3V3
R376
R377
R378
R379
R385
R386
C274
0.1uF
2K
2K
2K
2K
2K
2
1
100
100
100
100
100
100
SW2
12
11
10
9
8
7
1
2
3
4
5
6
6
5
4
3
2
1
12
11
10
9
8
7
4
DIP_SWITCH_6
SW5
1G08
U61
DSK_3V3
DIP_SWITCH_6
6
5
4
3
3
SEL_ENETn_MCASP0 3,27
SEL_EXP2_TIMER 4,28
SEL_EXP2_UART1 4,28
ON_BD_OFF_BD 6,8
EXP3_SEL_MEMD8_D11 8,29
EXP3_SEL_MEMD12_D15 8,29
R127
20K
2
R128
20K
1
R129
20K
1
2
3
4
5
6
R124
20K
3
R130
20K
4
5
3
C273
0.1uF
2
2
4
BOOTMODE8
BOOTMODE9
BOOTMODE10
BOOTMODE11
BOOTMODE12
BOOTMODE13
BOOTMODE14
BOOTMODE15
-
PU
PU
PD
PD
PU
PU
PU
PU
IMPLEMENTED
IMPLEMENTED
IMPLEMENTED
IMPLEMENTED
IMPLEMENTED
4,5
4,16
4,16
4,16
4,16
DWG NO
1
511342-0001
Monday, Novem ber 24, 2008
BOOT MODES
Size: B
OMAP-L137 EVM
Page Contents:
Date:
1
Sheet
SPECTRUM DIGITAL INCORPORATED
INTERNAL
INTERNAL
INTERNAL
INTERNAL
INTERNAL
INTERNAL
INTERNAL
INTERNAL
PD
PD
PD
PU
PU
PU
PU
PD
BOOTMODE[7]
BOOTMODE[2]
BOOTMODE[1]
BOOTMODE[0]
BOOTMODE[3]
INTERNAL
INTERNAL
INTERNAL
INTERNAL
INTERNAL
INTERNAL
INTERNAL
INTERNAL
Title:
-
-
SN74LVC1G125
U60
BOOTMODE0
BOOTMODE1
BOOTMODE2
BOOTMODE3
BOOTMODE4
BOOTMODE5
BOOTMODE6
BOOTMODE7
2
DSK_3V3
5
1
3
D
5
14 o f
32
Revision:
D
DONE
DONE
DONE
DONE
DONE
DONE
DONE
DONE
DONE
DONE
DONE
A
B
C
D
Spectrum Digital, Inc
A-15
A-16
A
B
C
D
9 EMIFB_CLK
9 EMIFB_CS0n
9 EMIFB_SDCKE
9 EMIFB_WEn
9 EMIFB_CASn
9 EMIFB_RASn
9 EMIFB_WEn_DQM1
9 EMIFB_WEn_DQM0
9 EMIFB_BA0
9 EMIFB_BA1
9 EMIFB_A0
9 EMIFB_A1
9 EMIFB_A2
9 EMIFB_A3
9 EMIFB_A4
9 EMIFB_A5
9 EMIFB_A6
9 EMIFB_A7
9 EMIFB_A8
9 EMIFB_A9
9 EMIFB_A10
9 EMIFB_A11
9 EMIFB_A12
5
5
C117
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
C108
C116
C107
IS42S16160B-6BL
VDD.1
VDD.2
VDD.3
VDDQ.1
VDDQ.2
VDDQ.3
VDDQ.4
CLK
CS
CKE
WE
CAS
RAS
DQMH
DQML
BA0
BA1
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
U21
C106
A9
E7
J9
A7
B3
C7
D3
F2
EMIFB_CLK
DSK_3V3
G9
F3
F9
F7
F8
EMIFB_SDCKE
EMIFB_WEn
EMIFB_CASn
EMIFB_RASn
EMIFB_CS0n
F1
E8
G7
G8
EMIFB_BA0
EMIFB_BA1
EMIFB_WEn_DQM1
EMIFB_WEn_DQM0
H7
H8
J8
J7
J3
J2
H3
H2
H1
G3
H9
G2
G1
EMIFB_A0
EMIFB_A1
EMIFB_A2
EMIFB_A3
EMIFB_A4
EMIFB_A5
EMIFB_A6
EMIFB_A7
EMIFB_A8
EMIFB_A9
EMIFB_A10
EMIFB_A11
EMIFB_A12
0.1uF
C118
0.1uF
C109
4
A1
E3
J1
A3
B7
C3
D7
E2
E9
D8
D9
C8
C9
B8
B9
A8
A2
B1
B2
C1
C2
D1
D2
E1
22 uF
+ C114
22 uF
+ C104
VSS.1
VSS.2
VSS.3
VSSQ.1
VSSQ.2
VSSQ.3
VSSQ.4
NC
DQ7
DQ6
DQ5
DQ4
DQ3
DQ2
DQ1
DQ0
DQ15
DQ14
DQ13
DQ12
DQ11
DQ10
DQ9
DQ8
4
16
15
14
13
12
11
10
9
EMIFB_D15
EMIFB_D14
EMIFB_D13
EMIFB_D12
EMIFB_D11
EMIFB_D10
EMIFB_D9
EMIFB_D8
9
9
9
9
9
9
9
9
EMIFB_D7 9
EMIFB_D6 9
EMIFB_D5 9
EMIFB_D4 9
EMIFB_D3 9
EMIFB_D2 9
EMIFB_D1 9
EMIFB_D0 9
9 EMIFB_WEn_DQM3
9 EMIFB_WEn_DQM2
RPACK8-10
RN21
1
2
3
4
5
6
7
8
RPACK8-10
16
15
14
13
12
11
10
9
1
2
3
4
5
6
7
8
RN19
3
3
0.1uF
C110
DSK_3V3
EMIFB_CLK
EMIFB_CS0n
EMIFB_SDCKE
EMIFB_WEn
EMIFB_CASn
EMIFB_RASn
EMIFB_WEn_DQM3
EMIFB_WEn_DQM2
EMIFB_BA0
EMIFB_BA1
EMIFB_A0
EMIFB_A1
EMIFB_A2
EMIFB_A3
EMIFB_A4
EMIFB_A5
EMIFB_A6
EMIFB_A7
EMIFB_A8
EMIFB_A9
EMIFB_A10
EMIFB_A11
EMIFB_A12
A9
E7
J9
A7
B3
C7
D3
F2
G9
F3
F9
F7
F8
F1
E8
G7
G8
H7
H8
J8
J7
J3
J2
H3
H2
H1
G3
H9
G2
G1
0.1uF
C119
0.1uF
C111
0.1uF
C120
0.1uF
C112
IS42S16160B-6BL
VDD.1
VDD.2
VDD.3
VDDQ.1
VDDQ.2
VDDQ.3
VDDQ.4
CLK
CS
CKE
WE
CAS
RAS
DQMH
DQML
BA0
BA1
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
U22
2
0.1uF
C121
0.1uF
C113
A1
E3
J1
A3
B7
C3
D7
E2
E9
D8
D9
C8
C9
B8
B9
A8
A2
B1
B2
C1
C2
D1
D2
E1
RN20
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
RPACK8-10
EMIFB_D31
EMIFB_D30
EMIFB_D29
EMIFB_D28
EMIFB_D27
EMIFB_D26
EMIFB_D25
EMIFB_D24
DWG NO
Monday, Novem ber 24, 2008
1
511342-0001
SDRAM - EMIF B
OMAP-L137 EVM
Size: B
Date:
EMIFB_D23
EMIFB_D21
EMIFB_D22
EMIFB_D19
EMIFB_D20
EMIFB_D17
EMIFB_D18
EMIFB_D16
9
9
9
9
9
9
9
9
1
Sheet
SPECTRUM DIGITAL INCORPORATED
1
2
3
4
5
6
7
8
RN22
RPACK8-10
16
15
14
13
12
11
10
9
Page Contents:
Title:
M_EMIFB_D23
M_EMIFB_D21
M_EMIFB_D22
M_EMIFB_D19
M_EMIFB_D20
M_EMIFB_D17
M_EMIFB_D18
M_EMIFB_D16
M_EMIFB_D23
M_EMIFB_D22
M_EMIFB_D21
M_EMIFB_D20
M_EMIFB_D19
M_EMIFB_D18
M_EMIFB_D17
M_EMIFB_D16
22 uF
+ C115
22 uF
+ C105
VSS.1
VSS.2
VSS.3
VSSQ.1
VSSQ.2
VSSQ.3
VSSQ.4
NC
DQ7
DQ6
DQ5
DQ4
DQ3
DQ2
DQ1
DQ0
DQ15
DQ14
DQ13
DQ12
DQ11
DQ10
DQ9
DQ8
2
9
9
9
9
9
9
9
9
15 o f
32
Revision:
A
A
B
C
D
Spectrum Digital, Inc
OMAP-L137 EVM Technical Reference
5
R137
2K
A
2,3,14,19,31 BOOT_DISABLE
2
28 SEL_EXP2_QEP0
B
1
,5,8,19,27,31 BOOT_DISABLEn
C
4
C124
.1uF
2
1
1
2
4
R141
0
R138
NO-POP
DSK_3V3
U26
SN74LVC1G00DCKRG4
4
C125
.1uF
R142
0
R139
NO-POP
U23
WP
GND
NC.11
NC.12
NC.13
NC.14
DIO
SCLK
R143
NO-POP
13
14
17
18
21
22
1
3
4
7
8
11
9
10
11
12
13
14
15
16
GND
2B1
2B2
2B3
2B4
2B5
1B1
1B2
1B3
1B4
1B5
Vcc
12
15
16
19
20
23
2
5
6
9
10
24
1
2
3
4
VCC
WP
SCL
SDA
3
24WC256
A0
A1
NC
VSS
U27
8
7
6
5
C123
0.1uF
I2C0_SCL
I2C0_SDA
C126
.1uF
DSK_3V3
10K
R133
10K
DSK_3V3
SPI_WP
ROM_SPI0_CLK
ROM_SPI0_SOMI
ROM_SPI0_SIMO
ROM_SPI0_CS0
DSK_3V3
ROM_SPI0_SIMO
ROM_SPI0_CLK
3
SN74CBTLV3384PW
2OE
2A1
2A2
2A3
2A4
2A5
1OE
1A1
1A2
1A3
1A4
1A5
U24
W25X32VSFIG
DO
CS
NC.6
NC.5
NC.4
NC.3
VCC
HOLD
R140
NO-POP
8
ROM_SPI0_SOMI
4,14 SPI0_CLK
4,14 SPI0_SOMI
4,14 SPI0_SIMO
4 SPI0_SCSn
4,14 SPI0_ENAn
7
ROM_SPI0_CS0
6
5
4
SPI_HOLD
0.1uF
R131
10K
DSK_3V3
3
4
C122
DSK_3V3
U25
SN74LVC1G32DCKRG4
DSK_3V3
5
3
DSK_3V3
5
3
D
5
2
R136
10K
DWG NO
1
511342-0001
Monday, Novem ber 24, 2008
SPI ROM
OMAP-L137 EVM
Size: B
Date:
1
Sheet
SPECTRUM DIGITAL INCORPORATED
Page Contents:
Title:
EQEP0A
28
EQEP0B
28
EXP2.SPI0_SIMO 28
EXP2.SPI0_SOMI 28
EXP2.SPI0_CLK 28
R135
10K
DSK_3V3
I2C0_SCL 4,22,24,27,28,30
I2C0_SDA 4,22,24,27,28,30
R134
10K
R132
2
16 o f
32
Revision:
A
A
B
C
D
Spectrum Digital, Inc
A-17
A
B
C
5
8
8
8
8
8
8
8
8
4
USER_LED1
USER_LED2
USER_LED3
USER_LED4
USER_SW1
USER_SW2
USER_SW3
USER_SW4
4
3
SW3
8
7
6
5
DS2
LED_GRN
DS1
LED_GRN
3
USER CONTROLLED LEDS
R145
330
R144
330
DSK_3V3
SILKSCREEN:
USER SWITCHES
LOW PROFILE DIP-4
1
2
3
4
RN23
RPACK4-10K
DSK_3V3
4
3
2
1
A-18
5
6
7
8
D
5
DS3
LED_GRN
R146
330
4
3
2
1
RPACK4-1K
RN24
DS4
LED_GRN
R147
330
5
6
7
8
2
2
Monday, Novem ber 24, 2008
1
511342-0001
DWG NO
Date:
USER SWITCHES LEDS
Size:B
OMAP-L137 EVM
Sheet
SPECTRUM DIGITAL INCORPORATED
Page Contents:
Title:
1
17 o f
32
Revision:
A
A
B
C
D
Spectrum Digital, Inc
OMAP-L137 EVM Technical Reference
A
B
C
D
5
5 UART2_RXD
5 UART2_TXD
R150
10K
C133
1uF
15
14
4
2
1
9
C128
10uF
UART2_RXD
+
11
C127
1uF
DSK_3V3
UART2_TXD
4
4
U28
V-
V+
C2-
C2+
INVALID
R_IN
T_OUT
FORCEON
FORCEOFF
3
MAX3221CPWRG4
GND
C1-
C1+
EN
R_OUT
T_IN
VCC
3
16
7
3
6
5
10
8
13
12
C135
1uF
C134
1uF
GND_E_RS232
C131
10pF
L4
L3
C136
1uF
1uH
1uH
R149
10K
DSK_3V3
GND_E_RS232
C129
10pF
R148
10K
DSK_3V3
GND_E_RS232
C132
10pF
GND_E_RS232
C130
10pF
2
2
L2
1
511342-0001
Monday, Novem ber 24, 2008
DWG NO
Date:
RS232
Size: B
OMAP-L137 EVM
Page Contents:
Title:
SILKSCREEN:
UART
1
Sheet
SPECTRUM DIGITAL INCORPORATED
GND_E_RS232
GND_E_RS232
BLM21PG221SN1D
L5
P1
5
9
4
8
3
7
2
6
1
DB9M
BLM21PG221SN1D
10
11
5
18 o f
32
Revision:
A
A
B
C
D
Spectrum Digital, Inc
A-19
A
B
C
5
2,3,4,5,8,16,27,31 BOOT_DISABLEn
29 EXP3_SEL_MEMD0_7
2,3,14,16,31 BOOT_DISABLE
4
4
R151
2K
2
1
2
1
DSK_3V3
1g02
U30
1G08
U29
DSK_3V3
5
3
5
A-20
3
D
5
4
EMIFA_D0
EMIFA_D1
EMIFA_D2
EMIFA_D3
EMIFA_D4
EMIFA_D5
EMIFA_D6
EMIFA_D7
EMIFA_A1
EMIFA_A2
8 EMIFA_CS4n
8 EMIFA_CS5n
8
8
8
8
8
8
8
8
8
8
C138
0.1uF
4
C137
0.1uF
3
3
R153
360
EMIFA_D0
EMIFA_D1
EMIFA_D2
EMIFA_D3
EMIFA_D4
EMIFA_D5
EMIFA_D6
EMIFA_D7
EMIFA_A1
EMIFA_A2
U31
1A2
2A2
3A2
4A2
5A2
6A2
7A2
8A2
9A2
10A2
11A2
12A2
1A1
2A1
3A1
4A1
5A1
6A1
7A1
8A1
9A1
10A1
11A1
12A1
S0
S1
S2
FUNCTION
GND.1
GND.2
GND.3
GND.4
1B2
2B2
3B2
4B2
5B2
6B2
7B2
8B2
9B2
10B2
11B2
12B2
1B1
2B1
3B1
4B1
5B1
6B1
7B1
8B1
9B1
10B1
11B1
12B1
VCC.1
2
8
19
38
49
53
51
48
46
44
42
40
37
35
33
31
29
54
52
50
47
45
43
41
39
36
34
32
30
17
DSK_3V3
Disconnect
A1 port = B1 port
A1 port = B2 port
A2 port = B1 port
A2 port = B2 port
Disconnect
A1 port = B1 port/A2 port = B2 port
A1 port = B2 port/ A2 port = B1 port
SN74CBTLV16212DGGR
3
5
7
10
12
14
16
20
22
24
26
28
2
4
6
9
11
13
15
18
21
23
25
27
1
56
55
FUNCTION TABLE
INPUTS
INPUTS/OUTPUTS
S2 S1 S0
A1 A2
L L L
Z Z
L L H
B1 Z
L H L
B2 Z
L H H
Z B1
H L L
Z B2
H L H
Z Z
H H L
B1 B2
H H H
B2 B1
2
Monday, Novem ber 24, 2008
1
511342-0001
DWG NO
Date:
SD/MMC CARD MUXING
Size: B
OMAP-L137 EVM
Sheet
SPECTRUM DIGITAL INCORPORATED
EXP_EMIFA_D0 29
EXP_EMIFA_D1 29
EXP_EMIFA_D2 29
EXP_EMIFA_D3 29
EXP_EMIFA_D4 29
EXP_EMIFA_D5 29
EXP_EMIFA_D6 29
EXP_EMIFA_D7 29
EXP_EMIFA_A1 29
EXP_EMIFA_A2 29
EXP_EMIFA_CS4n 29
EXP_EMIFA_CS5n 29
Page Contents:
Title:
EXP_EMIFA_D0
EXP_EMIFA_D1
EXP_EMIFA_D2
EXP_EMIFA_D3
EXP_EMIFA_D4
EXP_EMIFA_D5
EXP_EMIFA_D6
EXP_EMIFA_D7
EXP_EMIFA_A1
EXP_EMIFA_A2
C140
.01uF
MMC_SD_DATA0 20
MMC_SD_DATA1 20
MMC_SD_DATA2 20
MMC_SD_DATA3 20
MMC_SD_DATA4 20
MMC_SD_DATA5 20
MMC_SD_DATA6 20
MMC_SD_DATA7 20
MMC_SD_CLK 20
MMC_SD_CMD 20
MMC_SD_WP 20
MMC_SD_INS 20
C139
0.1uF
1
19 o f
32
Revision:
B
A
B
C
D
Spectrum Digital, Inc
OMAP-L137 EVM Technical Reference
A
B
C
D
19
19
19
19
19
19
19
MMC_SD_DATA0
MMC_SD_DATA1
MMC_SD_DATA2
MMC_SD_DATA4
MMC_SD_DATA5
MMC_SD_DATA6
MMC_SD_DATA7
19 MMC_SD_CLK
19 MMC_SD_DATA3
19 MMC_SD_CMD
5
R164
NO-POP
R154
51K
DSK_3V3
R165
NO-POP
R155
51K
4
3
2
1
R166
NO-POP
R156
51K
NC.4
IO3
IO2
IO1
DSK_3V3
10
IO4
IO5
IO6
NC.9
VCC
GND
5
3
4
7
6
4
2
R160
51K
1
R159
51K
9
R158
51K
8
TPD6E001RSE
U32
R157
51K
4
NC.4
IO3
IO2
IO1
DSK_3V3
10
IO4
IO5
IO6
NC.9
VCC
GND
5
5
TPD6E001RSE
19 MMC_SD_WP
19 MMC_SD_INS
6
7
8
9
U33
R161
51K
3
3
R162
51K
R167
10K
DSK_3V3
R163
51K
R168
10K
MMC_SD_DATA0
MMC_SD_DATA1
MMC_SD_DATA2
MMC_SD_DATA4
MMC_SD_DATA5
MMC_SD_DATA6
MMC_SD_DATA7
MMC_SD_CLK
MMC_SD_DATA3
MMC_SD_CMD
2
DSK_3V3
2
+
C141
10UF
P2
MHC-W21-601
SD_WP
CD
#1_miniSD
#2_miniSD
#3_miniSD
#4_miniSD
#5_miniSD
#6_miniSD
#7_miniSD
#8_miniSD
#9_miniSD
#10_miniSD
#11_miniSD
GND1
GND2
#1_MMC+/MMCM/RSMMC/MMC/SD
#2_MMC+/MMCM/RSMMC/MMC/SD
#3_MMC+/MMCM/RSMMC/MMC/SD
#4_MMC+/MMCM/RSMMC/MMC/SD
#5_MMC+/MMCM/RSMMC/MMC/SD
#6_MMC+/MMCM/RSMMC/MMC/SD
#7_MMC+/MMCM/RSMMC/MMC/SD
#8_MMC+/MMCM/SD
#9_MMC+/MMCM/SD
#10_MMC+/MMCM
#11_MMC+/MMCM
#12_MMC+/MMCM
#13_MMC+/MMCM
Monday, Novem ber 24, 2008
1
511342-0001
DWG NO
Date:
SD/MMC CARD INTERFACE
Size: B
OMAP-L137 EVM
Sheet
SPECTRUM DIGITAL INCORPORATED
Page Contents:
Title:
SD/MMC Connector 6 in 1
MMC+, MMCMobile, SD,
MMC, miniSD, RS-MMC
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
1
2
3
4
5
6
7
8
9
10
11
12
13
C142
0.1uF
1
20 o f
32
Revision:
A
A
B
C
D
Spectrum Digital, Inc
A-21
A
B
C
D
C149
.1 uF
R174
10K
DSK_3V3
5
R176
0
DSK_3V3
1
3
5
7
9
11
13
2
1
U37
DSK_3V3
14 Pin Emulation Header
TRSTn TMS
GND.1
TDI
GND.2 TVD
GND.3 TDO
GND.4 RTCK
GND.5 TCK
EMU1 EMU0
J5
1
3
5
7
9
11
13
15
17
19
SAMTEC-TSM-110-DV
2
4
6
8
10
12
14
16
18
20
SN74AHC1G14DCKRG4
EMU_STS
JTAG_EMU1
2
4
6
8
10
12
14
J4
10K
5
3
R169
4
JTAG_TRSTn
R177
0
C148
0.1uF
R173
150
DSK_3V3
4
JTAG_TDI
JTAG_TMS
JTAG_TDO
R179
10K
DSK_3V3
ARM_RSTn
JTAG_TRSTn
JTAG_TDI
JTAG_TMS
JTAG_TCK
JTAG_RTCK
JTAG_TDO
Green
DS5
JTAG_EMU0
C146
.1 uF
JTAG_TDO
JTAG_RTCK
JTAG_TCK
JTAG_TMS
JTAG_TDI
DSK_3V3
JTAG_TRSTn
4
JTAG_TCK
ARM_RSTn 31
TP35
TP
TP36
TP
TP37
TP
TP38
TP
1
1
1
1
VCC_5V
R380
0
DSK_3V3
R172
1.5K
DSK_3V3
JTAG_EMU1
JTAG_TDO
JTAG_EMU0
EMU_STS
JTAG_TRSTn
JTAG_TCK
JTAG_TMS
JTAG_TDI
R381
0
XRSn
3
31
R382
0
GND
EMU_STS
S
OE
1B1
1B2
2B1
2B2
3B1
3B2
4B1
4B2
8
12
9
7
4
16
S
OE
1B1
1B2
2B1
2B2
3B1
3B2
4B1
4B2
U36
GND
4A
3A
2A
1A
VCC
3.3V
Embedded_USB
T_AIN3
T_AIN2
T_AIN1
T_AIN0
GND
RESET_INn
T_TRSTn
T_TMS
T_TDI
T_TCK
T_TCK_RET
T_TDO
T_EMU0
T_EMU1
T_TPD
10
10
10
4
U57
T_TRSTn
T_TMS
T_TDI
T_TCK
T_TCK_RET
T_TDO
T_EMU0
T_EMU1
2
2
1
DSK_3V3
DSP_RTCK 10
DSP_EMU1 10
DSP_TDO
DSP_EMU0 10
C147
0.1uF
DSP_TRST# 10
DSP_TMS
SN74LVC1G04
DSP_RTCK
DSP_EMU1
DSP_TDO
DSP_EMU0
DSK_3V3
DSP_TRST#
DSP_TMS
C143
0.1uF
2
DSP_TDI
DSK_3V3
DSP_TDI
T_IO_POWERONn
DSP_RS_OUT_ODn
5V
8
12
9
7
4
16
SN74CBTLV3257PWR
1
15
2
3
5
6
11
10
14
13
USB1
R383
0
GND
4A
3A
2A
1A
VCC
SN74CBTLV3257PWR
1
15
2
3
5
6
11
10
14
13
U34
JTAG MULTIPLEXERS
JTAG_RTCK
T_TCK_RET
T_EMU1
T_TDO
T_EMU0
T_TRSTn
T_TCK
T_TMS
T_TDI
3
5
2
1
4
R171
NO POP
Date:
Size: B
DWG NO
1
511342-0001
Sheet
TI14 PIN/ARM 20 PIN JTAG EMULATION
OMAP-L137 EVM
10
21 o f
DSP_TCK
PONRSnIN 31
DSP_TCK
NO-POP
33
C144
NO POP
1
SPECTRUM DIGITAL INCORPORATED
C145
0.1uF
Monday, Novem ber 24, 2008
Page Contents:
Title:
C25
0.1uF
R178
R175
10K
DSK_3V3
SN74LVC1G32
U35
DSK_3V3
R170
5
3
A-22
3
5
32
Revision:
A
A
B
C
D
Spectrum Digital, Inc
OMAP-L137 EVM Technical Reference
JTAG_RTCK
5
6
C171
220pF
5
6
P4
GND_AIC
5.6K
5.6K
R189
10K
2 T_AIC_BCLK
2 T_AIC_WCLK
2 T_AIC_DIN
2 T_AIC_DOUT
31 AIC3106_RESETn
GND_AIC
C172
.1uF
R184
330
2 T_AIC_MCLK
R188
330
C170
.1uF
GND_AIC
GND_AIC
R191
R208
2K
10
10
10
10
0
0
R210
AIC_BCLK
AIC_WCLK
AIC_DIN
AIC_DOUT
R190
23 HEADSET_MIC_N
23 HEADSET_MIC_P
23 HANDSET_MIC_N
23 HANDSET_MIC_P
C167
220pF
C166 .1uF
C161
220pF
C158 .1uF
C150
10uF
R203
NO-POP
DSK_3V3
+
MIC_BIAS_HS
R194
R195
R196
R197
R183
5.6K
R181
5.6K
C152
.1uF
23 MIC_BIAS_HS
BLM21PG221SN1D
L10
R182
R180
4,16,24,27,28,30 I2C0_SDA
4,16,24,27,28,30 I2C0_SCL
GND_AIC
R187
47K
4
2
1
Mic In GND_AIC
3
P3
4
2
1
Line In
3
C151
.1uF
2
1
OUT
VCC
22
24.576 MHz
GND
EN
U39
R202
20K
SELECT
SDA
SCL
BCLK
WCLK
DIN
DOUT
RESET
MICBIAS
MICDET
MIC3L
MIC3R
LINE2R-
LINE2R+
LINE2L-
LINE2L+
LINE1R-
LINE1R+
LINE1L-
LINE1L+
IOVDD
DVSS
DVDD.1
3
4
DSK_3V3
43
2
1
38
39
40
41
33
13
12
11
14
10
9
8
7
6
5
4
3
44
42
36
U38
.1uF
C159
.1uF
C175
1uF
L8
C160
R209
22
MCLK
MFP0
MFP1
MFP2
MFP3
GPIO1
GPIO2
RIGHT_LO-
RIGHT_LO+
LEFT_LO-
LEFT_LO+
MONO_LO+
MONO_LO-
HPROUT
HPRCOM
HPLOUT
HPLCOM
AVSS_DAC
AVSS_ADC
AVDD_DAC
DRVSS.1
DRVSS.2
DRVDD.1
DRVDD.2
DRVDD.3
TVL320AIC3106
37
45
46
47
48
35
34
32
31
30
C173
1
C169
C174
R205
NO-POP
R199
NO-POP
GND_AIC
C164
.1uF
L9
R206
2K
Date:
Size:B
TP11
TEST POINT
TP12
TEST POINT
1
TP10
TEST POINT
1
1
TP9
TEST POINT
1
GND_AIC
3
1
2
4
GND_AIC
R185
20K
OMAP-L137 EVM
DWG NO
511342-0001
AIC3106 AUDIO INTERFACE
3
1
2
4
Headphone Out
Sheet
P6
R186
20K
P5
SPECTRUM DIGITAL INCORPORATED
GND_AIC
R193
20K
R192
20K
GND_AIC
GND_AIC
.1uF
C165
Monday, November 24, 2008
Page Contents:
Title:
R207
2K
R201
NO-POP
DSK_3V3
BLM21PG221SN1D
BLM21PG221SN1D
GND_AIC
BLM21PG221SN1D
DSK_3V3
DSK_3V3
BLM21PG221SN1D
BLM21PG221SN1D
R200
NO-POP
TP7
TEST POINT
TP8
TEST POINT
ISOLATE GROUNDS
AND CONNECT AT
SINGLE LOCATION
IN THE GROUND PLANE
1
1
L14
L13
TP39
TEST POINT
TP40
TEST POINT
HANDSET_SPKR_P 23
HANDSET_SPKR_N 23
10uF,6.3V
R204
NO-POP
L12
L7
BLM21PG221SN1D
C162
10uF
HEADSET_SPKR_P 23
HEADSET_SPKR_N 23
10uF,6.3V
R198
NO-POP
+
C155
10uF
GND_AIC
+
L11
C163
.1uF
33uF,6.3V
GND_AIC
C157
.1uF
33uF,6.3V
C168
C156
.1uF
29
C154
.1uF
1
GND_AIC
GND_AIC
C153
.1uF
27
28
23
22
18
19
26
15
25
20
21
16
17
24
BLM21PG221SN1D
VCC_1V8
+
+
+
+
L6
TPAD
49
22 o f
32
Revision:
B
Line Out
6
5
BLM21PG221SN1D
6
5
DSK_3V3
Spectrum Digital, Inc
A-23
A-24
A
B
C
D
22 HANDSET_SPKR_P
22 HANDSET_SPKR_N
5
0.47uF
C186
R222
R219
R218
GND_AIC
R224
10K
0.47uF
C185
GND_AIC
0
10K
10K
C189
0.1uF
1
2
3
4
TPA4861D
SHUTDOWN
BYPASS
IN+
IN-
U40
R215
C179
4
GND
V02
VO1
VDD
20K
18pF
4
7
8
5
6
GND_AIC
GND_AIC
+
GND_AIC
C184
0.1uF
R212
1
VCC_5V
3
22 HEADSET_MIC_N
22 HEADSET_MIC_P
C183
22uF
0.22uF
0.22uF
22 MIC_BIAS_HS
C193 0.22uF
C190
0.22uF
MIC_BIAS_HS
0.22uF
MIC_BIAS_HS
C192
C195
2
0
0
GND_AIC
GND_AIC
0
R228
4
3
2
1
P8
RJ9-4
GND_AIC
GND_AIC
TIP
TIP
1
Sheet
DWG NO
Monday, Novem ber 24, 2008
511342-0001
AIC3106 RJ9-4/ PHONO INTERFACES
Date:
P15
23 o f
PHONOJACK_ST
2 RING
1 SLEEVE
5
Size: B
OMAP-L137 EVM
P14
PHONOJACK_ST
2 RING
1 SLEEVE
5
1
SPECTRUM DIGITAL INCORPORATED
GND_AIC
NO-POP
R232
0
R390
0
GND_AIC
NO-POP
6
Page Contents:
Title:
C197
0.01uF
2.2K
C188
0.01uF
2.2K
R216
C187
0.01uF
C196
0.01uF
0.47uF
0.47uF
R225
0
0
0
0.47uF
0.47uF
R211
C182
R227
10K 1%
R229
R230
R231
C194 0.22uF
R226
10K 1%
C178
2
R214
10K 1%
R217
R220
R221
MIC_BIAS_HS
MIC_BIAS_HS
C181 0.22uF
R213
10K 1%
C177
C191
22 MIC_BIAS_HS
22 MIC_BIAS_HS
C180 0.22uF
C176
22 MIC_BIAS_HS
22 HEADSET_SPKR_P
22 HEADSET_SPKR_N
22 HANDSET_MIC_N
22 HANDSET_MIC_P
3
5
5
32
Revision:
B
A
B
C
D
Spectrum Digital, Inc
OMAP-L137 EVM Technical Reference
A
B
C
D
1
4
U42
OUT
GND
50.000 MHz
EN
VCC
5
2
3
R389
R333
R237
49.9
R268
2K
R284
NO-POP
R267
NO-POP
R283
2K
DSK_3V3
5
R285
NO-POP
R269
2K
R286
2K
R270
NO-POP
R287
NO-POP
R271
2K
0
0
R288
NO-POP
R272
NO-POP
PS1 = 0, PS0 = 1 (I2C slave mode)
31 ENET_RESET
4,16,22,27,28,30 I2C0_SDA
4,16,22,27,28,30 I2C0_SCL
3 B_RMII_TXEN
3 B_RMII_TXD[0]
3 B_RMII_TXD[1]
3 B_RMII_MHZ_50
3 B_RMII_CRS_DV
3 B_RMII_RXD[0]
3 B_RMII_RXD[1]
3 B_RMII_MDIO_D
3 B_RMII_MDIO_CLK
0.01uF
C198
DSK_3V3
49.9
R241
R250
49.9
49.9
R236
2.2K
R242
R243
R238
49.9
DSK_3V3
0
4
4
100
101
88
89
26
36
67
98
97
77
76
75
74
73
72
71
81
80
87
86
85
84
83
82
95
94
99
96
PS1
PS0
SCONF1
SCONF0
RMII_EN
PWRDN
RST_N
SDA
SCL
SMTXC/REFCLK
SMTXER
SMTXD0
SMTXD1
SMTXD2
SMTXD3
SMTXEN
SMRXDV
SMRXC
SCRS
SCOL
SMRXD0
SMRXD1
SMRXD2
SMRXD3
MDIO
MDC
SPIS_N
SPIQ
3
66
65
61
44
30
31
32
33
13
14
15
27
12
16
28
29
23
70
55
56
52
53
20
4
5
6
48
49
45
46
25
1
2
3
Y3
DSK_3V3
3.01K
R273
10K
NO-POP
R266
P1ANEN
P1SPD
P1DPX
P1FFC
P2ANEN
P2SPD
P2DPX
HW POVR
ADVFC
P2FFC
P2MDIXDIS
P2MDIX
C200
NO-POP
TXM2
TXP2
RXM2
RXP2
P2LED3
P2LED2
TXP1
TXM1
RXP1
RXM1
Differential Pair
220
220
Differential Pair
R239
R240
P1LED3
P1LED2
Differential Pair
220
220
Differential Pair
R234
R235
NOT POPULATE FOR RMII
C199
NO-POP
X2
X1
ISET
FXSD1
P1ANEN
P1SPD
P1DPX
P1FFC
P2ANEN
P2SPD
P2DPX
HWPOVR
ADVFC
P2FFC
P2MDIXDIS
P2MDIX
LEDSEL1
LEDSEL0
TXM2
TXP2
RXM2
RXP2
P2LED3
P2LED2
P2LED1
P2LED0
TXP1
TXM1
RXP1
RXM1
P1LED3
P1LED2
P1LED1
P1LED0
U41A
KSZ8893MQL
3
TXM2
TXP2
RXM2
RXP2
2
R274
NO-POP
26
26
26
26
26
26
26
26
26
26
26
26
R275
2K
R258
NO-POP
P2LED3
P2LED2
TXP1
TXM1
RXP1
RXM1
P1LED3
P1LED2
R233
R257
NO-POP
2
Date:
Size:B
R278
NO-POP
R261
NO-POP
R252
NO-POP
R245
NO-POP
R279
NO-POP
R262
NO-POP
R253
2K
R246
NO-POP
TP15
TEST POINT
TP16
TEST POINT
TP13
TEST POINT
TP14
TEST POINT
R280
NO-POP
R263
2K
R254
2K
R247
NO-POP
1
DWG NO
1
511342-0001
Monday, Novem ber 24, 2008
24 o f
R281
NO-POP
R264
2K
Sheet
R256
NO-POP
32
Revision:
B
R282
NO-POP
R265
NO-POP
DSK_3V3
R255
NO-POP
R249
2K
DSK_3V3
R248
2K
KSZ8893MQL ETHERNET/PHY/SWITCH
OMAP-L137 EVM
SPECTRUM DIGITAL INCORPORATED
R277
NO-POP
R260
2K
R251
NO-POP
R244
NO-POP
1
1
1
1
Page Contents:
Title:
R276
NO-POP
R259
2K
1K
A
B
C
D
Spectrum Digital, Inc
A-25
A-26
A
B
C
D
1K
R293
R299
NO-POP
R298
NO-POP
5
R295
NO-POP
R294
NO-POP
DSK_3V3
10K
R292
DSK_3V3
5
R300
NO-POP
R296
NO-POP
R301
NO-POP
R297
NO-POP
R291
1K
R302
1K
1K
R289
R303
1K
4
4
127
128
60
59
40
41
9
10
11
17
18
19
24
34
35
68
69
92
93
102
103
104
105
108
109
110
111
112
113
114
115
116
117
118
119
120
121
124
125
126
TESTEN
SCANEN
TEST2
TEST1
MUX1
MUX2
NC.9
NC.10
NC.11
NC.17
NC.18
NC.19
NC.24
NC.34
NC.35
UNUSED.68
UNUSED.69
UNUSED.92
UNUSED.93
UNUSED.102
UNUSED.103
UNUSED.104
UNUSED.105
UNUSED.108
UNUSED.109
UNUSED.110
UNUSED.111
UNUSED.112
UNUSED.113
UNUSED.114
UNUSED.115
UNUSED.116
UNUSED.117
UNUSED.118
UNUSED.119
UNUSED.120
UNUSED.121
UNUSED.124
UNUSED.125
UNUSED.126
U41B
KSZ8893MQL
AGND.8
AGND.7
AGND.6
AGND.5
AGND.4
AGND.3
AGND.2
AGND.1
VDDA.3
VDDA.2
VDDA.1
VDDAP
VDDATX
VDDARX
DGND.6
DGND.5
DGND.4
DGND.3
DGND.2
DGND.1
VDDC.3
VDDC.2
VDDC.1
VDDIO.3
VDDIO.2
VDDIO.1
64
62
58
54
47
42
39
37
57
43
38
63
50
51
122
106
90
78
21
7
123
91
22
107
79
8
3
3
C222
0.1uF
C204
0.1uF
C223
0.1uF
R290
100
C205
C206
0.1uF
C201 +
10uF
C211 +
+
C217
2
10uF
C221 +
L21
C213
1
0.1uF
2
1
2
L23
1
ENET_1V2
DSK_3V3
C212 +
10uF
Monday, Novem ber 24, 2008
1
511342-0001
Sheet
DWG NO
Date:
KSZ8893MQL ETHERNET POWER
Size: B
OMAP-L137 EVM
SPECTRUM DIGITAL INCORPORATED
1
Page Contents:
Title:
+
ENET_1V2
100uF
C203
DSK_3V3
ENET_1V2
BLM21PG221SN1D
L22
BLM21PG221SN1D
ENET_VDDA
+
1
BLM21PG221SN1D
2
ENET_VDDAP
47uF
C214
L20
C207
0.1uF
BLM21PG221SN1D
2
ENET_VDDATR
10uF
1
BLM21PG221SN1D
L19
ENET_VDDC
C202 +
10uF
10uF / 16V
+
0.1uF
C216
0.1uF
C210
10uF
C220
0.1uF
0.001uF
C224
C219
0.01uF
C215
0.1uF
C209
0.1uF
C218
0.1uF
C208
0.1uF
2
ENET_VDDIO
2
25 o f
32
Revision:
A
A
B
C
D
Spectrum Digital, Inc
OMAP-L137 EVM Technical Reference
A
B
C
TXM2
RXP2
RXM2
24
24
24
24
TXP2
RXP1
RXM1
24
24
TXP1
TXM1
24
5
4
+
C227
C226
7
8
12
11
10
9
R311
49.9
P2LED2
P2LED3
+
C231
C230
7
8
12
11
10
9
0.1uF
C232
3
10uF
GND_E_ENET
1000pF 2kV
3
5
6
R310
49.9
24
24
ENET_VDDATR
0.1uF
RXP2
RXM2
TXM2
Differential Pair
R309
49.9
C229
DSK_3V3
1
4
2
Differential Pair
R308
49.9
0.1uF
C228
GND_E_ENET
1000pF 2kV
TXP2
RXM1
10uF
3
5
6
R307
49.9
P1LED2
P1LED3
RXP1
R306
49.9
24
24
ENET_VDDATR
0.1uF
1
4
2
TXM1
Differential Pair
R305
49.9
DSK_3V3
TXP1
Differential Pair
R304
49.9
C225
3
P9
RXD+
RXD-CT
RXD-
TXD+
TXD-CT
TXD-
NC1
GND
LED2LED2+
LED1LED1+
P10
RXD+
RXD-CT
RXD-
TXD+
TXD-CT
TXD-
NC1
GND
LED2LED2+
LED1LED1+
SILKSCREEN:
ETHERNET
RJ45 HALO HFJ11-2450E-L21
2
2
GND_E_ENET
Monday, Novem ber 24, 2008
1
511342-0001
Sheet
DWG NO
Date:
KSZ8893MQL ETHERNET PORTS
Size: B
OMAP-L137 EVM
SPECTRUM DIGITAL INCORPORATED
1
Page Contents:
Title:
RJ45 HALO HFJ11-2450E-L21
SILKSCREEN:
ETHERNET
GND_E_ENET
MH1
MH2
MH1
MH2
24
4
MH1
MH2
MH1
MH2
SH1
SH2
SH1
SH2
SH1
SH2
SH1
SH2
D
5
26 o f
32
Revision:
A
A
B
C
D
Spectrum Digital, Inc
A-27
A
B
C
D
T_AFSX0
5
2,3,4,5,8,16,19,31 BOOT_DISABLEn
2
2
DSK_3V3
5
A-28
1
3
5
4
AHCLKR2
8
EXP_AFSX1
2 EXP_ACLKX1
2
2 T_AHCLKR1
5 EXP1_SPI1_SCSn
5 EXP1_SPI1_CLK
2
T_AMUTE1
EXP_AXR0[0]
EXP_AXR0[1]
EXP_AXR0[2]
EXP_AXR0[3]
EXP_AXR0[4]
EXP_AXR0[5]
EXP_AXR0[6]
EXP_AXR0[7]
3
3
3
3
3
3
3
3
2,6 T_ACLKX0
4
2 EXP_AXR1[0]
2
T_AXR1[1]
2
T_AXR1[2]
2
EXP_AXR1[3]
2 EXP_AXR1[4]
2 EXP_AXR1[5]
2 EXP1_SEL_MCASP1
28,29,31 EXP_RESETn
U43
SN74CBTLV1G125
C233
.1uF 3,14 SEL_ENETn_MCASP0
2
T_AMUTE0
4
VCC_5V
T_AXR1[1]
T_AXR1[2]
T_AMUTE1
T_ACLKX0
EXP1_AFSX0
T_AMUTE0
81
82
83
84
89
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
1
Z2
3
85
86
87
88
MH2
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
QSE-040-01-L-D-A
81
82
83
84
MH1
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
P11
1
Z1
Mounting holes 0.250 pad 0.125 drill
VCC_5V
3
85
86
87
88
90
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
T_AFSR0
T_AXR1[6]
T_AXR1[7]
T_AXR1[8]
T_AXR1[9]
T_AXR1[10]
T_AXR1[11]
T_ACLKR1
T_AFSR1
VCC_5V
2
T_AXR0_11/AXR2_0/GPIO3_11
T_ACLKR0
VCC_5V
2
2
2
2
Monday, Novem ber 24, 2008
1
511342-0001
Sheet
DWG NO
Date:
AUDIO / EXPANSION COINNECTOR 1
Size: B
OMAP-L137 EVM
SPECTRUM DIGITAL INCORPORATED
Page Contents:
Title:
T_AXR1[6] 2
T_AXR1[7] 2
T_AXR1[8] 2
T_AXR1[9] 2
T_AXR1[10] 2
T_AXR1[11] 2
SEL_SPI1_EXP1 5
T_ACLKR1
T_AFSR1
EXP_AHCLKX1 2
EXP1_SPI1_ENAn 5
EXP1_SPI1_SIMO 5
EXP_SPI1_SOMI 5
EXP1_AMUTE2 8
EXP_AXR0[8] 3
EXP_AXR0_9 4
EXP_AXR0_10 4
EXP1_AXR0_12 8
EXP1_AXR0_13 8
EXP1_AXR0_14 8
EXP1_AXR0_15 8
T_AXR0_11/AXR2_0/GPIO3_11 2
T_ACLKR0 2
T_AFSR0
I2C0_SDA 4,16,22,24,28,30
I2C0_SCL 4,16,22,24,28,30
EXP_AHCLKR0 3
1
27 o f
32
Revision:
A
A
B
C
D
Spectrum Digital, Inc
OMAP-L137 EVM Technical Reference
A
B
C
D
5
5
VCC_5V
4,14 SEL_EXP2_UART1
27,29,31 EXP_RESETn
5 SEL_SPI1_EXP2
2 EXP_EQEP1A
2 EXP_EQEP1B
2 SEL_EXP2_QEP1
4 EXP2_UART1_RXD
4 EXP2_UART1_TXD
5 EXP2_SPI1_SOMI
5 EXP2_SPI1_SIMO
5 EXP2_SPI1_CLK
5 EXP2_SPI1_SCSn
5 EXP2_SPI1_ENAn
41
42
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
43
44
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
QSE-020-01-L-D-A
41
42
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
P12
43
44
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
4
1
Z3
1
Z4
Mounting holes 0.250 pad 0.125 drill
VCC_5V
4
VCC_5V
SEL_EXP2_QEP0 16
EXP2_TMP64P0_OUT12 4
EXP2_TMP64P0_IN12 4
I2C0_SCL 4,16,22,24,27,30
I2C0_SDA 4,16,22,24,27,30
EXP2.SPI0_SOMI 16
EXP2.SPI0_SIMO 16
EXP2.SPI0_CLK 16
EQEP0A
16
EQEP0B
16
VCC_5V
3
SEL_SPI1_EXP2_B 5
SEL_EXP2_TIMER 4,14
3
2
2
1
511342-0001
Monday, Novem ber 24, 2008
DWG NO
Date:
EXPANSION 2
Size: B
OMAP-L137 EVM
Sheet
SPECTRUM DIGITAL INCORPORATED
Page Contents:
Title:
1
28 o f
32
Revision:
A
A
B
C
D
Spectrum Digital, Inc
A-29
A-30
A
B
C
D
5
5
EXP_EMIFA_D0
EXP_EMIFA_D2
EXP_EMIFA_D4
EXP_EMIFA_D6
27,28,31 EXP_RESETn
8 EMIFA_BA0
8 EMIFA_BA1
19 EXP_EMIFA_A1
8 EMIFA_A3
8 EMIFA_A5
8 EMIFA_A7
8 EMIFA_A9
8 EMIFA_A11
8 EMIFA_WAIT0
8 EXP_EMIFA_CS0n
8 EXP3_EMIFA_OEn
8 EXP3_EMIFA_WEn
8 EXP3_EMIFA_CLK
8,14 EXP3_SEL_MEMD8_D11
8,14 EXP3_SEL_MEMD12_D15
8 EXP_EMIFA_D8
8 EXP_EMIFA_D10
8 EXP_EMIFA_D12
8 EXP_EMIFA_D14
19
19
19
19
19 EXP3_SEL_MEMD0_7
8 EXP3_SEL_MEM
4
VCC_5V
EXP_EMIFA_A1
EXP_EMIFA_D8
EXP_EMIFA_D10
EXP_EMIFA_D12
EXP_EMIFA_D14
81
82
83
84
89
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
85
86
87
88
MH2
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
QSE-040-01-L-D-A
81
82
83
84
MH1
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
P13
85
86
87
88
90
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
1
Z5
Mounting holes 0.250 pad 0.125 drill
VCC_5V
EXP_EMIFA_D0
EXP_EMIFA_D2
EXP_EMIFA_D4
EXP_EMIFA_D6
4
3
VCC_5V
EXP_EMIFA_A2
EXP_EMIFA_D9
EXP_EMIFA_D11
EXP_EMIFA_D13
EXP_EMIFA_D15
EXP_EMIFA_D1
EXP_EMIFA_D3
EXP_EMIFA_D5
EXP_EMIFA_D7
VCC_5V
3
EXP3_SEL_MEM_CTL2 8
EMIFA_A0 8
EXP_EMIFA_A2 19
EMIFA_A4 8
EMIFA_A6 8
EMIFA_A8 8
EMIFA_A10 8
EMIFA_A12 8
EMIFA_CS2n 8
EXP3_EMIFA_CS3n 8
EXP_EMIFA_CS4n 19
EXP_EMIFA_CS5n 19
EMIFA_SDCKE 8
EXP3_EMIFA_WEn_DQM0 8
EXP3_EMIFA_WEn_DQM1 8
EXP_EMIFA_D9 8
EXP_EMIFA_D11 8
EXP_EMIFA_D13 8
EXP_EMIFA_D15 8
19
19
19
19
EXP3_SEL_MEM_CTL 8
EXP_EMIFA_D1
EXP_EMIFA_D3
EXP_EMIFA_D5
EXP_EMIFA_D7
2
2
1
511342-0001
Monday, Novem ber 24, 2008
DWG NO
Date:
EXPANSION 3
Size: B
OMAP-L137 EVM
Sheet
SPECTRUM DIGITAL INCORPORATED
Page Contents:
Title:
1
29 o f
32
Revision:
B
A
B
C
D
Spectrum Digital, Inc
OMAP-L137 EVM Technical Reference
A
B
C
D
C238
10uF
10uF
R341
1K
5
R339
NO-POP
VCC_5V
+
C240
VCC_5V
+
VCC_5V
R324
NO-POP
R319
1K
VCC_5V
R315
1K
R314
NO-POP
C241
22uF
VCC_1V2
+
VCC_3V3
+
C234
10uF
R344
0
4
A
A1
VCC_5V
R336
NO-POP
R331
10K
VCC_5V
R321
0
B
B1
10K
PUSHBUTTON SW
R387
SW4
NO-POP
R320
C235
0.1uF
NO-POP
NO-POP
R345
33
VLDO1 VLDO2
1.3 V
3.3 V
2.8 V
3.3 V
1.3 V
1.8 V
1.8 V
3.3 V
DEFDCDC3
VDCDC3
PGND3
L3
VINCDDC3
VINDCDC1
L1
PGND1
VDCDC1
DEFCDCD1
R322
1
2
3
4
5
6
7
8
9
10
.
DEFLDO2 DEFLDO1
0
1
1
0
1
1
0
R337
NO-POP 0
R332
10K
2.2uH
2.2uH
R317
VCC_5V
L17
L18
R340
NO-POP
VCC_5V
C237
22uF
VCC_3V3
+
VCC_5V
4
3
3
PB_RESET 31
R343
0
L16
U44
+
+
10uF
C244
VCC_5V
2.2uF
C245
VRTC
29
30
28
27
26
25
24
23
22
21
+
VLDO2
+
C243
2.2uF
C242
22uF
+
1
CPU_RTC_1V8
R330
2.2uH
L15
1
TP29
TP
TP28
TP
NO-POP
VCC_5V
C236
22uF
VCC_1V8
2
2
R325
10K
CPU_1V2
R338
10K
R342
NO-POP
VCC_5V
R327
2K
C239
0.001uF
R326
10K
ALT_3V3
ALT_3V3
TP20
TP-60
R313
BLM41P750SPT
0.025
TP19
TP-60
VLDO2
VCC_1V2
TPS65023
SDAT
SCLK
INTn
RESPWRONn
TRESPWRON
DCDC1_EN
DCDC2_EN
DCDC3_EN
LDO_EN
LOWBATn
41
PWR_PAD
1
5
40
39
38
37
36
35
34
33
32
31
AGND1
LOWBAT_SNS
PWRFAIL_SNS
VCC
VINDCDC2
L2
PGND2
VDCDC2
DEFDCDC2
PWRFAILn
HOT_RESETn
DEFLDO1
DEFLDO2
VSYSIN
VBACKUP
VRTC
AGND2
VLDO2
VINLDO
VLDO1
11
12
13
14
15
16
17
18
19
20
Date:
Size: B
0.025
TP17
TP-60
0.025
TP21
TP-60
0.025
TP23
TP-60
TP25
TP-60
TP26
TP-60
R323
TP24
TP-60
R318
TP22
TP-60
R316
TP18
TP-60
R312
C269
0.1uF
ENABLE_1V2 31
ENABLE_1V8 31
ENABLE_3V3 31
DWG NO
CORE POWER
1
511342-0001
OMAP-L137 EVM
Sheet
30 o f
32
Revision:
B
CPU_1V8
DSK_1V8
CPU_3V3
DSK_3V3
TP27
TP-60
SPECTRUM DIGITAL INCORPORATED
C268
0.1uF
R329
10K
ALT_3V3
SYS_RESETn 31
Monday, Novem ber 24, 2008
Page Contents:
Title:
C267
NO-POP
R328
47K
0.025
1
I2C0_SDA 4,16,22,24,27,28
I2C0_SCL 4,16,22,24,27,28
1
VCC_1V8
VCC_3V3
1
1
1
1
VCC_5V
A
B
C
D
Spectrum Digital, Inc
A-31
A
B
C
D
R355
R350
R347
R356
10K 1%
R351
10K 1%
R348
10K 1%
R364
DSK_1 V2_SYS_OKAY
5
NO-POP
NO-POP
NO-POP
R362
NO-POP
DSK_3 V3_SYS_OKAY
R365
U45
GND
RESET
VDD
VDD
GND
RESET
2
1
6
TPS3808G09DBVRG4
MR
CT
SENSE1
U48
ALT_3V3
GND
RESET
VDD
2
1
6
TPS3808G09DBVRG4
MR
CT
SENSE1
4
ENABLE_3V3 30
ENABLE_1V8 30
ENABLE_1V2 30
Reset Threhold 0.84 Volts
3
4
5
U50
ALT_3V3
Reset Threhold 0.84 Volts
3
4
5
2
1
6
TPS3808G09DBVRG4
MR
CT
SENSE1
R334
NO-POP
NO-POP
DSK_1 V8_SYS_OKAY
3
4
5
Reset Threhold 0.84 Volts
NO-POP
0.1uF
C254
0.1uF
C252
0.1uF
C248
DSK_1 V2_SYS_OKAY R361
R360
DSK_1V8_SYS_OKAY R359
20K
4.99K
0
DSK_3 V3_SYS_OKAY
30 PB_RESET
DSK_3V3
DSK_1V8
CPU_1V2
R346
10K
R349
10K
CPU_RESET
0.1uF
30 SYS_RESETn
TP31
DSK_1 V8_SYS_OKAY
TP30
DSK_1 V2_SYS_OKAY
1
2.2K
TP32
1uF
C258
DSK_3V3_SYS_OKAY
1
1
R363
R353
10K
ALT_3V3
C253
0.1uF
ALT_3V3
C250
0.1uF
ALT_3V3
C246
2
1
R388
0
3
U51
SN74AHC14DCKRG4
4
R335
10K
C256
0.1uF
2
1
DSK_3V3_SYS_OKAY
ALT_3V3
21 XRSn
21 ARM_RSTn
ALT_3V3
3
5
3
ALT_3V3
ALT_3V3
2
1
2
1
5
3
4
4
4
2
2
C251
0.1uF
C247
0.1uF
U52
SN74AHC14DCKRG4
C257
0.1uF
1G08
U49
ALT_3V3
1G08
U46
ALT_3V3
5
3
5
3
2
1
33
R358
4
33
R357
TP48
TP
1G08
DWG NO
CPU_RESET 10,14
1
511342-0001
Sheet
31 o f
32
Revision:
B
BOOT_DISABLEn 2,3,4,5,8,16,19,27
BOOT_DISABLE 2,3,14,16,19
PONRSnIN 21
EXP_RESETn 27,28,29
ENET_RESET 24
AIC3106_RESETn 22
TP47
TP
Monday, Novem ber 24, 2008
POWER IN
OMAP-L137 EVM
Size: B
Date:
CPU_RESET
C249
0.1uF
1
SPECTRUM DIGITAL INCORPORATED
4
Page Contents:
Title:
U53
SN74AHC14DCKRG4
C255
.1uF
33
R354
ALT_3V3
33
R352
2
1
U47
ALT_3V3
5
3
4
5
3
1
A-32
1
5
A
B
C
D
Spectrum Digital, Inc
OMAP-L137 EVM Technical Reference
A
B
C
D
5
10uF
C260
VLDO2
NO-POP
1
F1
F_4.0A
R366
2
SW6
SW ITCH
3
1
VOUT
EN
FB
TPS79901-ADJ
VIN
U54
4
5
1
TP41
TP
1
TP42
TP
R373
220K 1%
R372
15K 1%
C261
5.6pF
4
1
TP43
TP
C262
10uF
ALT_CPU_1V2
TP34
TP
ALTERNATE 1.2V Power Supply
D1
SMCJ6A
Vout = ((R1+R2)/R2) *1.193
CENTER
SHUNT
SLEEVE
2.5 MM JACK
RASM712
J6
SILKSCREEN:
5V IN
GND
2
8
3
1
6
TP44
TP
4
1
3
1
DS7
LED GRN
R368
220
TP45
TP
DS9
LED GRN
R374
220
VCC_3V3
2
5
7
TP33
TP-30
3
TP46
TP
R369
C259
47uF
VCC_1V2
+
VCC_5V
1K
1
2
Q1
FJV3109R
DS6
LED GRN
R367
360
VCC_5V
2
3
2
4
1
1
Z8
VCC_1V8
Date:
Size: B
Z9
1K
1
Z10
1
DWG NO
POWER IN
1
511342-0001
OMAP-L137 EVM
Sheet
32 o f
32
Revision:
B
Q2
FJV3109R
DS8
LED GRN
R370
360
VCC_5V
SPECTRUM DIGITAL INCORPORATED
R371
1
Monday, Novem ber 24, 2008
Page Contents:
Title:
Z7
Mounting holes 0.250 pad 0.125 drill
1
3
2
5
A
B
C
D
Spectrum Digital, Inc
A-33
1
Spectrum Digital, Inc
A-34
OMAP-L137 EVM Technical Reference
Appendix B
Mechanical Information
This appendix contains the mechanical information about the OMAP-L137
EVM produced by Spectrum Digital.
B-1
THIS DRAWING IS NOT TO SCALE
Spectrum Digital, Inc
B-2
OMAP-L137 EVM Technical Reference
Printed in U.S.A., November 2008
511345-0001 Rev A