95694.pdf

REVISIONS
LTR
DESCRIPTION
DATE (YR-MO-DA)
APPROVED
A
Make change to input leakage current test, overvoltage protected test, positive
supply current test, negative supply current test, and break-before-make time
delay test as specified in table I herein. - ro
98-12-15
Raymond Monnin
B
Make changes to the descriptive designator under 1.2.4. Change ratings
values under 1.3. Editorial changes throughout. -lgt
99-06-15
Raymond Monnin
C
Make changes to figure 3 timing diagrams. -rrp
00-06-29
Raymond Monnin
D
Update drawing to current requirements. Delete paragraphs 4.4.4.2 and
4.4.4.3. Editorial changes throughout. - drw
06-07-28
Raymond Monnin
REV
SHEET
REV
D
D
SHEET
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REV STATUS
REV
D
D
D
D
D
D
D
D
D
D
D
D
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OF SHEETS
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PMIC N/A
PREPARED BY
Sandra Rooney
STANDARD
MICROCIRCUIT
DRAWING
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43218-3990
http://www.dscc.dla.mil
CHECKED BY
Sandra Rooney
APPROVED BY
THIS DRAWING IS AVAILABLE
FOR USE BY ALL
DEPARTMENTS
AND AGENCIES OF THE
DEPARTMENT OF DEFENSE
Michael A. Frye
DRAWING APPROVAL DATE
96-02-27
AMSC N/A
REVISION LEVEL
D
MICROCIRCUIT, LINEAR, RADIATION HARDENED
CMOS, MULTIPLEXER / DEMULTIPLEXER WITH
ACTIVE OVERVOLTAGE PROTECTION,
MONOLITHIC SILICON
SIZE
CAGE CODE
A
67268
SHEET
DSCC FORM 2233
APR 97
1 OF
5962-95694
16
5962-E571-06
1. SCOPE
1.1 Scope. This drawing documents two product assurance class levels consisting of high reliability (device classes Q and M)
and space application (device class V). A choice of case outlines and lead finishes are available and are reflected in the Part or
Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels are reflected in the PIN.
1.2 PIN. The PIN is as shown in the following example:
5962
D
95694
Federal
stock class
designator
\
RHA
designator
(see 1.2.1)
01
V
E
A
Device
type
(see 1.2.2)
Device
class
designator
(see 1.2.3)
Case
outline
(see 1.2.4)
Lead
finish
(see 1.2.5)
/
\/
Drawing number
1.2.1 RHA designator. Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and are
marked with the appropriate RHA designator. Device class M RHA marked devices meet the MIL-PRF-38535, appendix A
specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device.
1.2.2 Device types. The device types identify the circuit function as follows:
Device type
Generic number
01
HS548RH
02
HS549RH
Circuit function
Radiation hardened DI CMOS single 8-channel
MUX / DEMUX with active overvoltage protection
Radiation hardened DI CMOS single 4-channel
MUX / DEMUX with active overvoltage protection
1.2.3 Device class designator. The device class designator is a single letter identifying the product assurance level as
follows:
Device class
Device requirements documentation
M
Vendor self-certification to the requirements for MIL-STD-883 compliant, nonJAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A
Q or V
Certification and qualification to MIL-PRF-38535
1.2.4 Case outline. The case outline is as designated in MIL-STD-1835 as follows:
Outline letter
E
Descriptive designator
Terminals
Package style
GDIP1-T16 or CDIP2-T16
16
Dual-in-line
1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535,
appendix A for device class M.
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1.3 Absolute maximum ratings. 1/
Supply voltage between +V and -V ............................................................................
Supply voltage between +V and ground ....................................................................
Supply voltage between -V and ground .....................................................................
Digital input voltage range
+VEN, +VA ................................................................................................................
-VEN, -VA .................................................................................................................
Analog input voltage range
+VS ..........................................................................................................................
-VS ...........................................................................................................................
Peak current, S or D
(pulsed at 1 ms, 10 percent duty cycle maximum) ...................................................
Storage temperature range ........................................................................................
Maximum power dissipation at TA = +125°C (PD) .......................................................
Thermal resistance, junction-to-case (θJC) .................................................................
Thermal resistance, junction-to-ambient (θJA) ............................................................
Lead temperature (soldering, 10 seconds) ................................................................
Junction temperature (TJ) ..........................................................................................
+44 V
+22 V
-25 V
+VSUPPLY + 4 V
-VSUPPLY - 4 V
+VSUPPLY + 20 V
-VSUPPLY - 20 V
40 mA
-65°C to +150°C
0.63 W 2/
24°C/W
80°C/W
+300°C
+175°C
1.4 Recommended operating conditions.
Operating supply voltage (±VSUPPLY) ..........................................................................
Analog input voltage (VS) ...........................................................................................
Logic low level (VAL) ...................................................................................................
Logic high level (VAH) .................................................................................................
Maximum RMS current, S or D ..................................................................................
Ambient operating temperature range (TA) ................................................................
±15 V
±VSUPPLY
0 V to 0.8 V
+4 V to +VSUPPLY
8 mA
-55°C to +125°C
1.5 Radiation features.
Maximum total dose available (dose rate = 50-300 rads (Si)/s) .................................. 10 Krads (Si)
Latch-up 3/ ................................................................................................................. None
2. APPLICABLE DOCUMENTS
2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part
of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the
solicitation or contract.
DEPARTMENT OF DEFENSE SPECIFICATION
MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for.
DEPARTMENT OF DEFENSE STANDARDS
MIL-STD-883 MIL-STD-1835 -
Test Method Standard Microcircuits.
Interface Standard Electronic Component Case Outlines.
_______
1/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the
maximum levels may degrade performance and affect reliability.
2/ If device power exceeds package dissipation capacity, provide heat sinking or derate linearly ( the derating is based on θJA)
at 12.5 mW/°C for case outline E.
3/ Guaranteed by process or design, not tested.
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REVISION LEVEL
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DEPARTMENT OF DEFENSE HANDBOOKS
MIL-HDBK-103 MIL-HDBK-780 -
List of Standard Microcircuit Drawings.
Standard Microcircuit Drawings.
(Copies of these documents are available online at http://assist.daps.dla.mil/quicksearch/ or http://assist.daps.dla.mil or
from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.)
2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of
this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a
specific exemption has been obtained.
3. REQUIREMENTS
3.1 Item requirements. The individual item requirements for device classes Q and V shall be in accordance with
MIL-PRF-38535 and as specified herein or as modified in the device manufacturer's Quality Management (QM) plan. The
modification in the QM plan shall not affect the form, fit, or function as described herein. The individual item requirements for
device class M shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified
herein.
3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in
MIL-PRF-38535 and herein for device classes Q and V or MIL-PRF-38535, appendix A and herein for device class M.
3.2.1 Case outline. The case outline shall be in accordance with 1.2.4 herein.
3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1.
3.2.3 Truth tables. The truth tables shall be as specified on figure 2.
3.2.4 Radiation exposure circuit. The radiation exposure circuit shall be as specified on table III.
3.3 Electrical performance characteristics and postirradiation parameter limits. Unless otherwise specified herein, the
electrical performance characteristics and postirradiation parameter limits are as specified in table I and shall apply over the full
ambient operating temperature range.
3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical
tests for each subgroup are defined in table I.
3.5 Marking. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturer's PIN may also be
marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer
has the option of not marking the "5962-" on the device. For RHA product using this option, the RHA designator shall still be
marked. Marking for device classes Q and V shall be in accordance with MIL-PRF-38535. Marking for device class M shall be
in accordance with MIL-PRF-38535, appendix A.
3.5.1 Certification/compliance mark. The certification mark for device classes Q and V shall be a "QML" or "Q" as required in
MIL-PRF-38535. The compliance mark for device class M shall be a "C" as required in MIL-PRF-38535, appendix A.
3.6 Certificate of compliance. For device classes Q and V, a certificate of compliance shall be required from a QML-38535
listed manufacturer in order to supply to the requirements of this drawing (see 6.6.1 herein). For device class M, a certificate of
compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see
6.6.2 herein). The certificate of compliance submitted to DSCC-VA prior to listing as an approved source of supply for this
drawing shall affirm that the manufacturer's product meets, for device classes Q and V, the requirements of MIL-PRF-38535 and
herein or for device class M, the requirements of MIL-PRF-38535, appendix A and herein.
3.7 Certificate of conformance. A certificate of conformance as required for device classes Q and V in MIL-PRF-38535 or for
device class M in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing.
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REVISION LEVEL
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TABLE I. Electrical performance characteristics.
Test
Input leakage current 1/
Symbol
IIH
IIL
Conditions
-55°C ≤ TA ≤ +125°C
-V = -15 V, +V = +15 V
VEN = 4.0 V
unless otherwise specified
Measure inputs sequentially,
connect all unused inputs to
+IS(OFF)
M, D 2/
VS = -10 V, VEN = 0.8 V,
all unused inputs = +10 V,
VEN = 0.5 V, M, D 2/
+ID(OFF)
VD = +10 V, VEN = 0.8 V,
all unused inputs = -10 V
VEN = 0.5 V, M, D 2/
-ID(OFF)
1.0
-1.0
1.0
-1.0
1.0
-10
+10
2, 3
-50
+50
1
-50
+50
-10
+10
2, 3
-50
+50
1
-50
+50
1
VD = +10 V
Leakage current into the
drain terminal of an
“OFF” switch
-1.0
1
VEN = 0.5 V, M, D 2/
01, 02
VEN = 0.5 V, M, D 2/
01, 02
01, 02
1
01, 02
-10
+10
2, 3
01
-200
+200
02
-100
+100
01
-200
+200
02
-100
+100
1
01, 02
-10
+10
2, 3
01
-200
+200
02
-100
+100
01
-200
+200
02
-100
+100
1
VD = -10 V, VEN = 0.8 V,
all unused inputs = +10 V
Unit
Max
1
VS = +10 V, VEN = 0.8 V,
all unused inputs = -10 V,
Limits
Min
1, 2, 3
VD = -10 V
-IS(OFF)
Device
type
GND
IIH, IIL
Leakage current into the
source terminal of an
“OFF” switch
Group A
subgroups
1
µA
nA
nA
nA
See footnotes at end of table.
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TABLE I. Electrical performance characteristics – continued.
Test
Leakage current from an
“ON” driver into the
switch (drain)
Symbol
+ID(ON)
Conditions
-55°C ≤ TA ≤ +125°C
-V = -15 V, +V = +15 V
Group A
subgroups
VEN = 4.0 V
unless otherwise specified
VD = +10 V, VS = +10 V,
all unused inputs = -10 V
VEN = 4.5 V, M, D 2/
-ID(ON)
VEN = 4.5 V, M, D 2/
Overvoltage protected,
leakage current into the
+ID(OFF)
drain terminal of an “ON”
switch
Overvoltage
-ID(OFF)
Overvoltage
Positive supply current
+I
-I
VA = 0 V, VEN = 4.0 V
+ISBY
-200
+200
02
-100
+100
01
-200
+200
02
-100
+100
1
01, 02
-10
+10
2, 3
01
-200
+200
02
-100
+100
01
-200
+200
02
-100
+100
01, 02
-2.0
+2.0
-5.0
+5.0
-2.0
+2.0
-5.0
+5.0
1, 2, 3
01, 02
01, 02
1
VA = 0 V, VEN = 4.0 V
01, 02
1
VA = 0 V, VEN = 0 V
nA
µA
µA
2.0
mA
-1.0
mA
-1.0
1, 2, 3
M, D 2/
nA
2.0
1, 2, 3
VEN = 4.5 V, M, D 2/
Standby positive supply
current
01
1
VEN = 4.5 V, M, D 2/
Negative supply current
2, 3
1, 2, 3
VEN = 0.5 V, M, D 2/
Max
+10
1
VS = -33 V, VD = 0 V,
VEN = 0.8 V
Min
-10
1, 2, 3
VEN = 0.5 V, M, D 2/
Unit
01, 02
1
VS = 33 V, VD = 0 V,
VEN = 0.8 V
Limits
1
1
VD = -10 V, VS = -10 V,
all unused inputs = +10 V
Device
type
01, 02
1
2.0
mA
2.0
See footnotes at end of table.
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TABLE I. Electrical performance characteristics – continued.
Test
Symbol
Conditions
-55°C ≤ TA ≤ +125°C
-V = -15 V, +V = +15 V
Group A
subgroups
Device
type
VEN = 4.0 V
unless otherwise specified
Standby negative supply
current
-ISBY
Min
VA = 0 V, VEN = 0 V
1, 2, 3
M, D 2/
Switch “ON” resistance
+RDS1
VS = 10 V, ID = -100 µA
VS = -10 V, ID = +100 µA
+∆RDS1
VEN = 4.5 V, M, D 2/
between channels
-∆RDS1
Logic level voltage
VAL
1800
1
1800
01, 02
2, 3
1800
1
1800
1
3/, 4/
01, 02
7
01, 02
%
7
%
7
01, 02
0.8
1
V
0.5
1, 2, 3
M, D 2/
Ω
7
1, 2, 3
3/, 4/
Ω
1500
1
M, D 2/
VAH
2, 3
1
VEN = 4.5 V, M, D 2/
mA
1500
1
((-RDS1MAX)-(-RDS1MIN)x100) /
-RDS1AVE
Max
-1.0
01, 02
1
((+RDS1MAX)-(+RDS1MIN)x100) /
RDS1AVE
Unit
-1.0
1
VEN = 4.5 V, M, D 2/
Difference in switch
“ON” resistance
01, 02
1
VEN = 4.5 V, M, D 2/
-RDS1
Limits
01, 02
1
4.0
V
4.5
Capacitance:
Address
CA
V+ = V- = 0 V, f = 1 MHz, 5/
TA = +25°C, see 4.4.1d
4
01, 02
10
pF
Capacitance:
Output switch
COS
V+ = V- = 0 V, f = 1 MHz, 5/
4
01
45
pF
02
25
TA = +25°C, see 4.4.1d
Capacitance:
Input switch
CIS
V+ = V- = 0 V, f = 1 MHz, 5/
TA = +25°C, see 4.4.1d
4
01, 02
15
pF
Charge transfer error
VCTE
VS = GND, f = 200 kHz, 5/
VGEN = 0 V to 5 V, TA = +25°C
4
01, 02
10
mV
See footnotes at end of table.
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TABLE I. Electrical performance characteristics – continued.
Test
Symbol
Off isolation
VISO
Functional test
FT
tOPEN
Break-before-make time
delay
Conditions
-55°C ≤ TA ≤ +125°C
-V = -15 V, +V = +15 V
Group A
subgroups
VEN = 4.0 V
unless otherwise specified
VEN = 0.8 V, RL = 1 kΩ, 5/
CL = 15 pF, VS = 7 V rms,
f = 100 kHz, TA = +25°C
tA
4
01, 02
See 4.4.1b
7, 8
01, 02
See figure 3
9
01, 02
See figure 3
M, D 2/
tON(EN)
See figure 3
tOFF(EN)
See figure 3
ns
5
500
10, 11
1,000
9
1,000
01, 02
1,000
9
1,000
01, 02
ns
500
10, 11
9
M, D 2/
25
9
9
M, D 2/
Max
dB
5
01, 02
Unit
-50
10, 11
9
to I/O channels times
Enable to I/O
Limits
Min
M, D 2/
Propagation delay time:
Address inputs
Device
type
ns
500
10, 11
1,000
9
1,000
ns
1/ Input current of one input mode.
2/ Devices supplied to this drawing meet all levels M and D of irradiation. However, these devices are only tested at D level.
Pre and post irradiation values are identical unless otherwise specified in Table I.
3/ Used for forcing conditions for all DC tests, unless otherwise specified.
4/ To drive from DTL / TTL circuits, 1 kΩ pull-up resistors to +5.0 V supply are recommended.
5/ Guaranteed, if not tested, to the limits as specified.
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Case outline
E
Device types
01
Terminal number
02
Terminal symbol
1
A0
A0
2
ENABLE
ENABLE
3
-VSUPPLY
-VSUPPLY
4
IN 1
IN 1A
5
IN 2
IN 2A
6
IN 3
IN 3A
7
IN 4
IN 4A
8
OUT
OUTA
9
IN 8
OUTB
10
IN 7
IN 4B
11
IN 6
IN 3B
12
IN 5
IN 2B
13
+VSUPPLY
IN 1B
14
GND
+VSUPPLY
15
A2
GND
16
A1
A1
FIGURE 1. Terminal connections.
Device type 01
A2
A1
A0
EN
X
L
L
L
L
H
H
H
H
X
L
L
H
H
L
L
H
H
X
L
H
L
H
L
H
L
H
L
H
H
H
H
H
H
H
H
“ON”
CHANNEL
NONE
1
2
3
4
5
6
7
8
Device type 02
A1
A0
EN
X
L
L
H
H
X
L
H
L
H
L
H
H
H
H
“ON” CHANNEL
PAIR
NONE
1
2
3
4
FIGURE 2. Truth tables.
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FIGURE 3. Timing diagrams.
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FIGURE 3. Timing diagrams - continued.
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FIGURE 3. Timing diagrams - continued.
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3.8 Notification of change for device class M. For device class M, notification to DSCC-VA of change of product (see 6.2
herein) involving devices acquired to this drawing is required for any change that affects this drawing.
3.9 Verification and review for device class M. For device class M, DSCC, DSCC's agent, and the acquiring activity retain the
option to review the manufacturer's facility and applicable required documentation. Offshore documentation shall be made
available onshore at the option of the reviewer.
3.10 Microcircuit group assignment for device class M. Device class M devices covered by this drawing shall be in
microcircuit group number 82 (see MIL-PRF-38535, appendix A)
4. VERIFICATION
4.1 Sampling and inspection. For device classes Q and V, sampling and inspection procedures shall be in accordance with
MIL-PRF-38535 or as modified in the device manufacturer's Quality Management (QM) plan. The modification in the QM plan
shall not affect the form, fit, or function as described herein. For device class M, sampling and inspection procedures shall be in
accordance with MIL-PRF-38535, appendix A.
4.2 Screening. For device classes Q and V, screening shall be in accordance with MIL-PRF-38535, and shall be conducted
on all devices prior to qualification and technology conformance inspection. For device class M, screening shall be in
accordance with method 5004 of MIL-STD-883, and shall be conducted on all devices prior to quality conformance inspection.
4.2.1 Additional criteria for device class M.
a.
Burn-in test, method 1015 of MIL-STD-883.
(1) Test condition A, B, C. or D. The test circuit shall be maintained by the manufacturer under document revision
level control and shall be made available to the preparing or acquiring activity upon request. The test circuit shall
specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in
method 1015.
(2) TA = +125°C, minimum.
b.
Interim and final electrical test parameters shall be as specified in table II herein.
4.2.2 Additional criteria for device classes Q and V.
a.
The burn-in test duration, test condition and test temperature, or approved alternatives shall be as specified in the
device manufacturer's QM plan in accordance with MIL-PRF-38535. The burn-in test circuit shall be maintained under
document revision level control of the device manufacturer's Technology Review Board (TRB) in accordance with
MIL-PRF-38535 and shall be made available to the acquiring or preparing activity upon request. The test circuit shall
specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in
method 1015 of MIL-STD-883.
b.
Interim and final electrical test parameters shall be as specified in table II herein.
c.
Additional screening for device class V beyond the requirements of device class Q shall be as specified in
MIL-PRF-38535, appendix B.
4.3 Qualification inspection for device classes Q and V. Qualification inspection for device classes Q and V shall be in
accordance with MIL-PRF-38535. Inspections to be performed shall be those specified in MIL-PRF-38535 and herein for groups
A, B, C, D, and E inspections (see 4.4.1 through 4.4.4).
4.4 Conformance inspection. Technology conformance inspection for classes Q and V shall be in accordance with
MIL-PRF-38535 including groups A, B, C, D, and E inspections and as specified herein. Quality conformance inspection for
device class M shall be in accordance with MIL-PRF-38535, appendix A and as specified herein. Inspections to be performed
for device class M shall be those specified in method 5005 of MIL-STD-883 and herein for groups A, B, C, D, and E inspections
(see 4.4.1 through 4.4.4).
STANDARD
MICROCIRCUIT DRAWING
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
5962-95694
A
REVISION LEVEL
D
SHEET
13
4.4.1 Group A inspection.
a.
Tests shall be as specified in table IIA herein.
b.
For device class M, subgroups 7 and 8 tests shall be sufficient to verify the truth table. For device classes Q and V,
subgroups 7 and 8 shall include verifying the functionality of the device.
c.
Subgroups 5 and 6 in table I, method 5005 of MIL-STD-883 shall be omitted.
d.
Subgroups 4 (CA, CIS, and COS measurements) should be measured only for initial qualification and after any process
or design changes which may affect input or output capacitance.
TABLE IIA. Electrical test requirements.
Test requirements
Interim electrical
parameters (see 4.2)
Final electrical
parameters (see 4.2)
Group A test
requirements (see 4.4)
Group C end-point electrical
parameters (see 4.4)
Group D end-point electrical
parameters (see 4.4)
Group E end-point electrical
parameters (see 4.4)
Subgroups
(in accordance with
MIL-PRF-38535, table III)
Subgroups
(in accordance with
MIL-STD-883,
method 5005, table I)
Device
class M
Device
class Q
Device
class V
1, 7, 9
1, 7, 9
1, 7, 9
1, 2, 3, 7, 8, 9, 10, 11
1/
1, 2, 3, 7, 8, 9,
10, 11 1/
1, 2, 3, 7, 8, 9,
10, 11, ∆, 1/, 2/
1, 2, 3, 4, 7, 8, 9, 10,
11 3/
1, 2, 3, 4, 7, 8, 9,
10, 11 3/
1, 2, 3, 4, 7, 8, 9,
10, 11 3/
1, 2, 3, 7, 8, 9, 10, 11
1, 2, 3, 7, 8, 9,
10, 11
1, 2, 3, 7, 8, 9,
10, 11, ∆
1, 7, 9
1, 7, 9
1, 7, 9
1, 7, 9
1, 7, 9
1, 7, 9
1/ PDA applies to subgroup 1. For class V to subgroups 1 and ∆.
2/ Delta limits (see table IIB) shall be required and the delta values shall be computed with
reference to the zero hour electrical parameters (see table I).
3/ Subgroup 4, if not tested, shall be guaranteed to the limits specified in table I.
TABLE IIB. Burn-in delta parameters and group C delta parameters (+25°C).
Parameters
Leakage current into the source
terminal of an “OFF” switch
Leakage current into the drain
terminal of an “OFF” switch
Leakage current from an “ON” driver
into the switch (drain and source)
Switch on resistance
Delta limits
IS(OFF)
±10 nA
ID(OFF)
±10 nA
ID(ON)
±10 nA
RDS
±150 Ω
Positive supply current
I+
±200 µA
Negative supply current
I-
±100 µA
Positive standby supply current
+ISBY
±200 µA
Negative standby supply current
-ISBY
±100 µA
Input leakage current
IIL, IIH
±100 µA
STANDARD
MICROCIRCUIT DRAWING
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
Symbol
SIZE
5962-95694
A
REVISION LEVEL
D
SHEET
14
TABLE III. Irradiation test connections. (TA = +25°C ±5°C, +VSUPPLY = +15 V ±5%, -VSUPPLY = -15 V ±5%)
Device type 01
Test
Ground
V+
V-
Radiation exposure
2,8,14 1/
13
3
+1 V ±5%
4,5,6,7,9,10,11,12
5 V ±5%
1,15,16
Device type 02
Test
Ground
V+
V-
Radiation exposure
2,8,9,15 2/
14
3
1/
2/
+1 V ±5%
4,5,6,7,10,11,12,13
5 V ±5%
1,16
Pin 8 has a series resistor (RS) = 10 kΩ ±5%.
Pins 8 and 9 each have a series resistor (RS) = 10 kΩ ±5%.
4.4.2 Group C inspection. The group C inspection end-point electrical parameters shall be as specified in table IIA herein.
4.4.2.1 Additional criteria for device class M. Steady-state life test conditions, method 1005 of MIL-STD-883:
a.
Test condition A, B, C, or D. The test circuit shall be maintained by the manufacturer under document revision level
control and shall be made available to the preparing or acquiring activity upon request. The test circuit shall specify the
inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in method 1005 of
MIL-STD-883.
b.
TA = +125°C, minimum.
c.
Test duration: 1,000 hours, except as permitted by method 1005 of MIL-STD-883.
4.4.2.2 Additional criteria for device classes Q and V. The steady-state life test duration, test condition and test temperature,
or approved alternatives shall be as specified in the device manufacturer's QM plan in accordance with MIL-PRF-38535. The
test circuit shall be maintained under document revision level control by the device manufacturer's TRB in accordance with
MIL-PRF-38535 and shall be made available to the acquiring or preparing activity upon request. The test circuit shall specify the
inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in method 1005 of MIL-STD883.
4.4.3 Group D inspection. The group D inspection end-point electrical parameters shall be as specified in table IIA herein.
4.4.4 Group E inspection. Group E inspection is required only for parts intended to be marked as radiation hardness assured
(see 3.5 herein).
a.
End-point electrical parameters shall be as specified in table IIA herein.
b.
For device classes Q and V, the devices or test vehicle shall be subjected to radiation hardness assured tests as
specified in MIL-PRF-38535 for the RHA level being tested. For device class M, the devices shall be subjected to
radiation hardness assured tests as specified in MIL-PRF-38535, appendix A for the RHA level being tested. All device
classes must meet the postirradiation end-point electrical parameter limits as defined in table I at TA = +25°C ±5°C,
after exposure, to the subgroups specified in table IIA herein.
4.4.4.1 Total dose irradiation testing. Total dose irradiation testing shall be performed in accordance with
MIL-STD-883 method 1019 condition A and as specified herein.
4.4.4.1.1 Accelerated aging test. Accelerated aging tests shall be performed on all devices requiring a RHA level greater than
5k rads(Si). The post-anneal end-point electrical parameter limits shall be as specified in table I herein and shall be the preirradiation end-point electrical parameter limit at 25°C ±5°C. Testing shall be performed at initial qualification and after any
design or process changes which may affect the RHA response of the device.
STANDARD
MICROCIRCUIT DRAWING
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
5962-95694
A
REVISION LEVEL
D
SHEET
15
4.4.4.2 Dose rate burnout. When required by the customer, test shall be performed on devices, SEC, or approved test
structures at technology qualifications and after any design or process changes which may effect the RHA capability of the
process. Dose rate burnout shall be performed in accordance with test method 1023 of MIL-STD-883 and as specified herein.
5. PACKAGING
5.1 Packaging requirements. The requirements for packaging shall be in accordance with MIL-PRF-38535 for device classes
Q and V or MIL-PRF-38535, appendix A for device class M.
6. NOTES
6.1 Intended use. Microcircuits conforming to this drawing are intended for use for Government microcircuit applications
(original equipment), design applications, and logistics purposes.
6.1.1 Replaceability. Microcircuits covered by this drawing will replace the same generic device covered by a contractor
prepared specification or drawing.
6.1.2 Substitutability. Device class Q devices will replace device class M devices.
6.2 Configuration control of SMD's. All proposed changes to existing SMD's will be coordinated with the users of record for
the individual documents. This coordination will be accomplished using DD Form 1692, Engineering Change Proposal.
6.3 Record of users. Military and industrial users should inform Defense Supply Center Columbus (DSCC) when a system
application requires configuration control and which SMD's are applicable to that system. DSCC will maintain a record of users
and this list will be used for coordination and distribution of changes to the drawings. Users of drawings covering microelectronic
devices (FSC 5962) should contact DSCC-VA, telephone (614) 692-0544.
6.4 Comments. Comments on this drawing should be directed to DSCC-VA , Columbus, Ohio 43218-3990, or telephone
(614) 692-0547.
6.5 Abbreviations, symbols, and definitions. The abbreviations, symbols, and definitions used herein are defined in
MIL-PRF-38535 and MIL-HDBK-1331.
6.6 Sources of supply.
6.6.1 Sources of supply for device classes Q and V. Sources of supply for device classes Q and V are listed in QML-38535.
The vendors listed in QML-38535 have submitted a certificate of compliance (see 3.6 herein) to DSCC-VA and have agreed to
this drawing.
6.6.2 Approved sources of supply for device class M. Approved sources of supply for class M are listed in MIL-HDBK-103.
The vendors listed in MIL-HDBK-103 have agreed to this drawing and a certificate of compliance (see 3.6 herein) has been
submitted to and accepted by DSCC-VA.
STANDARD
MICROCIRCUIT DRAWING
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
5962-95694
A
REVISION LEVEL
D
SHEET
16
STANDARD MICROCIRCUIT DRAWING BULLETIN
DATE: 06-07-28
Approved sources of supply for SMD 5962-95694 are listed below for immediate acquisition information only and shall
be added to MIL-HDBK-103 and QML-38535 during the next revision. MIL-HDBK-103 and QML-38535 will be revised
to include the addition or deletion of sources. The vendors listed below have agreed to this drawing and a certificate
of compliance has been submitted to and accepted by DSCC-VA. This information bulletin is superseded by the next
dated revision of MIL-HDBK-103 and QML-38535. DSCC maintains an online database of all current sources of
supply at http://www.dscc.dla.mil/Programs/Smcr/.
Standard
microcircuit drawing
PIN 1/
Vendor
CAGE
number
Vendor
similar
PIN 2/
5962D9569401VEA
3/
HS1-0548RH-Q
5962D9569401VEC
34371
HS1B-0548RH-Q
5962D9569402VEA
3/
HS1-0549RH-Q
5962D9569402VEC
3/
HS1B-0549RH-Q
1/ The lead finish shown for each PIN representing
a hermetic package is the most readily available
from the manufacturer listed for that part. If the
desired lead finish is not listed contact the vendor
to determine its availability.
2/ Caution. Do not use this number for item
acquisition. Items acquired to this number may not
satisfy the performance requirements of this drawing.
3/ Not available from an approved source of supply.
Vendor CAGE
number
34371
Vendor name
and address
Intersil Corporation
1001 Murphy Ranch Road
Milpitas, CA 95035-6803
The information contained herein is disseminated for convenience only and the
Government assumes no liability whatsoever for any inaccuracies in the
information bulletin.