DATASHEET

Radiation Hardened 8 Channel CMOS Analog
Multiplexers with Overvoltage Protection
HS-508BRH, HS-508BEH
Features
The HS-508BRH, HS-508BEH are dielectrically isolated,
radiation hardened, CMOS analog multiplexers incorporating an
important feature; they withstand analog input voltages much
greater than the supplies. This is essential in any system where
the analog inputs originate outside the equipment. They can
withstand a continuous input up to 10V greater than either
supply, which eliminates the possibility of damage when
supplies are off, but input signals are present. Equally
important, they can withstand brief input transient spikes of
several hundred volts; which otherwise would require complex
external protection networks. Necessarily, ON resistance is
somewhat higher than similar unprotected devices, but very low
leakage current combine to produce low errors. Reference
Application Notes 520 and 521 for further information on the
HS-508BRH, HS-508BEH multiplexers in general.
• Electrically Screened to SMD # 5962-96742
The HS-508BRH, HS-508BEH have been specifically designed
to meet exposure to radiation environments. Operation from
-55°C to +125°C is guaranteed.
• QML Qualified per MIL-PRF-38535 Requirements
• Radiation Environment
- Gamma Dose (γ) . . . . . . . . . . . . . . . . . . . . . 3 x 105 Rad (Si)
- Dielectrically Isolated Device Islands
- SEP >100 Mev-mg/cm2
• Analog/Digital Overvoltage Protection
• ESD Rated to 3kV
• Fail Safe with Power Loss (No Latchup)
• Break-Before-Make Switching
• (Typ) DTL/TTL and CMOS Compatible Threshold
• Analog Signal Range. . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±15V
• Fast Access Time
• Supply Current at 1MHz Address Toggle . . . . . . . . . 4mA (Typ)
• Standby Power . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7.5mW (Typ)
• Pb-Free (RoHS Compliant)
Specifications for Rad Hard QML devices are controlled by the
Defense Logistics Agency Land and Maritime (DLA). The SMD
numbers listed here must be used when ordering.
Detailed Electrical Specifications for these devices are
contained in SMD 5962-96742. A “hot-link” is provided on our
homepage for downloading.
http://www.landandmaritime.dla.mil/Downloads/MilSpec/S
md/96742.pdf
Ordering Information
ORDERING NUMBER
(Note)
INTERNAL
MKT. NUMBER
PART MARKING
TEMP. RANGE (°C)
PACKAGE
(Pb-Free)
PKG. DWG.
5962F9674202QEC
HS1-508BRH-8
Q 5962F96 74202QEC
-55 to +125
16 Ld SBDIP
D16.3
5962F9674202QXC
HS9-508BRH-8
Q 5962F96 74202QXC
-55 to +125
16 Ld Flatpack
K16.A
5962F9674202VEC
HS1-508BRH-Q
Q 5962F96 74202VEC
-55 to +125
16 Ld SBDIP
D16.3
5962F9674202VXC
HS9-508BRH-Q
Q 5962F96 74202VXC
-55 to +125
16 Ld Flatpack
K16.A
HS1-508BRH/PROTO
HS1-508BRH/PROTO
HS1- 508BRH /PROTO
-55 to +125
16 Ld SBDIP
D16.3
HS9-508BRH/PROTO
HS9-508BRH/PROTO
HS9- 508BRH /PROTO
-55 to +125
16 Ld Flatpack
K16.A
5962F9674203VXC
HS9-508BEH-Q
Q 5962F96 74203VXC
-55 to +125
16 Ld Flatpack
K16.A
NOTE: These Intersil Pb-free Hermetic packaged products employ 100% Au plate - e4 termination finish, which is RoHS compliant and compatible with
both SnPb and Pb-free soldering operations.
November 17, 2011
FN4824.3
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
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HS-508BRH, HS-508BEH
Pin Configurations
HS9-508BRH, HS9-508BEH
(16 LD FLATPACK)
MIL-STD-1835, CDFP4-F16
TOP VIEW
HS-508BRH
(16 LD SIDEBRAZE DIP)
MIL-STD-1835, CDIP2-T16
TOP VIEW
A0
1
16
A1
EN
2
15
A2
-VSUP
3
14
GND
IN1
4
13
+VSUP
16 A1
AO 1
15 A2
EN 2
14 GND
-VSUP 3
IN 1 4
13 +VSUP
IN2
5
12
IN5
IN 2 5
12 IN 5
IN3
6
11
IN6
IN 3 6
11 IN 6
IN4
7
10
IN7
OUT
8
9
IN8
IN 4 7
10 IN 7
OUT 8
9 IN 8
Functional Diagram
P
A0
DIGITAL
ADDRESS
N
IN 1
1
A1
OUT
A2
8
EN
P
ADDRESS INPUT
BUFFER AND
LEVEL SHIFTER
DECODERS
N
IN 8
MULTIPLEX
SWITCHES
TABLE 1. TRUTH TABLE
A2
A1
A0
EN
“ON” CHANNEL
X
X
X
L
NONE
L
L
L
H
1
L
L
H
H
2
L
H
L
H
3
L
H
H
H
4
H
L
L
H
5
H
L
H
H
6
H
H
L
H
7
H
H
H
H
8
2
FN4824.3
November 17, 2011
HS-508BRH, HS-508BEH
Die Characteristics
DIE DIMENSIONS
Backside Finish
120 mils x 93 mils x 19 mils
Silicon
INTERFACE MATERIALS
ASSEMBLY RELATED INFORMATION
Glassivation
Substrate Potential
Type: Phosphorus Silicon Glass (PSG)
Thickness: 8kÅ ±1kÅ
Unbiased (DI)
ADDITIONAL INFORMATION
Top Metallization
Worst Case Current Density
Type: AlSiCu
Thickness: 16kÅ ±2kÅ
6.68e04 A/cm2
Substrate
Transistor Count
Rad Hard Silicon Gate
Dielectric Isolation
506
Metallization Mask Layout
HS-508BRH, HS-508BEH
IN2
(5)
IN1
(4)
-V
(3)
IN3
(6)
EN
(2)
IN4
(7)
OUT
(8)
A0
(1)
IN8
(9)
A1
(16)
A2
(15)
IN7
(10)
IN6
(11)
IN5
(12)
3
+V
(13)
GND
(14)
FN4824.3
November 17, 2011
HS-508BRH, HS-508BEH
TABLE 2. HS-508BRH, HS-508BEH PAD COORDINATES
RELATIVE TO PIN 1
PIN NUMBER
PAD NAME
X COORDINATES
Y COORDINATES
1
A0
0
0
2
EN
-342
0
3
V-
-818
-653
4
IN1
-818
-879
5
IN2
-818
-1221
6
IN3
-598
-2579
7
IN4
-224
-2579
8
OUT
-38
-2579
9
IN8
314
-2579
10
IN7
724
-2579
11
IN6
1066
-2579
12
-IN5
1066
-761
13
V+
1100
-287
14
GND
1038
0
15
A2
684
0
16
A1
342
0
NOTE: Dimensions in microns
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parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
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4
FN4824.3
November 17, 2011
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