DATASHEET

Radiation Hardened, Very Low Noise Quad Operational
Amplifiers
HS-OP470ARH, HS-OP470AEH
Features
The HS-OP470ARH, HS-OP470AEH are a radiation hardened,
monolithic quad operational amplifiers that provide highly
reliable performance in harsh radiation environments. Excellent
noise characteristics coupled with a unique array of dynamic
specifications make these amplifiers well-suited for a variety of
satellite system applications. Dielectrically isolated, bipolar
processing makes these devices immune to Single Event
Latch-up.
• Electrically screened to SMD # 5962-98533
• QML Qualified Per MIL-PRF-38535 requirements
• Radiation environment
- High dose rate (50-300rad(Si)/s). . . . . . . . . . . 100krad(Si)
- Low dose rate (0.01rad(Si)/s) . . . . . . . . . . . . . . .50krad(Si)
• Low noise
- At 1kHz . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4.3nV/√Hz (Typ)
- At 1kHz . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.6pA/√Hz (Typ)
The HS-OP470ARH, HS-OP470AEH shows almost no change in
offset voltage after exposure to 100krad(Si) gamma radiation,
with only a minor increase in current. Complementing these
specifications is a post radiation open loop gain in excess of
40kV/V.
• Low offset voltage . . . . . . . . . . . . . . . . . . . . . . . . . 2.1mV (Max)
These quad operational amplifiers are available in an industry
standard pinout, allowing for immediate interchangeability
with most other quad operational amplifiers.
Applications
Pin Configuration
• High slew rate . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.7V/µs (Min)
• Gain bandwidth product . . . . . . . . . . . . . . . . . . . .8.0MHz (Typ)
• High Q, active filters
• Voltage regulators
HS-OP407ARH, HS-OP470AEH
(14 LD FLATPACK)
TOP VIEW
• Integrators
• Signal generators
• Voltage references
OUT 1
1
14
OUT 4
-IN1
2
13
-IN4
+IN1
3
12
+IN4
V+
4
11
V-
+IN2
5
10
+IN3
-IN2
6
9
-IN3
OUT 2
7
8
OUT 3
August 8, 2013
FN4471.2
1
• Space environments
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
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HS-OP470ARH, HS-OP470AEH
Ordering Information
PART NUMBER
(Note 1)
ORDERING/SMD NUMBER
TEMP. RANGE
(°C)
PART MARKING
PACKAGE
(RoHS Compliant)
(Note 2)
PKG.
DWG. #
5962R9853301VXC
HS9-OP470ARH-Q
-55 to +125
Q 5962R98 53301VXC
14 Ld Flatpack
K14.A
5962R9853302VXC
HS9-OP470AEH-Q
-55 to +125
Q 5962R98 53302VXC
14 Ld Flatpack
K14.A
5962R9853301V9A
HS0-OP470ARH-Q
-55 to +125
Die
5962R9853302V9A
HS0-OP470AEH-Q
-55 to +125
Die
HS0-OP470ARH/SAMPLE
HS0-OP470ARH/SAMPLE
-55 to +125
Die
5962R9853301QXC
HS9-OP470ARH-8
-55 to +125
Q 5962R98 53301QXC
14 Ld Flatpack
K14.A
HS9-OP470ARH/PROTO
HS9-OP470ARH/PROTO
-55 to +125
HS9-OP470ARH/PROTO
14 Ld Flatpack
K14.A
HS-OP470ARHEV1Z
HS-OP470ARHEV1Z
Evaluation Board
1. Specifications for Rad Hard QML devices are controlled by the Defense Logistics Agency Land and Maritime (DLA). The SMD numbers listed in
the“Ordering Information” table must be used when ordering.
2. These Intersil Pb-free Hermetic packaged products employ 100% Au plate - e4 termination finish, which is RoHS compliant and compatible with
both SnPb and Pb-free soldering operations.
2
FN4471.2
August 8, 2013
HS-OP470ARH, HS-OP470AEH
Die Characteristics
PASSIVATION:
Type: Nitride (SI3N4) over Silox (SIO2, 5% Phos.)
Silox Thickness: 12kÅ ±2kÅ
Nitride Thickness: 3.5kÅ ±1.5kÅ
DIE DIMENSIONS:
95 mils x 99 mils x 19 mils ±1 mil
(2420µm x 2530µm x 483µm ±25.4µm)
WORST CASE CURRENT DENSITY:
METALLIZATION:
<2.0 x 105 A/cm2
Type: Al, 1% Cu
Thickness: 16kÅ ±2kÅ
TRANSISTOR COUNT:
175
SUBSTRATE POTENTIAL (Powered Up):
PROCESS:
Unbiased
Bipolar Dielectric Isolation
BACKSIDE FINISH:
Silicon
Metallization Mask Layout
HS-OP470ARH, HS-OP470AEH
+IN2
V+
+IN1
-IN1
-IN2
OUT2
OUT1
OUT3
OUT4
-IN3
-IN4
+IN3
V-
+IN4
For additional products, see www.intersil.com/en/products.html
Intersil products are manufactured, assembled and tested utilizing ISO9000 quality systems as noted
in the quality certifications found at www.intersil.com/en/support/qualandreliability.html
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time
without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be
accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third
parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
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FN4471.2
August 8, 2013
HS-OP470ARH, HS-OP470AEH
Ceramic Metal Seal Flatpack Packages (Flatpack)
K14.A MIL-STD-1835 CDFP3-F14 (F-2A, CONFIGURATION B)
A
e
14 LEAD CERAMIC METAL SEAL FLATPACK PACKAGE
A
INCHES
PIN NO. 1
ID AREA
SYMBOL
-A-
D
-B-
S1
b
E1
0.004 M
H A-B S
D S
0.036 M
Q
H A-B S
D S
C
E
-D-
A
-C-
-HL
E2
E3
SEATING AND
BASE PLANE
c1
L
LEAD FINISH
BASE
METAL
(c)
b1
M
M
(b)
SECTION A-A
MILLIMETERS
MAX
MIN
MAX
NOTES
A
0.045
0.115
1.14
2.92
-
b
0.015
0.022
0.38
0.56
-
b1
0.015
0.019
0.38
0.48
-
c
0.004
0.009
0.10
0.23
-
c1
0.004
0.006
0.10
0.15
-
D
-
0.390
-
9.91
3
E
0.235
0.260
5.97
6.60
-
E1
-
0.290
-
7.11
3
E2
0.125
-
3.18
-
-
E3
0.030
-
0.76
-
7
2
e
E3
MIN
0.050 BSC
1.27 BSC
-
k
0.008
0.015
0.20
0.38
L
0.270
0.370
6.86
9.40
-
Q
0.026
0.045
0.66
1.14
8
S1
0.005
-
0.13
-
6
M
-
0.0015
-
0.04
-
N
14
14
Rev. 0 5/18/94
NOTES:
1. Index area: A notch or a pin one identification mark shall be located
adjacent to pin one and shall be located within the shaded area
shown. The manufacturer’s identification shall not be used as a pin
one identification mark. Alternately, a tab (dimension k) may be
used to identify pin one.
2. If a pin one identification mark is used in addition to a tab, the limits
of dimension k do not apply.
3. This dimension allows for off-center lid, meniscus, and glass overrun.
4. Dimensions b1 and c1 apply to lead base metal only. Dimension M
applies to lead plating and finish thickness. The maximum limits of
lead dimensions b and c or M shall be measured at the centroid of
the finished lead surfaces, when solder dip or tin plate lead finish is
applied.
5. N is the maximum number of terminal positions.
6. Measure dimension S1 at all four corners.
7. For bottom-brazed lead packages, no organic or polymeric materials shall be molded to the bottom of the package to cover the leads.
8. Dimension Q shall be measured at the point of exit (beyond the meniscus) of the lead from the body. Dimension Q minimum shall be
reduced by 0.0015 inch (0.038mm) maximum when solder dip lead
finish is applied.
9. Dimensioning and tolerancing per ANSI Y14.5M - 1982.
10. Controlling dimension: INCH.
4
FN4471.2
August 8, 2013
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