DATASHEET

Single-Event Hardened, Single Supply, Quad
Operational Amplifiers
ISL7124SRH, ISL7124SEH
Features
The single-event radiation hardened ISL7124SRH,
ISL7124SEH consist of four independent, high gain, internally
frequency compensated operational amplifiers, specifically
designed to operate from a single power supply over a wide
range of voltages. These devices are functionally equivalent to
industry standard 124 types, offering improvements in supply
current and power supply rejection ratio.
• QML Qualified per MIL-PRF-38535 Requirements
Constructed with Intersil’s dielectrically isolated, radiation
hardened silicon gate (RSG) BiCMOS process, these devices
are immune to single event latchup. Additionally, the design
has been hardened to prevent single event transients (SETs) in
excess of 1V for LETs up to 36MeV/mg/cm2.
• Electrically Screened to DLA SMD # 5962-02542
• Radiation Environment
- Total Dose . . . . . . . . . . . . . . . . . . . . . . . . . .300krad(Si)(Max)
- Latch-Up Immune
- SET Threshold (Delta Vo<1V) . . . . . .36MeV/mg/cm2(Min)
• Single Supply Voltage Range (5V to 30V)
• Input Common Mode Voltage Range Includes Ground
• Input Offset Voltage . . . . . . . . . . . . . . . . . . . . . . +/-10mV(Max)
• Input Offset Current . . . . . . . . . . . . . . . . . . . . . +/-150nA(Max)
The ISL7124SRH, ISL7124SEH have been specifically
designed and manufactured to provide highly reliable
performance in harsh radiation environments. They are total
dose hardened to 300krad(Si) and offer guaranteed
performance over the full -55°C to +125°C military
temperature range.
• Input Bias Current . . . . . . . . . . . . . . . . . . . . . . . . . 400nA(Max)
Specifications for Rad Hard QML devices are controlled by the
Defense Logistics Agency Land and Maritime (DLA). The SMD
numbers listed here must be used when ordering.
Applications
Detailed Electrical Specifications for these devices are
contained in SMD 5962-02542. A “hot-link” is provided on our
website for downloading.
• General Analog Signal Processing
• Open Loop Voltage Gain . . . . . . . . . . . . . . . . . . . 20V/mV(Min)
• Power Supply Rejection Ratio . . . . . . . . . . . . . . . . .70dB(Min)
• Common Mode Rejection Ratio . . . . . . . . . . . . . . . .70dB(Min)
• ESD (HBM). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3000V(Min)
• Single Supply Operation of Op-Amp Circuits
Pin Configuration
ISL7124SRH, ISL7124SEH (FLATPACK CDFP3-F14)
TOP VIEW
OUT 1
1
14
OUT 4
-IN 4
-IN 1
2
13
+IN 1
3
12
+IN 4
+VCC
4
11
-VCC
+IN 2
5
10
+IN 3
-IN 2
6
9
-IN 3
OUT 2
7
8
OUT 3
Ordering Information
ORDERING NUMBER
INTERNAL
MKT. NUMBER
PART MARKING
TEMP. RANGE
(°C)
PACKAGE
PKG.
DWG. #
5962F0254201VXC
ISL7124SRHVF
Q 5962F02 54201VXC
-55 to 125
14 Lead Ceramic Metal Seal Flatpack
K14.A
5962F0254201QXC
ISL7124SRHQF
Q 5962F02 54201QXC
-55 to 125
14 Lead Ceramic Metal Seal Flatpack
K14.A
5962F0254202VXC
ISL7124SEHVF
Q 5962F02 54202VXC
-55 to 125
14 Lead Ceramic Metal Seal Flatpack
K14.A
ISL7124SRHF/Proto
ISL7124SRHF/Proto
ISL7 /PROTO 124SRHF
-55 to 125
14 Lead Ceramic Metal Seal Flatpack
K14.A
February 23, 2012
FN9090.1
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Copyright Intersil Americas Inc. 2002, 2012. All Rights Reserved
Intersil (and design) is a trademark owned by Intersil Corporation or one of its subsidiaries.
All other trademarks mentioned are the property of their respective owners.
ISL7124SRH, ISL7124SEH
Die Characteristics
DIE DIMENSIONS:
Backside Finish:
2640μm x 5020μm (104 mils x 198mils)
Thickness: 483μm ± 25.4μm (19 mils ± 1 mil)
Silicon
ASSEMBLY RELATED INFORMATION:
INTERFACE MATERIALS:
Substrate Potential:
Glassivation:
Unbiased (DI)
Type: PSG (Phosphorous Silicon Glass)
Thickness: 8.0kÅ ± 1.0kÅ
ADDITIONAL INFORMATION:
Worst Case Current Density:
Top Metallization:
<2.0 x 105 A/cm2
Type: AlSiCu
Thickness: 16.0kÅ ± 2kÅ
Transistor Count:
Substrate:
276
Radiation Hardened Silicon Gate
Dielectrically Isolated
Metallization Mask Layout
ISL7124SRH, ISL7124SEH
-VCC
+IN 4
-IN 4
+IN 3
-IN 3
OUT 3
OUT 4
Layout not yet available.
OUT 2
OUT 1
-IN 1
+IN 1
+IN 2
-IN 2
+VCC
For additional products, see www.intersil.com/product_tree
Intersil products are manufactured, assembled and tested utilizing ISO9000 quality systems as noted
in the quality certifications found at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time
without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be
accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third
parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
2
FN9090.1
February 23, 2012
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