isl71831seh eldrs test report

Test Report 021
Total Dose Testing of the ISL71831SEH 32-Channel
Analog Multiplexer
Introduction
Reference Documents
This report provides interim results of a total dose test of the
ISL71831SEH 32-channel low voltage analog multiplexer. The
test was conducted in order to determine the sensitivity of the
part to the total dose environment. Irradiation under bias and
with all pins grounded and subsequent high temperature
anneals are complete.
• ISL71831SEH datasheet
• Standard Microcircuit Drawing (SMD): 5962-15248
Part Description
Irradiation Facilities
The ISL71831SEH is a radiation tolerant 32-channel analog
multiplexer that is fabricated using Intersil's proprietary P6SOI
process technology to provide excellent latch-up performance.
The part operates over a single supply range from 3V to 5.5V
and has five digital address inputs plus an enable pin that can
be driven with adjustable logic thresholds to select one of 32
available channels. Inactive channels are isolated from the
active channel by high impedance which inhibits any
interaction between them.
The ISL71831SEH's low switch ON-resistance allows for
improved signal integrity and reduced power losses. The part is
also designed for cold sparing, making it compatible with
redundancy techniques in high reliability applications. It is
designed to provide a high impedance to the analog source in
a powered OFF condition, making it easy to add additional
backup devices without incurring extra power dissipation. The
ISL71831SEH also has analog overvoltage protection on the
switch inputs that disables the switch during an overvoltage
event to protect upstream and downstream devices. All inputs
are electrostatic discharge (ESD) protected to 5kV Human
Body Model (HBM).
• MIL-STD-883 test method 1019
Test Description
Irradiation was performed using a Hopewell Designs N40
panoramic low dose rate 60Co irradiator located in the Intersil
Palm Bay, FL facility. The irradiations were performed at
8.554mrad(Si)/s to 9.322mrad(Si)/s in accordance with
MIL-STD-883 test method 1019. A PbAl box was used to shield
the test board and devices under test against low energy
secondary gamma radiation. The high temperature anneal
was performed under bias at +100°C for 168 hours.
Test Fixturing
Figure 1 on page 2 shows the configuration and power supply
sequencing used for biased irradiation.
The ISL71831SEH is available in a 48 Ld ceramic Quad
Flatpack (CQFP) and operates across the extended
temperature range of -55°C to +125°C. The ISL71830SEH is a
16-channel version of the ISL71831SEH and is available in a
28 Ld Ceramic Dual Flatpack (CDFP); please refer to the
ISL71830SEH datasheet for further information.
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1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Copyright Intersil Americas LLC 2015. All Rights Reserved
Intersil (and design) is a trademark owned by Intersil Corporation or one of its subsidiaries.
All other trademarks mentioned are the property of their respective owners.
Test Report 021
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(S13)
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(S16)
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N/C
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(Out)
48
47
46
N/C
N/C
(S32)
45
(S31)
44
43
(S30)
(S29)
7 (S12)
(S28) 42
8 (S11)
(S27) 41
9 (S10)
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10 (S9)
(S25) 39
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15 (S4)
(S20) 34
16 (S3)
(S19) 33
17 (S2)
(S18) 32
18 (S1)
9
(S17) 31
(Vdd)
19
(Vref)
20
(A0)
21
(A1)
22
(A2)
23
(A3)
24
(A4)
25
N/C
26
N/C
27
(En_B)
28
(Gnd)
29
N/C
30
5
FIGURE 1. IRRADIATION BIAS CONFIGURATION AND POWER SUPPLY SEQUENCING FOR THE ISL71831SEH
Characterization Equipment and Procedures
All electrical testing was performed outside the irradiator using
production automated test equipment (ATE) with data logging of
all parameters at each downpoint. All downpoint electrical
testing was performed at room temperature.
Experimental Matrix
Results
Attributes Data
Total dose testing of the ISL71831SEH is complete and showed
no reject devices after irradiation up to 75krad(Si) or after the
post-75krad(Si) irradiation anneal. Table 1 summarizes the
results.
Testing proceeded in accordance with the guidelines of
MIL-STD-883 test method 1019. The experimental matrix
consisted of 16 samples irradiated at low dose rate with all pins
grounded and 16 samples irradiated at low dose rate under bias.
Four control units were used.
Samples of the ISL71831SEH were drawn from development lot
J69526 wafers 2, 3, 4 and 5 as part of the routine wafer-by-wafer
acceptance testing procedure and were packaged in the
production hermetic 48 Ld ceramic quad flatpack (package
outline R48.A). The samples were processed through the
standard burn-in cycle and were screened to the SMD 596215248 limits at room, low and high temperature before
irradiation.
Downpoints
Downpoints were zero, 10krad(Si), 30krad(Si), 50krad(Si) and
75krad(Si). All samples were subjected to a high temperature
biased anneal for 168 hours at +100°C following irradiation.
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Test Report 021
TABLE 1. ISL71831SEH TOTAL DOSE TEST ATTRIBUTES DATA
DOSE RATE
8.554mrad(Si)/s to
9.322mrad(Si)/s
8.554mrad(Si)/s to
9.322mrad(Si)/s
BIAS
SAMPLE SIZE
Figure 1
16
Grounded
16
DOWNPOINT
BIN 1 (Note 1)
REJECTS
Pre-irradiation
16
10krad(Si)
16
0
30krad(Si)
16
0
50krad(Si)
16
0
75krad(Si)
16
0
Anneal, 168h at +100°C (Note 2)
16
0
Pre-irradiation
16
10krad(Si)
16
0
30krad(Si)
16
0
50krad(Si)
16
0
75krad(Si)
16
0
Anneal, 168h at +100°C (Note 2)
16
0
NOTES:
1. Bin 1 indicates a device that passes all pre-irradiation specification limits.
2. The 168-hour anneal was performed at +100°C using the bias configuration shown in Figure 1.
Variables Data
The plots in Figures 2 through 22 show data at all downpoints.
The plots show the average of key parameters as a function of
total dose for each of the two irradiation conditions. Many of the
plots show the total dose response of the average of these
parameters, such as ON-resistance and the various leakage
parameters, for each of the 32 channels in order to facilitate the
interpretation of the results as well as managing the length of
this report. All samples showed excellent stability over
irradiation. See “Conclusion” on page 14 for further discussion.
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Test Report 021
140
AVERAGE OF 32 CHANNELS
ON-RESISTANCE (Ω)
120
rON MINIMUM, BIASED
rON MINIMUM, GROUNDED
rON MAXIMUM, BIASED
100
rON MAXIMUM, GROUNDED
SPEC LIMIT
80
60
0
25
50
75
ANNEAL
TOTAL DOSE (krad(Si)) AT 0.01rad(Si)/s
FIGURE 2. ISL71831SEH minimum and maximum switch ON-resistance, average of all 32 channels, as a function of low dose rate total dose
irradiation for the unbiased (all pins grounded) and the biased (per Figure 1) cases. The dose rate was 8.554mrad(Si)/s to
9.322mrad(Si)/s. Sample size for each of the two cells was 16. The post-irradiation SMD limit is 120Ω maximum.
6
ON-RESISTANCE MATCH (Ω)
AVERAGE OF 32 CHANNELS
5
rON MATCH, 2.5V, BIASED
4
rON MATCH, 2.5V, GROUNDED
rON MATCH, 0.5V, BIASED
rON MATCH, 0.5V, GROUNDED
3
SPEC LIMIT
2
1
0
0
25
50
75
ANNEAL
TOTAL DOSE (krad(Si)) AT 0.01rad(Si)/s
FIGURE 3. ISL71831SEH switch ON-resistance match, average of all 32 channels, as a function of low dose rate total dose irradiation for the
unbiased (all pins grounded) and the biased (per Figure 1) cases. The dose rate was 8.554mrad(Si)/s to 9.322mrad(Si)/s. Sample
size for each of the two cells was 16. The post-irradiation SMD limit is 5Ω maximum.
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Test Report 021
ON-RESISTANCE FLATNESS (Ω)
40
30
rON FLATNESS, BIASED
rON FLATNESS, GROUNDED
20
SPEC LIMIT
10
AVERAGE OF 32 CHANNELS
0
0
25
50
75
ANNEAL
TOTAL DOSE (krad(Si)) AT 0.01rad(Si)/s
FIGURE 4. ISL71831SEH ON resistance flatness, average of all 32 channels, as a function of low dose rate total dose irradiation for the unbiased
(all pins grounded) and the biased (per Figure 1) cases. The dose rate was 8.554mrad(Si)/s to 9.322mrad(Si)/s. Sample size for each
of the two cells was 16. The post-irradiation SMD limit is 40Ω maximum.
40
AVERAGE OF 32 CHANNELS
SWITCH OFF LEAKAGE (nA)
30
20
ISOFFP5p0_5p5, BIASED
ISOFFP5p0_5p5, GROUNDED
10
ISOFFP0p5_5p5, BIASED
ISOFFP0p5_5p5, GROUNDED
0
SPEC LIMIT
SPEC LIMIT
-10
-20
-30
-40
0
25
50
75
ANNEAL
TOTAL DOSE (krad(Si)) AT 0.01rad(Si)/s
FIGURE 5. ISL71831SEH switch input OFF leakage, average of all 32 channels, 5.5V supply, input voltage to selected switch 5V or 0.5V, output
and all unselected inputs at 0.5V, as a function of low dose rate total dose irradiation for the unbiased (all pins grounded) and the
biased (per Figure 1) cases. The dose rate was 8.554mrad(Si)/s to 9.322mrad(Si)/s. Sample size for each of the two cells was 16.
The post-irradiation SMD limit is -30nA to 30nA.
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40
AVERAGE OF 32 CHANNELS
SWITCH OFF LEAKAGE (nA)
30
20
10
ISOFFP7p0_5p5, BIASED
0
ISOFFP7p0_5p5, GROUNDED
SPEC LIMIT
-10
SPEC LIMIT
-20
-30
-40
0
25
50
75
ANNEAL
TOTAL DOSE (krad(Si)) AT 0.01rad(Si)/s
FIGURE 6. ISL71831SEH switch input overvoltage OFF leakage, average of all 32 channels, 5.5V supply, input voltage to selected switch 7V,
output and all unselected inputs at 0V, as a function of low dose rate total dose irradiation for the unbiased (all pins grounded) and
the biased (per Figure 1) cases. The dose rate was 8.554mrad(Si)/s to 9.322mrad(Si)/s. Sample size for each of the two cells was 16.
The post-irradiation SMD limit is -30nA to 30nA.
25
AVERAGE OF 32 CHANNELS
20
SWITCH OFF LEAKAGE (nA)
15
10
ISOFFP7p0_5p5, BIASED
5
ISOFFP7p0_5p5, GROUNDED
0
SPEC LIMIT
SPEC LIMIT
-5
-10
-15
-20
-25
0
25
50
75
ANNEAL
TOTAL DOSE (krad(Si)) AT 0.01rad(Si)/s
FIGURE 7. ISL71831SEH 'supplies off' switch OFF leakage into the input of an unselected channel, average of all 32 channels, supplies, address
pins, enable pin and unselected inputs grounded, input voltage to selected switch 7V, as a function of low dose rate total dose
irradiation for the unbiased (all pins grounded) and the biased (per Figure 1) cases. The dose rate was 8.554mrad(Si)/s to
9.322mrad(Si)/s. Sample size for each of the two cells was 16. The post-irradiation SMD limit is -20nA to 20nA.
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25
20
SWITCH OFF LEAKAGE (nA)
15
10
ISOFFP7p0_5p5, BIASED
5
ISOFFP7p0_5p5, GROUNDED
0
SPEC LIMIT
-5
SPEC LIMIT
-10
-15
-20
AVERAGE OF 32 CHANNELS
-25
0
25
50
75
ANNEAL
TOTAL DOSE (krad(Si)) AT 0.01rad(Si)/s
FIGURE 8. ISL71831SEH 'supplies open' switch OFF leakage into the input of an unselected channel, supplies, address pins, enable pin and
unselected inputs grounded, input voltage to selected switch 7V, average of all 32 channels, as a function of low dose rate total dose
irradiation for the unbiased (all pins grounded) and the biased (per Figure 1) cases. The dose rate was 8.554mrad(Si)/s to
9.322mrad(Si)/s. Sample size for each of the two cells was 16. The post-irradiation SMD limit is -20nA to 20nA.
6
SWITCH ON LEAKAGE (µA)
AVERAGE OF 32 CHANNELS
5
ISONP7p0_5p5, BIASED
ISONP7p0_5p5, GROUNDED
4
SPEC LIMIT
SPEC LIMIT
3
2
0
25
50
75
ANNEAL
TOTAL DOSE (krad(Si)) AT 0.01rad(Si)/s
FIGURE 9. ISL71831SEH 'overvoltage' switch ON leakage into a selected channel, average of all 32 channels, 5.5V supply, input voltage to
selected switch 7V, output open, unselected inputs at 0.0V, as a function of low dose rate total dose irradiation for the unbiased (all
pins grounded) and the biased (per Figure 1) cases. The dose rate was 8.554mrad(Si)/s to 9.322mrad(Si)/s. Sample size for each of
the two cells was 16. The post-irradiation SMD limit is 2.75µA to 5.5µA.
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40
AVERAGE OF 32 CHANNELS
SWITCH OFF LEAKAGE (nA)
30
20
Idoff_P5p0_5p5
10
Idoff_P5p0_5p5
Idoff_P0p5_5p5
0
Idoff_P0p5_5p5
SPEC LIMIT
-10
SPEC LIMIT
-20
-30
-40
0
25
50
75
ANNEAL
TOTAL DOSE (krad(Si)) AT 0.01rad(Si)/s
FIGURE 10. ISL71831SEH switch OFF leakage into the multiplexer output, average of all 32 channels, 5.5V supply, input voltage 0.5V or 5V,
output voltage 5V or 0.5V, as a function of low dose rate total dose irradiation for the unbiased (all pins grounded) and the biased (per
Figure 1) cases. The dose rate was 8.554mrad(Si)/s to 9.322mrad(Si)/s. Sample size for each of the two cells was 16. The postirradiation SMD limit is -30nA to 30nA.
40
AVERAGE OF 32 CHANNELS
SWITCH ON LEAKAGE (µA)
30
20
IDONP0p5_5p5, BIASED
10
IDONP0p5_5p5, GROUNDED
IDONP5p0_5p6, BIASED
0
Idoff_P0p5_5p5
SPEC LIMIT
SPEC LIMIT
-10
-20
-30
-40
0
25
50
75
ANNEAL
TOTAL DOSE (krad(Si)) AT 0.01rad(Si)/s
FIGURE 11. ISL71831SEH switch ON leakage into the input and output for a selected switch, average of all 32 channels, 5.5V supply, selected
input and output at 0.5V or 5V, unselected inputs at 5V or 0.5V, as a function of low dose rate total dose irradiation for the unbiased
(all pins grounded) and the biased (per Figure 1) cases. The dose rate was 8.554mrad(Si)/s to 9.322mrad(Si)/s. Sample size for each
of the two cells was 16. The post-irradiation SMD limit is -30nA to 30nA.
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Test Report 021
1.7
INPUT LOW VOLTAGE (V)
1.6
1.5
VIL, BIASED
VIL, GROUNDED
SPEC LIMIT
1.4
SPEC LIMIT
1.3
AVERAGE OF A0 - A4 AND ENABLE
1.2
0
25
50
75
ANNEAL
TOTAL DOSE (krad(Si)) AT 0.01rad(Si)/s
FIGURE 12. ISL71831SEH input LOW voltage, average of address pins A0 through A4 and Enable pin, as a function of low dose rate total dose
irradiation for the unbiased (all pins grounded) and the biased (per Figure 1) cases. The dose rate was 8.554mrad(Si)/s to
9.322mrad(Si)/s. Sample size for each of the two cells was 16. The post-irradiation SMD limits are 1.3V to 1.6V.
INPUT HIGH VOLTAGE (V)
1.7
1.6
VIH, BIASED
1.5
VIH, GROUNDED
SPEC LIMIT
SPEC LIMIT
1.4
1.3
AVERAGE OF A0 - A4 AND ENABLE
1.2
0
25
50
75
ANNEAL
TOTAL DOSE (krad(Si)) AT 0.01rad(Si)/s
FIGURE 13. ISL71831SEH input HIGH voltage, average of address pins A0 through A4 and Enable pin, as a function of low dose rate total dose
irradiation for the unbiased (all pins grounded) and the biased (per Figure 1) cases. The dose rate was 8.554mrad(Si)/s to
9.322mrad(Si)/s. Sample size for each of the two cells was 16. The post-irradiation SMD limits are 1.3V to 1.6V.
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0.15
INPUT LOW CURRENT (µA)
0.10
0.05
IIL, GROUNDED
IIL, BIASED
0
SPEC LIMIT
SPEC LIMIT
-0.05
-0.10
AVERAGE OF A0 - A4 AND ENABLE
-0.15
0
25
50
75
ANNEAL
TOTAL DOSE (krad(Si)) AT 0.01rad(Si)/s
FIGURE 14. ISL71831SEH input LOW current, average of address pins A0 through A4 and Enable pin, as a function of low dose rate total dose
irradiation for the unbiased (all pins grounded) and the biased (per Figure 1) cases. The dose rate was 8.554mrad(Si)/s to
9.322mrad(Si)/s. Sample size for each of the two cells was 16. The post-irradiation SMD limits are -0.1µA to 0.1µA.
0.15
INPUT HIGH CURRENT (µA)
0.10
0.05
IIH, BIASED
IIH, GROUNDED
0
SPEC LIMIT
SPEC LIMIT
-0.05
-0.10
AVERAGE OF A0 - A4 AND ENABLE
-0.15
0
25
50
75
ANNEAL
TOTAL DOSE (krad(Si)) AT 0.01rad(Si)/s
FIGURE 15. ISL71831SEH input HIGH current, average of address pins A0 through A4 and Enable pin, as a function of low dose rate total dose
irradiation for the unbiased (all pins grounded) and the biased (per Figure 1) cases. The dose rate was 8.554mrad(Si)/s to
9.322mrad(Si)/s. Sample size for each of the two cells was 16. The post-irradiation SMD limits are -0.1µA to 0.1µA.
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0.6
QUIESCENT SUPPLY CURRENT (µA)
0.5
0.4
0.3
3.6V, BIASED
3.6V, GROUNDED
0.2
5.5V, BIASED
5.5V, GROUNDED
0.1
SPEC LIMIT, 3.6V
SPEC LIMIT, 5.5V
0
-0.1
-0.2
0
25
50
75
ANNEAL
TOTAL DOSE (krad(Si)) AT 0.01rad(Si)/s
FIGURE 16. ISL71831SEH quiescent supply current, 3.6V and 5.5V supply and VREF voltage, as a function of low dose rate total dose irradiation
for the unbiased (all pins grounded) and the biased (per Figure 1) cases. The dose rate was 8.554mrad(Si)/s to 9.322mrad(Si)/s.
Sample size for each of the two cells was 16. The post-irradiation SMD limits are 0.3µA maximum (3.6V) and 0.5µA (5.5V).
0.25
REFERENCE CURRENT (µA)
0.20
3.6V, BIASED
0.15
3.6V, GROUNDED
5.5V, BIASED
5.5V, GROUNDED
0.10
SPEC LIMIT, 3.6V AND 5.5V
0.05
0
0
25
50
75
ANNEAL
TOTAL DOSE (krad(Si)) AT 0.01rad(Si)/s
FIGURE 17. ISL71831SEH reference supply current, 3.6V and 5.5V supply and VREF voltage, as a function of low dose rate total dose irradiation
for the unbiased (all pins grounded) and the biased (per Figure 1) cases. The dose rate was 8.554mrad(Si)/s to 9.322mrad(Si)/s.
Sample size for each of the two cells was 16. The post-irradiation SMD limit is 0.2µA maximum for both voltages.
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120
ADDRESS TO OUTPUT DELAY (ns)
100
80
tALH, 4.5V, BIASED
tALH, 4.5V, GROUNDED
tALH, 3V, BIASED
60
tALH, 3V, GROUNDED
SPEC LIMIT, 4.5V
SPEC LIMIT, 3V
40
20
0
0
25
50
75
ANNEAL
TOTAL DOSE (krad(Si)) AT 0.01rad(Si)/s
FIGURE 18. ISL71831SEH address input to multiplexer output delay, LOW to HIGH, as a function of low dose rate total dose irradiation for the
unbiased (all pins grounded) and the biased (per Figure 1) cases. The dose rate was 8.554mrad(Si)/s to 9.322mrad(Si)/s. Sample
size for each of the two cells was 16. The post-irradiation SMD limits are 70ns maximum (4.5V) and 100ns maximum (3V).
120
HIGH TO LOW DELAY
ADDRESS TO OUTPUT DELAY (ns)
100
tAHL, 4.5V, BIASED
80
tAHL, 4.5V, GROUNDED
tAHL, 3V, BIASED
tAHL, 3V, GROUNDED
60
SPEC LIMIT, 4.5V
SPEC LIMIT, 3V
40
20
0
0
25
50
75
ANNEAL
TOTAL DOSE (krad(Si)) AT 0.01rad(Si)/s
FIGURE 19. ISL71831SEH address input to multiplexer output delay, HIGH to LOW, as a function of low dose rate total dose irradiation for the
unbiased (all pins grounded) and the biased (per Figure 1) cases. The dose rate was 8.554mrad(Si)/s to 9.322mrad(Si)/s. Sample
size for each of the two cells was 16. The post-irradiation SMD limits are 70ns maximum (4.5V) and 100ns maximum (3V).
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60
BREAK-BEFORE-MAKE TIME (ns)
50
tBBM, 4.5V, BIASED
40
tBBM, 4.5V, GROUNDED
tBBM, 3V, BIASED
tBBM, 3V, GROUNDED
30
SPEC LIMIT
SPEC LIMIT, 4.5V
SPEC LIMIT, 3V
20
10
0
0
25
50
75
ANNEAL
TOTAL DOSE (krad(Si)) AT 0.01rad(Si)/s
FIGURE 20. ISL71831SEH Break-Before-Make (BBM) delay as a function of low dose rate total dose irradiation for the unbiased (all pins
grounded) and the biased (per Figure 1) cases. The dose rate was 8.554mrad(Si)/s to 9.322mrad(Si)/s. Sample size for each of the
two cells was 16. The post-irradiation SMD limits are 5ns to 40ns (5.5V) and 5ns to 50ns (3V).
ENABLE TO OUTPUT PROPAGATION DELAY (ns)
70
60
50
tON(EN), 4.5V, BIASED
40
tON(EN), 4.5V, GROUNDED
tON(EN), 3V, BIASED
30
tON(EN), 3V, GROUNDED
SPEC LIMIT, 4.5V
20
SPEC LIMIT, 3V
10
0
0
25
50
75
ANNEAL
TOTAL DOSE (krad(Si)) AT 0.01rad(Si)/s
FIGURE 21. ISL71831SEH enable ON to multiplexer output propagation delay as a function of low dose rate total dose irradiation for the unbiased
(all pins grounded) and the biased (per Figure 1) cases. The dose rate was 8.554mrad(Si)/s to 9.322mrad(Si)/s. Sample size for each
of the two cells was 16. The post-irradiation SMD limits are 40ns maximum (4.5V) and 60ns maximum (3V).
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ENABLE TO OUTPUT PROPAGATION DELAY (ns)
90
80
70
tOFF(EN), 4.5V, BIASED
60
tOFF(EN), 4.5V, GROUNDED
50
tOFF(EN), 3V, BIASED
tOFF(EN), 3V, GROUNDED
40
SPEC LIMIT, 4.5V
SPEC LIMIT, 3V
30
20
10
0
0
25
50
75
ANNEAL
TOTAL DOSE (krad(Si)) AT 0.01rad(Si)/s
FIGURE 22. ISL71831SEH enable OFF to multiplexer output propagation delay as a function of low dose rate total dose irradiation for the
unbiased (all pins grounded) and the biased (per Figure 1) cases. The dose rate was 8.554mrad(Si)/s to 9.322mrad(Si)/s. Sample
size for each of the two cells was 16. The post-irradiation SMD limits are 50ns maximum (4.5V) and 80ns maximum (3V).
Conclusion
This document reports results of a low dose rate total dose test
of the ISL71831SEH 32-channel analog multiplexer. Parts were
tested at low dose rate under biased and unbiased conditions as
outlined in MIL-STD-883 Test Method 1019.7. The samples were
also taken through a high temperature biased anneal at +100°C
for 168 hours.
ATE characterization testing at downpoints showed no rejects to
the SMD Group A limits after biased and grounded irradiation at
low dose rate or after the high temperature anneal. Attributes
data is presented in Table 1 on page 3, while variables data for
selected parameters is presented in Figures 2 through 22. All
parameters showed excellent stability.
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Test Report 021
Appendices
Reported Parameters
TABLE 2. REPORTED PARAMETERS
FIGURE
PARAMETER
LIMIT, LOW
LIMIT, HIGH
UNIT
NOTES
2
Switch ON-resistance
-
120
Ω
3
Switch ON-resistance match
-
5
Ω
4
Switch ON-resistance flatness
-
40
Ω
5
Switch input OFF leakage
-30
30
nA
6
Switch input OFF leakage
-30
30
nA
Overvoltage
7
Switch input OFF leakage
-20
20
nA
Supplies grounded
8
Switch input OFF leakage
-20
20
nA
Supplies open
9
Switch input ON leakage
2.75
5.5
µA
10
Switch output OFF leakage
-30
30
nA
11
Switch output ON leakage
-30
30
nA
12
Logic input LOW voltage
1.3
1.6
V
13
Logic input HIGH voltage
1.3
1.6
V
14
Logic input LOW current
-0.1
0.1
µA
15
Logic input HIGH current
-0.1
0.1
µA
16
Quiescent supply current
-
0.3/0.5
µA
3.6V and 5.5V
17
VREF supply current
-
0.2
µA
3.6V and 5.5V
18
Address input to output delay
-
100/70
ns
3V and 4.5V, LOW to HIGH
19
Address input to output delay
-
100/70
ns
3V and 4.5V, HIGH to LOW
20
Break before make delay
5
50/40
ns
3V and 4.5V
21
Enable ON to output delay
-
60/40
ns
3V and 4.5V
22
Enable OFF to output delay
-
80/50
ns
3V and 4.5V
NOTE: Limits are taken from Standard Microcircuit Drawing (SMD) 5962-15248.
Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is
cautioned to verify that the document is current before proceeding.
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TR021.0
October 20, 2015