AS5055 Low Power 12-Bit Magnetic Rotary Encoder 1 General Description 2 Key Features 12-bit resolution The AS5055 is a single-chip magnetic rotary encoder IC with low voltage and low power features. Standard SPI interface, 3 or 4 wire It includes 4 integrated Hall elements, a high resolution ADC and a smart power management controller. 3.0V to 3.6V core voltage, 1.8V to 3.6V peripheral supply voltage The angle position, alarm bits and magnetic field information are transmitted over a standard 3-wire or 4-wire SPI interface to the host processor. Automatic wake-up over SPI interface Interrupt output for conversion complete indication Low power mode: The AS5055 is available in a small QFN 16-pin 4x4x0.85 mm package and specified over an operating temperature of -40ºC to +85ºC. - < 5mA (avg) @ 1ms readout interval - < 500µA (avg) @ 10ms readout interval - < 53µA (avg) @ 100ms readout interval Small size 16-pin QFN (4x4x0.85 mm) 3 Applications The device is ideal for Servo motor control, Input device for battery operated portable devices, and Robotics. Figure 1. AS5055 Block Diagram AS5055 EN_INT/ ADC INT/ Cordic Hall Sensors SPI Interface Power Management VDD www.ams.com/AS5055 VSS Wire mode MOSI Revision 1.16 MISO VDDp SCK SS/ 1 - 26 AS5055 Datasheet - C o n t e n t s Contents 1 General Description .................................................................................................................................................................. 1 2 Key Features............................................................................................................................................................................. 1 3 Applications............................................................................................................................................................................... 1 4 Pin Assignments ....................................................................................................................................................................... 3 4.1 Pin Descriptions.................................................................................................................................................................................... 3 5 Absolute Maximum Ratings ...................................................................................................................................................... 4 6 Electrical Characteristics........................................................................................................................................................... 5 6.1 Operating Conditions............................................................................................................................................................................ 5 6.2 System Parameters .............................................................................................................................................................................. 5 6.3 DC/AC Characteristics.......................................................................................................................................................................... 6 7 Detailed Description.................................................................................................................................................................. 7 7.1 Operating Modes .................................................................................................................................................................................. 7.1.1 7.1.2 7.1.3 7.1.4 7.2 SPI Communication.............................................................................................................................................................................. 7.2.1 7.2.2 7.2.3 7.2.4 7.2.5 7.2.6 7 8 8 8 9 Command Package ..................................................................................................................................................................... 9 Read Package (Value Read from AS5055) ................................................................................................................................. 9 Write Data Package (Value Written to AS5055) ........................................................................................................................ 10 Register Block............................................................................................................................................................................ 10 SPI Interface Commands........................................................................................................................................................... 11 Error Monitoring .......................................................................................................................................................................... 14 8 Application Information ........................................................................................................................................................... 16 8.1 SPI Interface....................................................................................................................................................................................... 8.1.1 8.1.2 8.1.3 8.1.4 7 Power Supply Filter...................................................................................................................................................................... Reading an Angle ........................................................................................................................................................................ Low Power Mode ......................................................................................................................................................................... Interrupt Chaining ........................................................................................................................................................................ SPI Interface Signals (4-Wire Mode, Wire_mode = 1)............................................................................................................... SPI Timing ................................................................................................................................................................................. SPI Connection to the Host µC ................................................................................................................................................. SPI Over Long Distances .......................................................................................................................................................... 8.2 Placement of the Magnet.................................................................................................................................................................... 16 16 17 18 20 21 9 Package Drawings and Markings ........................................................................................................................................... 22 10 Ordering Information............................................................................................................................................................. 25 www.ams.com/AS5055 Revision 1.16 2 - 26 AS5055 Datasheet - P i n A s s i g n m e n t s 4 Pin Assignments NC INT/ Wire_mode VSS Figure 2. Pin Assignments (Top View) 16 15 14 13 MOSI 1 12 VDD MISO 2 11 VDDp SCK 3 10 En_INT/ SS/ 4 9 Test_coil 5 6 7 8 NC NC NC NC Epad 4.1 Pin Descriptions Table 1. Pin Descriptions Pin Number Pin Name Pin Type 1 MOSI Digital input 2 MISO Digital output, tri-state buffer SPI bus data output 3 SCK Digital input Schmitt trigger SPI Clock Schmitt trigger 4 SS/ 5 NC 6 NC 7 NC 8 NC 9 Test coil Supply Test pin, connect to VSS 10 En_INT/ Digital input Enable / disable Interrupt 11 VDDp 12 VDD 13 VSS 14 Wire_mode 15 INT/ 16 NC - Leave unconnected Epad - - Center pad not connected www.ams.com/AS5055 Digital input - Description SPI bus data input SPI Slave Select, active LOW Leave unconnected Peripheral power supply, 1.8V ~ VDD Supply Analog and digital power supply, 3.0 ~ 3.6V Supply ground Digital I/O 0: 3-wire mode 1: 4-wire mode Digital output, tri-state buffer Interrupt output. Active LOW, when conversion is finished Revision 1.16 3 - 26 AS5055 Datasheet - A b s o l u t e M a x i m u m R a t i n g s 5 Absolute Maximum Ratings Stresses beyond those listed in Table 2 may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in Electrical Characteristics on page 5 is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Table 2. Absolute Maximum Ratings Symbol Parameter Min Max Units Comments VDD DC supply voltage -0.3 5.0 V Value of these process dependent parameters to be taken from according Process Parameter document, current version VDDp Peripheral supply voltage -0.3 VDD+0.3 V VIN Input pin voltage -0.3 5.0 V Iscr Input current (latchup immunity) -100 100 mA Norm: Jedec 78 Electrical Parameters Electrostatic Discharge ESD Electrostatic discharge ±1 - kV Norm: MIL 883 E method 3015 ΘJA Package thermal resistance - 33.5 °C/W Velocity=0, Multi Layer PCB; Jedec Standard Testboard 36 mW 125 °C Continuous Power Dissipation Pt Total power dissipation Temperature Ranges and Storage Conditions Tstrg TBODY Storage temperature -55 Package body temperature Humidity non-condensing MSL www.ams.com/AS5055 Moisture Sensitive Level 5 260 °C 85 % 3 Revision 1.16 The reflow peak soldering temperature (body temperature) specified is in accordance with IPC/JEDEC J-STD-020 “Moisture/Reflow Sensitivity Classification for Non-Hermetic Solid State Surface Mount Devices”. The lead finish for Pb-free leaded packages is matte tin (100% Sn). Represents a maximum floor life time of 168h 4 - 26 AS5055 Datasheet - E l e c t r i c a l C h a r a c t e r i s t i c s 6 Electrical Characteristics 6.1 Operating Conditions Table 3. Operating Conditions Parameter Conditions Min Max Units VDD 3.0 3.6 V Peripheral supply voltage VDDp 1.8 VDD V Input pin voltage VIN -0.3 VDDp +0.3 V -40 85 °C Power supply filter, pin VDD (refer to Power Supply Filter on page 7) 2.2 4.7 µF 15 33 Ω Ceramic capacitor, pin VDDp to VSS 100 DC supply voltage 1 Ambient operating temperature External component Typ nF 1. VDDp must not exceed VDD (protection diode between VDDp and VDD) 6.2 System Parameters Table 4. System Parameters Symbol Parameter Conditions I_10 Operating current Average current @ 10 ms readout rate I_100 I_max Min Max Units 1 0.4 mA Operating current Average current @ 100 ms readout rate 40 µA Operating current Maximum readout rate 8.5 mA Readout rate Time between READ ANGLE command and INTERRUPT 430 µs Power down current Power down current 3 µA Rd Lateral displacement range Centre of the magnet to the centre of the die ± 0.5 mm BZ Magnetic field strength 80 mT 320 30 Serial interface Typ - SPI mode 1 (CPOL = 0 / CPHA =1) Resolution; magnetic field measurement 12 bit Resolution; angle 12 bit INL Best-fit line - over supply, displacement and temperature – but without quantization IC package -1.41 1.41 degree QFN 4x4x0.85 1. Without the time for the SPI interface www.ams.com/AS5055 Revision 1.16 5 - 26 AS5055 Datasheet - E l e c t r i c a l C h a r a c t e r i s t i c s 6.3 DC/AC Characteristics Digital pads: MISO, MOSI, SCK, SS/, EN_INT/, INT/, Wire_mode Table 5. DC/AC Characteristics Symbol Parameter VIH High level input voltage VIL Low level input voltage VDDp > 2.7V 0.3 * VDDp V VIL Low level input voltage VDDp < 2.7V 0.25 * VDDp V ILEAK Input leakage current 1 µA VOH High level output voltage VOL Low level output voltage VSS + 0.4 V CL Capacitive load 35 pF www.ams.com/AS5055 Conditions Min Typ Max 0.7 * VDDp V VDDp - 0.5 Revision 1.16 Units V 6 - 26 AS5055 Datasheet - D e t a i l e d D e s c r i p t i o n 7 Detailed Description User Programming. The AS5055 does not require any programming by the user. A dedicated on-chip zero position programming is not implemented. If a zero position programming is required, it is recommended to store the zero position offset in the host controller. 7.1 Operating Modes Typical Application. The AS5055 requires only a few external components in order to operate immediately when connected to the host microcontroller. Only 6 wires are needed for a simple application using a single power supply: two wires for power and four wires for the SPI communication. A seventh connection can be added in order to send an interrupt to the host CPU to inform that a new valid angle can be read. For additional information on the layout and filtering of the SPI, please refer to Section 8.1.4 SPI Over Long Distances. Figure 3. Typical Application Using SPI 4-Wire Mode and INT/ Output 4µ7 15 ohm DC 3.0V ~ 3.6V VDD VDD AS5055 Cordic Interrupt EN_INT/ Hall Sensors SPI Interface Power Management VDDp DC 1.8V ~ 3.6V ADC Supply: peripherals INT/ µC VDDp VDDp Wire mode SCK Test_coil MISO VSS MOSI 100n SS/ SPI Interface Upon power-up, the AS5055 performs a full power-up sequence including one angle measurement. The completion of this cycle is indicated at the INT/ output pin and the angle value is stored in an internal register. Once this output is low active, the AS5055 suspends to sleep mode. 7.1.1 Power Supply Filter Due to the sequential internal sampling of the Hall sensors, fluctuations on the analog power supply (pin#12: VDD) may cause additional jitter of the measured angle. This jitter can be avoided by providing a stable VDD supply. The easiest way to achieve that is to add a RC filter: 15Ω + 4.7µF in the power supply line as shown in Figure 3. Alternatively, a filter: 33Ω + 2.2µF may be used. However with this configuration, the minimum supply voltage is 3.15V. www.ams.com/AS5055 Revision 1.16 7 - 26 AS5055 Datasheet - D e t a i l e d D e s c r i p t i o n 7.1.2 Reading an Angle The external microcontroller can respond to the INT request by reading the angle value from the AS5055 over the SPI interface. Once the angle value is read, the INT output is cleared again. Sending a “read angle” command by the SPI interface also automatically powers up the chip and starts another angle measurement. As soon as the microcontroller has completed reading of the angle value, the INT output is cleared and a new result is stored in the angle register. The completion of the angle measurement is again indicated by setting the INT output and a corresponding flag in the status register. Reducing the Angle Jitter. Due to the measurement principle of the chip, only a single angle measurement is performed in very short time after each power-up sequence. As soon as the measurement of one angle is completed, the chip suspends to power-down state. An on-chip filtering of the angle value by digital averaging is not implemented, as this would require more than one angle measurement and consequently, a longer power- up time which is not desired in low-power applications. The angle jitter can be reduced by averaging of several angle samples in the external microcontroller. For example, an averaging of 4 samples reduces the noise related jitter by 6dB (50%). 7.1.3 Low Power Mode After completing the readout of an angle value, the device is in very low power condition. The AS5055 remains in sleep mode until it receives another angle reading request over the SPI interface. The average power consumption therefore depends on the interval, at which the external controller reads an angle over the SPI Interface. The timing ratio between active and sleep phase: (EQ 1) I avg = ton ∗ I on + toff ∗ I off ton + toff Where: ton = Minimum on-time for power-up and angle measurement 430µs toff = Pause interval between measurements, determined by the polling rate of the external microcontroller Ion = Current consumption in active mode 8.5mA (maximum) Ioff = Current consumption in sleep mode 3µA Examples: 3000 measurements per second (continuous mode) I = 8.5mA 1000 measurements per second Iavg = 3.7mA 100 measurements per second Iavg = 370µA 10 measurements per second Iavg = 40µA Note: Even in low power mode, the power supply must be capable of supporting the active current at least for the time Ton, until the AS5055 is suspended to sleep mode. 7.1.4 Interrupt Chaining Every chip contains a configurable gate to combine its own internally generated interrupt signal with a signal applied externally over the XENINTpin. The INT-mode register is preset via an OTP register and can be overwritten by the SPI interface. Case A. Device A is set to mode 0 Device B is set to mode 0 The micro controller recognizes an interrupt if both devices signalize that the computation is finished. Case B. Device A is set to mode 0 Device B is set to mode 1 The micro controller recognizes an interrupt if one of the two devices signalize that the computation is finished. www.ams.com/AS5055 Revision 1.16 8 - 26 AS5055 Datasheet - D e t a i l e d D e s c r i p t i o n Figure 4. Interrupt Chaining XINT 0 & 1 =1 0 & 1 x_interrupt XINT otp INT mode INT mode otp x_interrupt MUX =1 XINT XENINT MUX XENINT AS5055 (Device A) Micro controller AS5055 (Device B) 7.2 SPI Communication The transmitted data consists of 14-bit data, an Error-Flag and a Parity bit. When writing data to the chip, the Error-Flag is not applicable. The Parity is generated from the upper 15 bits and forms an even parity over the whole frame. The Error-Flag indicates that a failure occurred in a previous transmission. 7.2.1 Command Package Every command sent to the AS5055 is represented with the following layout. Table 6. Command Package Bit MSB 14 13 12 11 10 9 RWn 7 6 5 4 3 2 1 Address <13:0> Bit RWn Address PAR 7.2.2 8 LSB PAR Description Indicates read or write command 14-bit address code Parity bit (EVEN) Read Package (Value Read from AS5055) The read frame always contains two alarm bits, the error and parity flags and the addressed data of the previous read command. Table 7. Read Package Bit MSB 14 13 12 11 10 9 8 7 Data <13:0> Bit Data EF PAR www.ams.com/AS5055 6 5 4 3 2 1 LSB EF PAR Description 14-bit addressed data Error flag indicating a transmission error in a previous host transmission Parity bit (EVEN) Revision 1.16 9 - 26 AS5055 Datasheet - D e t a i l e d D e s c r i p t i o n 7.2.3 Write Data Package (Value Written to AS5055) The write frame is compatible to the read frame and contains two additional bits, the don’t care and parity flag. If the previous command was a write command a second package has to be transmitted. Table 8. Write Package Bit MSB 14 13 12 11 10 9 8 7 6 5 4 3 2 Data <13:0> Bit Data PAR 7.2.4 1 LSB Don’t care PAR Description 14-bit data to write to former selected address Parity bit (EVEN) Register Block Table 9. Register Block Register Bit Mode Reset Value Bit Description R/W 0x00 <7:0> The POR cell is deactivated when the value 0x5A is written to this register (30µA reduction of current consumption) W 0x000 <13:0> Refer to SOFTWARE RESET Command on page 13 W 0x000 <13:0> Inject a power on reset cycle R 0x000 <13:0> Refer to CLEAR ERROR FLAG Command on page 12 w 0x000 <13:0> Refer to NOP Command on page 14 Power ON Reset (POR) Register - [0x3F22] POR_OFF 8 Software Reset Register - [0x3C00] software_reset 14 Master Reset Register - [0x33A5] master_reset 14 Clear Error Flag Register - [0x3380] clr_error_flag 14 No Operation Register - [0x0000] NOP 14 Automatic Gain Control (AGC) Register - [0x03FF8] 6 R/W 0x20 <5:0> Automatic gain control: low values = strong magnetic field high values = weak magnetic field Angle Value 12 R 0x000 <11:0> Measured angular value, 12-bit Alarm LO 1 R 0 <12> Alarm bit indicating a too high magnetic field, active HIGH. Refer to Error Monitoring on page 14 Alarm HI 1 R 0 <13> Alarm bit indicating a too low magnetic field, active HIGH. Refer to Error Monitoring on page 14 AGC Angular Data - [0x3FFF] System Configuration Register 1 - [0x3F20] resolution 2 R ‘00’ <13:12> ‘00’ indicates 12-bit resolution chip ID 3 R ‘001’ <11:9> Silicon version 001 R 0x000 <13:0> Refer to Error Status Command on page 15 Error Status Register - [0x335A] error_status www.ams.com/AS5055 14 Revision 1.16 10 - 26 AS5055 Datasheet - D e t a i l e d D e s c r i p t i o n 7.2.5 SPI Interface Commands READ Command. For a single READ command two transmission sequences are necessary. The first package written to the AS5055 contains the READ command (MSB high) and the address the chip has to access, the second package transmitted to the AS5055 device can be any command the chip has to process next. The content of the desired register is available in the MISO register of the master device at the end of the second transmission cycle. Figure 5. READ Command T COM MSB LSB MOSI MISO MSB LSB READ Next command Response - 1 Response on READ command MSB LSB MSB Transmission N LSB Transmission N + 1 WRITE Command. A single WRITE command takes two transmission cycles. The WRITE command can be verified by sending a NOP command after the WRITE command. The Data will be send back during NOP command. Figure 6. WRITE Command TCOM MSB MOSI LSB MSB WRITE command MISO LSB MSB LSB Next command Old register content Transmission N www.ams.com/AS5055 MSB DATA Response -1 MSB LSB New register content LSB Transmission N + 1 Revision 1.16 MSB LSB Transmission N + 2 11 - 26 AS5055 Datasheet - D e t a i l e d D e s c r i p t i o n CLEAR ERROR FLAG Command. The CLEAR ERROR FLAG command is implemented as READ command. This command clears the ERROR FLAG which is contained in every READ frame. The READ data are 0x0000, which indicates a successful clear command. Figure 7. CLEAR ERROR FLAG Command TCOM MSB LSB MOSI MSB CLEAR ERROR FLAG MISO Next command Response-1 MSB LSB 0x 0000 LSB MSB Transmission N LSB Transmission N + 1 The package necessary to perform a CLEAR ERROR FLAG is built up as follows. Table 10. CLEAR ERROR FLAG Command Bit MSB 14 13 12 11 10 9 8 7 6 5 4 3 2 1 LSB 1 1 1 0 0 1 1 1 0 0 0 0 0 0 0 PAR CLEAR ERROR FLAG command PAR Possible conditions which force the ERROR FLAG to be set: Wrong parity Wrong command Wrong number of clocks (no full transmission cycle or too many clocks) Note: If the error flag is set to ‘high’ because of a communication problem the flag remains set until it will be cleared by an external command. www.ams.com/AS5055 Revision 1.16 12 - 26 AS5055 Datasheet - D e t a i l e d D e s c r i p t i o n SOFTWARE RESET Command. The SOFTWARE RESET command is implemented as WRITE command. The bit ‘RES SPI’ of the DATA package indicates if the SPI registers should be reset as well. The soft reset resets the digital part (‘RES SPI’ is set to one) as well as the OTP memory. A new OTP memory auto-load is initiated and the reset values stored in the OTP memory are loaded into the configuration registers. The command following the SOFTWARE RESET command can be any of the commands specified in this chapter. After the data package is sent, the soft reset is generated. The fuses of the OTP memory are loaded into the registers and a new conversion cycle will be started. If the device is in sleep mode the oscillator will be started first. Figure 8. SOFTWARE RESET Command TCOM MSB LSB MOSI MISO MSB LSB SOFTWARE RESET command DATA Response -1 0x 0000 MSB LSB LSB Next command 0x 0000 MSB Transmission N MSB LSB MSB Transmission N + 1 LSB Transmission N + 2 In order to invoke a software reset on the AS5055 the following bit pattern has to be sent. Table 11. SOFTWARE RESET Command Bit MSB 14 13 12 11 10 9 8 7 6 5 4 3 2 1 LSB 0 1 1 1 1 0 0 0 0 0 0 0 0 0 0 PAR SOFTWARE RESET command PAR Table 12. Data Package Bit MSB 14 13 12 11 10 9 8 7 Don’t care 5 4 3 2 1 RES SPI Don’t care Bit Description RES SPI If set to one, SPI registers are reset as well Parity bit (EVEN) PAR 6 LSB PAR 1 1. After a power on reset, the OTP will be read and hence OTP related registers are changed independent on the RES SPI flag. www.ams.com/AS5055 Revision 1.16 13 - 26 AS5055 Datasheet - D e t a i l e d D e s c r i p t i o n NOP Command. The NOP command represents a dummy write to the AS5055. Figure 9. NOP Command TCOM MSB LSB MOSI MISO MSB LSB MSB LSB NOP NOP Next command Response -1 0x0000 0x0000 MSB LSB MSB Transmission N LSB MSB Transmission N + 1 LSB Transmission N + 2 The NOP command frame looks like follows. Table 13. NOP Command Bit MSB 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 LSB NOP command (0x0000) The chip’s response on this command is 0x0000 – if no error happens. 7.2.6 Error Monitoring The correct operation and communication of the AS5055 is ensured by several particular error flags. Every read access is supported by an error flag (EF) to indicate a transmission error. In addition a dedicated error status register is accessible. See Table 14 on page 15. Alarm HI Alarm LO 0 0 Mode Description AGC level is higher than the minimum value and lower than the maximum value 0 1 AGC level is equal or even lower than the minimum level 1 0 1 1 AGC level is equal or even higher than the maximum level Indicates if any error flag has occurred. For detailed information, refer to Error Status Command on page 15. www.ams.com/AS5055 Revision 1.16 14 - 26 AS5055 Datasheet - D e t a i l e d D e s c r i p t i o n Error Status Command. Table 14. Error Status Command Description Bit Type Error Status DSP 13 12 11 10 Error Status System 9 8 7 6 5 4 Error Status SPI 3 2 1 0 reserved DSPAHI DSPALO RANERR DSPOV DACOV reserved MODE WOW reserved ADDMON CLKMON PARITY PARITY: Indicates when the transmitted parity bit does not match to calculated parity bit CLKMON: Clock monitoring indicates when the amount of clock cycles is not correct ADDMON: Address monitoring appears when the address does not exist WOW: This is a handshake mechanism to check system integrity. By sending a READ ANGLE command the internal flag (WOW) is set to high. At the end of measurement the WOW is set to low again. In failure case (internal dead lock situation) the WOW flag remains high. MODE: During sleep mode, the flag is 0. When the IC is busy (measuring), the flag is 1. DACOV: The DACOV bit occurs if the magnetic input field strengths is too large for at least one Hall element. This can be the case if the magnet is displaced. DSPOV: CORDIC overflow occurs when the input signals of CORDIC are too large RANERR: Range error appears when the voltage drop over the internal current source decreases which is caused by increased temperature. The accuracy is getting worse. DSPALO: DSP Alarm LO; AGC level is equal or even lower than the minimum level. DSPAHI: DSP Alarm HI; AGC level is equal or even higher than the maximum level. For additional information on Error Status, please refer to the application note AN5000_Error Monitoring. www.ams.com/AS5055 Revision 1.16 15 - 26 AS5055 Datasheet - A p p l i c a t i o n I n f o r m a t i o n 8 Application Information The benefits of the AS5055 device are as follows: Complete system-on-chip Low power consumption Low operating voltage Easy to use SPI interface 8.1 SPI Interface The 16-bit SPI Interface enables read / write access to the register blocks and is compatible to a standard micro controller interface. The SPI module is active as soon as /SS pin is pulled low. The AS5055 then reads the digital value on the MOSI (master out slave in) input with every falling edge of SCK and writes on its MISO (master in slave out) output with the rising edge. After 16 clock cycles /SS has to be set back to a high status in order to reset some parts of the interface core. The SPI Interface can be set in two different modes: 3-wire mode or 4-wire mode. Notes: 1. The wire mode selection is read during the POWER-UP state and can be changed with a power on reset or a software reset command. 2. For more stability on the SPI Interface, it is very important to place filters. The filter must be placed close to the driving outputs. For further information, please refer to the application note AN5000_SPI_Interface. Table 15. Wire Mode Selection Wire Mode Selection (pad 14) 8.1.1 wire_mode = LO 3-wire mode wire_mode = HI 4-wire mode SPI Interface Signals (4-Wire Mode, Wire_mode = 1) The AS5055 only supports slave operation mode. Therefore SCK for the communication as well as the /SS signal has to be provided by the test equipment. The following picture shows a basic interconnection diagram with one master and an AS5055 device and a principle schematic of the interface core. Figure 10. SPI Interface Connection SCK SPI_CLK SS/ SPI_SSN MOSI MOSI RXSR Interface Core Master Device RXSPI TXSPI (Tester) TXSR MISO MISO AS5055 Because the interface has to decode the sent command before it can react and provide data the response of the chip to a specific command applied at a time T can be accessed in the next transmission cycle ending at T + TCOM. www.ams.com/AS5055 Revision 1.16 16 - 26 AS5055 Datasheet - A p p l i c a t i o n I n f o r m a t i o n The data are sent and read with MSB first. Every time the chip is accessed it is sending and receiving data. Figure 11. SPI Command / Response Data Flow TCOM MSB MOSI MISO LSB MSB MSB LSB MSB LSB Command 1 Command 2 Command N - 1 Command N 0x 00 Response 1 Response 2 Response N - 1 MSB LSB MSB Transmission 1 8.1.2 LSB LSB MSB Transmission 2 LSB MSB Transmission N - 1 LSB Transmission N SPI Timing Figure 12. SPI Timing Diagram t XSSH SS / ( Input ) tL t sck t sckL t sckH tH SCK ( Input ) t MISO t OZ MISO ( Output ) data[ 15] data[ 14] data[0] t OZ t MOSI MOSI ( Input ) data[ 15] data[ 14] data[0] Table 16. SPI Timing Characteristics Parameter Description tOZ Time between positive edge of SS/ to output high impedance tL Time between SS/ falling edge and SCK rising edge 10 ns tSCK Serial clock period 100 ns tSCKL Low period of serial clock 50 ns tSCKH High period of serial clock 50 ns tH Time between last falling edge of SCK and rising edge of SS/ tSCK / 2 ns www.ams.com/AS5055 Min Revision 1.16 Max Unit 50 ns 17 - 26 AS5055 Datasheet - A p p l i c a t i o n I n f o r m a t i o n Table 16. SPI Timing Characteristics 8.1.3 Parameter Description Min Max Unit tXSSH High time of SS/ between two transmissions 50 ns tMOSI Data input valid to clock edge 20 ns tMISO SCK edge to data output valid 20 ns SPI Connection to the Host µC Single Slave Mode. Figure 13. Single Slave Mode UC MOSI MOSI MISO MISO SCK SCK SS/ SS/ 1 0xFFFF Write CMD MOSI Read angle 1 AS5055 Wire_Mode 0xFFFF 0xFFFF Write CMD Write CMD Read angle 2 Read angle 3 Angle 1 MISO Angle 2 0xFFFF 0xFFFF 0xFFFF Write CMD Write CMD Write CMD Read angle 4 Read angle 5 Read angle 6 Angle 3 Angle 4 Write CMD NOP Angle 5 ... Angle 6 SS/ 4 wire mode 1 UC MOSI MISO MISO SCK SCK SS/ MISO AS5055 Angle 1 Angle 2 Angle 3 Angle 4 Angle 6 Angle 7 0xFFFF Write CMD Read angle 4 Angle 4 Angle 5 SS/ 1 SISO Wire_Mode SCK SCK SS/ SS/ 0 3 wire mode (Read only ) 0xFFFF Write CMD SISO Read angle 1 MISO MOSI UC ... SS/ AS5055 Angle 1 0xFFFF Write CMD Read angle 2 Angle 2 0xFFFF Write CMD Read angle 3 Angle 3 SS/ 3 wire mode ( Bi - dir) Wire_Mode Note: 3 Wire Mode (read only): If the ERROR FLAG is set the device must be externally reset. www.ams.com/AS5055 Revision 1.16 18 - 26 AS5055 Datasheet - A p p l i c a t i o n I n f o r m a t i o n Multiple Slave, n+3 Wire (Separate ChipSelect). Figure 14. Multiple Slave, n+3 Wire (Separate ChipSelect) UC MOSI MOSI MISO MISO SCK SCK SS1/ SS/ SS2/ 1 Write CMD SW reset UC MOSI AS5055 I Wire_ Mode 0xFFFF Write CMD Read angle1 ... UC MISO xx 0xFFFF Write CMD Read angle 2 Angle 1 0xFFFF Write CMD Read angle 3 xx Angle 2 0xFFFF Write CMD NOP xx Angle 3 SS1/ SS2/ SS3/ SS2/ MOSI MISO SCK SS/ 1 AS5055 II Wire_ Mode MOSI MISO SCK SS / 1 AS5055 III Wire_ Mode Daisy Chain, 4 Wire. Figure 15. Daisy Chain, 4-Wire UC MOSI MOSI MISO MISO SCK SCK SS/ SS/ 1 CMD UC MOSI Write SW reset AS5055 UC MISO I SS/ SCK SS/ 0xFFFF 0xFFFF 0xFFFF 0xFFFF UC MOSI Read angle3 Read angle2 Read angle1 Read angle3 Read angle2 Read angle1 AS5055 UC MISO II SS/ Angle 3 Angle 2 Angle 1 ... ... ... Angle 3 Angle 2 Angle1 Wire_Mode MOSI MISO SCK SS/ www.ams.com/AS5055 0xFFFF Wire_Mode MOSI MISO 1 Write CMD SW reset ... 0xFFFF 1 Write CMD SW reset AS5055 III Wire_Mode Revision 1.16 19 - 26 AS5055 Datasheet - A p p l i c a t i o n I n f o r m a t i o n 8.1.4 SPI Over Long Distances Over long cable distances you will have coupling capacitance between signals. Therefore consider some aspects. The circuitry of the connection is shown in Figure 16. Figure 16. Circuitry of SPI Over Long Distances SPI Interface µC SPI Interface AS5055 R MOSI C MOSI C R MISO MISO C C VSS VSS R SCK SCK C C R SS/ SS/ C C One aspect is that between MISO and SCK must be separated with VSS. Additionally filter circuitry, reduces the disturbance to a minimum. Resistors close to the output pins reduce communication noise and increase EMC. Required resistors on the output pins are between 100 Ohm and 1000 Ohm. Required capacitance is 100pF. Place the resistors and capacitors as near as possible to the pins. For additional information on this issue, please refer to the application note AS5055_SPI_APPNote. www.ams.com/AS5055 Revision 1.16 20 - 26 AS5055 Datasheet - A p p l i c a t i o n I n f o r m a t i o n 8.2 Placement of the Magnet Non-Linearity Error over Displacement. As shown in Figure 18, the recommended horizontal position of the magnet axis is over the diagonal center of the IC. Figure 17 shows a typical error curve at a vertical magnet distance of 1.0mm, measured with a NdFeB N35H magnet with 6mm diameter and 2.5mm height. The X- and Y- axis of the graph indicate the lateral displacement of the magnet center with respect to the IC center. At X = Y = 0, the magnet is perfectly centered over the IC. The total displacement plotted on the graph is for ±1mm in both directions. The Z-axis displays the worst case INL error over a full turn at each given X-and Y- displacement. The error includes the quantization error of ±½ LSB. At the sample shown in Figure 17, the accuracy for a centered magnet is better than 0.5°. Within a radius of 0.5mm, the accuracy is about 1.0° (spec = 1.41° over temperature). Figure 17. Integral Non-linearity Over Displacement of the Magnet Non-Linearity @ z=1mm 4 3,5 3 2,5 2 INL [°] 1,5 1 0,5 0 3,5-4 0,8 -0,7 0,8 0,5 0,2 -0,4 -0,1 -0,4 -0,7 -1,0 0,2 X-displacement [mm] www.ams.com/AS5055 2,5-3 0,5 -0,1 -1,0 Revision 1.16 3-3,5 2-2,5 Y-displacement [mm] 1,5-2 1-1,5 0,5-1 0-0,5 21 - 26 AS5055 Datasheet - P a c k a g e D r a w i n g s a n d M a r k i n g s 9 Package Drawings and Markings The device is available in a 16-pin QFN (4x4x0.85 mm) package. Figure 18. Drawings and Dimensions YYWWXZZ AS5055 @ Notes: 1. Dimensions and tolerancing conform to ASME Y14.5M-1994. 2. All dimensions are in millimeters. Angles are in degrees. 3. Dimension b applies to metallized terminal and is measured between 0.25mm and 0.30mm from terminal tip. Dimension L1 represents terminal full back from package edge up to 0.15mm is acceptable. 4. Coplanarity applies to the exposed heat slug as well as the terminal. 5. Radius on terminal is optional. 6. N is the total number of terminals. Symbol A A1 A3 L L1 b D E e D2 E2 aaa bbb ccc ddd eee fff N Min 0.80 0 0.45 0 0.25 2.30 2.30 - Nom 0.90 0.02 0.20 REF 0.50 0.30 4.00 BSC 4.00 BSC 0.65 BSC 2.40 2.40 0.15 0.10 0.10 0.05 0.08 0.10 16 Max 1.00 0.05 0.55 0.15 0.35 2.50 2.50 - Marking: YYWWXZZ. YY WW X ZZ @ Year (i.e. 04 for 2004) Week Assembly plant identifier Assembly traceability code Sublot identifier www.ams.com/AS5055 Revision 1.16 22 - 26 AS5055 Datasheet - P a c k a g e D r a w i n g s a n d M a r k i n g s Figure 19. Vertical Cross Section of 16-pin QFN (4x4x0.85 mm) Notes: 1. 2. 3. 4. All dimensions in mm. Die thickness 0.254 ± 0.013 Adhesive thickness 0.010 ± 10, +0.01, -0.0025 Lead frame thickness 0.203 typ. www.ams.com/AS5055 Revision 1.16 23 - 26 AS5055 Datasheet - R e v i s i o n H i s t o r y Revision History Revision Date Owner 1.0 23 Mar, 2010 jja Initial revision of public release version 1.1 8 Jun, 2010 jlu Updated Pin Descriptions (pin 16), Typical Application, SPI Connection to the Host µC, Figure 3, Figure 13, Figure 14, Figure 15. 1.11 3 Nov, 2010 agt Updated Absolute Maximum Ratings, System Parameters, Pin Descriptions, Power Supply Filter, Table 9, SPI Connection to the Host µC, Package Drawings and Markings. 1.12 3 Nov, 2011 mub Updated operating temperature range. 1.13 28 Dec, 2011 1.14 11 Jul, 2012 1.15 16 Oct, 2012 1.16 05 Feb, 2013 21 Feb, 2013 rei Description Updated Figure 3, Table 9 and package drawings. Updated Alarm LO / HI info in Table 9. Updated Figure 1, Section 4, Section 7.2.4, Table 16; Added Error Status Command, Figure 19, Section 8.1.4 ekno Correction of error status register and alarm bits, updated marking. Updated Table 4, Table 14, Table 16 Note: Typos may not be explicitly mentioned under revision history. www.ams.com/AS5055 Revision 1.16 24 - 26 AS5055 Datasheet - O r d e r i n g I n f o r m a t i o n 10 Ordering Information The devices are available as the standard products shown in Table 17. Table 17. Ordering Information Ordering Code Description Delivery Form Package AS5055 EQFT 12-bit low power magnetic rotary encoder Tape & Reel 16-pin QFN (4x4x0.85 mm) Note: All products are RoHS compliant and ams green. Buy our products or get free samples online at www.ams.com/ICdirect Technical Support is available at www.ams.com/Technical-Support For further information and requests, email us at [email protected] (or) find your local distributor at www.ams.com/distributor www.ams.com/AS5055 Revision 1.16 25 - 26 AS5055 Datasheet - C o p y r i g h t s Copyrights Copyright © 1997-2013, ams AG, Tobelbaderstrasse 30, 8141 Unterpremstaetten, Austria-Europe. Trademarks Registered ®. All rights reserved. The material herein may not be reproduced, adapted, merged, translated, stored, or used without the prior written consent of the copyright owner. All products and companies mentioned are trademarks or registered trademarks of their respective companies. Disclaimer Devices sold by ams AG are covered by the warranty and patent indemnification provisions appearing in its Term of Sale. ams AG makes no warranty, express, statutory, implied, or by description regarding the information set forth herein or regarding the freedom of the described devices from patent infringement. ams AG reserves the right to change specifications and prices at any time and without notice. Therefore, prior to designing this product into a system, it is necessary to check with ams AG for current information. This product is intended for use in normal commercial applications. Applications requiring extended temperature range, unusual environmental requirements, or high reliability applications, such as military, medical life-support or life-sustaining equipment are specifically not recommended without additional processing by ams AG for each application. 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