AS5145B_Datasheet_v1_12

Datashee t
AS5145H/AS5145A/AS5145B
1 2 - B i t P r o g r a m m a b l e M a g n etic R otary Enco der
1 General Description
Three incremental outputs
Quadrature A/B (10 or 12 bit) and Index output signal (pre-
The AS5145 is a contact less magnetic rotary encoder for accurate
angular measurement over a full turn of 360 degrees.
programmed versions available AS5145A for 10-bit and
AS5145B for 12-bit)
It is a system-on-chip, combining integrated Hall elements, analog
front end and digital signal processing in a single device.
User programmable zero position
To measure the angle, only a simple two-pole magnet, rotating over
the center of the chip, is required. The magnet may be placed above
or below the IC.
The absolute angle measurement provides instant indication of the
magnet’s angular position with a resolution of 0.0879º = 4096
positions per revolution. This digital data is available as a serial bit
stream and as a PWM signal.
Failure detection mode for magnet placement, monitoring, and
loss of power supply
Red-Yellow-Green indicators display placement of magnet in Z-
axis
Serial read-out of multiple interconnected AS5145 devices
using Daisy Chain mode
Tolerant to magnet misalignment and gap variations
An internal voltage regulator allows the AS5145 to operate at either
3.3V or 5V supplies.
Wide temperature range: - 40ºC to +150ºC
Fully automotive qualified to AEC-Q100, grade 0
Small Pb-free package: SSOP 16 (5.3mm x 6.2mm)
2 Key Features
Contact less high resolution rotational position encoding over a
full turn of 360 degrees
3 Applications
The device is ideal for industrial applications like contactless rotary
position sensing and robotics; automotive applications like steering
wheel position sensing, transmission gearbox encoder, head light
position control, torque sensing, valve position sensing and
replacement of high end potentiometers.
Two digital 12 bit absolute outputs:
- Serial interface
- Pulse width modulated (PWM) output
Figure 1. AS5145 Automotive Rotary Encoder IC
VDD3V3
VDD5V
MagINCn
MagDECn
LDO 3.3V
PWM
Interface
Sin
Hall Array
&
Frontend
Amplifier
Mux
Cos
PWM
Ang
DSP
Mag
Absolute
Interface
(SSI)
DO
CSn
CLK
OTP
Register
AS5145
PDIO
Incremental
Interface
DTEST1_A
DTEST2_B
Mode_Index
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AS5145
Datasheet - C o n t e n t s
Contents
1 General Description ..................................................................................................................................................................
1
2 Key Features.............................................................................................................................................................................
1
3 Applications...............................................................................................................................................................................
1
4 Pin Assignments .......................................................................................................................................................................
4
4.1 Pin Descriptions....................................................................................................................................................................................
4
5 Absolute Maximum Ratings ......................................................................................................................................................
6
6 Electrical Characteristics...........................................................................................................................................................
7
6.1 Magnetic Input Specification.................................................................................................................................................................
8
6.2 System Specifications ..........................................................................................................................................................................
9
7 Timing Characteristics ............................................................................................................................................................
11
8 Detailed Description................................................................................................................................................................
12
8.1 Mode_Index Pin..................................................................................................................................................................................
8.1.1
8.1.2
8.1.3
8.1.4
8.1.5
Synchronous Serial Interface (SSI) ...........................................................................................................................................
Incremental Mode ......................................................................................................................................................................
Sync Mode.................................................................................................................................................................................
Sin/Cosine Mode .......................................................................................................................................................................
Daisy Chain Mode .....................................................................................................................................................................
8.2 Pulse Width Modulation (PWM) Output..............................................................................................................................................
12
13
14
16
16
16
17
8.2.1 Changing the PWM Frequency.................................................................................................................................................. 18
8.3 Analog Output.....................................................................................................................................................................................
9 Application Information ...........................................................................................................................................................
19
9.1 Programming the AS5145 ..................................................................................................................................................................
9.1.1
9.1.2
9.1.3
9.1.4
9.1.5
9.1.6
9.1.7
18
Zero Position Programming .......................................................................................................................................................
OTP Memory Assignment..........................................................................................................................................................
User Selectable Settings ...........................................................................................................................................................
OTP Default Setting...................................................................................................................................................................
Redundancy...............................................................................................................................................................................
Redundant Programming Option ...............................................................................................................................................
OTP Register Entry and Exit Condition .....................................................................................................................................
19
19
20
20
21
21
22
22
9.2 Alignment Mode..................................................................................................................................................................................
23
9.3 3.3V / 5V Operation ............................................................................................................................................................................
24
9.4 Selecting Proper Magnet ....................................................................................................................................................................
24
9.4.1 Physical Placement of the Magnet ............................................................................................................................................ 25
9.4.2 Magnet Placement..................................................................................................................................................................... 26
9.5 Simulation Modeling ...........................................................................................................................................................................
26
9.6 Failure Diagnostics .............................................................................................................................................................................
27
9.6.1 Magnetic Field Strength Diagnosis ............................................................................................................................................ 27
9.6.2 Power Supply Failure Detection ................................................................................................................................................ 27
9.7 Angular Output Tolerances .................................................................................................................................................................
9.7.1
9.7.2
9.7.3
9.7.4
9.7.5
9.7.6
Accuracy ....................................................................................................................................................................................
Transition Noise.........................................................................................................................................................................
High Speed Operation ...............................................................................................................................................................
Propagation Delays ...................................................................................................................................................................
Internal Timing Tolerance ..........................................................................................................................................................
Temperature ..............................................................................................................................................................................
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Datasheet - C o n t e n t s
9.7.7 Accuracy over Temperature ...................................................................................................................................................... 30
9.8 AS5145 Differences to AS5045..........................................................................................................................................................
10 Package Drawings and Markings .........................................................................................................................................
32
10.1 Recommended PCB Footprint..........................................................................................................................................................
11 Ordering Information .............................................................................................................................................................
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AS5145
Datasheet - P i n A s s i g n m e n t s
4 Pin Assignments
Figure 2. Pin Assignments (Top View)
1
16
VDD5V
MagDECn
2
15
VDD3V3
DTest1_A
3
14
NC
DTest2_B
4
13
NC
NC
5
12
PWM
6
11
CSn
VSS
7
10
CLK
PDIO
8
9
DO
AS5145
MagINCn
4.1 Pin Descriptions
The following SSOP16 shows the description of each pin of the standard SSOP16 package (Shrink Small Outline Package, 16 leads, body size:
5.3mm x 6.2mmm; (see Figure 2).
Table 1. Pin Descriptions
Pin Name
Pin Number
MagINCn
1
MagDECn
2
DTest1_A
3
DTest2_B
4
NC
5
-
Mode_Index
6
Digital input/output
pull-down
VSS
7
Supply pin
PDIO
8
OTP Programming Input and Data Input for Daisy Chain mode.
Digital input pull-down Internal pull-down resistor (74k). Should be connected to VSS if
programming is not used.
DO
9
Digital output/ tri-state Data Output of Synchronous Serial Interface
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Pin Type
Digital output open
drain
Digital output
Description
Magnet Field Magnitude Increase. Active low. Indicates a distance
reduction between the magnet and the device surface. (see Table 9)
Magnet Field Magnitude Decrease. Active low. Indicates a distance
increase between the device and the magnet. (see Table 9)
Test output in default mode
Test output in default mode
Must be left unconnected
Select between slow (open, low: VSS) and fast (high) mode. Internal pulldown resistor (10k).
Negative Supply Voltage (GND)
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Datasheet - P i n A s s i g n m e n t s
Table 1. Pin Descriptions
Pin Name
Pin Number
Pin Type
Description
CLK
10
Digital input, Schmitt- Clock Input of Synchronous Serial Interface; Schmitt-Trigger input
Trigger input
CSn
11
Digital input pullChip Select. Active low. Schmitt-Trigger input, internal pull-up resistor
down, Schmitt-Trigger
(50k)
input
PWM
12
Digital output
Pulse Width Modulation
NC
13
-
Must be left unconnected
NC
14
-
Must be left unconnected
VDD3V3
15
Supply pin
3V-Regulator Output, internally regulated from VDD5V. Connect to
VDD5V for 3V supply voltage. Do not load externally.
VDD5V
16
Supply pin
Positive Supply Voltage, 3.0V to 5.5V
Pin 1 and 2 are the magnetic field change indicators, MagINCn and MagDECn (magnetic field strength increase or decrease through variation of
the distance between the magnet and the device). These outputs can be used to detect the valid magnetic field range. Furthermore those
indicators can also be used for contact-less push-button functionality.
Pin 3 and 4 are multi function pins for sync mode, sin/cosine mode and incremental mode.
Pin 6 Mode_Index allows switching between filtered (slow) and unfiltered (fast mode). In incremental mode, the pin changes from input to output
and provides the index pulse information. A change of the Mode during operation is not allowed. The setup must be constant during power up
and during operation.
Pins 7, 15, and 16 are supply pins, pins 5, 13, and 14 are for internal use and must not be connected.
Pin 8 (PDIO) is used to program the zero-position into the OTP(see page 19). This pin is also used as digital input to shift serial data through the
device in Daisy Chain configuration, (see page 14).
Pin 11 Chip Select (CSn; active low) selects a device within a network of AS5145 encoders and initiates serial data transfer. A logic high at CSn
puts the data output pin (DO) to tri-state and terminates serial data transfer. This pin is also used for alignment mode (see Alignment Mode on
page 23) and programming mode (see Programming the AS5145 on page 19).
Pin 12 allows a single wire output of the 12-bit absolute position value. The value is encoded into a pulse width modulated signal with 1µs pulse
width per step (1µs to 4096µs over a full turn). By using an external low pass filter, the digital PWM signal is converted into an analog voltage,
e.g. for making a direct replacement of potentiometers possible.
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AS5145
Datasheet - A b s o l u t e M a x i m u m R a t i n g s
5 Absolute Maximum Ratings
Stresses beyond those listed in Table 2 may cause permanent damage to the device. These are stress ratings only, and functional operation of
the device at these or any other conditions beyond those indicated in Section 6 Electrical Characteristics on page 7 is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
Table 2. Absolute Maximum Ratings
Parameter
Min
Max
Units
-0.3
7
V
5
V
Comments
Electrical Parameters
DC supply voltage at pin VDD5V
DC supply voltage at pin VDD3V3
Input pin voltage
-0.3
VDD5V +0.3
V
Except VDD3V3
Input current (latchup immunity)
-100
100
mA
Norm: EIA/JESD78 Class II Level A
±2
kV
Norm: JESD22-A114E
125
ºC
Min -67ºF; Max +257ºF
260
ºC
The reflow peak soldering temperature (body
temperature) specified is in accordance with IPC/
JEDEC J-STD-020 “Moisture/Reflow Sensitivity
Classification for Non-Hermetic Solid State Surface
Mount Devices”.
The lead finish for Pb-free leaded packages is matte tin
(100% Sn).
85
%
Electrostatic Discharge
Electrostatic discharge
Temperature Ranges and Storage Conditions
Storage temperature
-55
Package Body temperature
Humidity non-condensing
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Datasheet - E l e c t r i c a l C h a r a c t e r i s t i c s
6 Electrical Characteristics
TAMB = -40 to +150ºC, VDD5V = 3.0-3.6V (3V operation) VDD5V = 4.5-5.5V (5V operation) unless otherwise noted.
Table 3. Electrical Characteristics
Symbol
Parameter
Condition
Min
Typ
Max
Unit
+150
ºC
16
21
mA
4.5
5.0
5.5
3.0
3.3
3.6
3.0
3.3
3.6
3.0
3.3
3.6
1,37
2.2
2.9
1.08
1.9
2.6
Operating Conditions
TAMB
Ambient temperature
Isupp
Supply current
VDD5V
Supply voltage at pin VDD5V
-40
VDD3V3
Voltage regulator output voltage at pin
VDD3V3
5V Operation
VDD5V
Supply voltage at pin VDD5V
VDD3V3
Supply voltage at pin VDD3V3
3.3V Operation
(pin VDD5V and VDD3V3 connected)
VON
Power-on reset thresholds
On voltage; 300mV typ. hysteresis
Power-on reset thresholds
Off voltage; 300mV typ. hysteresis
Voff
DC supply voltage 3.3V (VDD3V3)
V
V
V
Programming Conditions
VPROG
Programming voltage
Voltage applied during programming
3.3
3.6
V
VProgOff
Programming voltage off level
Line must be discharged to this level
0
1
V
IPROG
Programming current
Current during programming
100
mA
Rprogramme Programmed fuse resistance (log 1)
10µA max. current @ 100mV
100k


Unprogrammed fuse resistance (log
0)
2mA max. current @ 100mV
50
100

d
Runprogram
med
DC Characteristics CMOS Schmitt-Trigger Inputs: CLK, CSn (CSn = Internal Pull-up)
0.7 *
VDD5V
VIH
High level input voltage
VIL
Low level input voltage
VIon- VIoff
Schmitt Trigger hysteresis
ILEAK
Input leakage current
CLK only
-1
1
IiL
Pull-up low level input current
CSn only, VDD5V: 5.0V
-30
-100
0.7 *
VDD5V
VDD5V
V
3.3
3.6
V
0.3 *
VDD5V
V
100
µA
Normal operation
V
0.3 *
VDD5V
1
V
V
µA
DC Characteristics CMOS / Program Input: PDIO
VIH
High level input voltage
1
VPROG
High level input voltage
VIL
Low level input voltage
IiL
High level input current
During programming
VDD5V: 5.5V
30
DC Characteristics CMOS Output Open Drain: MagINCn, MagDECn
IOZ
Open drain leakage current
1
µA
VOL
Low level output voltage
VSS +
0.4
V
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Datasheet - E l e c t r i c a l C h a r a c t e r i s t i c s
Table 3. Electrical Characteristics
Symbol
Parameter
IO
Output current
Condition
Min
Typ
Max
VDD5V: 4.5V
4
VDD5V: 3V
2
Unit
mA
DC Characteristics CMOS Output: PWM
VOH
High level output voltage
VOL
Low level output voltage
IO
Output current
VDD5V –
0.5
V
VSS
+0.4
VDD5V: 4.5V
4
VDD5V: 3V
2
V
mA
DC Characteristics CMOS Output: A, B, Index
VOH
High level output voltage
VOL
Low level output voltage
IO
Output current
VDD5V –
0.5
V
VSS
+0.4
VDD5V: 4.5V
4
VDD5V: 3V
2
V
mA
DC Characteristics Tri-state CMOS Output: DO
VOH
High level output voltage
VOL
Low level output voltage
IO
Output current
IOZ
Tri-state leakage current
VDD5V –
0.5
V
VSS
+0.4
VDD5V: 4.5V
4
VDD5V: 3V
2
V
mA
1
µA
Max
Unit
1. Either with 3.3V or 5V supply.
6.1 Magnetic Input Specification
TAMB = -40 to +150°C, VDD5V = 3.0 to 3.6V (3V operation) VDD5V = 4.5 to 5.5V (5V operation) unless otherwise noted.
Two-pole cylindrical diametrically magnetized source:
Table 4. Magnetic Input Specification
Symbol
Parameter
Condition
Min
Typ
dmag
Diameter
4
6
tmag
Thickness
Recommended magnet: Ø 6mm x 2.5mm for
cylindrical magnets
Bpk
Magnetic input field amplitude
Required vertical component of the magnetic
field strength on the die’s surface, measured
along a concentric circle with a radius of
1.1mm
Boff
Magnetic offset
Field non-linearity
fmag_abs
Input frequency
(rotational speed of magnet)
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mm
2.5
75
mT
Constant magnetic stray field
± 10
mT
Including offset gradient
5
%
153 rpm @ 4096 positions/rev;
fast mode
2.54
38 rpm @ 4096 positions/rev; slow mode
0.63
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Datasheet - E l e c t r i c a l C h a r a c t e r i s t i c s
Table 4. Magnetic Input Specification
Symbol
Parameter
Condition
Disp
Displacement radius
Ecc
Min
Typ
Max
Unit
Max. offset between defined device center
and magnet axis
(see Figure 19)
0.25
mm
Eccentricity
Eccentricity of magnet center to rotational axis
100
µm
Recommended magnet material and
temperature drift
NdFeB (Neodymium Iron Boron)
-0.12
SmCo (Samarium Cobalt)
-0.035
%/K
6.2 System Specifications
TAMB = -40 to +150°C, VDD5V = 3.0 to 3.6V (3V operation) VDD5V = 4.5 to 5.5V (5V operation) unless otherwise noted.
Table 5. Input Specification
Symbol
Parameter
Condition
RES
Resolution
INLopt
INLtemp
Max
Unit
0.088 deg
12
bit
Integral non-linearity (optimum)
Maximum error with respect to the best line fit.
Centered magnet without calibration, TAMB
=25 ºC.
± 0.5
deg
Integral non-linearity (optimum)
Maximum error with respect to the best line fit.
Centered magnet without calibration,
TAMB = -40 to +150ºC
± 0.9
deg
INL
Integral non-linearity
Best line fit = (Errmax – Errmin) / 2
Over displacement tolerance with 6mm
diameter magnet, without calibration, TAMB =
-40 to +150ºC
± 1.4
deg
DNL
Differential non-linearity
12bit, no missing codes
± 0.044
deg
1 sigma, fast mode (MODE = 1)
0.06
TN
Transition noise
1 sigma, slow mode
(MODE = 0 or open)
0.03
Fast mode (Mode = 1);
Until status bit OCF = 1
20
Slow mode (Mode = 0 or open);
Until OCF = 1
80
Fast mode (MODE = 1)
96
Slow mode (MODE = 0 or open)
384
tPwrUp
Power-up time
tdelay
System propagation delay
absolute output : delay of ADC, DSP
and absolute interface
fS
Internal sampling rate for absolute
output:
fS
CLK/SEL
Internal sampling rate for absolute
output
Read-out frequency
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Min
Typ
ms
TAMB = 25ºC, slow mode
(MODE=0 or open)
2.48
TAMB = -40 to +150ºC, slow mode (MODE=0
or open)
2.35
2.61
2.87
TAMB = 25ºC, fast mode
(MODE = 1)
9.90
10.42
10.94
TAMB = -40 to +150ºC, fast mode
(MODE=1)
9.38
Max. clock frequency to read out serial data
Revision 1.12
Deg
RMS
2.61
µs
2.74
kHz
kHz
10.42
11.46
1
MHz
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AS5145
Datasheet - E l e c t r i c a l C h a r a c t e r i s t i c s
Figure 3. Integral and Differential Non-Linearity Example
1023
 10bit code
1023
Actual curve
2
TN
DNL+1LSB
1
0
Ideal curve
INL
0.35°
512
512
0
0

360 
 [degrees]
Integral Non-Linearity (INL) is the maximum deviation between actual position and indicated position.
Differential Non-Linearity (DNL) is the maximum deviation of the step length from one position to the next.
Transition Noise (TN) is the repeatability of an indicated position.
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AS5145
Datasheet - T i m i n g C h a r a c t e r i s t i c s
7 Timing Characteristics
TAMB = -40 to +150 ºC, VDD5V = 3.0 to 3.6V (3V operation) VDD5V = 4.5 to 5.5V (5V operation), unless otherwise noted.
Table 6. Timing Characteristics
Symbol
Parameter
Conditions
Min
Typ
Max
Units
100
ns
Synchronous Serial Interface (SSI)
tDOactive
Data output activated (logic high)
Time between falling edge of CSn and
data output activated
tCLKFE
First data shifted to output register
Time between falling edge of CSn and
first falling edge of CLK
500
ns
TCLK/2
Start of data output
Rising edge of CLK shifts out one bit at a
time
500
ns
tDOvalid
Data output valid
Time between rising edge of CLK and
data output valid
413
ns
tDOtristate
Data output tri-state
After the last bit DO changes back to “tristate”
100
ns
tCSn
Pulse width of CSn
CSn =high; To initiate read-out of next
angular position
500
fCLK
Read-out frequency
Clock frequency to read out serial data
>0
ns
1
MHz
Pulse Width Modulation Output
fPWM
PWM frequency
Signal period = 4098µs ±10% at TAMB
= -40 to +150ºC
220
244
268
Hz
PWMIN
Minimum pulse width
Position 0d; angle 0 degree
0.90
1
1.10
µs
PWMAX
Maximum pulse width
Position 4098d; angle 359.91 degrees
3686
4096
4506
µs
tPROG
Programming time per bit
Time to prog. a single fuse bit
10
20
µs
tCHARGE
Refresh time per bit
Time to charge the cap after tPROG
1
fLOAD
LOAD frequency
Data can be loaded at n x 2µs
500
kHz
fREAD
READ frequency
Read the data from the latch
2.5
MHz
fWRITE
WRITE frequency
Write the data to the latch
2.5
MHz
Programming Conditions
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AS5145
Datasheet - D e t a i l e d D e s c r i p t i o n
8 Detailed Description
The AS5145 is manufactured in a CMOS standard process and uses a spinning current Hall technology for sensing the magnetic field
distribution across the surface of the chip. The integrated Hall elements are placed around the center of the device and deliver a voltage
representation of the magnetic field at the surface of the IC.
Through Sigma-Delta Analog / Digital Conversion and Digital Signal-Processing (DSP) algorithms, the AS5145 provides accurate high-resolution
absolute angular position information. For this purpose a Coordinate Rotation Digital Computer (CORDIC) calculates the angle and the
magnitude of the Hall array signals.
The DSP is also used to provide digital information at the outputs MagINCn and MagDECn that indicate movements of the used magnet towards
or away from the device’s surface. A small low cost diametrically magnetized (two-pole) standard magnet provides the angular position
information (see Figure 18).
The AS5145 senses the orientation of the magnetic field and calculates a 12-bit binary code. This code can be accessed via a Synchronous
Serial Interface (SSI). In addition, an absolute angular representation is given by a Pulse Width Modulated signal at pin 12 (PWM). This PWM
signal output also allows the generation of a direct proportional analog voltage, by using an external Low-Pass-Filter. The AS5145 is tolerant to
magnet misalignment and magnetic stray fields due to differential measurement technique and Hall sensor conditioning circuitry.
Figure 4. Typical Arrangement of AS5145 and Magnet
8.1 Mode_Index Pin
The Mode_Index pin activates or deactivates an internal filter that is used to reduce the analog output noise.
Activating the filter (Mode pin = LOW or open) provides a reduced output noise of 0.03º rms. At the same time, the output delay is increased to
384µs. This mode is recommended for high precision, low speed applications.
Deactivating the filter (Mode pin = HIGH) reduces the output delay to 96µs and provides an output noise of 0.06º rms. This mode is
recommended for higher speed applications.
Setup the Mode pin affects the following parameters:
Table 7. Slow and Fast Mode Parameters
Parameter
Slow Mode (mode= low or open)
Fast Mode (mode=high, VDD= 5V)
Sampling rate
2.61 kHz (384 µs)
10.42 kHz (96µs)
Transition noise (1 sigma)
 0.03º rms
 0.06º rms
Output delay
384µs
96µs
Maximum speed @ 4096 samples/rev
38 rpm
153 rpm
Maximum speed @ 1024 samples/rev
153 rpm
610 rpm
Maximum speed @ 256 samples/rev
610 rpm
2441 rpm
Maximum speed @ 64 samples/rev
2441 rpm
9766 rpm
Note: A change of the Mode during operation is not allowed. The setup must be constant during power up and during operation.
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AS5145
Datasheet - D e t a i l e d D e s c r i p t i o n
8.1.1
Synchronous Serial Interface (SSI)
Figure 5. Synchronous Serial Interface with Absolute Angular Position Data
TCLK/2
CSn
tCSn
tCLK FE
tCLK FE
1
CLK
D11
DO
D10 D9
D8
D7
D6
D5
1
18
8
D4
D3
D2
D1
D0
OCF COF
Mag Mag Even
INC DEC PAR
LIN
D11
tDO valid
tDO active
Angular Position Data
tDO Tristate
Status Bits
If CSn changes to logic low, Data Out (DO) will change from high impedance (tri-state) to logic high and the read-out will be initiated.
After a minimum time tCLK FE, data is latched into the output shift register with the first falling edge of CLK.
Each subsequent rising CLK edge shifts out one bit of data.
The serial word contains 18 bits, the first 12 bits are the angular information D[11:0], the subsequent 6 bits contain system information,
about the validity of data such as OCF, COF, LIN, Parity and Magnetic Field status (increase/decrease).
A subsequent measurement is initiated by a “high” pulse at CSn with a minimum duration of tCSn.
Data Content
D11:D0 absolute angular position data (MSB is clocked out first)
OCF (Offset Compensation Finished), logic high indicates the finished Offset Compensation Algorithm
COF (Cordic Overflow), logic high indicates an out of range error in the CORDIC part. When this bit is set, the data at D11:D0 is invalid. The
absolute output maintains the last valid angular value.
This alarm may be resolved by bringing the magnet within the X-Y-Z tolerance limits.
LIN (Linearity Alarm), logic high indicates that the input field generates a critical output linearity. 
When this bit is set, the data at D11:D0 may still be used, but can contain invalid data. This warning may be resolved by bringing the magnet
within the X-Y-Z tolerance limits.
Even Parity bit for transmission error detection of bits 1…17 (D11…D0, OCF, COF, LIN, MagINC, MagDEC)
Placing the magnet above the chip, angular values increase in clockwise direction by default.
Data D11:D0 is valid, when the status bits have the following configurations:
Table 8. Status Bit Outputs
OCF
1
COF
0
LIN
Mag INC
Mag DEC
0
0
0
1
1
0
1
1
0
Parity
Even checksum of bits
1:15
Note: MagInc=MagDec=1 is only recommended in YELLOW mode (see Table 9)
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Z-axis Range Indication (Push Button Feature, Red/Yellow/Green Indicator). The AS5145 provides several options of detecting
movement and distance of the magnet in the Z-direction. Signal indicators MagINCn and MagDECn are available both as hardware pins (pins #1
and 2) and as status bits in the serial data stream (see Figure 5).
In the default state, the status bits MagINC, MagDec and pins MagINCn, MagDECn have the following function:
Table 9. Magnetic Field Strength Red-Yellow-Green Indicator
Status Bits
Hardware Pins
OPT: Mag CompEn = 1 (Red-Yellow-Green)
Mac INCn Mag DECn
Description
Mac
INC
Mag DEC
LIN
0
0
0
Off
Off
No distance change
Magnetic input field OK (GREEN range, ~45…75mT)
1
1
0
On
Off
YELLOW range: magnetic field is ~ 25…45mT or ~75…135mT. The
AS5145 may still be operated in this range, but with slightly reduced
accuracy.
1
1
1
On
On
RED range: magnetic field is ~<25mT or >~135mT. It is still possible to
operate the AS5145 in the red range, but not recommended.
n/a
n/a
Not available
All other combinations
Note: Pin 1 (MagINCn) and pin 2 (MagDECn) are active low via open drain output and require an external pull-up resistor. If the magnetic
field is in range, both outputs are turned off.
The two pins may also be combined with a single pull-up resistor. In this case, the signal is high when the magnetic field is in range. It is low in all
other cases (see Table 9).
8.1.2
Incremental Mode
The AS5145 has an internal interpolator block. This function is used if the input magnetic field is to fast and a code position is missing. In this
case an interpolation is done.
With the OTP bits OutputMd0 and OutputMd1 a specific mode can be selected. For the available pre-programmed incremental versions (10bit
and 12bit), these bits are set during test at austriamicrosystems. These settings are permanent and can not be recovered.
A change of the incremental mode (WRITE command) during operation could cause problems. A power-on-reset in between is recommended.
During operation in incremental mode it is recommended setting CSn = High, to disable the SSI-Interface.
Table 10. Incremental Resolution
Mode
Description
Output
Md1
Default mode
AS5145 function DTEST1_A and
DTEST2_B are not used. The
Mode_Index pin is used for selection of
the decimation rate (low speed/high
speed).
0
0
DTEST1_A and DTEST2_B are used as
A and B signal. In this mode the
Mode_Index Pin is switched from input
to output and will be the Index Pin. The
decimation rate is set to 64 (fast mode)
and cannot be changed from external.
0
1
1
0
In this mode a control signal is switched
to DTEST1_A and DTEST2_B.
1
1
10 bit
Incremental
mode
(low DNL)
12 bit
Incremental
mode (high
DNL)
Sync mode
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Output
Md0
Resolution
DTest1_A
and
DTest2_B
Pulses
10
256
Index Width
1/3
LSB
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Incremental Power-up Lock Option. After power-up, the incremental outputs can optionally be locked or unlocked, depending on the
status of the CSn pin:
ext  5k ). If Csn is low at power-up,
the incremental outputs (A, B, Index) will be high until the internal offset compensation is finished. This unique state (A=B=Index = high)
may be used as an indicator for the external controller to shorten the waiting time at power-up. Instead of waiting for the specified maximum
power up-time (0), the controller can start requesting data from the AS5145 as soon as the state (A=B=Index = high) is cleared.
CSn = low at power-up: CSn has an internal pull-up resistor and must be externally pulled low ( R
CSn = high or open at power-up: In this mode, the incremental outputs (A, B, Index) will remain at logic high state, until CSn
goes low or a
low pulse is applied at CSn. This mode allows intentional disabling of the incremental outputs until, for example the system microcontroller
is ready to receive data.
Figure 6. Incremental Output
Programmed
Zero Position
ClockWise
Counter ClockWise
D Test1_A
D Test2_B
1 LSB
Mode_Index
3 LSB
The hysteresis trimming is done at the final test (factory trimming) and set to 4 LSB, related to a 12 bit number.
Incremental Output Hysteresis. To avoid flickering incremental outputs at a stationary magnet position, a hysteresis is introduced. In case
of a rotational direction change, the incremental outputs have a hysteresis of 4 LSB. Regardless of the programmed incremental resolution, the
hysteresis of 4 LSB always corresponds to the highest resolution of 12 bit. In absolute terms, the hysteresis is set to 0.35 degrees for all
resolutions. For constant rotational directions, every magnet position change is indicated at the incremental outputs (see Figure 7). For example,
if the magnet turns clockwise from position “x+3“ to “x+4“, the incremental output would also indicate this position accordingly. A change of the
magnet’s rotational direction back to position “x+3“ means that the incremental output still remains unchanged for the duration of 4 LSB, until
position “x+2“is reached. Following this direction, the incremental outputs will again be updated with every change of the magnet position.
Figure 7. Hysteresis Window for Incremental Outputs
Incremental
Output
Indication
Hysteresis :
0.35°
X +6
X +5
X +4
X +3
X +2
X +1
X
X
X +1 X +2 X +3 X +4 X +5 X +6
Magnet Position
Clockwise Direction
Counterclockwise Direction
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Incremental Output Validity. During power on the incremental output is kept stable high until the offset compensation is finished and the
CSn is low (internal Pull Up) the first time. In quadrature mode A = B = Index = high indicates an invalid output. If the interpolator recognizes a
difference larger than 128 steps between two samples it holds the last valid state. The interpolator synchronizes up again with the next valid
difference. This avoids undefined output burst, e.g. if no magnet is present.
8.1.3
Sync Mode
This mode is used to synchronize the external electronic with the AS5145. In this mode two signals are provided at the pins DTEST1_A and
DTEST2_B. By setting of Md0=1 and Md1=1 in the OTP register, the Sync Mode will be activated.
Figure 8. DTest1_A and DTest2_B
400µs (100µs)
DTest1_A
DTest1_B
Every rising edge at DTEST1_A indicates that new data in the device is available. With this signal it is possible to trigger an external customer
Microcontroller (interrupt) and start the SSI readout. DTEST2_B indicates the phase of available data.
8.1.4
Sin/Cosine Mode
This mode can be enabled by setting the OTP Factory-bit FS2. If this mode is activated the 16 bit sinus and 16 bit cosines digital data of both
channels will be switched out. Due to the high resolution of 16 bits of the data stream an accurate calculation can be done externally. In this
mode the open drain outputs of DTEST1_A and DTEST2_B are switched to push-pull mode. At Pin MagDECn the clock impulse, at Pin
MagINCn the Enable pulse will be switched out. The Pin PWM indicates, which phase of signal is being presented. The mode isn’t available in
the default mode.
8.1.5
Daisy Chain Mode
The Daisy Chain mode allows connection of several AS5145s in series, while still keeping just one digital input for data transfer (see “Data IN” in
Figure 9). This mode is accomplished by connecting the data output (DO; pin 9) to the data input (PDIO; pin 8) of the subsequent device. The
serial data of all connected devices is read from the DO pin of the first device in the chain. The length of the serial bit stream increases with every
connected device, it is n * (18+1) bits: n= number of devices. e.g. 38 bit for two devices, 57 bit for three devices, etc.
The last data bit of the first device (Parity) is followed by a dummy bit and the first data bit of the second device (D11), etc. (see Figure 10).
Figure 9. Daisy Chain Hardware Configuration
AS5145
AS5145
µC
st
2
1 Device
Data IN
DO
CSn
PDIO
CLK
nd
DO
CSn
Device
PDIO
CLK
AS5145
last Device
DO
CSn
PDIO
CLK
CLK
CSn
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Figure 10. Daisy Chain Mode Data Transfer
CSn
tCLK FE
TCLK/2
1
CLK
D11
DO
tDO active
18
8
D10
D9
D8
tDO valid
D7
D6
D5
D4
D3
D2
D1
D0
OCF COF
LIN
Mag Mag Even
INC DEC PAR
Status Bits
Angular Position Data
D
1
2
3
D11
D10
D9
Angular Position Data
nd
st
2 Device
1 Device
8.2 Pulse Width Modulation (PWM) Output
The AS5145 provides a pulse width modulated output (PWM), whose duty cycle is proportional to the measured angle. For angle position 0 to
4094
t on  4098
Position = ------------------------- – 1
 t on + t off 
(EQ 1)
Examples:
1. An angle position of 180° will generate a pulse width ton = 2049µs and a pause toff of 2049 µs resulting in Position = 2048 after the calculation: 2049 * 4098 / (2049 + 2049) -1 = 2048
2. An angle position of 359.8° will generate a pulse width ton = 4095µs and a pause toff of 3 µs resulting in Position = 4094 after the calculation: 4095 * 4098 / (4095 + 3) -1 = 4094
Exception:
1. An angle position of 359.9° will generate a pulse width ton = 4097µs and a pause toff of 1 µs resulting in Position = 4096 after the calculation: 4097 * 4098 / (4097 + 1) -1 = 4096
The PWM frequency is internally trimmed to an accuracy of ±5% (±10% over full temperature range). This tolerance can be cancelled by
measuring the complete duty cycle as shown above.
Figure 11. PWM Output Signal
Angle
PWMIN
0 deg
(Pos 0)
1µs
4098µs
PWMAX
359.91 deg
(Pos 4095)
4097µs
1/fPWM
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8.2.1
Changing the PWM Frequency
The PWM frequency of the AS5145 can be divided by two by setting a bit (PWMhalfEN) in the OTP register (see Programming the AS5145 on
page 19). With PWMhalfEN = 0 the PWM timing is as shown in Table 11:
Table 11. PWM Signal Parameters (Default mode)
Symbol
Parameter
Typ
Unit
Note
fPWM
PWM frequency
244
Hz
Signal period: 4097µs
PWMIN
MIN pulse width
1
µs
- Position 0d
- Angle 0 deg
PWMAX
MAX pulse width
4097
µs
- Position 4095d
- Angle 359.91 deg
When PWMhalfEN = 1, the PWM timing is as shown in Table 12:
Table 12. PWM Signal Parameters with Half Frequency (OTP option)
Symbol
Parameter
Typ
Unit
Note
fPWM
PWM frequency
122
Hz
Signal period: 8194µs
PWMIN
MIN pulse width
2
µs
- Position 0d
- Angle 0 deg
PWMAX
MAX pulse width
8194
µs
- Position 4095d
- Angle 359.91 deg
8.3 Analog Output
An analog output can be generated by averaging the PWM signal, using an external active or passive low pass filter. The analog output voltage
is proportional to the angle: 0º= 0V; 360º = VDD5V.
Using this method, the AS5145 can be used as direct replacement of potentiometers.
Figure 12. Simple 2nd Order Passive RC Low Pass Filter
Pin12
R2
R1
analog out
PWM
VDD
C1
C2
0V
Pin7
0º
360º
VSS
Figure 11 shows an example of a simple passive low pass filter to generate the analog output.
R1,R2  10k
C1,C2  2.2µF / 6V
(EQ 2)
R1 should be greater than or equal to 4k7 to avoid loading of the PWM output. Larger values of Rx and Cx will provide better filtering and less
ripple, but will also slow down the response time.
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Datasheet - A p p l i c a t i o n I n f o r m a t i o n
9 Application Information
The benefits of AS5145 are as follows:
Complete system-on-chip
Flexible system solution provides absolute and PWM outputs simultaneously
Ideal for applications in harsh environments due to contactless position sensing
No calibration required
No temperature compensation necessary
9.1 Programming the AS5145
After power-on, programming the AS5145 is enabled with the rising edge of CSn with PDIO = high and CLK = low.
The AS5145 programming is a one-time-programming (OTP) method, based on poly silicon fuses. The advantage of this method is that a
programming voltage of only 3.3V to 3.6V is required for programming (either with 3.3V or 5V supply).
The OTP consists of 52 bits, of which 21 bits are available for user programming. The remaining 31 bits contain factory settings and a unique
chip identifier (Chip-ID).
A single OTP cell can be programmed only once. Per default, the cell is “0”; a programmed cell will contain a “1”. While it is not possible to reset
a programmed bit from “1” to “0”, multiple OTP writes are possible, as long as only unprogrammed “0”-bits are programmed to “1”.
Independent of the OTP programming, it is possible to overwrite the OTP register temporarily with an OTP write command at any time. This
setting will be cleared and overwritten with the hard programmed OTP settings at each power-up sequence or by a LOAD operation. Use
application note AN514X_10 to get more information about the programming options.
The OTP memory can be accessed in the following ways:
Load Operation: The Load operation reads the OTP fuses and loads the contents into the OTP register. A Load operation is automatically
executed after each power-on-reset.
Write Operation: The Write operation allows a temporary modification of the OTP register. It does not program the OTP. This operation can
be invoked multiple times and will remain set while the chip is supplied with power and while the OTP register is not modified with another
Write or Load operation.
Read Operation:
The Read operation reads the contents of the OTP register, for example to verify a Write command or to read the OTP
memory after a Load command.
Program Operation: The Program operation writes the contents of the OTP register permanently into the OTP ROM.
Analog Readback Operation: The Analog Readback operation allows a quantifiable verification of the programming. For each pro-
grammed or unprogrammed bit, there is a representative analog value (in essence, a resistor value) that is read to verify whether a bit has
been successfully programmed or not.
9.1.1
Zero Position Programming
Zero position programming is an OTP option that simplifies assembly of a system, as the magnet does not need to be manually adjusted to the
mechanical zero position. Once the assembly is completed, the mechanical and electrical zero positions can be matched by software. Any
position within a full turn can be defined as the permanent new zero position.
For zero position programming, the magnet is turned to the mechanical zero position (e.g. the “off”-position of a rotary switch) and the actual
angular value is read.
This value is written into the OTP register bits Z35:Z46 (see Figure 13).
Note: The zero position value may also be modified before programming, e.g. to program an electrical zero position that is 180º (half turn)
from the mechanical zero position, just add 2048 to the value read at the mechanical zero position and program the new value into the
OTP register.
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9.1.2
OTP Memory Assignment
Symbol
Function
mbit1
Factory Bit 1
51
PWMhalfEN_Index width
PMW frequency Index pulse width
50
MagCompEn
Alarm mode (programmed by
austriamicrosystems to 1)
49
pwmDIS
Disable PWM
48
Output Md0
47
Output Md1
Default, 10 bit inc, 12 bit inc
Sync mode
46
Z0
:
:
35
Z11
34
CCW
33
RA0
:
:
29
RA4
28
FS 0
27
FS 1
26
FS 2
25
FS 3
24
FS 4
23
FS 5
:
:
20
FS 8
19
FS 9
18
FS 10
17
ChipID0
16
ChipID1
:
:
0
ChipID17
12 bit Zero Position
Direction
Factory Bit
18 bit Chip ID
mbit0
9.1.3
Factory Section
Redundancy Address
ID Section
Bit
Customer Section
Table 13. OTP Bit Assignment
Factory Bit 0
User Selectable Settings
The AS5145 allows programming of the following user selectable options:
- PWMhalfEN_Indexwidth: Setting this bit, the PWM pulse will be divided by 2, in case of quadrature incremental mode A/B/Index setting
of Index impulse width from 1 LSB to 3LSB
- Output Md0: Setting this bit enables sync- or 10bit incrememantal mode (see Table 10).
- Output Md1: Setting this bit enables sync- or 12bit incrememantal mode (see Table 10).
- Z [11:0]: Programmable Zero / Index Position
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- CCW: Counter Clockwise Bit 
ccw=0 – angular value increases in clockwise direction
ccw=1 – angular value increases in counterclockwise direction
- RA [4:0]: Redundant Address: an OTP bit location addressed by this address is always set to “1” independent of the corresponding
original OTP bit setting
9.1.4
OTP Default Setting
The AS5145 can also be operated without programming. The default, un-programmed setting is:
-
9.1.5
Output Md0, Output MD1: 00= Default mode
Z0 to Z11: 00 = no programmed zero position
CCW: 0 = clockwise operation
RA4 to RA0:0 = no OTP bit is selected
MagCompEN: 1 = The green/yellow Mode is enabled
Redundancy
For a better programming reliability a redundancy is implemented. In case when the programming of one bit failed this function can be used. With
an address RA(4:0) one bit can be selected and programmed.
0
0
00001
1
0
0
00010
0
1
0
00011
0
0
00100
0
0
Z0
Z1
Z2
Z3
Z4
Z5
Z6
Z7
Z8
Z9
Z10
Z11
CCW
pwmDIS
0
Output Md1
MagCompEN
00000
Output Md0
Address
PWMhalfEN_Indexwidth
Table 14. Redundancy Addressing
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
00101
0
0
0
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
00110
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
0
0
0
00111
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
0
0
01000
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
0
01001
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
01010
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
01011
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
01100
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
01101
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
01110
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
01111
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
10000
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
10001
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
10010
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
10101
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
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Datasheet - A p p l i c a t i o n I n f o r m a t i o n
9.1.6
Redundant Programming Option
In addition to the regular programming, a redundant programming option is available. This option allows that one selectable OTP bit can be set
to “1” (programmed state) by writing the location of that bit into a 5-bit address decoder. This address can be stored in bits RA4..RA0 in the OTP
user settings.
Example: setting RA4…0 to “00001” will select bit 51 = PWhalfEN_Indexwidth, “00010” selects bit 50 = MagCompEN, “10010” selects bit 34
=CCW, etc.
9.1.7
OTP Register Entry and Exit Condition
Figure 13. OTP Access Timing Diagram
OTP Access
Setup Condition
CSn
PDIO
CLK
Exit Condition
Operation Mode Selection
To avoid accidental modification of the OTP during normal operation, each OTP access (Load, Write, Read, Program) requires a defined entry
and exit procedure, using the CSn, PDIO and CLK signals as shown in Figure 13.
Figure 14. OTP Programming Connection
AS5145 Demoboard
1
MagINCn
2 MagDECn
3
VDD5V 16
VDD3V3 15
6
7
8
10n
NC
Mode_ Index
3V3
14
DTest 1_A
4 DTest2_B
5
USB
For programming,
k eep these 6 wires
as short as possible!
max. length = 2 inches (5cm)
IC 1
NC
13
NC
PWM
CSn
VSS
CLK
PDIO
DO
AS 5 1 4 5
7
6
5
4
3
2
1
12
11
10
9
2.2µF
22k
PROG
CSN
DO
CLK
5 VUSB
VDD3V3
VSS
µC
GND
connect to USB
interface on PC
3 VPROG
2
+
1
10µF
VSS
GND
3.3 … 4. 6 V
only required for
OTP programming
Cap only required for OTP programming
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Datasheet - A p p l i c a t i o n I n f o r m a t i o n
9.2 Alignment Mode
The alignment mode simplifies centering the magnet over the center of the chip to gain maximum accuracy.
Alignment mode can be enabled with the falling edge of CSn while PDIO = logic high (see Figure 15). The Data bits D11-D0 of the SSI change to
a 12-bit displacement amplitude output. A high value indicates large X or Y displacement, but also higher absolute magnetic field strength. The
magnet is properly aligned, when the difference between highest and lowest value over one full turn is at a minimum.
Under normal conditions, a properly aligned magnet will result in a reading of less than 128 over a full turn.
The MagINCn and MagDECn indicators will be = 1 when the alignment mode reading is < 128. At the same time, both hardware pins MagINCn
(#1) and MagDECn (#2) will be pulled to VSS. A properly aligned magnet will therefore produce a MagINCn = MagDECn = 1 signal throughout a
full 360º turn of the magnet.
Stronger magnets or short gaps between magnet and IC may show values larger than 128. These magnets are still properly aligned as long as
the difference between highest and lowest value over one full turn is at a minimum.
The Alignment mode can be reset to normal operation by a power-on-reset (disconnect / re-connect power supply) or by a falling edge on CSn
with PDIO = low.
Figure 15. Enabling the Alignment Mode
PDIO
CSn
2µs
min.
AlignMode enable
Read-out
via SSI
exit AlignMode
Read-out
via SSI
2µs
min.
Figure 16. Exiting Alignment Mode
PDIO
CSn
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Datasheet - A p p l i c a t i o n I n f o r m a t i o n
9.3 3.3V / 5V Operation
The AS5145 operates either at 3.3V ±10% or at 5V ±10%. This is made possible by an internal 3.3V Low-Dropout (LDO) Voltage regulator. The
internal supply voltage is always taken from the output of the LDO, meaning that the internal blocks are always operating at 3.3V.
For 3.3V operation, the LDO must be bypassed by connecting VDD3V3 with VDD5V (see Figure 17).
For 5V operation, the 5V supply is connected to pin VDD5V, while VDD3V3 (LDO output) must be buffered by a 1...10µF capacitor, which is
supposed to be placed close to the supply pin (see Figure 17) with recommended 2.2µF).
Note: The VDD3V3 output is intended for internal use only It must not be loaded with an external load.
The output voltage of the digital interface I/O’s corresponds to the voltage at pin VDD5V, as the I/O buffers are supplied from this pin.
Figure 17. Connections for 5V / 3.3V Supply Voltages
5V Operation
3.3V Operation
2.2µF
VDD3V3
VDD3V3
100nF
VDD5V
100nF
LDO
Internal
VDD
VDD5V
LDO
Internal
VDD
DO
DO
4.5 - 5.5V
VSS
I
N
T
E
R
F
A
C
E
PWM
+
-
-
+
CLK
3.0 - 3.6V
CSn
PDIO
VSS
I
N
T
E
R
F
A
C
E
PWM
CLK
CSn
PDIO
A buffer capacitor of 100nF is recommended in both cases close to pin VDD 5V. Note that pin VDD 3V3 must always be buffered by a capacitor.
It must not be left floating, as this may cause an instable internal 3.3V supply voltage which may lead to larger than normal jitter of the measured
angle.
9.4 Selecting Proper Magnet
Typically the magnet should be 6mm in diameter and 2.5mm in height. Magnetic materials such as rare earth AlNiCo/SmCo5 or NdFeB are
recommended. The magnetic field strength perpendicular to the die surface has to be in the range of ±45mT…±75mT (peak).
The magnet’s field strength should be verified using a gauss-meter. The magnetic field Bv at a given distance, along a concentric circle with a
radius of 1.1mm (R1), should be in the range of ±45mT…±75mT(see Figure 18).
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Datasheet - A p p l i c a t i o n I n f o r m a t i o n
Figure 18. Typical Magnet (6x3mm) and Magnetic Field Distribution
typ. 6mm diameter
N
S
Magnet axis
Magnet axis
R1
Vertical field
component
R1 concentric circle;
radius 1.1mm
Vertical field
component
Bv
(45…75mT)
0
360
360
9.4.1
Physical Placement of the Magnet
The best linearity can be achieved by placing the center of the magnet exactly over the defined center of the chip as shown in the drawing below:
Figure 19. Defined Chip Center and Magnet Displacement Radius
3.9mm
3.9mm
2.433mm
1
Defined
center
2.433mm
Rd
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Area of recommended maximum magnet misalignment
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Datasheet - A p p l i c a t i o n I n f o r m a t i o n
9.4.2
Magnet Placement
The magnet’s center axis should be aligned within a displacement radius Rd of 0.25mm from the defined center of the IC. The magnet may be
placed below or above the device. The distance should be chosen such that the magnetic field on the die surface is within the specified limits
(see Figure 19). The typical distance “z” between the magnet and the package surface is 0.5mm to 1.5mm, provided the use of the
recommended magnet material and dimensions (6mm x 3mm). Larger distances are possible, as long as the required magnetic field strength
stays within the defined limits.
However, a magnetic field outside the specified range may still produce usable results, but the out-of-range condition will be indicated by
MagINCn (pin 1) and MagDECn (pin 2), (see Table 1).
Figure 20. Vertical Placement of the Magnet
N
S
N
Package surface
Die surface
Z
0.576mm ± 0.1mm
1.282mm ± 0.15mm
9.5 Simulation Modeling
Figure 21. Arrangement of Hall Sensor Array on Chip (principle)
3.9mm±0.235mm
1
2.433mm
Y1
±0.235mm
X1
X2
Y2
AS5145 die
Center of die
Radius of circular Hall sensor
A diametrically magnetized permanent magnet is placed above or below the surface of the AS5145. The chip uses an array of Hall sensors to
sample the vertical vector of a magnetic field distributed across the device package surface. The area of magnetic sensitivity is a circular locus of
1.1mm radius with respect to the center of the die. The Hall sensors in the area of magnetic sensitivity are grouped and configured such that
orthogonally related components of the magnetic fields are sampled differentially.
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Datasheet - A p p l i c a t i o n I n f o r m a t i o n
The differential signal Y1-Y2 will give a sine vector of the magnetic field. The differential signal X1-X2 will give an orthogonally related cosine
vector of the magnetic field.
The angular displacement (Q) of the magnetic source with reference to the Hall sensor array may then be modelled by:
 Y1 – Y2 
 = arctan ------------------------ ± 0.5º
 X1 – X2 
(EQ 3)
The ±0.5º angular error assumes a magnet optimally aligned over the center of the die and is a result of gain mismatch errors of the AS5145.
Placement tolerances of the die within the package are ±0.235mm in X and Y direction, using a reference point of the edge of pin #1 (see Figure
21).
In order to neglect the influence of external disturbing magnetic fields, a robust differential sampling and ratio metric calculation algorithm has
been implemented. The differential sampling of the sine and cosine vectors removes any common mode error due to DC components introduced
by the magnetic source itself or external disturbing magnetic fields. A ratio metric division of the sine and cosine vectors removes the need for an
accurate absolute magnitude of the magnetic field and thus accurate Z-axis alignment of the magnetic source.
The recommended differential input range of the magnetic field strength (B(X1-X2), B(Y1-Y2)) is ±75mT at the surface of the die. In addition to
this range, an additional offset of ±5mT, caused by unwanted external stray fields is allowed. The chip will continue to operate, but with degraded
output linearity, if the signal field strength is outside the recommended range. Too strong magnetic fields will introduce errors due to saturation
effects in the internal preamplifiers. Too weak magnetic fields will introduce errors due to noise becoming more dominant.
9.6 Failure Diagnostics
The AS5145 also offers several diagnostic and failure detection features:
9.6.1
Magnetic Field Strength Diagnosis
By software: the MagINC and MagDEC status bits will both be high when the magnetic field is out of range.
By hardware: Pins #1 (MagINCn) and #2 (MagDECn) are open-drain outputs and will both be turned on (= low with external pull-up resistor)
when the magnetic field is out of range. If only one of the outputs are low, the magnet is either moving towards the chip (MagINCn) or away from
the chip (MagDECn).
9.6.2
Power Supply Failure Detection
By software: If the power supply to the AS5145 is interrupted, the digital data read by the SSI will be all “0”s. Data is only valid, when bit OCF is
high, hence a data stream with all “0”s is invalid. To ensure adequate low levels in the failure case, a pull-down resistor (~10k) should be added
between pin DIO and VSS at the receiving side.
By hardware: The MagINCn and MagDECn pins are open drain outputs and require external pull-up resistors. In normal operation, these pins
are high ohmic and the outputs are high (see Table 9). In a failure case, either when the magnetic field is out of range of the power supply is
missing, these outputs will become low. To ensure adequate low levels in case of a broken power supply to the AS5145, the pull-up resistors
(~10k) from each pin must be connected to the positive supply at pin 16 (VDD5V).
By hardware: PWM output: The PWM output is a constant stream of pulses with 1kHz repetition frequency. In case of power loss, these pulses
are missing.
9.7 Angular Output Tolerances
9.7.1
Accuracy
Accuracy is defined as the error between measured angle and actual angle. It is influenced by several factors:
- The non-linearity of the analog-digital converters
- Internal gain and mismatch errors
- Non-linearity due to misalignment of the magnet
As a sum of all these errors, the accuracy with centered magnet = (Errmax – Errmin)/2 is specified as better than ±0.5 degrees @ 25ºC (see
Figure 23).
Misalignment of the magnet further reduces the accuracy. Figure 22 shows an example of a 3D-graph displaying non-linearity over XYmisalignment. The center of the square XY-area corresponds to a centered magnet (see dot in the center of the graph). The X- and Y- axis
extends to a misalignment of ±1mm in both directions. The total misalignment area of the graph covers a square of 2x2mm (79x79mil) with a
step size of 100µm.
For each misalignment step, the measurement as shown in Figure 23 is repeated and the accuracy 
(Errmax – Errmin)/2 (e.g. 0.25º in Figure 23) is entered as the Z-axis in the 3D-graph.
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Datasheet - A p p l i c a t i o n I n f o r m a t i o n
Figure 22. Example of Linearity Error Over XY Misalignment
6
5
4
° 3
800
500
2
200
1
-100
x
-400
-700
-1000
-1000
-800
-600
y
-400
-200
0
200
400
600
800
1000
0
The maximum non-linearity error on this example is better than ±1 degree (inner circle) over a misalignment radius of ~0.7mm. For volume
production, the placement tolerance of the IC within the package (±0.235mm) must also be taken into account.
The total nonlinearity error over process tolerances, temperature and a misalignment circle radius of 0.25mm is specified better than ±1.4
degrees. The magnet used for this measurement was a cylindrical NdFeB (Bomatec® BMN-35H) magnet with 6mm diameter and 2.5mm in
height.
Figure 23. Example of Linearity Error Over 360º
0.5
0.4
0.3
0.2
transition noise
0.1
Err max
0
-0.1
1
55
109
163
217
271
325
379
433
487
541
595
649
703
757
811
865
919
973
Err min
-0.2
-0.3
-0.4
-0.5
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9.7.2
Transition Noise
Transition noise is defined as the jitter in the transition between two steps. Due to the nature of the measurement principle (Hall sensors +
Preamplifier + ADC), there is always a certain degree of noise involved. This transition noise voltage results in an angular transition noise at the
outputs. It is specified as 0.06 degrees rms (1 sigma)x1 in fast mode (pin MODE = high) and 0.03 degrees rms (1 sigma)x1 in slow mode (pin
MODE = low or open).
This is the repeatability of an indicated angle at a given mechanical position. The transition noise has different implications on the type of output
that is used:
Absolute output; SSI interface: The transition noise of the absolute output can be reduced by the user by implementing averaging of read-
ings. An averaging of 4 readings will reduce the transition noise by 6dB or 50%, e.g. from 0.03ºrms to 0.015ºrms (1 sigma) in slow mode.
PWM interface:
If the PWM interface is used as an analog output by adding a low pass filter, the transition noise can be reduced by lowering the cutoff frequency of the filter. If the PWM interface is used as a digital interface with a counter at the receiving side, the transition
noise may again be reduced by averaging of readings.
Incremental mode: In incremental mode, the transition noise influences the period, width and phase shift of the output signals A, B and
Index. However, the algorithm used to generate the incremental outputs guarantees no missing or additional pulses even at high speeds (up
to 15,000 rpm and higher).
Note: Statistically, 1 sigma represents 68.27% of readings and 3 sigma represents 99.73% of readings.
9.7.3
High Speed Operation
Sampling
Rate: The AS5145 samples the angular value at a rate of 2.61k (slow mode) or 10.42k (fast mode, selectable by pin MODE)
samples per second. Consequently, the absolute outputs are updated each 384µs (96µs in fast mode). At a stationary position of the magnet, the sampling rate creates no additional error.
Absolute Mode: At a sampling rate of 2.6kHz/10.4kHz, the number of samples (n) per turn for a magnet rotating at high speed can be cal-
culated by
nslowmode =
nfastmode =
60
---------------------------------rpm   384 s
(EQ 4)
60 -------------------------rmp  96s
(EQ 5)

The upper speed limit in slow mode is ~6,000rpm and ~30,000rpm in fast mode. The only restriction at high speed is that there will be fewer
samples per revolution as the speed increases (see Table 7). Regardless of the rotational speed, the absolute angular value is always sampled at the highest resolution of 12 bit.
Incremental Mode: Incremental encoders are usually required to produce no missing pulses up to several thousand rpm’s. Therefore, the
AS5145 has a built-in interpolator, which ensures that there are no missing pulses at the incremental outputs for rotational speeds of up to
15,000 rpm, even at the highest resolution of 12 bits (4096 pulses per revolution).
9.7.4
Propagation Delays
The propagation delay is the delay between the time that the sample is taken until it is converted and available as angular data. This delay is
96µs in fast mode and 384µs in slow mode.
Using the SSI interface for absolute data transmission, an additional delay must be considered, caused by the asynchronous sampling (0 … 1/
fsample) and the time it takes the external control unit to read and process the angular data from the chip (maximum clock rate = 1MHz, number
of bits per reading = 18).
Angular Error Caused by Propagation Delay. A rotating magnet will cause an angular error caused by the output propagation delay.
This error increases linearly with speed:
esampling = rpm * 6 * prop.delay
(EQ 6)
Where:
esampling = angular error [º]
rpm = rotating speed [rpm]
prop.delay = propagation delay [seconds]
Note: Since the propagation delay is known, it can be automatically compensated by the control unit processing the data from the AS5145.
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Datasheet - A p p l i c a t i o n I n f o r m a t i o n
9.7.5
Internal Timing Tolerance
The AS5145 does not require an external ceramic resonator or quartz. All internal clock timings for the AS5145 are generated by an on-chip RC
oscillator. This oscillator is factory trimmed to ±5% accuracy at room temperature (±10% over full temperature range). This tolerance influences
the ADC sampling rate and the pulse width of the PWM output:
- Absolute output; SSI interface: A new angular value is updated every 96µs (typ) in fast mode and every 384µs (typ) in slow mode.
- PWM output: A new angular value is updated every 384µs (typ). The PWM pulse timings Ton and Toff also have the same tolerance as the
internal oscillator. If only the PWM pulse width Ton is used to measure the angle, the resulting value also has this timing tolerance. However, this tolerance can be cancelled by measuring both Ton and Toff and calculating the angle from the duty cycle (see Pulse Width Modulation (PWM) Output on page 17)
t on  4097
Position = ------------------------- – 1
 t on + t off 
9.7.6
(EQ 7)
Temperature
Magnetic Temperature Coefficient. One of the major benefits of the AS5145 compared to linear Hall sensors is that it is much less
sensitive to temperature. While linear Hall sensors require a compensation of the magnet’s temperature coefficients, the AS5145 automatically
compensates for the varying magnetic field strength over temperature. The magnet’s temperature drift does not need to be considered, as the
AS5145 operates with magnetic field strengths from ±45…±75mT.
Example: A NdFeB magnet has a field strength of 75mT @ –40ºC and a temperature coefficient of -0.12% per Kelvin. The temperature change
is from -40º to +125º = 165K.The magnetic field change is: 165 x -0.12% = -19.8%, which corresponds to 75mT at -40ºC and 60mT at 125ºC.
The AS5145 can compensate for this temperature related field strength change automatically, no user adjustment is required.
9.7.7
Accuracy over Temperature
The influence of temperature in the absolute accuracy is very low. While the accuracy is less than or equal to ±0.5º at room temperature, it may
increase to less then or equal to ±0.9º due to increasing noise at high temperatures.
Timing Tolerance over Temperature. The internal RC oscillator is factory trimmed to ±5%. Over temperature, this tolerance may increase
to ±10%. Generally, the timing tolerance has no influence in the accuracy or resolution of the system, as it is used mainly for internal clock
generation. 
The only concern to the user is the width of the PWM output pulse, which relates directly to the timing tolerance of the internal oscillator. This
influence however can be cancelled by measuring the complete PWM duty cycle instead of just the PWM pulse.
9.8 AS5145 Differences to AS5045
All parameters are according to AS5045 data sheet except for the parameters shown below:
Table 15. Difference Between AS5145 and AS5045
Building Block
AS5145
AS5045
Resolution
12bits, 0.088º/step
12bits, 0.088º/step
Ambient temperature range
-40ºC to +150ºC
-40ºC to +125ºC
Data length
read: 18bits
(12bits data + 6 bits status)
OTP write: 18 bits
(12 bits zero position + 6 bits mode selection)
read: 18bits
(12bits data + 6 bits status)
OTP write: 18 bits
(12 bits zero position + 6 bits mode selection)
Pins 1 and 2
MagINCn, MagDECn: same feature as AS5045,
indicator red-yellow-green magnetic range
MagINCn, MagDECn
Incremental encoder
Pin3 (DTest1_A); Pin 4 (DTest2_B);
Pin 6 (Mode_Index)
2x1024 ppr (12-bit)
2x256 ppr low-jitter (10-bit)
Not used
Pin 3: not used
Pin 4: not used
Pin 6
MODE_Index pin, switch between fast and slow mode.
In case of incremental mode is this pin an output the
fast mode is setup in this case.
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Datasheet - A p p l i c a t i o n I n f o r m a t i o n
Table 15. Difference Between AS5145 and AS5045
Building Block
AS5145
AS5045
Pin 12
PWM output: frequency selectable by OTP:
1µs / step, 4096 steps per revolution, f=244Hz 2µs/
step, 4096 steps per revolution, f=122Hz
PWM output: frequency selectable by OTP:
1µs / step, 4096 steps per revolution, f=244Hz 2µs
/ step, 4096 steps per revolution, f=122Hz
Sampling frequency
selectable by MODE input pin:
2.5kHz, 10,4kHz
selectable by MODE input pin:
2.5kHz, 10,4kHz
384µs (slow mode)
384µs (slow mode)
96µs (fast mode)
96µs (fast mode)
0.03 degrees max. (slow mode)
0.03 degrees max. (slow mode)
0.06 degrees max. (fast mode)
0.06 degrees max. (fast mode)
PPTRIM; programming voltage 3.3V – 3.6V <70ºC;
3.5V – 3.6V >70ºC;
52-bit serial data protocol; CSn, PDIO and CLK
EasyZap; programming voltage 7.3V – 7.5V; Csn;
Prog and CLK; 16-bit (32-bit) serial data protocol.
Propagation delay
Transition noise
(rms; 1sigma)
OTP programming options
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Datasheet - P a c k a g e D r a w i n g s a n d M a r k i n g s
10 Package Drawings and Markings
The device is available in SSOP 16 (5.3mm x 6.2mm).
Figure 24. Package Drawings
AYWWIZZ
AS5145
Table 16. Package Dimensions
Symbol
mm
Min
Typ
Max
A
1.73
1.86
1.99
A1
0.05
0.13
0.21
A2
1.68
1.73
1.78
b
0.25
0.315
0.38
c
0.09
-
0.20
D
6.07
6.20
6.33
E
7.65
7.8
7.9
E1
5.2
5.3
5.38
e
0.65
K
0º
-
8º
L
0.63
0.75
0.95
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Datasheet - P a c k a g e D r a w i n g s a n d M a r k i n g s
10.1 Recommended PCB Footprint
Figure 25. PCB Footprint
Table 17. Recommended Footprint Data
Symbol
mm
A
9.02
B
6.16
C
0.46
D
0.65
E
5.01
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Datasheet - R e v i s i o n H i s t o r y
Revision History
Table 18. Revision History
Revision
Date
Owner
May 30, 2008
1.1
Jul 23, 2008
Description
Changed the temperature to 150ºC across the datasheet.
apg
Jul 25, 2008
Added Key Feature: Fully automotive qualified to AEC-Q100, grade 0
Changed the values in Table 10 for 10bit and 12 bit incremental mode
Inserted 10k for pin 6 in Table 1
changed values for fmag_abs in Table 4
Made changes to Incremental Mode on page 14.
1.2
Aug 24, 2008
rfu
Removed quadrature from Figure 6.
Inserted Incremental Output Hysteresis on page 15 and Figure .
Modified the typ value of all in Table 11.
changed the values in equation2 (page 18)
Modified Applications
1.3
Aug 27, 2008
rfu
Removed table Magnetic field strength variation indicator and modified
Table 9 cell headings
Changed angle position values in Pulse Width Modulation (PWM) Output
on page 17 and also update Table 6 for the same.
Sep 29, 2008
Feb 13, 2009
Changed the value of tDOvalid in Table 6
apg
Feb 16, 2009
Changed the value of PWMIN, PWMAX in Table 6
Updated Figure 14 with 2.2µF capacitor without polarity
Updated Figure 17 with 2.2µF instead of 2.2µF....10µF
1.4
Changed key feature: Added pre-programmed versions available
Feb 18, 2009
mub
Removed 10 bit from pin descriptions for pin 12 on page 4
Deleted Min value for tDOvalid in Table 6
updated ordering information
Feb 22, 2009
1.5
apg
Changed the Max value of tDOvalid in Table 6 to 413
Added “AS5145-I10/AS5145-I12” to the header
Jul 15, 2009
rfu
1.6
Made some sentence corrections and spelling mistakes
Updated Incremental Mode on page 14 with new information.
1.7
Aug 12, 2009
apg
Added a note to the ordering information
1.8
Sep 29, 2009
rfu
Updated Figure 13
Added Incremental Power-up Lock Option on page 15
1.9
Nov 05, 2009
1.10
Dec 04, 2009
1.11
1.12
apg
Timing Characteristics (page 11) - Updated the parameter ‘PWM
Frequency’ (fPWM)
Updated section Internal Timing Tolerance (page 30)
Jun 16, 2010
mub
Updated Table 1, Table 3, Table 6
Jun 25, 2010
apg
Updated device header and Ordering Information (page 35)
Nov 09, 2011
ach
Updated maximum rotation speed in incremental mode (see page 29)
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Datasheet - O r d e r i n g I n f o r m a t i o n
11 Ordering Information
The devices are available as the standard products shown in Table 19.
Table 19. Ordering Information
1
Ordering Code
Description
Delivery Form
Package
AS5145H-HSSU
AS5145H-HSST
12-Bit Programmable Magnetic Rotary Encoder
Tubes
SSOP 16 (5.3mm x 6.2mm)
12-Bit Programmable Magnetic Rotary Encoder
Tape & Reel
SSOP 16 (5.3mm x 6.2mm)
AS5145A-HSSU
Pre-programmed 10-bit incremental
Tubes
SSOP 16 (5.3mm x 6.2mm)
AS5145B-HSSU
Pre-programmed 12-bit incremental
Tubes
SSOP 16 (5.3mm x 6.2mm)
1. The pre-programmed devices AS5145A-HSSU and AS5145B-HSSU are available on request.
Note: All products are RoHS compliant and austriamicrosystems green.
Buy our products or get free samples online at ICdirect: http://www.austriamicrosystems.com/ICdirect

Technical Support is available at http://www.austriamicrosystems.com/Technical-Support

For further information and requests, please contact us mailto: sales@austriamicrosystems.com
or find your local distributor at http://www.austriamicrosystems.com/distributor
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Datasheet - C o p y r i g h t s
Copyrights
Copyright © 1997-2011, austriamicrosystems AG, Tobelbaderstrasse 30, 8141 Unterpremstaetten, Austria-Europe. Trademarks Registered ®.
All rights reserved. The material herein may not be reproduced, adapted, merged, translated, stored, or used without the prior written consent of
the copyright owner.
All products and companies mentioned are trademarks or registered trademarks of their respective companies.
Disclaimer
Devices sold by austriamicrosystems AG are covered by the warranty and patent indemnification provisions appearing in its Term of Sale.
austriamicrosystems AG makes no warranty, express, statutory, implied, or by description regarding the information set forth herein or regarding
the freedom of the described devices from patent infringement. austriamicrosystems AG reserves the right to change specifications and prices at
any time and without notice. Therefore, prior to designing this product into a system, it is necessary to check with austriamicrosystems AG for
current information. This product is intended for use in normal commercial applications. Applications requiring extended temperature range,
unusual environmental requirements, or high reliability applications, such as military, medical life-support or life-sustaining equipment are
specifically not recommended without additional processing by austriamicrosystems AG for each application. For shipments of less than 100
parts the manufacturing flow might show deviations from the standard production flow, such as test flow or test location.
The information furnished here by austriamicrosystems AG is believed to be correct and accurate. However, austriamicrosystems AG shall not
be liable to recipient or any third party for any damages, including but not limited to personal injury, property damage, loss of profits, loss of use,
interruption of business or indirect, special, incidental or consequential damages, of any kind, in connection with or arising out of the furnishing,
performance or use of the technical data herein. No obligation or liability to recipient or any third party shall arise or flow out of
austriamicrosystems AG rendering of technical or other services.
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Contact Information
Headquarters
austriamicrosystems AG
Tobelbaderstrasse 30
A-8141 Unterpremstaetten, Austria
Tel: +43 (0) 3136 500 0
Fax: +43 (0) 3136 525 01
For Sales Offices, Distributors and Representatives, please visit:
http://www.austriamicrosystems.com/contact
www.austriamicrosystems.com/AS5145
Revision 1.12
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