ISLA112P50_55210EV1Z Schematic

C13
C15
C20
C22
C25
C26
C42
C43
SDO
CSB
SCLK
SDIO
OVDD
pin36
OVDD
pin27
OVDD
D
C14
0.1uF
C45
C44
pin56
pin70
OUTFMT
pin23
nap_sleep_normal
pin22
output_mode
pin16
clkdivn
pin15
Vcm
pin71
AVDD
pin24
AVDD
pin19
AVDD
pin12
AVDD
pin6
AVDD
pin1
AVDD
D
C12
C24
0.1uF
C35
DNP
C27
0.1uF
C36
DNP
C37
DNP
C38
DNP
0.1uF
SD0
C8
DNP
C9
DNP
L3
Bead
L13
Bead
L14
Bead
SDA
C10
DNP
2
3
4
5
SCL
SDA
AVDD
GND
GND
C11
DNP
6
7
8
9
10
Vinm
Vinp
GND
AVDD
OVDD
DGND
56
55
ORP
ORN
D13P
D13N
D12P
D12N
D11P
D11N
64
63
62
61
60
59
58
57
D8P
D8N
D7P
D7N
D6P
D6N
DNC
DNC
DNC
DNC
AVDD
AVSS
AVSS
CLKOUTP
CLKOUTN
VINN
VINP
RLVDS
OVSS
AVSS
AVDD
DNC
DNC
VCM
CLKDIV
DNC
DNC
AVDD
CLKP
CLKN
Vcm
clkdivn
11
12
13
14
15
16
17
18
AVDD
OVDD
OVSS
1
SCL
Bead
B
U1
ISLA112P50
D5P
D5N
D4P
D4N
D3P
D3N
D2P
D2N
C
54
53
52
51
50
49
D10P
D10N
D9P
D9N
D8P
D8N
48
47
CLKOUTP
CLKOUTN
46
10K
45 DGND
44
43
42
41
40
39
38
37
R46
D7P
D7N
D6P
D6N
D5P
D5N
D4P
D4N
OVDD
L4
SYNC_RES_N
SYNC_RES_P
DNC
DNC
D0N
D0P
D1N
D1P
SC0
ORP
ORN
D11P
D11N
D10P
D10N
D9P
D9N
AVSS
AVDD
OUTFMT
0
EP
AVDD
C
DGND
0.1uF
65
0.1uF
OVSS
0.1uF
RESETN
OVSS
OVDD
0.1uF
SDIO
SCLK
CSB
SDO
0.1uF
69
68
67
66
0.1uF
SDIO
SCLK
CSB
SDO
0.1uF
OUTMODE
NAPSLP
AVDD
0.1uF
72 GND
71 AVDD
70
OUTFMT
0.1uF
GND
0.1uF
B
OVDD36
L15
bead
D1N
D1P
D2N
D2P
D3N
D3P
28
29
30
31
32
33
34
35
25
DGND26
OVDD27
RESETN
22
output_mode
nap_sleep_normal23
AVDD24
clk_inp
clk_inn
AVDD19
20
21
Under DUT.
L16
bead
R16
R17
DNP
L17
bead
L18
bead
D0N
D0P
DNP
anlg_1.8V
HI= Gray_Code
LO= Unsign
Ft=Twos_Comp
R15
DNP
anlg_1.8V
HI=2mA LVDS
LO= LVCMOS
Ft= 3mA LVDS
R25
DNP
OUTFMT
anlg_1.8V
HI= clk_div4
LO= clk_div2
Ft=clk_div1
R22
DNP
output_mode
anlg_1.8V
HI= Nap
LO = Normal
Ft= Sleep
R26
DNP
clkdivn
nap_sleep_normal
A
A
R14
1K
R24
DNP
R23
DNP
R28
1K
INTERSIL PROPRIETARY AND CONFIDENTIAL. SUBJECT TO NONDISCLOSURE AGREEMENT
Title
Size
B
Date:
File:
ISLA112P50/ISL55210
Number
page1
Revision
C
16-Nov-2011
Sheet of
C:\Documents and Settings\GHENDRIC\Desktop\New
Drawn By: Folder (3)\D12_55210_revC.ddb
1
2
3
4
6
5
ANLG_3.3V
L1001
1 +anlg_3.3V
C1001 + BEAD
R1000
2 1
2
C1002
1.0uF
4.7uF
0ohm
R1001
VS_AMP
5kohm/DNP
C1004
R1003
2.05kohm/DNP
C1003
DNP
X2Y
R1002
VS_AMP
D
R1019
392 ohms
20ohm/DNP
C1005
0.1uf
R1004
10kohm/DNP
R1005
7.68kohm/DNP
2
4
3
5
25
Rterm1
DNP
3
R18
34
4
34
0
1
C
Rbypass2
1 2
DNP
2
1
Rbypass4
1 2
DNP
R1007
3
R1010 0ohm
4
100 ohm
R1011
13
14
15
Fb+
Vo+
Vi-
NC
Vi+
NC
FB-
Vo-
C1010
R1013
C1009
X2Y
0.01uF
T1=ADT4-6T , T2=ADTL1-4-75 for low freq assembly
R1021
100 ohms
12
Vinm
29.4 ohm
11
4.7uF
C16
DNP
10
C1012
R1014
9
L1002
47 nH
C1015
DNP
Cdiff
10pF
L1003
47nH
Vinp
29.4 ohm
C1016
DNP
4.7uF
R1015 187 ohms
412 ohm
Cterm2
2.2pF/DNP
2
GND
100 ohm
1
R1009 0ohm
2
Vcm
R1006
U6
ISL55210
GND
5
6
16
VCM
C1014
0.1uF
C1017
8
1
2
25
6
Pd
2
4.7uF
T2
16
7
1
R1008
Vs+
T1
C1007
1
412 ohm
6
INPUT
Cterm1
2.2pF/DNP
Vs+
2
EP
GND
Rbypass3
1 2
DNP
1
GND
2
5
Rbypass1
1 2
DNP
0
16
0.01uF
1
D
R1020
118 Ohms
VS_AMP
R1016
C
0.1uF/DNP
ADT1-1WT
28.7 ohms
Vtest
C1008
C1019
R1017
28.7 ohms
1
DNP
C1018
0.1uF/DNP
2
VS_AMP
R1018
0.1uF/DNP
187 ohms
U7
1
2
B
NC
VCC
5
SMA
3
anlg_3.3V
GND
anlg_3.3V
C53
C52
A
0.1uF
EP
GND
220pF
SMA
IN
VT
VREFAC
IN
15
16
1
2
3
4
5
6
49.9
49.9
49.9
49.9
49.9
R52
R50
R49
R53
R56
J4
Rterm2
50ohm/DNP
R27
200
50 Ohms coplanar
"CLOCK IN"
4
B
C30
1000pF
10000pF
1000pF
C28
clk_inp
Pd
TC4-1W
1
1000pF
DNP
2
49.9
Y
clk_inn
C32
Rterm3
50ohm
C46 DNP
clk_inp
R48
100
C47
clk_inn
DNP
A
0
13
"CLOCK IN" J5
12
11
10
9
Q0
Q0
Q1
Q1
Q2
Q2
Q3
Q3
R51
U5
49.9
=value
R55
C49
1000pF
49.9
0.1uF
C51
1000pF
8
7
14
C50
EN
Vcc
Vcc
C48
0.1uF
R54
74AHC1G04
C29
T3
A
Title
ISLA112P50/ISL55210
Size
B
Date:
File:
1
2
3
4
5
Number
Revision
page2
C
16-Nov-2011
Sheet of
C:\Documents and Settings\GHENDRIC\Desktop\New
Drawn By: Folder (3)\D12_55210_revC.ddb
6
1
2
DGND
GND
AVDD
AVDD
A
33uF anlg_1.8V
C31
C_vdd3_anlg
anlg_3.3V
Anlg_5V
1
53475-1879
D11P
D11N
0.1uF
R35
1K
R3
1K
R1
1K
23
24
25
dig_1.8V
26
SCLK
27
SDO
28
R5
1K 29
R6
1K 30
31
SDIO
CSB
32
33
TDO
D5P
D5N
D4P
D4N
D3P
D3N
D2P
D2N
VCC
VCC
dig_1.8V
0.1uF
R39
dig_1.8V
C3
dig_1.8V
0.1uF
ID EEPROM
U3
1
2
3
4
WP
A0
A1
A2
Vss
8
7
6
5
Vcc
WP
SCL
SDA
WP_2V
SC2
SD2
24FC128-I/SN
U4
=value
R2
4.7K
D6P
D6N
0.1uF
dig_1.8V
IO(2)
TDO
GND
VCCIO2
IO(2)
IO(2)
IO(2)
IO_GLB_S/R
IO_GOE
IO_GOE
IO_GOE
R7
1K
TCK
11
TMS
10
TDI
9
8 R9
1K
7
VCC
6
R10
1K
5
R11
1K
4
3
R12
1K
2
R13
1K
1
CPLD SPARE1
TCK
TMS
TDI
IO(1)
VCCIO1
I/O(1)
I/O(1)
GND
I/O(1)
I/O(1)
I/O(GCK)
C2
0.1uF
SPARE EEPROM
U2
1
2
3
4
PC3
D1P
D1N
D0P
D0N
A0
A1
A2
Vss
Vcc
WP
SCL
SDA
C
dig_1.8V
4.7K
4.7K
D7P
D7N
0.1uF
8
7
6 R33
5 R32
WP_2V
0
0
R31
R29
dig_1.8V
CLKOUTP
CLKOUTN
C5
10K
D8P
D8N
C34
D
22
21
20
19
18
R4 1K
17
16
R8 1K
15 dig_1.8V
14
R41 1K
13
R40 1K
12
PC1
D10P
D10N
D9P
D9N
C33
dig_1.8V
4.7K
dig_1.8V
C1
33uF
R34
D12P
D12N
dig_1.8V
dig_1.8V
R37
4.7K
PORn_ExtResetn_fpga
RESETN
D13P
D13N
C4
SC0
SD0
24FC128-I/SN
WP
SPI_master_drive
CPLD SPARE1
SCLK_3V
CSB_3V
MISO_3V
MOSI_3V
PC0 daughter card detected
PC1
PC2
PC3
PC4
PC5
PC6
PC7
B
PC6
PC7
B
33uF
C7
ORP
ORN
PC4
PC5
PC2
C
VCC
IO(2)
IO(2)
IO(2)
IO(2)
I(2)
GND
IO(1)
VCC
IO(1)
IO(1)
IO(1)
D
Dig_5V
IO_GOE
VAUX
IO(2)
IO(2)
IO(2)
IO(1)
IO(1)
IO(1)
IO(1)
IO(GCK)
IO(GCK)
33uF
C6
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
6
5
34
35
36
37
38
39
40
41
42
43
44
OVDD
OVDD
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
145
147
149
151
153
155
157
159
161
163
165
167
169
171
173
175
177
179
4
R30
1K
VCC
R36
1K
R38
1K
WP_2V
SCLK_3V
CSB_3V
SPI_master_drive
R42
1K
MISO_3V
MOSI_3V
dig_1.8V
3
SPI_CONF
J6
SD0
SC0
SD2
SC2
PORn_ExtResetn_fpga
MH1
MH2
MH3
JTAG connector
PLCD Programing
MH4
J1
DGND
GND
1
3
5
7
9
11
13
Tooling Hole Tooling Hole Tooling Hole Tooling Hole
2
4
6
8
10
12
14
VCC
TMS
TCK
TDO
TDI
INTERSIL PROPRIETARY AND CONFIDENTIAL. SUBJECT TO NONDISCLOSURE AGREEMENT
2MM HDR 14P SMT
Title
Size
B
Date:
File:
2
3
4
5
A
ISLA112P50/ISL55210
Number
Revision
page3
C
16-Nov-2011
Sheet of
C:\Documents and Settings\GHENDRIC\Desktop\New
Drawn By: Folder (3)\D12_55210_revC.ddb
6