an9763

Evaluation Tool Demonstrates DeCAPitator
Performance (HIP6200EVAL1)
Application Note
Introduction
The DeCAPitator is designed to reduce the number of bulk
capacitors required at the output of a switching DC/DC
converter powering a microprocessor in a portable computer.
It contains two high-speed linear regulators which are only
active if the processor core voltage is disturbed by a fast
moving load transient. Figure 1 shows the HIP6200 in its
typical application. Refer to the HIP6200 data sheet [1] for
detailed specifications.
February 6, 2015
+12VIN
+5V
LINEAR
REGULATOR
+
100µ
100mΩ
VOUT1
+
DC/DC
CONVERTER
5X
HIP6200
100µ
100mΩ
TRANSIENT
GENERATOR
VOUT2
+ 11X
220µ
100mΩ
PWM
CONTROLLER
BATTERY
POWER
AN9763.3
TRANSIENT
GENERATOR
+5V
FIGURE 2. BLOCK DIAGRAM OF HIP6200EVAL1
VCC
4
EN/OT 8
POR
DC/DC Converter
1 PVCC
HIP6200
+
-
X 0.99
7 OUT
R
CAP
5
20R
X 1.015
6 SNS
CPU
LOAD
+
3
-
2
PGND
GND
The DC/DC converter uses a Intersil HIP6004 PWM controller,
which is suited for desktop applications. It contains a 5-bit DAC
for output voltage programmability and uses voltage mode
control. The evaluation board uses four of the five bits to allow
the user to select outputs from 1.3V to 2.05V. Refer to Table 1
for the programming code. The evaluation board accepts 12V
for its input power source; the HIP6004 can down convert 5V or
less, but requires 12V for internal bias.
TABLE 1. DC/DC CONVERTER VOLTAGE PROGRAMMING
JUMPER SETTING
FIGURE 1. DeCAPitator IN A TYPICAL APPLICATION PORTABLE CPU DYNAMIC REGULATOR
JP3
JP2
JP1
JP0
NOMINAL OUTPUT
VOLTAGE
1
1
1
1
1.30
1
1
1
0
1.35
DeCAPitator Evaluation Tool
1
1
0
1
1.40
The HIP6200EVAL1 is an evaluation board which
demonstrates the DeCAPitator’s effectiveness in dealing
with high-speed load transients. The board consists of a
DC/DC converter with two different output stages: (1) a
simple L-C filter containing eleven 220µF low-ESR
tantalums, and (2) an L-C filter with only five 100µF
low-ESR tantalums and the HIP6200 and its associated
circuitry. On each output stage is a high edge-rate transient
generator capable of producing 8A (or higher) transients. A
block diagram of the evaluation board is shown in Figure 2
and the complete schematic, bill-of-materials, and board
description is contained in the appendix.
1
1
0
0
1.45
1
0
1
1
1.50
1
0
1
0
1.55
1
0
0
1
1.60
1
0
0
0
1.65
0
1
1
5
1.70
0
1
1
0
1.75
0
1
0
1
1.80
0
1
0
0
1.85
0
0
1
1
1.90
0
0
1
0
1.95
0
0
0
1
2.00
0
0
0
0
2.05
Supporting Circuitry on the HIP6200EVAL1
The evaluation board has peripheral circuitry to enable the user
to easily verify the performance and value of the HIP6200.
1
NOTE: 1 = jumper open, 0 = jumper closed
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Copyright Intersil Americas LLC 2002, 2015. All Rights Reserved
Intersil (and design) is a trademark owned by Intersil Corporation or one of its subsidiaries.
All other trademarks mentioned are the property of their respective owners.
Application Note 9763
Linear Regulator
TABLE 2. HIP6200EVAL1 SWITCH POSITIONS
The HIP6200 uses 5V for bias and also for its high-side
device power source. For this reason, a Intersil ICL7663
linear regulator is included on board to provide a 5V source.
Though this 5V source supplies up to 8A of current for short
periods of time when the HIP6200 turns on its upper
amplifier, its average current is small due to the low
frequency of the transient events and the low duty-cycle of
the current being sourced from the 5V rail.
The linear regulator is included on the evaluation board for
user convenience only. It allows the HIP6200EVAL1 to be
powered from a single 12V supply voltage.
Transient Generator
The HIP6200EVAL1 includes a high di/dt transient load
generator for each output stage. The transient generator is
set for approximately an 8A load step when the converter
output voltage is 1.7V and the edge-rates are set for about
40A/µs. The load pulse is about 350µs at a 70Hz repetition
rate.
The load step size can be modified by adding or removing
load resistors (R6-17 and R24-35 in Figure 7). This process is
necessary to maintain an approximately 8A step size with a
VOUT other than 1.7V. The number of load resistors required
as a function of VOUT and Ioad transient step size (ISTEP)
can be approximated by:
2
N = ------------------------------------------------ V OUT

 ---------------- – r DSON 
 I STEP

(EQ. 1)
where:
N = number of 2 load resistors
rDS(ON) = on-resistance of MOSFET (Q3 or Q5)
After calculating N, the number should be rounded to the
nearest integer.
Operational Modes
The HIP6200EVAL1 allows the user to verify the
DeCAPitator’s value by comparing the output response to a
load transient under three different situations. Two switches
(S1 and S2) provide the user with the ability to exercise the
evaluation board in all three operational modes. Table 2
details the switch positions required for each mode. Refer to
the board description in the appendix for the board
orientation in reference to the up/down switch position. In
addition, there is a third switch provided (S3) to disable the
DC/DC converter.
Always disable the converter before changing
operational mode.
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2
SWITCH POSITION
S1
S2
OPERATIONAL
MODE
OUTPUT
VOLTAGE
HIP6200
POWERED
Up
Up
1
VOUT1
No
Up
Down
2
VOUT1
Yes
Down
Don’t Care
3
VOUT2
No
Switch 1 selects which output is regulated and dynamically
loaded by routing the correct output voltage to feedback and
also selecting the correct transient generator to receive bias
power. S2 simply enables or disables the HIP6200.
DeCAPitator Performance
The DeCAPitator allows equivalent converter transient
response with much less bulk output capacitance. This is
witnessed in Figure 3, which displays the results which are
attained by exercising the evaluation board in its three
different modes of operation. The top row of oscilloscope
photos show the peak-to-peak voltage excursion resulting
from both the 0 to 8A and 8 to 0A load transients. Both the
leading and falling edges of the transient step are
approximately 40A/µs. The middle row details the leading
edge and the bottom row shows the falling edge.
The HIP6200’s effectiveness is readily seen by comparing
column 2 vs. column 1 and its value is better judged by
comparing column 2 vs. column 3. The output voltage
response is equivalent or better for mode 2 in comparison to
mode 3. Mode 2 uses 600µF of capacitance (including +5V
cap) versus 2420µF for mode 3.
The HIP6200EVAL1 has component locations available for
up to three 1µF ceramic capacitors on VOUT1. As evidenced
by Figure 3, the DeCAPitator does an excellent job of
handling the edges of the load transient without any ceramic
capacitors on the output. With some ceramics, it is able to
reduce the voltage deviation further. Figure 4 shows the
leading edge of the transient with no ceramic caps, with (1)
1µF ceramic, and with (3) 1µF ceramics. The three
additional ceramic capacitors reduce the leading-edge
voltage deviation by about 14mV.
Application Note 9763
OPERATIONAL MODE 1
OPERATIONAL MODE 2
OPERATIONAL MODE 3
COUT = (5) 100F,
No DeCAPitator
COUT = (5) 100F
DeCAPitator (with (1) 100F +5V Cap)
COUT = (11) 220F,
No DeCAPitator
VOUT
(50mV/DIV)
310mV
165mV
160mV
TIME (50s/DIV)
TIME (50s/DIV)
TIME (50s/DIV)
VOUT
(50mV/DIV)
IL
(10A/DIV)
TIME (2.5s/DIV)
TIME (2.5s/DIV)
TIME (2.5s/DIV)
VOUT
(50mV/DIV)
IL
(10A/DIV)
TIME (10s/DIV)
TIME (10s/DIV)
NOTE: VOUT = 1.7V, Load Transient = 8A with di/dt = 40A/s.
FIGURE 3. TRANSIENT RESPONSE WAVEFORMS
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3
TIME (10s/DIV)
Application Note 9763
NO CERAMICS ON VOUT1
(1) 1F CERAMIC ON VOUT1
(3) 1F CERAMICS ON VOUT1
VOUT
(20mV/DIV)
IL
(4A/DIV)
TIME (250ns/DIV)
TIME (250ns/DIV)
TIME (250ns/DIV)
NOTE: Ceramic capacitors enhance the HIP6200’s ability to handle fast edge-rate transients.
FIGURE 4. EXPANDED VIEW OF LEADING EDGE OF LOAD TRANSIENT
UNUSED OUTPUT
STAGE CONNECTED
VOUT
(50mV/DIV)
IL
(10A/DIV)
TIME (100s/DIV)
UNUSED OUTPUT
STAGE DISCONNECTED
VOUT
IL
(10A/DIV)
TIME (100s/DIV)
FIGURE 5. COMPARISON OF VOUT1 RESPONSE WITH AND
WITHOUT VOUT2 OUTPUT STAGE PHYSICALLY
CONNECTED
4
The evaluation board is shipped with the output stages
physically connected for user convenience in comparing
performance of the different operational modes of the board.
It is important to note that the board provides the important
information if the unloaded output is connected. The user
should be aware that the loaded output may look like it is
misbehaving if the unloaded output is not disconnected.
+5V Bus
(50V/DIV)
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Because the evaluation board uses two output stages, there
is some cross conduction between the two outputs unless
the unloaded output is physically disconnected from the
circuit. A good way to do this is by unsoldering one lead of
the current looker wires of the unloaded side. Figure 5
shows how the unloaded output can affect the output under
test if the unloaded output is connected. The HIP6200
remains off due to this cross-conduction because the output
voltage deviation is slow moving.
Since the DeCAPitator supplies current from a 5V source
when its upper amplifier is on, it is important to verify that the
5V bus is not disturbed greatly. Figure 6 shows both VCC
and PVCC in response to the 0-8A load transient. In a
system implementation, VCC will be tied to the system 5V
bus and PVCC will remain local to the HIP6200. PVCC and
VCC are connected through an on-chip 10 (typical) resistor.
Application Note 9763
The predicted junction temperature is based on an
approximation of power dissipation (Equations 3-7 in the
HIP6200 datasheet) and the parameters of the evaluation
board:
VCC (200mV/DIV)
PVCC
(200mV/DIV)
ISTEP = 8.3A
TR1 = 6.5µs
TR2 = 24µs
VOUT (50mV/DIV)
JA = 85oC/W
The above parameters were measured on the evaluation
board. The thermal impedance was derived in a separate
experiment where the DeCAPitator was biased ‘on’ with a
small DC load. No external airflow was provided to achieve
the 85oC/W number.
IL (10A/DIV)
TIME (2.5s/DIV)
FIGURE 6. DeCAPitator DISTURBS +5V BUS (VCC) MINIMALLY
Power Dissipation/Thermal
Measuring the power dissipation of the HIP6200 in its
intended application is very difficult. The output current of the
DeCAPitator must be monitored to measure its power.
However, most current sensing elements will dramatically
affect the performance of the part, and hence the power
dissipation. We can monitor the case temperature of the IC
with reasonable accuracy, providing us some indication of
the power dissipation.
Figure 7 plots the measured DeCAPitator case temperature
and a predicted junction temperature versus transient
frequency. The measured data was taken on the
HIP6200EVAL1 at room temperature at five distinct transient
frequencies by varying the value of C36 and R22 . The 10oC
temperature rise at low transient frequencies is attributed to
the PC board self-heating due to the transient load resistors.
HIP6200 TEMPERATURE (oC)
150
MEASURED
CASE
125
100
75
PREDICTED
JUNCTION
50
25
1
2
3
4
TRANSIENT FREQUENCY (kHz)
FIGURE 7. PREDICTED AND MEASURED DECAPITATOR
TEMPERATURE RISE
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5
5
In most microprocessor applications, severe load transient
excursions will take place at frequencies well below 1kHz,
thus rendering thermal considerations a non-issue.
Conclusion
The Intersil HIP6200 DeCAPitator is a very high-speed
device containing two part-time linear regulators. It can
reduce DC/DC converter output capacitor requirements in
microprocessor applications where the core voltage is 2V or
less. The HIP6200EVAL1 is an evaluation vehicle which
demonstrates the value of the DeCAPitator in a simulated
processor application.
Reference
For Intersil documents available on the web, see
http://www.intersil.com.
[1] HIP6200, HIP6201 Datasheet, Intersil Corporation.
3
8
VOUT2
GND
4
R54
210K
R53
604K
C14
4700p 20K
22p
C17
R3
1K
R5
COMP
TP
1
4
C15
0.1
CR5
4148
S1
5
DPDT
3
CR6
2
R55
10K
P5V
C2
220
10V
C12-13
1
2x
+
R52
2
1206
18
1000p
VCC
R2
SS
2
OCSET
C10
12 6.04K
0.047
PGOOD
R1
15
20
BOOT
U2
RT
Q1
49.9K
HIP6004
4
14
VID0
UGATE
5
13
VID1
PHASE
6
VID2
1
7
VSEN
VID3
Q2
8
VID4
17
LGATE
16
10
PGND
FB
COMP GND
C16
9
11
3
C11
0.1
SHDN
5
VSET
6
1
2
R51
100
SNS
U1
ICL7663SA
VIN+
3
VOUT1
Q7
2222
C6-9 +
4x 100
16V
S3
SPST
JP1
1
RTN
+12VIN
C1
0.47
1206
JP0
6
JP2
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JP3
VFB2
VCC2
6
RTN
VOUT2
RTN
+
+
C40-50
11x
220
10V
VFB2
7 OUT
R41
20
1210
VOUT2
TP
C37
100
10V
1 PVCC
R23
20
1210
6 SNS
C19-23
5x
100
10V
PVCC
TP
+
FIGURE 8.
3H
CURRENT
LOOKER
L2
CURRENT
LOOKER
3H
L1
VOUT1
TP
VOUT1
11x
2
1206
R24-34
R
X 0.99
INTERNAL
BIAS
VCC
4
64.9
C51
Q5
6800p
Q5D
TP
R36
R38
1K
64.9
0520
100
R37
CR8
VCC2
CAP 5
EN 8
0520
1
VDD
20K
20K
R39
CAP
TP
2
GND
7
U5
HIP2100
8
6
LO
LI
1
VDD
C52
0.1
C 39
8200p
C38
0.1
GND
7
U4
HIP2100
6
8
LO
LI
P5VB
TP
C35
0.1
R20
1K
100
R19
CR7
R18
TRANSIENT
GENERATOR
X 1.015
GND
3
Q3
6800p
C34
TRANSIENT
GENERATOR
PGND
2
+
-
+
-
U3
HIP6200
11x
2
1206
R6-16
Q3D
TP
R21
3
C53
6.8
16V
R40
499
Q6
2222
S2
SPDT
1
P5V
C36
6.8
16V
R22
499
Q4
2222
+
+
Application Note 9763
.
Application Note 9763
Parts List for HIP6200EVAL1
ITEM #
PART NUMBER
DESCRIPTION
CMOS Voltage Regulator
PACKAGE
SOIC-8
QTY
1
REF
U1
VENDOR
1
ICL7663SACBA
Intersil
2
HIP6004CB
Sync-Buck PWM Controller
SOIC-20
1
U2
Intersil
3
HIP6200
DeCAPitator Dynamic Regulator
SOIC-8
1
U3
Intersil
4
HIP2100IB
Half-Bridge Driver
SOIC-8
2
U4-5
Intersil
5
RF1K49157
MOSFET, 30M, 30V
SOIC-8
4
Q1-3 , Q5
Intersil
6
MMBT2222ALT
Transistor, NPN, 40V
SOT-23
3
Q4 , Q6-7
Motorola
7
GT21MSCKE
Switch, double-pole, double-throw
1
S1
C&K
8
GT11MSCKE
Switch, single-pole, double-throw
1
S2
C&K
9
GT12MSCKE
Switch, single-pole, single-throw
1
S3
C&K
10
1N4148
Rectifier 75V
DO35
1
CR5
Various
11
MBRS360T3
Rectifier, Schottky, 3A, 60V
DO-214AB
1
CR6
Motorola
12
MBRS0520T1
Rectifier, Schottky, 0.5A, 20V
SOD-123
2
CR7-8
Motorola
13
PO520
3uH, 8A Inductor
LCI-37
2
L1-2
Pulse
14
0.47 Ceramic
Cap, Ceramic, Y5V, 0.47, 16V
1206
1
C1
AVX
15
0.1 Ceramic
Cap, Ceramic, X7R, 0.1, 25V
0805
5
C11 , C15 , C35 , C38 , Various
C52
16
TPSE107M016
Cap, TPS Tantalum, 16V, 100
E Case
4
C6-9
AVX
17
0.047Ceramic
Cap, Ceramic, X7R, 0.047
0805
1
C10
various
18
1206YZ105MAT1A
Cap, Ceramic, X7S, 1, 16V
1206
2
C12 -13
AVX
19
22p Ceramic
Cap, Ceramic, X7R, 22p
0805
1
C16
Various
20
1000p Ceramic
Cap, Ceramic, X7R, 1000p
0805
1
C14
Various
21
4700p Ceramic
Cap, Ceramic, X7R, 4700p
0805
1
C17
Various
22
TPSD107M010
Cap, TPS Tantalum, 10V, 100
D Case
6
C19-23 , C37
AVX
23
6800p Ceramic
Cap, Ceramic, X7R, 6800p
0805
2
C34 , C51
Various
24
TAJC685M016
Cap, Tantalum, 6.8, 16V
C Case
2
C36 , C53
AVX
25
8200p Ceramic
Cap, Ceramic, X7R, 8200p
0805
1
C39
Various
26
TPSE227M010
Cap, TPS Tantalum, 10V, 220
E Case
12
C2 , C40-50
AVX
27
49.9k
Resistor, 49.9k, 1% 0.1W
0805
1
R1
Various
28
6.04k
Resistor, 4.02k, 1% 0.1W
0805
1
R2
Various
29
1k
Resistor, 1k, 1% 0.1W
0805
3
R5 , R20 , R38
Various
30
2
Resistor, 2, 1% 0.125W
1206
23
R6-16 , R24-34 , R52
Various
31
20
Resistor, 20, 5% 0.25W
1210
2
R23 , R41
Various
32
100
Resistor, 100, 1% 0.1W
0805
3
R18 , R36 , R51
Various
33
64.9
Resistor, 64.9, 1% 0.1W
0805
2
R19 , R37
Various
34
20k
Resistor, 20k, 1% 0.1W
0805
3
R3 , R21 , R39
Various
35
499
Resistor, 499, 1% 0.1W
0805
2
R22 , R40
Various
36
604k
Resistor, 604k, 1%, 0.1W
0805
1
R53
Various
37
210k
Resistor, 210k, 1%, 0.1W
0805
1
R54
Various
38
10k
Resistor, 10k, 5%, 0.1W
0805
1
R55
Various
39
1514-2
Terminal Post
6
+12VIN , VOUT1 ,
VOUT2 , RTN
Keystone
40
1314353-00
Scope Probe Test Point
2
VOUT1 , VOUT2
Tektronix
41
SPCJ-123-01
Test Point
6
CAP, P5VB, Q3D ,
Q5D , COMP, PVCC
Jolo
Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is
cautioned to verify that the Application Note or Technical Brief is current before proceeding.
For information regarding Intersil Corporation and its products, see www.intersil.com
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Application Note 9763
FIGURE 9. TOP - SILK SCREEN
FIGURE 10. INTERNAL ONE
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8
Application Note 9763
FIGURE 11. GND
FIGURE 12. SOLDER SIDE
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