DATASHEET

ISL43140, ISL43141, ISL43142
Data Sheet
August 24, 2015
Low-Voltage, Single and Dual Supply,
High Performance, Quad SPST, Analog
Switches
Features
The Intersil ISL43140–ISL43142 devices are CMOS,
precision, quad analog switches designed to operate from a
single +2V to +12V supply or from a 2V to 6V supply.
Targeted applications include battery powered equipment that
benefit from the devices’ low power consumption (1W), low
leakage currents (1nA max), and fast switching speeds
(tON = 30ns, tOFF = 18ns). A 12 maximum RON flatness
ensures signal fidelity, while channel-to-channel mismatch is
guaranteed to be less than 2.5. The 3mm x 3mm Quad NoLead Flatpack (QFN) package alleviates board space
limitations, making this newest line of low-voltage switches an
ideal solution.
• Four Separately Controlled SPST Switches
The ISL43140/ISL43141/ISL43142 are quad single-pole/
single-throw (SPST) devices. The ISL43140 has four normally
closed (NC) switches; the ISL43141 has four normally open
(NO) switches; the ISL43142 has two NO and two NC
switches and can be used as a dual SPDT, or a dual 2:1
multiplexer.
Table 1 summarizes the performance of this family.
FN6032.2
• Fully Specified at 5V, 12V, 5V, and 3V Supplies for 10%
Tolerances
• Pin Compatible with DG411/DG412/DG413
• ON Resistance (RON) . . . . . . . . . . . . . . . . . . . . . . . . 50
• RON Matching Between Channels. . . . . . . . . . . . . . . . . . . 2
• Low Charge Injection . . . . . . . . . . . . . . . . . . . . . . 5pC (Max)
• Low Power Consumption (PD) . . . . . . . . . . . . . . . . . . . .<1W
• Low Leakage Current (Max at 85°C) . . . . . . . . . . . . . 5nA
• Fast Switching Action
- tON . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30ns
- tOFF . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18ns
• Guaranteed Break-Before-Make (ISL43142 only)
• Minimum 2000V ESD Protection per Method 3015.7
• TTL, CMOS Compatible
• Pb-free Available
Applications
TABLE 1. FEATURES AT A GLANCE
ISL43140
ISL43141
ISL43142
(No longer
available or
supported)
Number of Switches
4
4
4
Configuration
All NC
All NO
2 NC / 2 NO
10.8V RON
50
50
50
10.8V tON / tOFF
30ns / 18ns
30ns / 18ns
30ns / 18ns
4.5V RON
50
50
50
4.5V tON / tOFF
40ns / 15ns
40ns / 15ns
40ns / 15ns
4.5V RON
110
110
110
4.5V tON / tOFF
50ns / 20ns
50ns / 20ns
50ns / 20ns
2.7V RON
200
200
200
2.7V tON / tOFF
120ns / 25ns 120ns / 25ns 120ns / 25ns
Packages
16 Ld SOIC (N), 16 Ld 3x3 QFN,
16 Ld TSSOP
• Battery Powered, Handheld, and Portable Equipment
- Cellular/Mobile Phones
- Pagers
- Laptops, Notebooks, Palmtops
• Communications Systems
- Military Radios
- RF “Tee” Switches
• Test Equipment
- Ultrasound
- Electrocardiograph
• Heads-Up Displays
• Audio and Video Switching
• General Purpose Circuits
- +3V/+5V DACs and ADCs
- Digital Filters
- Operational Amplifier Gain Switching Networks
- High Frequency Analog Switching
- High Speed Multiplexing
Related Literature
• Technical Brief TB363 “Guidelines for Handling and
Processing Moisture Sensitive Surface Mount Devices
(SMDs)”
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright © Intersil Americas LLC. 2002, 2004, 2015. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
ISL43140, ISL43141, ISL43142
(Note 1)
16 IN2
IN1
IN2
COM2
15 COM2
16
15
14
13
12 N.C.
NC4 6
11 NC3
10 COM3
12 NC2
V-
2
11 V+
GND
3
10 N.C.
NC4
4
9
9 IN3
IN2
COM2
16
15
14
13
GND 5
12 N.C.
NO4 6
11 NO3
10 COM3
COM4 7
ISL43141 (QFN)
TOP VIEW
15 COM2
13 V+
V- 4
NO1
1
12 NO2
V-
2
11 V+
GND
3
10 N.C.
NO4
4
9
9 IN3
5
COM4
IN4 8
8
16 IN2
14 NO2
NO1 3
7
IN1
IN1 1
COM1 2
6
COM1
ISL43141 (SOIC, TSSOP)
TOP VIEW
5
NOTE:
1. Switches Shown for Logic “0” Input.
2
2
IN1
IN2
COM2
13
13 V+
12 N.C.
11 NC3
GND
10 COM3
NO4
9 IN3
IN4 8
V-
14
3
NO
4 N
LO
R
GE
LA
AI
AV
E
BL
OR
S
ED
RT
O
12
NC2
P
UP
11 V+
10 N.C.
9
5
6
7
8
COM3
R
NO4 G
6E
N
O
L
COM4
7
NO
L
AI
AV
OR
1
15
IN3
GND 5
LE
AB
NO1
16
IN4
V- 4
8
COM4
NO1 3
ED
15 COM2
RT
O
P
14P NC2
SU
7
NO3
ISL43142 (QFN)
TOP VIEW
16 IN2
COM1 2
6
COM1
ISL43142 (SOIC, TSSOP)
TOP VIEW
IN1 1
NC3
COM3
IN4 8
IN3
COM4 7
1
COM3
GND 5
NC1
IN3
13 V+
V- 4
IN4
14 NC2
NC1 3
IN4
IN1 1
COM1 2
ISL43140 (QFN)
TOP VIEW
COM1
ISL43140 (SOIC, TSSOP)
TOP VIEW
COM4
Pinouts
NC3
ISL43140, ISL43141, ISL43142
Truth Table
NOTE:
ISL43140
ISL43141
ISL43142
LOGIC
SW 1, 2, 3, 4
SW 1, 2, 3, 4
SW 1, 4
SW 2, 3
0
ON
OFF
OFF
ON
1
OFF
ON
ON
OFF
Logic “0”  0.8V. Logic “1” 2.4V.
Pin Descriptions
PIN
FUNCTION
V+
Positive Power Supply Input
V-
Negative Power Supply Input. Connect to GND for Single Supply Configurations.
GND
Ground Connection
IN
Digital Control Input
COM
Analog Switch Common Pin
NO
Analog Switch Normally Open Pin
NC
Analog Switch Normally Closed Pin
N.C.
No Internal Connection
Ordering Information
PART NUMBER
(BRAND)
(NOTES 2, 3)
TEMP.
RANGE (°C)
PACKAGE
RoHS Compliant
PKG.
DWG. #
ISL43140IBZ
-40 to 85
16 Ld SOIC (N)
M16.15
ISL43140IRZ
(140I)
-40 to 85
16 Ld QFN
L16.3x3
ISL43140IVZ
-40 to 85
16 Ld TSSOP
M16.173
ISL43141IBZ
-40 to 85
16 Ld SOIC (N)
M16.15
ISL43141IRZ
(141I)
-40 to 85
16 Ld QFN
L16.3x3
ISL43141IVZ
-40 to 85
16 Ld TSSOP
M16.173
ISL43142IBZ (No longer available, recommended replacement: ISL43120IHZ-T)
-40 to 85
16 Ld SOIC (N)
M16.15
ISL43142IVZ (No longer available, recommended replacement: ISL43120IHZ-T)
-40 to 85
16 Ld TSSOP
M16.173
NOTES:
2. Most surface mount devices are available on tape and reel; add “-T” to suffix.
3. Intersil Pb-free products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate termination
finish, which is compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow
temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J Std-020B.
3
ISL43140, ISL43141, ISL43142
Absolute Maximum Ratings
Thermal Information
V+ to V- . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 to15V
V+ to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 to15V
V- to GND. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -15 to 0.3V
All Other Pins (Note 4) . . . . . . . . . . . . . ((V-) - 0.3V) to ((V+) + 0.3V)
Continuous Current (Any Terminal) . . . . . . . . . . . . . . . . . . . . . 10mA
Peak Current, IN, NO, NC, or COM
(Pulsed 1ms, 10% Duty Cycle, Max) . . . . . . . . . . . . . . . . . . 20mA
ESD Rating (Per MIL-STD-883 Method 3015). . . . . . . . . . . . . .>2kV
Thermal Resistance (Typical, Note 5)
Operating Conditions
Temperature Range
ISL4314XIX . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -40°C to 85°C
JA (°C/W)
16 Ld SOIC Package . . . . . . . . . . . . . . . . . . . . . . . .
115
16 Ld QFN Package. . . . . . . . . . . . . . . . . . . . . . . . .
75
16 Ld TSSOP Package . . . . . . . . . . . . . . . . . . . . . .
150
Maximum Junction Temperature (Plastic Package). . . . . . . . 150°C
Moisture Sensitivity (See Technical Brief TB363)
All Other Packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Level 1
QFN Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Level 2
Maximum Storage Temperature Range . . . . . . . . . . . . . -65°C to 150°C
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300°C
(SOIC and TSSOP - Lead Tips Only)
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES:
4. Signals on NC, NO, COM, or IN exceeding V+ or V- are clamped by internal diodes. Limit forward diode current to maximum current ratings.
5. JA is measured with the component mounted on a low effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
Electrical Specifications: ±5V Supply Test Conditions VSUPPLY = 4.5V to 5.5V, GND = 0V, VINH = 2.4V, VINL = 0.8V (Note 6),
Unless Otherwise Specified
PARAMETER
TEST CONDITIONS
TEMP
(°C)
(NOTE 7)
MIN
Full
V-
-
V+
V
25
-
50
65

TYP
(NOTE 7)
MAX
UNITS
ANALOG SWITCH CHARACTERISTICS
Analog Signal Range, VANALOG
ON Resistance, RON
VS = 4.5V, ICOM = 1.0mA, VNO or VNC = 3V,
See Figure 5
Full
-
-
75

RON Matching Between Channels,
RON
VS = 4.5V, ICOM = 1.0mA, VNO or VNC = 3V
25
-
2
2.5

RON Flatness, RFLAT(ON)
VS = 4.5V, ICOM = 1.0mA, VNO or VNC = 3V, Note 9
NO or NC OFF Leakage Current,
INO(OFF) or INC(OFF)
VS = 5.5V, VCOM = 4.5V, VNO or VNC = +4.5V, Note 8
COM OFF Leakage Current,
ICOM(OFF)
VS = 5.5V, VCOM = 4.5V, VNO or VNC = +4.5V, Note 8
COM ON Leakage Current,
ICOM(ON)
VS = 5.5V, VCOM = VNO or VNC = 4.5V, Note 8
Full
-
-
5

25
-
10
12

Full
-
-
13

nA
25
-1
0.01
1
Full
-5
-
5
nA
25
-1
0.01
1
nA
Full
-5
-
5
nA
25
-2
0.01
2
nA
Full
-10
-
10
nA
Full
2.4
1.6
-
V
DIGITAL INPUT CHARACTERISTICS
Input Voltage High, VINH
Input Voltage Low, VINL
Input Current, IINH, IINL
Full
-
1.6
0.8
V
VS = 5.5V, VIN = 0V or V+
Full
-0.5
0.03
0.5
A
VS = 4.5V, VNO or VNC = 3V, RL = 300, CL = 35pF,
VIN = 0 to 3V, See Figure 1
25
-
40
80
ns
Full
-
-
100
ns
VS = 4.5V, VNO or VNC = 3V, RL = 300, CL = 35pF,
VIN = 0 to 3V, See Figure 1
25
-
15
30
ns
Full
-
-
40
ns
DYNAMIC CHARACTERISTICS
Turn-ON Time, tON
Turn-OFF Time, tOFF
Break-Before-Make Time Delay
(ISL43142), tD
VS = 5.5V, VNO or VNC = 3V, RL = 300, CL = 35pF,
VIN = 0 to 3V, See Figure 3
Full
5
20
-
ns
Charge Injection, Q
CL = 1.0nF, VG = 0V, RG = 0, See Figure 2
25
-
1
5
pC
NO or NC OFF Capacitance, COFF f = 1MHz, VNO or VNC = VCOM = 0V, See Figure 7
25
-
7
-
pF
COM OFF Capacitance,
CCOM(OFF)
f = 1MHz, VNO or VNC = VCOM = 0V, See Figure 7
25
-
7
-
pF
COM ON Capacitance, CCOM(ON)
f = 1MHz, VNO or VNC = VCOM = 0V, See Figure 7
25
-
14
-
pF
4
ISL43140, ISL43141, ISL43142
Electrical Specifications: ±5V Supply Test Conditions VSUPPLY = 4.5V to 5.5V, GND = 0V, VINH = 2.4V, VINL = 0.8V (Note 6),
Unless Otherwise Specified (Continued)
TEMP
(°C)
(NOTE 7)
MIN
TYP
RL = 50, CL = 15pF, f = 100kHz,
VNO or VNC = 1VRMS, See Figures 4, 6, and 19
25
-
>90
25
-
<-90
-
dB
All Hostile Crosstalk
RL = 50, CL = 15pF, f = 10MHz,
VNO or VNC = 1VRMS, See Figure 19
25
-
-60
-
dB
Power Supply Rejection Ratio
RL = 50, CL = 15pF, f = 1MHz, See Figure 20
25
-
60
-
dB
Full
2
-
6
V
25
-1
0.05
1
A
PARAMETER
TEST CONDITIONS
OFF Isolation
Crosstalk, Note 10
(NOTE 7)
MAX
UNITS
-
dB
POWER SUPPLY CHARACTERISTICS
Power Supply Range
VS = 5.5V, VIN = 0V or V+, Switch On or Off
Positive Supply Current, I+
Negative Supply Current, I-
Full
-1
-
1
A
25
-1
0.05
1
A
Full
-1
-
1
A
NOTES:
6. VIN = Input voltage to perform proper function.
7. The algebraic convention, whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet.
8. Leakage parameter is 100% tested at high temp, and guaranteed by correlation at 25°C.
9. Flatness is defined as the delta between the maximum and minimum RON values over the specified voltage range.
10. Between any two switches.
Electrical Specifications: 12V Supply
PARAMETER
Test Conditions: V+ = +10.8V to +13.2V, V- = GND = 0V, VINH = 5V, VINL = 0.8V (Note 6),
Unless Otherwise Specified
TEST CONDITIONS
TEMP
(°C)
(NOTE 7)
MIN
Full
0
-
V+
V
25
-
50
65

Full
-
60
75


TYP
(NOTE 7)
MAX
UNITS
ANALOG SWITCH CHARACTERISTICS
Analog Signal Range, VANALOG
ON Resistance, RON
V+ = 10.8V, ICOM = 1.0mA, VNO or VNC = 9V,
See Figure 5
RON Matching Between Channels,
RON
V+ = 10.8V, ICOM = 1.0mA, VNO or VNC = 9V
RON Flatness, RFLAT(ON)
V+ = 10.8V, ICOM = 1.0mA, VNO or VNC = 3V, 6V, 9V,
Note 9
NO or NC OFF Leakage Current,
INO(OFF) or INC(OFF)
V+ = 13.2V, VCOM = 1V, 10V, VNO or VNC = 10V, 1V,
Note 8
COM OFF Leakage Current,
ICOM(OFF)
V+ = 13.2V, VCOM = 10V, 1V, VNO or VNC = 1V, 10V,
Note 8
COM ON Leakage Current,
ICOM(ON)
V = 13.2V, VCOM = 1V, 10V, or VNO or VNC = 1V,
10V, Note 8
Input Voltage High, VINH
Input Voltage Low, VINL
25
-
2
2.5
Full
-
-
5

25
-
8
12

Full
-
9
13

25
-1
-
1
nA
Full
-5
-
5
nA
25
-1
-
1
nA
Full
-5
-
5
nA
25
-2
-
2
nA
Full
-10
-
10
nA
Full
3.5
3.1
-
V
Full
-
-
0.8
V
V+ = 13.2V, VIN = 0V or V+
Full
-1
-
1
A
Turn-ON Time, tON
V+ = 10.8V, VNO or VNC = 10V, RL = 300, CL = 35pF,
VIN = 0 to 3.3V, See Figure 1
25
-
30
70
ns
Turn-OFF Time, tOFF
V+ = 10.8V, VNO or VNC = 10V, RL = 300, CL = 35pF,
VIN = 0 to 3.3V, See Figure 1
DIGITAL INPUT CHARACTERISTICS
Input Current, IINH, IINL
DYNAMIC CHARACTERISTICS
Break-Before-Make Time Delay
(ISL43142), tD
V+ = 13.2V, VNO or VNC = 10V, RL = 300, CL = 35pF,
VIN = 0 to 3.3V, See Figure 3
5
Full
-
34
100
ns
25
-
18
50
ns
Full
-
20
75
ns
Full
0
8
-
ns
ISL43140, ISL43141, ISL43142
Electrical Specifications: 12V Supply
PARAMETER
Test Conditions: V+ = +10.8V to +13.2V, V- = GND = 0V, VINH = 5V, VINL = 0.8V (Note 6),
Unless Otherwise Specified (Continued)
TEST CONDITIONS
TEMP
(°C)
(NOTE 7)
MIN
TYP
(NOTE 7)
MAX
UNITS
-
5
15
pC
Charge Injection, Q
CL = 1.0nF, VG = 0V, RG = 0See Figure 2
25
OFF Isolation
RL = 50, CL = 15pF, f = 100kHz,
VNO or VNC = 1VRMS, See Figures 4, 6, and 19
25
-
>90
-
dB
25
-
<-90
-
dB
All Hostile Crosstalk
RL = 50, CL = 15pF, f = 10MHz,
VNO or VNC = 1VRMS, See Figure 19
25
-
-60
-
dB
Power Supply Rejection Ratio
RL = 50, CL = 15pF, f = 1MHz, See Figure 20
25
-
60
-
dB
Crosstalk, Note 10
NO or NC OFF Capacitance, COFF f = 1MHz, VNO or VNC = VCOM = 0V, See Figure 7
25
-
7
-
pF
COM OFF Capacitance,
CCOM(OFF)
f = 1MHz, VNO or VNC = VCOM = 0V, See Figure 7
25
-
7
-
pF
COM ON Capacitance, CCOM(ON)
f = 1MHz, VNO or VNC = VCOM = 0V, See Figure 7
25
-
14
-
pF
POWER SUPPLY CHARACTERISTICS
Positive Supply Current, I+
V+ = 13.2V, VIN = 0V or V+, Switch On or Off
Negative Supply Current, I-
Electrical Specifications: 5V Supply
PARAMETER
25
-1
0.05
1
A
Full
-1
-
1
A
25
-1
0.05
1
A
Full
-1
-
1
A
Test Conditions: V+ = +4.5V to +5.5V, V- = GND = 0V, VINH = 2.4V, VINL = 0.8V (Note 6),
Unless Otherwise Specified
TEST CONDITIONS
TEMP
(°C)
MIN
(NOTE 7)
Full
0
-
V+
V
25
-
110
120

Full
-
-
150


TYP
MAX
(NOTE 7) UNITS
ANALOG SWITCH CHARACTERISTICS
Analog Signal Range, VANALOG
ON Resistance, RON
V+ = 4.5V, ICOM = 1.0mA, VNO or VNC = 3.5V,
See Figure 5
RON Matching Between Channels,
RON
V+ = 4.5V, ICOM = 1.0mA, VNO or VNC = 3.5V
RON Flatness, RFLAT(ON)
V+ = 4.5V, ICOM = 1.0mA, VNO or VNC = 1.5V to 4.5V,
Note 9
NO or NC OFF Leakage Current,
INO(OFF) or INC(OFF)
V+ = 5.5V, VCOM = 1V, 4.5V, VNO or VNC = 4.5V, 1V,
Note 8
COM OFF Leakage Current,
ICOM(OFF)
V+ = 5.5V, VCOM = 1V, 4.5V, VNO or VNC = 4.5V, 1V,
Note 8
COM ON Leakage Current,
ICOM(ON)
V+ = 5.5V, VCOM = 1V, 4.5V, Note 8
25
-
1.5
2
Full
-
-
5

25
-
12
16

Full
-
-
20

25
-1
0.01
1
nA
Full
-5
-
5
nA
25
-1
0.01
1
nA
Full
-5
-
5
nA
25
-2
-
2
nA
Full
-10
-
10
nA
Input Voltage High, VINH
Full
2.4
1.6
-
V
Input Voltage Low, VINL
Full
-
1.6
0.8
V
V+ = 5.5V, VIN = 0V or V+
Full
-0.5
0.03
0.5
A
Turn-ON Time, tON
V+ = 4.5V, VNO or VNC = 3V, RL = 300, CL = 35pF,
VIN = 0 to 3V, See Figure 1
25
-
50
100
ns
Turn-OFF Time, tOFF
V+ = 4.5V, VNO or VNC = 3V, RL = 300, CL = 35pF,
VIN = 0 to 3V, See Figure 1
DIGITAL INPUT CHARACTERISTICS
Input Current, IINH, IINL
DYNAMIC CHARACTERISTICS
Full
-
-
150
ns
25
-
20
50
ns
Full
-
-
75
ns
V+ = 5.5V, VNO or VNC = 3V, RL = 300, CL = 35pF,
VIN = 0 to 3V, See Figure 3
Full
10
30
-
ns
Charge Injection, Q
CL = 1.0nF, VG = 0V, RG = 0See Figure 2
25
-
1
5
pC
OFF Isolation
RL = 50, CL = 15pF, f = 100kHz,
VNO or VNC = 1VRMS, See Figures 4, 6, and 19
25
-
>90
-
dB
25
-
<-90
-
dB
Break-Before-Make Time Delay
(ISL43142), tD
Crosstalk, Note 10
6
ISL43140, ISL43141, ISL43142
Electrical Specifications: 5V Supply
PARAMETER
Test Conditions: V+ = +4.5V to +5.5V, V- = GND = 0V, VINH = 2.4V, VINL = 0.8V (Note 6),
Unless Otherwise Specified (Continued)
TEST CONDITIONS
TEMP
(°C)
MIN
(NOTE 7)
TYP
MAX
(NOTE 7) UNITS
All Hostile Crosstalk
RL = 50, CL = 15pF, f = 10MHz,
VNO or VNC = 1VRMS, See Figure 19
25
-
-60
-
dB
Power Supply Rejection Ratio
RL = 50, CL = 15pF, f = 1MHz, See Figure 20
25
-
60
-
dB
NO or NC OFF Capacitance, COFF f = 1MHz, VNO or VNC = VCOM = 0V, See Figure 7
25
-
7
-
pF
COM OFF Capacitance,
CCOM(OFF)
f = 1MHz, VNO or VNC = VCOM = 0V, See Figure 7
25
-
7
-
pF
COM ON Capacitance, CCOM(ON)
f = 1MHz, VNO or VNC = VCOM = 0V, See Figure 7
25
-
14
-
pF
POWER SUPPLY CHARACTERISTICS
Positive Supply Current, I+
V+ = 5.5V, VIN = 0V or V+, Switch On or Off
Negative Supply Current, I-
Electrical Specifications: 3V to 3.3V Supply
PARAMETER
25
-1
0.05
1
A
Full
-1
-
1
A
25
-1
0.05
1
A
Full
-1
-
1
A
Test Conditions: V+ = +2.7V to +3.6V, V- = GND = 0V, VINH = 2.4V, VINL = 0.8V
(Note 6), Unless Otherwise Specified
TEST CONDITIONS
TEMP
(°C)
MIN
(NOTE 7)
TYP
MAX
(NOTE 7) UNITS
Full
0
-
V+
V
25
-
200
250

Full
-
-
270


ANALOG SWITCH CHARACTERISTICS
Analog Signal Range, VANALOG
ON Resistance, RON
V+ = 2.7V, ICOM = 1.0mA, VNO or VNC = 1V,
See Figure 5
RON Matching Between Channels,
RON
V+ = 2.7V, ICOM = 1.0mA, VNO or VNC = 1V
RON Flatness, RFLAT(ON)
V+ = 2.7V, ICOM = 1.0mA, VNO or VNC = 0.5V to 1.5V,
Note 9
NO or NC OFF Leakage Current,
INO(OFF) or INC(OFF)
V+ = 3.6V, VCOM = 1V, 2.6V, VNO or VNC = 2.6V, 1V,
Note 8
COM OFF Leakage Current,
ICOM(OFF)
V+ = 3.6V, VCOM = 1V, 2.6V, VNO or VNC = 2.6V, 1V,
Note 8
COM ON Leakage Current,
ICOM(ON)
V+ = 3.6V, VCOM = 1V, 2.6V, Note 8
25
-
2
4
Full
-
-
6

25
-
80
100

Full
-
-
120

25
-1
0.01
1
nA
Full
-5
-
5
nA
25
-1
0.01
1
nA
Full
-5
-
5
nA
25
-2
-
2
nA
Full
-10
-
10
nA
Input Voltage High, VINH
Full
2.4
1.6
-
V
Input Voltage Low, VINL
Full
-
1.6
0.8
V
V+ = 3.6V, VIN = 0V or V+
Full
-0.5
0.03
0.5
A
Turn-ON Time, tON
V+ = 2.7V, VNO or VNC = 1.5V, RL = 300, CL = 35pF,
VIN = 0 to V+, See Figure 1
25
-
120
180
ns
Turn-OFF Time, tOFF
V+ = 2.7V, VNO or VNC = 1.5V, RL = 300, CL = 35pF,
VIN = 0 to V+, See Figure 1
DIGITAL INPUT CHARACTERISTICS
Input Current, IINH, IINL
DYNAMIC CHARACTERISTICS
Full
-
-
220
ns
25
-
25
45
ns
Full
-
-
60
ns
V+ = 3.6V, VNO or VNC = 1.5V, RL = 300, CL = 35pF,
VIN = 0 to 3V, See Figure 3
25
15
50
-
ns
Charge Injection, Q
CL = 1.0nF, VG = 0V, RG = 0See Figure 2
25
-
0.5
5
pC
OFF Isolation
RL = 50, CL = 15pF, f = 100kHz,
VNO or VNC = 1VRMS, See Figures 4, 6, and 19
25
-
>90
-
dB
25
-
<-90
-
dB
All Hostile Crosstalk
RL = 50, CL = 15pF, f = 10MHz,
VNO or VNC = 1VRMS, See Figure 19
25
-
-60
-
dB
Power Supply Rejection Ratio
RL = 50, CL = 15pF, f = 1MHz, See Figure 20
25
-
60
-
dB
Break-Before-Make Time Delay
(ISL43142), tD
Crosstalk, Note 10
7
ISL43140, ISL43141, ISL43142
Electrical Specifications: 3V to 3.3V Supply
Test Conditions: V+ = +2.7V to +3.6V, V- = GND = 0V, VINH = 2.4V, VINL = 0.8V
(Note 6), Unless Otherwise Specified (Continued)
TEMP
(°C)
MIN
(NOTE 7)
TYP
NO or NC OFF Capacitance, COFF f = 1MHz, VNO or VNC = VCOM = 0V, See Figure 7
25
-
7
-
pF
COM OFF Capacitance,
CCOM(OFF)
f = 1MHz, VNO or VNC = VCOM = 0V, See Figure 7
25
-
7
-
pF
COM ON Capacitance, CCOM(ON)
f = 1MHz, VNO or VNC = VCOM = 0V, See Figure 7
25
-
14
-
pF
25
-1
0.05
1
A
PARAMETER
TEST CONDITIONS
MAX
(NOTE 7) UNITS
POWER SUPPLY CHARACTERISTICS
Positive Supply Current, I+
V+ = 3.6V, VIN = 0V or V+, Switch On or Off
Negative Supply Current, I-
Full
-1
-
1
A
25
-1
0.05
1
A
Full
-1
-
1
A
Test Circuits and Waveforms
V+
tr < 20ns
tf < 20ns
3V
LOGIC
INPUT
50%
0V
C
tOFF
SWITCH VNX
INPUT
VOUT
NO or NC
VNX
COM
VOUT
IN
90%
SWITCH
OUTPUT
C
SWITCH
INPUT
90%
RL
300
GND
0V
LOGIC
INPUT
tON
V-
Logic input waveform is inverted for switches that have the opposite
logic sense.
CL
35pF
C
Repeat test for all switches. CL includes fixture and stray
capacitance.
RL
-----------------------------V OUT = V
(NO or NC) R + R
L
 ON 
FIGURE 1B. TEST CIRCUIT
FIGURE 1A. MEASUREMENT POINTS
FIGURE 1. SWITCHING TIMES
V+
SWITCH
OUTPUT
VOUT
VOUT
RG
NO or NC
C
VOUT
COM
3V
LOGIC
INPUT
ON
ON
OFF
0V
VG
C
Q = VOUT x CL
Logic input waveform is inverted for switches that have the opposite
logic sense.
FIGURE 2A. MEASUREMENT POINTS
V-
IN
CL
LOGIC
INPUT
Repeat test for all switches. CL includes fixture and stray
capacitance.
FIGURE 2B. TEST CIRCUIT
FIGURE 2. CHARGE INJECTION
8
GND
ISL43140, ISL43141, ISL43142
Test Circuits and Waveforms (Continued)
V+
C
C
3V
LOGIC
INPUT
0V
VOUT1
NO1
VNX
COM1
VOUT2 RL1
300
NC2
COM2
IN1
90%
90%
SWITCH
OUTPUT
VOUT1
0V
RL2
300
IN2
90%
SWITCH
OUTPUT
VOUT2
0V
90%
LOGIC
INPUT
CL2
35pF
GND
tD
tD
CL1
35pF
C
V-
CL includes fixture and stray capacitance.
Reconfigure accordingly to test SW3 and SW4.
FIGURE 3A. MEASUREMENT POINTS
FIGURE 3B. TEST CIRCUIT
FIGURE 3. BREAK-BEFORE-MAKE TIME (ISL43142 ONLY)
V+
V+
C
C
RON = V1/1mA
SIGNAL
GENERATOR
NO or NC
NO or NC
VNX
0V or 2.4V
IN
1mA
COM
ANALYZER
0.8V or 2.4V
IN
V1
COM
GND
GND
RL
C
V-
C
V-
Repeat test for all switches.
Repeat test for all switches.
FIGURE 4. OFF ISOLATION TEST CIRCUIT
FIGURE 5. RON TEST CIRCUIT
V+
V+
C
SIGNAL
GENERATOR
NO1 or NC1
50
COM1
NO or NC
IN1
IN
0V or 2.4V
IN2 0V or 2.4V
COM2
ANALYZER
NO
CONNECTION
NO2 or NC2
GND
0V or 2.4V
IMPEDANCE
ANALYZER
COM
GND
RL
V-
C
FIGURE 6. CROSSTALK TEST CIRCUIT
9
V-
FIGURE 7. CAPACITANCE TEST CIRCUIT
ISL43140, ISL43141, ISL43142
Detailed Description
Power-Supply Considerations
The ISL43140–ISL43142 quad analog switches offer precise
switching capability from a bipolar 2V to 6V or a single 2V
to 12V supply with low on-resistance (50) and high speed
switching (tON = 40ns, tOFF = 15ns). The devices are
especially well suited to portable battery powered equipment
thanks to the low operating supply voltage (2V), low power
consumption (1W), low leakage currents (1nA max), and the
tiny QFN packaging. High frequency applications also benefit
from the wide bandwidth, and the very high off isolation and
crosstalk rejection.
The ISL4314X construction is typical of most CMOS analog
switches, in that they have three supply pins: V+, V-, and
GND. V+ and V- drive the internal CMOS switches and set
their analog voltage limits, so there are no connections
between the analog signal path and GND. Unlike switches
with a 13V maximum supply voltage, the ISL4314X 15V
maximum supply voltage provides plenty of room for the
10% tolerance of 12V supplies (6V or 12V single supply),
as well as room for overshoot and noise spikes.
Supply Sequencing And Overvoltage Protection
With any CMOS device, proper power supply sequencing is
required to protect the device from excessive input currents
which might permanently damage the IC. All I/O pins contain
ESD protection diodes from the pin to V+ and to V- (see
Figure 8). To prevent forward biasing these diodes, V+ and
V- must be applied before any input signals, and input signal
voltages must remain between V+ and V-. If these conditions
cannot be guaranteed, then one of the following two
protection methods should be employed.
Logic inputs can easily be protected by adding a 1k
resistor in series with the input (see Figure 8). The resistor
limits the input current below the threshold that produces
permanent damage, and the sub-microamp input current
produces an insignificant voltage drop during normal
operation.
Adding a series resistor to the switch input defeats the
purpose of using a low RON switch, so two small signal
diodes can be added in series with the supply pins to provide
overvoltage protection for all pins (see Figure 8). These
additional diodes limit the analog signal from 1V below V+ to
1V above V-. The low leakage current performance is
unaffected by this approach, but the switch resistance may
increase, especially at low supply voltages.
This family of switches performs equally well when operated
with bipolar or single voltage supplies. The addition of the
GND pin allows for asymmetrical bipolar supplies (e.g. +5V
and -3V). The minimum recommended supply voltage is 2V
or 2V. It is important to note that the input signal range,
switching times, and on-resistance degrade at lower supply
voltages. Refer to the electrical specification tables and
Typical Performance Curves for details.
V+ and GND power the internal logic (thus setting the digital
switching point) and level shifters. The level shifters convert
the logic levels to switched V+ and V- signals to drive the
analog switch gate terminals, so switch parameters especially RON - are strongly influenced by V-.
Logic-Level Thresholds
V+ and GND power the internal logic stages, so V- has no
affect on logic thresholds. This switch family is TTL
compatible (0.8V and 2.4V) over a V+ supply range of 2.5V
to 10V (see Figure 17). At 12V the VIH level is about 2.7V, so
for best results use a logic family the provides a VOH greater
than 3V.
The digital input stages draw supply current whenever the
digital input voltage is not at one of the supply rails. Driving
the digital input signals from GND to V+ with a fast transition
time minimizes power dissipation.
High-Frequency Performance
OPTIONAL PROTECTION
DIODE
V+
OPTIONAL
PROTECTION
RESISTOR
INX
VNO or NC
VCOM
VOPTIONAL PROTECTION
DIODE
FIGURE 8. OVERVOLTAGE PROTECTION
10
In 5systems, signal response is reasonably flat even past
100MHz (see Figure 18). Figure 18 also illustrates that the
frequency response is very consistent over a wide V+ range,
and for varying analog signal levels.
An off switch acts like a capacitor and passes higher
frequencies with less attenuation, resulting in signal
feedthrough from a switch’s input to its output. Off Isolation is
the resistance to this feedthrough, while Crosstalk indicates
the amount of feedthrough from one switch to another.
Figure 19 details the high Off Isolation and Crosstalk
rejection provided by this family. At 10MHz, off isolation is
about 50dB in 5systems, decreasing approximately 20dB
per decade as frequency increases. Higher load
impedances decrease Off Isolation and Crosstalk rejection
due to the voltage divider action of the switch OFF
impedance and the load impedance.
ISL43140, ISL43141, ISL43142
Leakage Considerations
Reverse ESD protection diodes are internally connected
between each analog-signal pin and both V+ and V-. One
of these diodes conducts if any analog signal exceeds V+
or V-.
Virtually all the analog leakage current comes from the ESD
diodes to V+ or V-. Although the ESD diodes on a given
signal pin are identical and therefore fairly well balanced,
they are reverse biased differently. Each is biased by either
V+ or V- and the analog signal. This means their leakages
will vary as the signal varies. The difference in the two diode
leakages to the V+ and V- pins constitutes the analog-signalpath leakage current. All analog leakage current flows
between each pin and one of the supply terminals, not to the
other switch terminal. This is why both sides of a given
switch can show leakage currents of the same or opposite
polarity. There is no connection between the analog signal
paths and GND.
Typical Performance Curves TA = 25°C, Unless Otherwise Specified
V- = -5V
RON ()
100
115
25°C
V- = 0V
25°C
-40°C
2
3
4
5
6
7
8
V+ (V)
9
10
11
12
13
180
85°C
25°C
100
25°C
75
-40°C
25°C
V- = 0V
-40°C
0
1
2
3
4
5
6
7
VCOM (V)
8
9
10
11
12
2.5
V+ = 12V
V+ = 3V
0
VS =3V
100
85°C
80
25°C
60
-40°C
Q (pC)
RON ()
V- = 0V
V+ = 12V
85°C
-40°C
60
120
V+ = 5V
5
VS =2V
ICOM = 1mA
85°C
95
55
80
70
60
50
40
30
20
ICOM = 1mA
V- = 0V
FIGURE 10. ON RESISTANCE vs SWITCH VOLTAGE
FIGURE 9. ON RESISTANCE vs POSITIVE SUPPLY VOLTAGE
140
-40°C
85°C
-40°C
85°C
25°C
100
50
135
80
40
300
250
200
150
100
50
0
150
V- = -3V
V+ = 3V
85°C
200
25°C
-40°C
60
250
VCOM = (V+) - 1V
ICOM = 1mA
85°C
RON ()
100
90
80
70
60
50
40
120
V+ = 5V
-2.5
VS =5V
-5
40
90
VS =5V
85°C
70
-7.5
25°C
50
30
-40°C
-5
-4
-3
-2
-1
0
1
2
3
4
VCOM (V)
FIGURE 11. ON RESISTANCE vs SWITCH VOLTAGE
11
-10
5
-5
-2.5
0
2.5
5
VCOM (V)
7.5
10
12.5
FIGURE 12. CHARGE INJECTION vs SWITCH VOLTAGE
ISL43140, ISL43141, ISL43142
Typical Performance Curves TA = 25°C, Unless Otherwise Specified (Continued)
300
50
VCOM = (V+) - 1V
VCOM = (V+) - 1V
V- = 0V
250
V- = 0V
40
tOFF (ns)
tON (ns)
200
150
85°C
30
85°C
25°C
100
25°C
20
-40°C
-40°C
50
0
2
3
4
5
6
7
8
9
10
11
10
12
2
3
4
5
6
7
V+ (V)
FIGURE 13. TURN - ON TIME vs POSITIVE SUPPLY VOLTAGE
250
100
tOFF (ns)
-40°C
250
V- = -3V
85°C
-40°C
0
300
V- = -3V
-40°C
150
25°C
25°C
100
85°C
50
50
-40°C
2
25°C
25
200
150
0
12
VCOM = (V+) - 1V
V- = -5V
250
-40°C
100
11
85°C
50
85°C
200
-40°C
100
25°C
0
10
75
50
tON (ns)
125
-40°C
150
9
FIGURE 14. TURN - OFF TIME vs POSITIVE SUPPLY VOLTAGE
VCOM = (V+) - 1V
V- = -5V
25°C
200
8
V+ (V)
3
4
5
6
7
V+ (V)
8
9
10
11
12
FIGURE 15. TURN - ON TIME vs POSITIVE SUPPLY VOLTAGE
85°C
0
2
3
4
5
6
7
V+ (V)
8
9
10
11
12
FIGURE 16. TURN - OFF TIME vs POSITIVE SUPPLY VOLTAGE
3.5
3
-40°C
VINH AND VINL (V)
25°C
2.5
85°C
VINH
2
V+ = 2.7V (VIN = 2VP-P)
3
VS = 2V (VIN = 3VP-P) or V+ = 5V (VIN = 4VP-P)
0
VS = 5V (VIN = 5VP-P)
GAIN
-3
V+ = 2.7V (VIN = 2VP-P)
0
PHASE
-40°C
1.5
VS = 2V (VIN = 3VP-P)
V+ = 5V (VIN = 4VP-P)
VS = 5V (VIN = 5VP-P)
25°C
VINL
1
45
90
135
85°C
180
0.5
2
3
4
5
6
7
8
9
V+ (V)
FIGURE 17. DIGITAL SWITCHING POINT vs
POSITIVE SUPPLY VOLTAGE
12
10
11
12
RL = 50
1
10
100
FREQUENCY (MHz)
FIGURE 18. FREQUENCY RESPONSE
600
PHASE (DEGREES)
NORMALIZED GAIN (dB)
V- = 0V to -5V
ISL43140, ISL43141, ISL43142
Typical Performance Curves TA = 25°C, Unless Otherwise Specified (Continued)
10
-10
0
20
10
30
40
-50
50
-60
60
ISOLATION
CROSSTALK
-70
70
40
60
-90
90
70
100
80
-110
1k
10k
100k
1M
10M
110
100M 500M
FREQUENCY (Hz)
FIGURE 19. CROSSTALK AND OFF ISOLATION
Die Characteristics
SUBSTRATE POTENTIAL (POWERED UP):
VTRANSISTOR COUNT:
ISL43140: 188
ISL43141: 188
ISL43142: 188
PROCESS:
Si Gate CMOS
13
-PSRR, SWITCH ON
50
80
-100
VIN = 1VP-P
30
-80
ALL HOSTILE CROSSTALK
V+ = 3V to 12V or
VS = 2V to 5V
RL = 50
20
PSRR (dB)
-40
OFF ISOLATION (dB)
CROSSTALK (dB)
V+ = 3V to 12V or
-20 VS = 2V to 5V
RL = 50
-30
0.3
-PSRR, SWITCH OFF
+PSRR, SWITCH OFF
+PSRR, SWITCH ON
1
10
100
FREQUENCY (MHz)
FIGURE 20. PSRR vs FREQUENCY
1000
ISL43140, ISL43141, ISL43142
Revision History
The revision history provided is for informational purposes only and is believed to be accurate, but not warranted. Please go to the web to make
sure that you have the latest revision.
DATE
REVISION
CHANGE
August 24, 2015
FN6032.2
Updated Ordering Information table on page 3.
Added Revision History and About Intersil sections.
Updated Package Outline Drawing (POD) M16.173 to the latest revision.
-Revision 1 to Revision 2 changes - Converted to new POD format by moving dimensions from table onto
drawing and adding land pattern. No dimension changes.
Updated POD L16.3X3 to the latest revision.
-Revision 1 to Revision 2 changes - Converted to new QFN template.
About Intersil
Intersil Corporation is a leading provider of innovative power management and precision analog solutions. The company's products
address some of the largest markets within the industrial and infrastructure, mobile computing and high-end consumer markets.
For the most updated datasheet, application notes, related documentation and related parts, please see the respective product
information page found at www.intersil.com.
You may report errors or suggestions for improving this datasheet by visiting www.intersil.com/ask.
Reliability reports are also available from our website at www.intersil.com/support
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9001 quality systems.
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
14
ISL43140, ISL43141, ISL43142
Small Outline Plastic Packages (SOIC)
M16.15 (JEDEC MS-012-AC ISSUE C)
N
INDEX
AREA
H
0.25(0.010) M
16 LEAD NARROW BODY SMALL OUTLINE PLASTIC PACKAGE
B M
INCHES
E
-B-
1
2
3
L
SEATING PLANE
-A-
A
D
h x 45°
-C-
e
A1
B
0.25(0.010) M
C
0.10(0.004)
C A M
SYMBOL
MIN
MAX
MIN
MAX
NOTES
A
0.0532
0.0688
1.35
1.75
-
A1
0.0040
0.0098
0.10
0.25
-
B
0.013
0.020
0.33
0.51
9
C
0.0075
0.0098
0.19
0.25
-
D
0.3859
0.3937
9.80
10.00
3
E
0.1497
0.1574
3.80
4.00
4
e

B S
1. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of
Publication Number 95.
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.
3. Dimension “D” does not include mold flash, protrusions or gate burrs.
Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006
inch) per side.
4. Dimension “E” does not include interlead flash or protrusions. Interlead
flash and protrusions shall not exceed 0.25mm (0.010 inch) per side.
5. The chamfer on the body is optional. If it is not present, a visual index
feature must be located within the crosshatched area.
6. “L” is the length of terminal for soldering to a substrate.
7. “N” is the number of terminal positions.
8. Terminal numbers are shown for reference only.
9. The lead width “B”, as measured 0.36mm (0.014 inch) or greater above
the seating plane, shall not exceed a maximum value of 0.61mm
(0.024 inch).
10. Controlling dimension: MILLIMETER. Converted inch dimensions are
not necessarily exact.
15
0.050 BSC
1.27 BSC
-
H
0.2284
0.2440
5.80
6.20
-
h
0.0099
0.0196
0.25
0.50
5
L
0.016
0.050
0.40
1.27
6
N

NOTES:
MILLIMETERS
16
0°
16
8°
0°
7
8°
Rev. 1 6/05
ISL43140, ISL43141, ISL43142
Package Outline Drawing
M16.173
16 LEAD THIN SHRINK SMALL OUTLINE PACKAGE (TSSOP)
Rev 2, 5/10
A
1
3
5.00 ±0.10
SEE DETAIL "X"
9
16
6.40
PIN #1
I.D. MARK
4.40 ±0.10
2
3
0.20 C B A
1
8
B
0.65
0.09-0.20
END VIEW
TOP VIEW
1.00 REF
- 0.05
H
C
1.20 MAX
SEATING
PLANE
0.90 +0.15/-0.10
GAUGE
PLANE
0.25 +0.05/-0.06 5
0.10 M C B A
0.10 C
0°-8°
0.05 MIN
0.15 MAX
SIDE VIEW
0.25
0.60 ±0.15
DETAIL "X"
(1.45)
NOTES:
1. Dimension does not include mold flash, protrusions or gate burrs.
(5.65)
Mold flash, protrusions or gate burrs shall not exceed 0.15 per side.
2. Dimension does not include interlead flash or protrusion. Interlead
flash or protrusion shall not exceed 0.25 per side.
3. Dimensions are measured at datum plane H.
4. Dimensioning and tolerancing per ASME Y14.5M-1994.
5. Dimension does not include dambar protrusion. Allowable protrusion
shall be 0.08mm total in excess of dimension at maximum material
condition. Minimum space between protrusion and adjacent lead
(0.65 TYP)
(0.35 TYP)
TYPICAL RECOMMENDED LAND PATTERN
is 0.07mm.
6. Dimension in ( ) are for reference only.
7. Conforms to JEDEC MO-153.
16
ISL43140, ISL43141, ISL43142
Package Outline Drawing
L16.3x3
16 LEAD QUAD FLAT NO-LEAD PLASTIC PACKAGE
Rev 2, 4/07
4X 1.5
3.00
12X 0.50
A
B
6
PIN 1
INDEX AREA
6
PIN #1 INDEX AREA
16
13
1
3.00
12
1 .50 ± 0 . 15
9
4
0.15
(4X)
5
8
0.10 M C A B
+ 0.07
4 16X 0.23 - 0.05
TOP VIEW
16X 0.40 ± 0.10
BOTTOM VIEW
SEE DETAIL "X"
0.10 C
0 . 90 ± 0.1
C
BASE PLANE
( 2. 80 TYP )
(
SEATING PLANE
0.08 C
1. 50 )
SIDE VIEW
( 12X 0 . 5 )
( 16X 0 . 23 )
C
( 16X 0 . 60)
0 . 2 REF
5
0 . 00 MIN.
0 . 05 MAX.
TYPICAL RECOMMENDED LAND PATTERN
DETAIL "X"
NOTES:
1. Dimensions are in millimeters.
Dimensions in ( ) for Reference Only.
2. Dimensioning and tolerancing conform to AMSE Y14.5m-1994.
3. Unless otherwise specified, tolerance : Decimal ± 0.05
4. Dimension b applies to the metallized terminal and is measured
between 0.15mm and 0.30mm from the terminal tip.
5. Tiebar shown (if present) is a non-functional feature.
6. The configuration of the pin #1 identifier is optional, but must be
located within the zone indicated. The pin #1 indentifier may be
either a mold or mark feature.
17
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