DATASHEET

ISL43143, ISL43144, ISL43145
Data Sheet
August 31, 2015
Low-Voltage, Single and Dual Supply,
Quad SPST, High Performance Analog
Switches
Features
The Intersil ISL43143–ISL43145 devices are CMOS,
precision, quad SPST analog switches designed to operate
from a single +2V to +12V supply or from a 2V to 6V supply.
Targeted applications include battery powered equipment that
benefit from the devices’ low power consumption (<1W), low
leakage currents (5nA max), and fast switching speeds
(tON = 52ns, tOFF = 40ns). A 5 maximum RON flatness
ensures signal fidelity, while channel-to-channel mismatch is
guaranteed to be less than 2.
• Four Separately Controlled SPST Switches
The ISL43143/ISL43144/ISL43145 are quad single-pole/
single-throw (SPST) devices. The ISL43143 has four normally
closed (NC) switches; the ISL43144 has four normally open
(NO) switches; the ISL43145 has two NO and two NC
switches and can be used as a dual SPDT, or a dual 2:1
multiplexer.
Table 1 summarizes the performance of this family.
Configuration
4.5V RON
4.5V tON/tOFF
10.8V RON
10.8V tON/tOFF
4.5V RON
4.5V tON/tOFF
3V RON
3V tON/tOFF
Packages
ISL43143
ISL43144
ISL43145
4
4
4
All NC
All NO
2 NC/2 NO
18
18
18
52ns/40ns
52ns/40ns
52ns/40ns
14
14
14
40ns/27ns
40ns/27ns
40ns/27ns
30
30
30
64ns/29ns
64ns/29ns
64ns/29ns
51
51
51
120ns/50ns
120ns/50ns
120ns/50ns
16 Ld TSSOP, 16Ld QFN 4x4
• Fully Specified for 10% Tolerances at VS = 5V and
V+ = 12V, 5V and 3.3V
• Pin Compatible with DG411/DG412/DG413
• ON Resistance (RON Max.) . . . . . . . . . . . . . . . . . . . . 25
• RON Matching Between Channels. . . . . . . . . . . . . . . . . . <1
• Low Power Consumption (PD) . . . . . . . . . . . . . . . . . . . .<1W
• Low Off Leakage Current (Max at 85°C) . . . . . . . . . 2.5nA
• Fast Switching Action
- tON . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52ns
- tOFF . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40ns
• Minimum 2000V ESD Protection per Method 3015.7
• TTL, CMOS Compatible
• Pb-Free Plus Anneal Available (RoHS Compliant)
Applications
TABLE 1. FEATURES AT A GLANCE
Number of Switches
FN6037.4
• Battery Powered, Handheld, and Portable Equipment
- Barcode Scanners
- Laptops, Notebooks, Palmtops
• Communications Systems
- Radios
- XDSL and PBX / PABX
- RF “Tee” Switches
- Base Stations
• Test Equipment
- Medical Ultrasound
- Electrocardiograph
- ATE
• Audio and Video Switching
• General Purpose Circuits
- +3V/+5V DACs and ADCs
- Digital Filters
- Operational Amplifier Gain Switching Networks
- High Frequency Analog Switching
- High Speed Multiplexing
Related Literature
• Technical Brief TB363 “Guidelines for Handling and
Processing Moisture Sensitive Surface Mount Devices
(SMDs)”
• AN557 “Recommended Test Procedures for Analog
Switches”
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas LLC. 2003-2005, 2015. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.,
ISL43143, ISL43144, ISL43145
(Note 1)
15 COM2
14 NC2
NC1 3
13 V+
V- 4
IN2
COM2
16 IN2
IN1 1
COM1 2
IN1
ISL43143 (QFN)
TOP VIEW
COM1
ISL43143 (TSSOP)
TOP VIEW
16
15
14
13
NC1
1
12 NC2
V-
2
11 V+
10 N.C.
NC4 6
11 NC3
NC4
4
9
10 COM3
9 IN3
15 NO2
14 COM2
COM1 3
13 V+
V- 4
GND 5
12 N.C.
11 COM3
COM4 6
10 NO3
IN4 8
9 IN3
16
15
14
13
COM1
1
12 COM2
V-
2
11 V+
GND
3
10 N.C.
COM4
4
9
5
NO4
NO4 7
ISL43144 (QFN)
TOP VIEW
NO2
NO1 2
8
14 NC2
13 V+
V- 4
8
IN1
IN2
COM2
15 COM2
COM1 3
7
COM3
ISL43145 (QFN)
TOP VIEW
16 IN2
NO1 2
6
NO1
ISL43145 (TSSOP)
TOP VIEW
IN1 1
NC3
NO3
16 IN2
7
IN3
IN1 1
6
IN2
ISL43144 (TSSOP)
TOP VIEW
5
IN1
IN4 8
IN4
COM4 7
COM3
3
IN3
GND
IN4
12 N.C.
COM4
GND 5
NO1
Pinouts
16
15
14
13
COM1
1
12 NC2
V-
2
11 V+
10 N.C.
COM4
4
9
10 COM3
NO4 7
9 IN3
IN4 8
5
6
7
8
COM3
3
IN3
GND
11 NC3
IN4
12 N.C.
NO4
GND 5
COM4 6
NC3
NOTE:
1. Switches Shown for Logic “0” Input.
2
FN6037.4
August 31, 2015
ISL43143, ISL43144, ISL43145
Truth Table
Ordering Information
ISL43143
ISL43144
LOGIC
SW 1, 2, 3, 4
SW 1, 2, 3, 4
SW 1, 4
SW 2, 3
0
ON
OFF
OFF
ON
1
OFF
ON
ON
OFF
NOTE:
ISL43145
Logic “0”  0.8V. Logic “1” 2.4V.
Pin Descriptions
PIN
FUNCTION
V+
Positive Power Supply Input
V-
Negative Power Supply Input. Connect to GND
for Single Supply Configurations.
GND
Ground Connection
IN
Digital Control Input
COM
Analog Switch Common Pin
NO
Analog Switch Normally Open Pin
NC
Analog Switch Normally Closed Pin
N.C.
No Internal Connection
PART NO. *
PART
MARKING
TEMP.
RANGE
(°C)
PACKAGE
PKG.
DWG. #
ISL43143IV
(No longer
available or
supported)
43143IV
-40 to 85 16 Ld TSSOP M16.173
ISL43143IVZ
(Note 2)
43143IVZ
-40 to 85 16 Ld TSSOP M16.173
(Pb-free)
ISL43143IR
(No longer
available or
supported)
43143IR
-40 to 85 16 Ld QFN
L16.4x4
ISL43143IRZ
(Note 2) (No
longer available
or supported)
43143IRZ
-40 to 85 16 Ld QFN
(Pb-free)
L16.4x4
ISL43144IV (No 43144IV
longer available
or supported)
-40 to 85 16 Ld TSSOP M16.173
ISL43144IVZ
(Note 2)
-40 to 85 16 Ld TSSOP M16.173
(Pb-free)
43144IVZ
ISL43144IR (No 43144IR
longer available
or supported)
-40 to 85 16 Ld QFN
L16.4x4
43144IRZ
ISL43144IRZ
(Note 2) (No
longer available,
recommended
replacement:
ISL43120IHZ-T)
-40 to 85 16 Ld QFN
(Pb-free)
L16.4x4
ISL43145IV (No 43145IV
longer available
or supported)
-40 to 85 16 Ld TSSOP M16.173
ISL43145IVZ
(Note 2)
-40 to 85 16 Ld TSSOP M16.173
(Pb-free)
43145IVZ
ISL43145IR (No 43145IR
longer available
or supported)
ISL43145IRZ
(Note 2) (No
longer available
or supported)
43145IRZ
-40 to 85 16 Ld QFN
L16.4x4
-40 to 85 16 Ld QFN
(Pb-free)
L16.4x4
*Most surface mount devices are available on tape and reel; add “-T”
to suffix.
NOTE:
2. Intersil Pb-free plus anneal products employ special Pb-free
material sets; molding compounds/die attach materials and
100% matte tin plate termination finish, which are RoHS
compliant and compatible with both SnPb and Pb-free soldering
operations. Intersil Pb-free products are MSL classified at
Pb-free peak reflow temperatures that meet or exceed the
Pb-free requirements of IPC/JEDEC J STD-020.
3
FN6037.4
August 31, 2015
ISL43143, ISL43144, ISL43145
Absolute Maximum Ratings
Thermal Information
V+ to V- . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 to15V
V+ to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 to15V
V- to GND. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -15 to 0.3V
All Other Pins (Note 3) . . . . . . . . . . . . . ((V-) - 0.3V) to ((V+) + 0.3V)
Continuous Current (Any Terminal) . . . . . . . . . . . . . . . . . . . . . 30mA
Peak Current, IN, NO, NC, or COM
(Pulsed 1ms, 10% Duty Cycle, Max) . . . . . . . . . . . . . . . . . 100mA
ESD Rating (Per MIL-STD-883 Method 3015). . . . . . . . . . . . . .>2kV
Thermal Resistance (Typical)
Operating Conditions
JA (°C/W)
16 Ld TSSOP Package (Note 4) . . . . . . . . . . . . . . .
150
16 Ld QFN Package (Note 5). . . . . . . . . . . . . . . . . .
75
Maximum Junction Temperature (Plastic Package). . . . . . . . 150°C
Moisture Sensitivity (See Technical Brief TB363)
All Packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Level 1
Maximum Storage Temperature Range . . . . . . . . . . . . . -65°C to 150°C
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300°C
(TSSOP - Lead Tips Only)
Temperature Range
ISL4314XIX . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -40°C to 85°C
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES:
3. Signals on NC, NO, COM, or IN exceeding V+ or V- are clamped by internal diodes. Limit forward diode current to maximum current ratings.
4. JA is measured with the component mounted on a low effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
5. JA is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach” features. See
Tech Brief TB379 and Tech Brief TB389.
Electrical Specifications: 5V Supply Test Conditions: VSUPPLY = 4.5V to 5.5V, GND = 0V, VINH = 2.4V, VINL = 0.8V (Note 5),
Unless Otherwise Specified
PARAMETER
TEST CONDITIONS
TEMP
(°C)
(NOTE 6)
MIN
Full
V-
-
V+
V
25
-
18
25

TYP
(NOTE 6)
MAX
UNITS
ANALOG SWITCH CHARACTERISTICS
Analog Signal Range, VANALOG
ON Resistance, RON
VS = 4.5V, ICOM = 10mA, VNO or VNC = 3.5V,
See Figure 5
Full
-
-
30

RON Matching Between Channels,
RON
VS = 4.5V, ICOM = 10mA, VNO or VNC = 3V
25
-
0.5
2

Full
-
-
4

RON Flatness, RFLAT(ON)
VS = 4.5V, ICOM = 10mA, VNO or VNC = 0V, 3V,
Note 8

NO or NC OFF Leakage Current,
INO(OFF) or INC(OFF)
VS = 5.5V, VCOM = 4.5V, VNO or VNC = +4.5V,
Note 7
COM OFF Leakage Current,
ICOM(OFF)
VS = 5.5V, VCOM = 4.5V, VNO or VNC = +4.5V,
Note 7
COM ON Leakage Current,
ICOM(ON)
VS = 5.5V, VCOM = VNO or VNC = 4.5V, Note 7
25
-
-
5
Full
-
-
5

25
-0.1
-
0.1
nA
Full
-2.5
-
2.5
nA
25
-0.1
-
0.1
nA
Full
-2.5
-
2.5
nA
25
-0.2
-
0.2
nA
Full
-5
-
5
nA
Input Voltage High, VINH
Full
2.4
1.6
-
V
Input Voltage Low, VINL
Full
-
1.5
0.8
V
VS = 5.5V, VIN = 0V or V+
Full
-1
-
1
A
VS = 4.5V, VNO or VNC = 3V, RL = 300, CL = 35pF,
VIN = 0 to 3V, See Figure 1
25
-
52
65
ns
Full
-
-
75
ns
25
-
40
50
ns
DIGITAL INPUT CHARACTERISTICS
Input Current, IINH, IINL
DYNAMIC CHARACTERISTICS
Turn-ON Time, tON
Turn-OFF Time, tOFF
VS = 4.5V, VNO or VNC = 3V, RL = 300, CL = 35pF,
VIN = 0 to 3V, See Figure 1
Break-Before-Make Time Delay
(ISL43145 only), tD
VS = 5.5V, VNO or VNC = 3V, RL = 300, CL = 35pF,
VIN = 0 to 3V, See Figure 3
Charge Injection, Q
CL = 1.0nF, VG = 0V, RG = 0, See Figure 2
NO or NC OFF Capacitance, COFF f = 1MHz, VNO or VNC = VCOM = 0V, See Figure 7
4
Full
-
-
55
ns
Full
5
19
-
ns
25
-
-
5
pC
25
-
10
-
pF
FN6037.4
August 31, 2015
ISL43143, ISL43144, ISL43145
Electrical Specifications: 5V Supply Test Conditions: VSUPPLY = 4.5V to 5.5V, GND = 0V, VINH = 2.4V, VINL = 0.8V (Note 5),
Unless Otherwise Specified (Continued)
PARAMETER
TEST CONDITIONS
TEMP
(°C)
(NOTE 6)
MIN
TYP
(NOTE 6)
MAX
UNITS
COM OFF Capacitance,
CCOM(OFF)
f = 1MHz, VNO or VNC = VCOM = 0V, See Figure 7
25
-
26
-
pF
COM ON Capacitance, CCOM(ON)
f = 1MHz, VNO or VNC = VCOM = 0V, See Figure 7
25
-
34
-
pF
OFF Isolation
RL = 50, CL = 15pF, f = 1MHz,
VNO or VNC = 1VRMS, See Figures 4 and 6
25
-
71
-
dB
Crosstalk, Note 9
25
-
-89
-
dB
Power Supply Rejection Ratio
RL = 50, CL = 5pF, f = 1MHz
25
-
58
-
dB
Full
2
-
6
V
POWER SUPPLY CHARACTERISTICS
Power Supply Range
VS = 5.5V, VIN = 0V or V+, Switch On or Off
Positive Supply Current, I+
Negative Supply Current, I-
25
-1
0.01
1
A
Full
-1
-
1
A
25
-1
0.01
1
A
Full
-1
-
1
A
NOTES:
6. VIN = Input voltage to perform proper function.
7. The algebraic convention, whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet.
8. Leakage parameter is 100% tested at high temp, and guaranteed by correlation at 25°C.
9. Flatness is defined as the delta between the maximum and minimum RON values over the specified voltage range.
10. Between any two switches.
Electrical Specifications: 5V Supply
PARAMETER
Test Conditions: V+ = +4.5V to +5.5V, V- = GND = 0V, VINH = 2.4V, VINL = 0.8V (Note 5),
Unless Otherwise Specified
TEST CONDITIONS
TEMP
(°C)
MIN
(NOTE 6)
Full
0
-
V+
V
25
-
30
40

TYP
MAX
(NOTE 6) UNITS
ANALOG SWITCH CHARACTERISTICS
Analog Signal Range, VANALOG
ON Resistance, RON
V+ = 4.5V, ICOM = 1.0mA, VNO or VNC = 3.5V,
See Figure 5
Full
-
-
50

RON Matching Between Channels,
RON
V+ = 4.5V, ICOM = 1.0mA, VNO or VNC = 3V
25
-
0.5
3

Full
-
-
4

RON Flatness, RFLAT(ON)
V+ = 5.5V, ICOM = 1.0mA, VNO or VNC = 1V, 2V, 3V,
Note 8
25
-
4.4
6

Full
-
-
8

NO or NC OFF Leakage Current,
INO(OFF) or INC(OFF)
V+ = 5.5V, VCOM = 1V, 4.5V, VNO or VNC = 4.5V, 1V,
Note 7
25
-0.1
-
0.1
nA
Full
-2.5
-
2.5
nA
COM OFF Leakage Current,
ICOM(OFF)
V+ = 5.5V, VCOM = 1V, 4.5V, VNO or VNC = 4.5V, 1V,
Note 7
25
-0.1
-
0.1
nA
Full
-2.5
-
2.5
nA
COM ON Leakage Current,
ICOM(ON)
V+ = 5.5V, VCOM = VNO or VNC = 1V, 4.5V, Note 7
25
-0.2
-
0.2
nA
Full
-5
-
5
nA
Full
2.4
1.5
-
V
DIGITAL INPUT CHARACTERISTICS
Input Voltage High, VINH
Input Voltage Low, VINL
Input Current, IINH, IINL
Full
-
1.4
0.8
V
V+ = 5.5V, VIN = 0V or V+
Full
-1
-
1
A
V+ = 4.5V, VNO or VNC = 3V, RL = 300, CL = 35pF,
VIN = 0 to 3V, See Figure 1
25
-
64
80
ns
Full
-
-
90
ns
25
-
29
40
ns
DYNAMIC CHARACTERISTICS
Turn-ON Time, tON
Turn-OFF Time, tOFF
V+ = 4.5V, VNO or VNC = 3V, RL = 300, CL = 35pF,
VIN = 0 to 3V, See Figure 1
Break-Before-Make Time Delay
(ISL43145 only), tD
V+ = 5.5V, VNO or VNC = 3V, RL = 300, CL = 35pF,
VIN = 0 to 3V, See Figure 3
5
Full
-
-
45
ns
Full
15
39
-
ns
FN6037.4
August 31, 2015
ISL43143, ISL43144, ISL43145
Electrical Specifications: 5V Supply
Test Conditions: V+ = +4.5V to +5.5V, V- = GND = 0V, VINH = 2.4V, VINL = 0.8V (Note 5),
Unless Otherwise Specified (Continued)
TEMP
(°C)
MIN
(NOTE 6)
TYP
25
-
1.2
2
pC
NO or NC OFF Capacitance, COFF f = 1MHz, VNO or VNC = VCOM = 0V, See Figure 7
25
-
10
-
pF
COM OFF Capacitance,
CCOM(OFF)
f = 1MHz, VNO or VNC = VCOM = 0V, See Figure 7
25
-
26
-
pF
COM ON Capacitance, CCOM(ON)
f = 1MHz, VNO or VNC = VCOM = 0V, See Figure 7
25
-
34
-
pF
OFF Isolation
25
-
71
-
dB
Crosstalk, Note 9
RL = 50, CL = 15pF, f = 1MHz,
VNO or VNC = 1VRMS, See Figures 4 and 6
25
-
-89
-
dB
Power Supply Rejection Ratio
RL = 50, CL = 5pF, f = 1MHz
25
-
58
-
dB
PARAMETER
TEST CONDITIONS
Charge Injection, Q
CL = 1.0nF, VG = 0V, RG = 0See Figure 2
MAX
(NOTE 6) UNITS
POWER SUPPLY CHARACTERISTICS
Positive Supply Current, I+
V+ = 5.5V, VIN = 0V or V+, Switch On or Off
Negative Supply Current, I-
Electrical Specifications: 3.3V Supply
PARAMETER
25
-1
0.01
1
A
Full
-1
-
1
A
25
-1
0.01
1
A
Full
-1
-
1
A
Test Conditions: V+ = +3.0V to +3.6V, V- = GND = 0V, VINH = 2.4V, VINL = 0.8V (Note 5),
Unless Otherwise Specified
TEST CONDITIONS
TEMP
(°C)
MIN
(NOTE 6)
TYP
MAX
(NOTE 6) UNITS
Full
0
-
V+
V
ANALOG SWITCH CHARACTERISTICS
Analog Signal Range, VANALOG
V+ = 3V, ICOM = 1.0mA, VNO or VNC = 1.5V
See Figure 5
25
-
51
60

Full
-
-
70

RON Matching Between Channels,
RON
V+ = 3V, ICOM = 1.0mA, VNO or VNC = 1.5V
25
-
0.5
3

Full
-
-
4

RON Flatness, RFLAT(ON)
V+ = 3V, ICOM = 1.0mA, VNO or VNC = 0.5V, 1.5V,
Note 8

ON Resistance, RON
25
-
12
17
Full
-
-
17

NO or NC OFF Leakage Current,
INO(OFF) or INC(OFF)
V+ = 3.6V, VCOM = 1V, 3V, VNO or VNC = 3V, 1V,
Note 7
25
-0.1
-
0.1
nA
Full
-2.5
-
2.5
nA
COM OFF Leakage Current,
ICOM(OFF)
V+ = 3.6V, VCOM = 1V, 3V, VNO or VNC = 3V, 1V,
Note 7
25
-0.1
-
0.1
nA
Full
-2.5
-
2.5
nA
COM ON Leakage Current,
ICOM(ON)
V+ = 3.6V, VCOM = VNO or VNC = 1V, 3V, Note 7
25
-0.2
-
0.2
nA
Full
-5
-
5
nA
Input Voltage High, VINH
Full
2.4
1.0
-
V
Input Voltage Low, VINL
Full
-
0.9
0.8
V
V+ = 3.6V, VIN = 0V or V+
Full
-1
-
1
A
V+ = 3.0V, VNO or VNC = 1.5V, RL = 300, CL = 35pF,
VIN = 0 to 3V, See Figure 1
25
-
120
138
ns
Full
-
-
160
ns
25
-
50
60
ns
DIGITAL INPUT CHARACTERISTICS
Input Current, IINH, IINL
DYNAMIC CHARACTERISTICS
Turn-ON Time, tON
Turn-OFF Time, tOFF
V+ = 3.0V, VNO or VNC = 1.5V, RL = 300, CL = 35pF,
VIN = 0 to 3V, See Figure 1
Full
-
-
65
ns
Break-Before-Make Time Delay
(ISL43145 only), tD
V+ = 3.6V, VNO or VNC = 1.5V, RL = 300, CL = 35pF,
VIN = 0 to 3V, See Figure 3
Full
30
60
-
ns
Charge Injection, Q
CL = 1.0nF, VG = 0V, RG = 0See Figure 2
25
-
1
2
pC
NO or NC OFF Capacitance, COFF f = 1MHz, VNO or VNC = VCOM = 0V, See Figure 7
25
-
10
-
pF
COM OFF Capacitance,
CCOM(OFF)
f = 1MHz, VNO or VNC = VCOM = 0V, See Figure 7
25
-
26
-
pF
COM ON Capacitance, CCOM(ON)
f = 1MHz, VNO or VNC = VCOM = 0V, See Figure 7
25
-
34
-
pF
6
FN6037.4
August 31, 2015
ISL43143, ISL43144, ISL43145
Electrical Specifications: 3.3V Supply
PARAMETER
Test Conditions: V+ = +3.0V to +3.6V, V- = GND = 0V, VINH = 2.4V, VINL = 0.8V (Note 5),
Unless Otherwise Specified (Continued)
TEST CONDITIONS
OFF Isolation
TEMP
(°C)
MIN
(NOTE 6)
TYP
MAX
(NOTE 6) UNITS
RL = 50, CL = 15pF, f = 1MHz,
VNO or VNC = 1VRMS, See Figures 4 and 6
25
-
71
-
dB
Crosstalk, Note 9
25
-
-89
-
dB
Power Supply Rejection Ratio
RL = 50, CL = 5pF, f = 1MHz
25
-
58
-
dB
POWER SUPPLY CHARACTERISTICS
V+ = 3.6V, VIN = 0V or V+, Switch On or Off
Positive Supply Current, I+
Negative Supply Current, I-
Electrical Specifications: 12V Supply
PARAMETER
25
-1
0.01
1
A
Full
-1
-
1
A
25
-1
0.01
1
A
Full
-1
-
1
A
Test Conditions: V+ = +10.8V to +13.2V, V- = GND = 0V, VINH = 3.0V, VINL = 0.8V
(Note 5), Unless Otherwise Specified
TEST CONDITIONS
TEMP
(°C)
MIN
(NOTE 6)
Full
0
-
V+
V
25
-
14
20

Full
-
-
30


TYP
MAX
(NOTE 6) UNITS
ANALOG SWITCH CHARACTERISTICS
Analog Signal Range, VANALOG
ON Resistance, RON
V+ = 10.8V, ICOM = 1.0mA, VNO or VNC = 9V
See Figure 5
RON Matching Between Channels,
RON
V+ = 10.8V, ICOM = 1.0mA, VNO or VNC = 9V
RON Flatness, RFLAT(ON)
V+ = 13.2V, ICOM = 1.0mA, VNO or VNC = 3V, 6V, 9V,
Note 8
NO or NC OFF Leakage Current,
INO(OFF) or INC(OFF)
V+ = 13V, VCOM = 1V, 12V, VNO or VNC = 12V, 1V,
Note 7
COM OFF Leakage Current,
ICOM(OFF)
V+ = 13V, VCOM = 1V, 12V, VNO or VNC = 12V, 1V,
Note 7
COM ON Leakage Current,
ICOM(ON)
V+ = 13V, VCOM = VNO or VNC = 1V, 12V, Note 7
25
-
0.3
2
Full
-
-
4

25
-
1.7
2

Full
-
-
3

25
-0.1
-
0.1
nA
Full
-2.5
-
2.5
nA
25
-0.1
-
0.1
nA
Full
-2.5
-
2.5
nA
25
-0.2
-
0.2
nA
Full
-5
-
5
nA
Input Voltage High, VINH
Full
3.2
2.8
-
V
Input Voltage Low, VINL
Full
-
2.2
0.8
V
V+ = 13V, VIN = 0V or V+
Full
-1
-
1
A
Turn-ON Time, tON
V+ = 10.8V, VNO or VNC = 10V, RL = 300, CL = 35pF,
VIN = 0 to 3V, See Figure 1
25
-
40
50
ns
Turn-OFF Time, tOFF
V+ = 10.8V, VNO or VNC = 10V, RL = 300, CL = 35pF,
VIN = 0 to 3V, See Figure 1
DIGITAL INPUT CHARACTERISTICS
Input Current, IINH, IINL
DYNAMIC CHARACTERISTICS
Full
-
-
83
ns
25
-
27
35
ns
Full
-
-
40
ns
Break-Before-Make Time Delay
(ISL43145 only), tD
V+ = 13.2V, VNO or VNC = 10V, RL = 300, CL = 35pF,
VIN = 0 to 3V, See Figure 3
Full
5
20
-
ns
Charge Injection, Q
CL = 1.0nF, VG = 0V, RG = 0See Figure 2
25
-
12
14
pC
NO or NC OFF Capacitance, COFF f = 1MHz, VNO or VNC = VCOM = 0V, See Figure 7
25
-
10
-
pF
COM OFF Capacitance,
CCOM(OFF)
f = 1MHz, VNO or VNC = VCOM = 0V, See Figure 7
25
-
26
-
pF
COM ON Capacitance, CCOM(ON)
f = 1MHz, VNO or VNC = VCOM = 0V, See Figure 7
25
-
34
-
pF
OFF Isolation
RL = 50, CL = 15pF, f = 1MHz,
VNO or VNC = 1VRMS, See Figures 4 and 6
25
-
71
-
dB
Crosstalk, Note 9
25
-
-89
-
dB
Power Supply Rejection Ratio
RL = 50, CL = 5pF, f = 1MHz
25
-
58
-
dB
7
FN6037.4
August 31, 2015
ISL43143, ISL43144, ISL43145
Electrical Specifications: 12V Supply
Test Conditions: V+ = +10.8V to +13.2V, V- = GND = 0V, VINH = 3.0V, VINL = 0.8V
(Note 5), Unless Otherwise Specified (Continued)
PARAMETER
TEST CONDITIONS
TEMP
(°C)
MIN
(NOTE 6)
TYP
MAX
(NOTE 6) UNITS
POWER SUPPLY CHARACTERISTICS
Positive Supply Current, I+
V+ = 13V, VIN = 0V or V+, Switch On or Off
A
25
-1
0.01
1
Full
-1
-
1
A
25
-1
0.01
1
A
Full
-1
-
1
A
Negative Supply Current, I-
Test Circuits and Waveforms
3V
LOGIC
INPUT
V+
tr < 20ns
tf < 20ns
50%
0V
C
SWITCH
INPUT
tOFF
COM
VOUT
IN
90%
SWITCH
OUTPUT
VOUT
NO or NC
VNX
SWITCH VNX
INPUT
C
90%
0V
LOGIC
INPUT
tON
C
V-
Logic input waveform is inverted for switches that have the opposite
logic sense.
CL
35pF
RL
300
GND
Repeat test for all switches. CL includes fixture and stray
capacitance.
RL
V OUT = V (NO or NC) -----------------------------R L + R  ON 
FIGURE 1B. TEST CIRCUIT
FIGURE 1A. MEASUREMENT POINTS
FIGURE 1. SWITCHING TIMES
V+
SWITCH
OUTPUT
VOUT
VOUT
RG
C
VOUT
NO or NC
COM
3V
LOGIC
INPUT
ON
ON
OFF
0V
VG
GND
C
Q = VOUT x CL
Logic input waveform is inverted for switches that have the opposite
logic sense.
FIGURE 2A. MEASUREMENT POINTS
V-
IN
CL
LOGIC
INPUT
Repeat test for all switches. CL includes fixture and stray
capacitance.
FIGURE 2B. TEST CIRCUIT
FIGURE 2. CHARGE INJECTION
8
FN6037.4
August 31, 2015
ISL43143, ISL43144, ISL43145
Test Circuits and Waveforms (Continued)
V+
3V
C
C
LOGIC
INPUT
0V
VOUT1
NO1
VNX
COM1
VOUT2 RL1
300
NC2
90%
90%
SWITCH
OUTPUT
VOUT1
COM2
IN1
RL2
300
0V
IN2
90%
SWITCH
OUTPUT
VOUT2
0V
90%
LOGIC
INPUT
CL2
35pF
GND
tD
tD
CL1
35pF
C
V-
CL includes fixture and stray capacitance.
Reconfigure accordingly to test SW3 and SW4.
FIGURE 3B. TEST CIRCUIT
FIGURE 3A. MEASUREMENT POINTS
FIGURE 3. BREAK-BEFORE-MAKE TIME (ISL43145 ONLY)
V+
V+
C
C
RON = V1/1mA
SIGNAL
GENERATOR
NO or NC
NO or NC
VNX
0V or 2.4V
IN
1mA
COM
ANALYZER
0.8V or 2.4V
IN
V1
COM
GND
GND
RL
C
V-
C
V-
Repeat test for all switches.
Repeat test for all switches.
FIGURE 4. OFF ISOLATION TEST CIRCUIT
FIGURE 5. RON TEST CIRCUIT
V+
V+
C
SIGNAL
GENERATOR
NO1 or NC1
50
COM1
NO or NC
IN2
IN
0V or 2.4V
IN2 0V or 2.4V
COM2
ANALYZER
NO
CONNECTION
NO2 or NC2
GND
0V or 2.4V
IMPEDANCE
ANALYZER
COM
GND
RL
V-
C
FIGURE 6. CROSSTALK TEST CIRCUIT
9
V-
FIGURE 7. CAPACITANCE TEST CIRCUIT
FN6037.4
August 31, 2015
ISL43143, ISL43144, ISL43145
Detailed Description
Power-Supply Considerations
The ISL43143–ISL43145 quad analog switches offer precise
switching capability from a bipolar 2V to 6V or a single 2V
to 12V supply with low on-resistance (18) and high speed
switching (tON = 52ns, tOFF = 40ns). The devices are
especially well suited for portable battery powered
equipment thanks to the low operating supply voltage (2V),
low power consumption (1W), low leakage currents (5nA
max). High frequency applications also benefit from the wide
bandwidth, and the very high OFF isolation and crosstalk
rejection.
The ISL4314X construction is typical of most CMOS analog
switches, in that they have three supply pins: V+, V-, and
GND. V+ and V- drive the internal CMOS switches and set
their analog voltage limits, so there are no connections
between the analog signal path and GND. Unlike switches
with a 13V maximum supply voltage, the ISL4314X 15V
maximum supply voltage provides plenty of room for the
10% tolerance of 12V supplies (6V or 12V single supply),
as well as room for overshoot and noise spikes.
Supply Sequencing And Overvoltage Protection
As with any CMOS device, proper power supply sequencing
is required to protect the device from excessive input
currents which might permanently damage the IC. All I/O
pins contain ESD protection diodes from the pin to V+ and to
V- (see Figure 8). To prevent forward biasing these diodes,
V+ and V- must be applied before any input signals, and
input signal voltages must remain between V+ and V-. If
these conditions cannot be guaranteed, then one of the
following two protection methods should be employed.
Logic inputs can easily be protected by adding a 1k
resistor in series with the input (see Figure 8). The resistor
limits the input current below the threshold that produces
permanent damage, and the sub-microamp input current
produces an insignificant voltage drop during normal
operation.
Adding a series resistor to the switch input defeats the
purpose of using a low RON switch, so two small signal
diodes can be added in series with the supply pins to provide
overvoltage protection for all pins (see Figure 8). These
additional diodes limit the analog signal from 1V below V+ to
1V above V-. The low leakage current performance is
unaffected by this approach, but the switch resistance may
increase, especially at low supply voltages.
OPTIONAL PROTECTION
DIODE
V+
OPTIONAL
PROTECTION
RESISTOR
INX
This family of switches performs equally well when operated
with bipolar or single voltage supplies, and bipolar supplies
need not be symmetrical. The minimum recommended
supply voltage is 2V or 2V. It is important to note that the
input signal range, switching times, and ON-resistance
degrade at lower supply voltages. Refer to the electrical
specification tables and Typical Performance Curves for
details.
V+ and GND power the internal logic (thus setting the digital
switching point) and level shifters. The level shifters convert
the logic levels to switched V+ and V- signals to drive the
analog switch gate terminals, so switch parameters especially RON - are strong functions of both supplies.
Logic-Level Thresholds
V+ and GND power the internal logic stages, so V- has no
affect on logic thresholds. This switch family is TTL
compatible (0.8V and 2.4V) over a V+ supply range of 2.5V
to 10V (see Figure 17). At 12V the VIH level is about 2.8V, so
for best results use a logic family the provides a VOH greater
than 3V.
The digital input stages draw supply current whenever the
digital input voltage is not at one of the supply rails (see
Figure 18). Driving the digital input signals from GND to V+
with a fast transition time minimizes power dissipation. The
ISL43143-ISL43145 switches have been designed to
minimize the supply current whenever the digital input
voltage is not driven to the supply rails (0V to V+). For
example driving the device with 3V logic while operating with
dual or single 5V supplies the device draws only 10A of
current (see Figure 18 for VIN = 3V). Similiar devices of
competitors can draw 8 times this amount of current.
High-Frequency Performance
VNO or NC
VCOM
In 5systems, signal response is reasonably flat even past
200MHz (see Figure 19). Figure 19 also illustrates that the
frequency response is very consistent over a wide V+ range,
and for varying analog signal levels.
OPTIONAL PROTECTION
DIODE
An off switch acts like a capacitor and passes higher
frequencies with less attenuation, resulting in signal
feedthrough from a switch’s input to its output. OFF Isolation
is the resistance to this feedthrough, while Crosstalk
indicates the amount of feedthrough from one switch to
another. Figure 20 details the high OFF Isolation and
V-
FIGURE 8. OVERVOLTAGE PROTECTION
10
FN6037.4
August 31, 2015
ISL43143, ISL43144, ISL43145
Crosstalk rejection provided by this family. At 10MHz, OFF
isolation is about 50dB in 5systems, decreasing
approximately 20dB per decade as frequency increases.
Higher load impedances decrease OFF Isolation and
Crosstalk rejection due to the voltage divider action of the
switch OFF impedance and the load impedance.
Leakage Considerations
Reverse ESD protection diodes are internally connected
between each analog-signal pin and both V+ and V-. One
of these diodes conducts if any analog signal exceeds V+
or V-.
Virtually all the analog leakage current comes from the ESD
diodes to V+ or V-. Although the ESD diodes on a given
signal pin are identical and therefore fairly well balanced,
they are reverse biased differently. Each is biased by either
V+ or V- and the analog signal. This means their leakages
will vary as the signal varies. The difference in the two diode
leakages to the V+ and V- pins constitutes the analog-signalpath leakage current. All analog leakage current flows
between each pin and one of the supply terminals, not to the
other switch terminal. This is why both sides of a given
switch can show leakage currents of the same or opposite
polarity. There is no connection between the analog signal
paths and GND.
Typical Performance Curves TA = 25°C, Unless Otherwise Specified
25
20
70
VCOM = (V+) - 1V
ICOM = 1mA
25°C
-40°C
V- = 0V
25°C
-40°C
3
4
5
6
7
8
V+ (V)
9
10
11
12
13
45
85°C
25
25°C
20
-40°C
15
20
18
16
14
12
10
8
85°C
V+ = 5V
V- = 0V
V+ = 12V
25°C
V- = 0V
-40°C
0
1
2
3
4
5
6
7
VCOM (V)
8
25°C
25
11
12
10
V+ = 12V
-40°C
20
35
VS =3V
85°C
25
25°C
20
10
25
VS =5V
85°C
VS =5V
V+ = 3V
0
-40°C
15
V+ = 5V
5
Q (pC)
30
25°C
10
85°C
30
20
9
15
VS =2V
ICOM = 1mA
35
RON ()
-40°C
FIGURE 10. ON RESISTANCE vs SWITCH VOLTAGE
FIGURE 9. ON RESISTANCE vs POSITIVE SUPPLY VOLTAGE
40
25°C
30
30
85°C
2
40
ICOM = 1mA
V- = 0V
20
35
V- = -3V
85°C
85°C
50
25°C
-40°C
V+ = 3V
60
RON ()
RON ()
15
10
35
30
25
20
15
10
200
150
125
100
75
50
25
0
V- = -5V
85°C
-5
15
-40°C
10
-10
5
-5
-4
-3
-2
-1
0
1
2
3
4
VCOM (V)
FIGURE 11. ON RESISTANCE vs SWITCH VOLTAGE
11
5
-5
-2.5
0
2.5
5
VCOM (V)
7.5
10
12.5
FIGURE 12. CHARGE INJECTION vs SWITCH VOLTAGE
FN6037.4
August 31, 2015
ISL43143, ISL43144, ISL43145
Typical Performance Curves TA = 25°C, Unless Otherwise Specified (Continued)
300
50
VCOM = (V+) - 1V
VCOM = (V+) - 1V
V- = 0V
250
V- = 0V
40
tOFF (ns)
tON (ns)
200
85°C
150
25°C
85°C
30
25°C
100
20
-40°C
50
0
2
3
4
5
6
7
8
9
10
11
10
12
-40°C
2
3
4
5
6
7
V+ (V)
FIGURE 13. TURN - ON TIME vs POSITIVE SUPPLY VOLTAGE
200
-40°C
100
25°C
25°C
100
12
25°C
50
tOFF (ns)
85°C
-40°C
0
250
V- = -3V
200
V- = -3V
-40°C
150
25°C
25°C
100
85°C
50
50
-40°C
2
0
300
200
150
0
-40°C
250
-40°C
100
3
VCOM = (V+) - 1V
V- = -5V
85°C
50
tON (ns)
11
25°C
150
4
5
6
7
V+ (V)
8
9
10
11
85°C
0
12
FIGURE 15. TURN - ON TIME vs POSITIVE SUPPLY VOLTAGE
2
3
4
5
6
7
V+ (V)
8
9
10
11
12
FIGURE 16. TURN - OFF TIME vs POSITIVE SUPPLY VOLTAGE
70
VINH
V- = -5V to 0V
V+ = +5V
-40°C
25°C
2.0
60
85°C
1.5
50
1.0
V- = 0V to -5V
0.5
3.0
I+CC (A)
VINH AND VINL (V)
10
FIGURE 14. TURN - OFF TIME vs POSITIVE SUPPLY VOLTAGE
VCOM = (V+) - 1V
V- = -5V
-40°C
250
2.5
9
150
300
3.0
8
V+ (V)
VINL
2.5
-40°C
30
20
25°C
2.0
40
1.5
10
1.0
85°C
0.5
2
3
4
V- = 0V to -5V
5
6
7
8
V+ (V)
9
10
11
FIGURE 17. DIGITAL SWITCHING POINT vs POSITIVE
SUPPLY VOLTAGE
12
12
13
0
0
0.5
1
1.5
2
2.5
3
3.5
4
4.5
5
VIN (V)
FIGURE 18. POSITIVE SUPPLY CURRENT vs DIGITAL INPUT
VOLTAGE
FN6037.4
August 31, 2015
ISL43143, ISL43144, ISL43145
-10
VS = 2V or V+ = 5V (VIN = 4VP-P)
VS = 5V (VIN = 5VP-P)
GAIN
-3
0
PHASE
VS = 2V (VIN = 4VP-P)
V+ = 5V (VIN = 4VP-P)
VS = 5V (VIN = 5VP-P)
V+ = 2.7V (VIN = 2VP-P)
45
90
135
180
RL = 50
1
10
100
600
CROSSTALK (dB)
0
40
-50
50
-60
60
ISOLATION
-70
70
-80
80
CROSSTALK
-90
90
ALL HOSTILE CROSSTALK
-100
-110
1k
10k
100k
1M
10M
100
110
100M 500M
FREQUENCY (Hz)
FIGURE 19. FREQUENCY RESPONSE
FIGURE 20. CROSSTALK AND OFF ISOLATION
V+ = 3V to 12V or
VS = 2V to 5V
RL = 50
Die Characteristics
SUBSTRATE POTENTIAL (POWERED UP):
VIN = 1VP-P
V-
10
PSRR (dB)
30
-40
FREQUENCY (MHz)
0
20
OFF ISOLATION (dB)
V+ = 2.7V (VIN = 2VP-P)
3
10
V+ = 3V to 12V or
-20 VS = 2V to 5V
RL = 50
-30
PHASE (DEGREES)
NORMALIZED GAIN (dB)
Typical Performance Curves TA = 25°C, Unless Otherwise Specified (Continued)
TRANSISTOR COUNT:
20
ISL43143: 209
ISL43144: 209
ISL43145: 209
30
-PSRR, SWITCH ON
40
PROCESS:
50
-PSRR, SWITCH OFF
60
Si Gate CMOS
+PSRR, SWITCH OFF
70
+PSRR, SWITCH ON
0.3
1
10
100
FREQUENCY (MHz)
1000
FIGURE 21. PSRR vs FREQUENCY
13
FN6037.4
August 31, 2015
ISL43143, ISL43144, ISL43145
Revision History
The revision history provided is for informational purposes only and is believed to be accurate, but not warranted. Please go to the web to make
sure that you have the latest revision.
DATE
REVISION
August 31, 2015
FN6037.4
CHANGE
- Ordering Information Table on page 3.
- Added Revision History.
- Added About Intersil Verbiage.
-Updated POD L16.4x4 to most current version changes as follows:
POD into new QFN format.
-Updated POD M16.173 to most current version changes as follows:
Converted to new POD format by moving dimensions from table onto drawing and adding land pattern.
No dimension changes.
About Intersil
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14
FN6037.4
August 31, 2015
ISL43143, ISL43144, ISL43145
Package Outline Drawing
L16.4x4
16 LEAD QUAD FLAT NO-LEAD PLASTIC PACKAGE
Rev 6, 02/08
4X 1.95
4.00
12X 0.65
A
B
13
6
PIN 1
INDEX AREA
6
PIN #1 INDEX AREA
16
1
4.00
12
2 . 10 ± 0 . 15
9
4
0.15
(4X)
5
8
TOP VIEW
0.10 M C A B
+0.15
16X 0 . 60
-0.10
4 0.28 +0.07 / -0.05
BOTTOM VIEW
SEE DETAIL "X"
0.10 C
1.00 MAX
( 3 . 6 TYP )
(
SEATING PLANE
0.08 C
SIDE VIEW
2 . 10 )
C
BASE PLANE
( 12X 0 . 65 )
( 16X 0 . 28 )
C
0 . 2 REF
5
( 16 X 0 . 8 )
0 . 00 MIN.
0 . 05 MAX.
DETAIL "X"
TYPICAL RECOMMENDED LAND PATTERN
NOTES:
1. Dimensions are in millimeters.
Dimensions in ( ) for Reference Only.
2. Dimensioning and tolerancing conform to AMSE Y14.5m-1994.
3. Unless otherwise specified, tolerance : Decimal ± 0.05
4. Dimension b applies to the metallized terminal and is measured
between 0.15mm and 0.30mm from the terminal tip.
5. Tiebar shown (if present) is a non-functional feature.
6. The configuration of the pin #1 identifier is optional, but must be
located within the zone indicated. The pin #1 identifier may be
either a mold or mark feature.
15
FN6037.4
August 31, 2015
ISL43143, ISL43144, ISL43145
Package Outline Drawing
M16.173
16 LEAD THIN SHRINK SMALL OUTLINE PACKAGE (TSSOP)
Rev 2, 5/10
A
1
3
5.00 ±0.10
SEE DETAIL "X"
9
16
6.40
PIN #1
I.D. MARK
4.40 ±0.10
2
3
0.20 C B A
1
8
B
0.65
0.09-0.20
END VIEW
TOP VIEW
1.00 REF
- 0.05
H
C
1.20 MAX
SEATING
PLANE
0.90 +0.15/-0.10
GAUGE
PLANE
0.25 +0.05/-0.06 5
0.10 M C B A
0.10 C
0°-8°
0.05 MIN
0.15 MAX
SIDE VIEW
0.25
0.60 ±0.15
DETAIL "X"
(1.45)
NOTES:
1. Dimension does not include mold flash, protrusions or gate burrs.
(5.65)
Mold flash, protrusions or gate burrs shall not exceed 0.15 per side.
2. Dimension does not include interlead flash or protrusion. Interlead
flash or protrusion shall not exceed 0.25 per side.
3. Dimensions are measured at datum plane H.
4. Dimensioning and tolerancing per ASME Y14.5M-1994.
5. Dimension does not include dambar protrusion. Allowable protrusion
shall be 0.08mm total in excess of dimension at maximum material
condition. Minimum space between protrusion and adjacent lead
(0.65 TYP)
(0.35 TYP)
TYPICAL RECOMMENDED LAND PATTERN
is 0.07mm.
6. Dimension in ( ) are for reference only.
7. Conforms to JEDEC MO-153.
16
FN6037.4
August 31, 2015
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