DATASHEET

DATASHEET
Precision Single, Dual and Quad Low Noise Operational
Amplifiers
ISL28107, ISL28207, ISL28407
Features
The ISL28107, ISL28207 and ISL28407 are single, dual and
quad amplifiers featuring low noise, low input bias current,
and low offset and temperature drift. This makes them the
ideal choice for applications requiring both high DC accuracy
and AC performance. The combination of precision, low noise,
and small footprint provides the user with outstanding value
and flexibility relative to similar competitive parts.
• Low input offset . . . . . . . . . . . . . . . . . . . . . . . . . . . . .75µV Max.
Applications for these amplifiers include precision active
filters, medical and analytical instrumentation, precision
power supply controls, and industrial controls.
The ISL28107 is available in 8 Ld SOIC, MSOP and TDFN
packages. The ISL28207 is available in 8 Ld SOIC, MSOP and
TDFN packages. The ISL28407 is available in a 14 Ld SOIC
package. All devices are offered in standard pin configurations
and operate over the extended temperature range of -40°C to
+125°C.
• Input bias current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15pA
• Superb temperature drift
- Voltage offset . . . . . . . . . . . . . . . . . . . . . . . 0.65µV/°C Max.
- Input current . . . . . . . . . . . . . . . . . . . . . . . . . .0.9pA/°C Max.
• Outstanding ESD performance
- Human Body Model . . . . . . . . . . . . . . . . . . . . . . . . . . . 4.5kV
- Machine Model. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 500V
- Charged Device Model. . . . . . . . . . . . . . . . . . . . . . . . . .1.5kV
• Very low voltage noise, 10Hz . . . . . . . . . . . . . . . . . . 14nV/Hz
• Low current consumption (per amp) . . . . . . . . . 0.29mA Max.
• Gain-bandwidth product . . . . . . . . . . . . . . . . . . . . . . . . . . 1MHz
• Wide supply range . . . . . . . . . . . . . . . . . . . . . . . . . .4.5V to 40V
• Operating temperature range. . . . . . . . . . . .-40°C to +125°C
Applications
• No phase reversal
• Precision instruments
• Pb-free (RoHS compliant)
• Medical instrumentation
Related Literature
• Spectral analysis equipment
• See AN1508 “ISL281X7SOICEVAL1Z Evaluation Board
User’s Guide”
• Active filter blocks
• Microphone pre-amplifier
• See AN1509 “ISL282X7SOICEVAL2Z Evaluation Board
User’s Guide”
• Thermocouples and RTD reference buffers
• Data acquisition
• Power supply control
8.2nF
V+
VIN
R1
R2
19.1k
48.7k
OUTPUT
+
3.3nF
C2
V-
SALLEN-KEY LOW PASS FILTER (1kHz)
FIGURE 1. TYPICAL APPLICATION
September 29, 2015
FN6631.8
1
INPUT NOISE VOLTAGE (nV/Hz)
1000
C1
V+ = ±19V
AV = 1
100
10
0.1
1
10
100
1k
10k
100k
FREQUENCY (Hz)
FIGURE 2. INPUT NOISE VOLTAGE SPECTRAL DENSITY
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Copyright Intersil Americas LLC 2009-2013, 2015. All Rights Reserved
Intersil (and design) is a trademark owned by Intersil Corporation or one of its subsidiaries.
All other trademarks mentioned are the property of their respective owners.
ISL28107, ISL28207, ISL28407
Table of Contents
Pin Configurations. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Pin Descriptions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Ordering Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Thermal Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Operating Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Electrical Specifications VS ±15V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Electrical Specifications VS ±5V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Typical Performance Curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Applications Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating Voltage Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input ESD Diode Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output Current Limiting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output Phase Reversal . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Unused Channels . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
ISL28107, ISL28207, ISL28407 SPICE Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
License Statement. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
19
19
19
19
20
20
20
20
20
20
Characterization vs Simulation Results. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Revision History. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
About Intersil . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Package Outline Drawing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
M8.15E . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
M8.118B . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
L8.3x3K. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
MDP0027 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Submit Document Feedback
2
28
28
29
30
31
FN6631.8
September 29, 2015
ISL28107, ISL28207, ISL28407
Pin Configurations
ISL28107
(8 LD TDFN)
TOP VIEW
ISL28107
(8 LD SOIC, MSOP)
TOP VIEW
NC
1
8
NC
-IN
2
7
V+
-IN 2
+IN
3
6
VOUT
+IN 3
V-
4
5
NC
- +
NC 1
1
-IN_A
2
+IN_A
3
V-
4
8
- +
+ -
7 V+
- +
6 VOUT
5 NC
V- 4
ISL28207
(8 LD TDFN)
TOP VIEW
ISL28207
(8 LD SOIC, MSOP)
TOP VIEW
VOUTA
8 NC
V+
VOUT_A 1
7
VOUTB
-IN_A 2
6
-IN_B
+IN_A 3
5
+IN_B
V- 4
8 V+
7 VOUT_B
- +
+ -
6 -IN_B
5 +IN_B
ISL28407
(14 LD SOIC)
TOP VIEW
14 VOUT_D
VOUT_A 1
-IN_A 2
A
- +
D
+ -
+IN_A 3
12 +IN_D
V+ 4
11
VOUT_B 7
Submit Document Feedback
3
V-
10 +IN_C
+IN_B 5
-IN_B 6
13 -IN_D
- +
B
+ C
9 -IN_C
8 VOUT_C
FN6631.8
September 29, 2015
ISL28107, ISL28207, ISL28407
Pin Descriptions
ISL28107
(8 Ld SOIC,
MSOP, TDFN)
ISL28207
(8 Ld SOIC,
MSOP, TDFN)
ISL28407
(14 Ld SOIC)
PIN
NAME
EQUIVALENT CIRCUIT
DESCRIPTION
3
-
-
+IN
Circuit 1
-
3
3
+IN_A
Amplifier non-inverting
input
-
5
5
+IN_B
-
-
10
+IN_C
-
-
12
+IN_D
4
4
11
V-
Circuit 3
Negative power supply
2
-
-
-IN
Circuit 1
Amplifier inverting input
-
2
2
-IN_A
-
6
6
-IN_B
-
-
9
-IN_C
-
-
13
-IN_D
7
8
4
V+
Circuit 3
Positive power supply
6
-
-
VOUT
Circuit 2
Amplifier output
-
1
1
VOUT_A
-
7
7
VOUT_B
-
-
8
VOUT_C
-
-
14
VOUT_D
1, 5, 8
-
-
NC
-
No internal connection
PD
PD
-
PD
-
Thermal Pad - TDFN and
QFN packages only.
Connect thermal pad to
ground or most negative
potential.
V+
500
V+
500
IN-
V-
V-
Submit Document Feedback
CIRCUIT 2
4
CAPACITIVELY
TRIGGERED
ESD CLAMP
OUT
IN+
CIRCUIT 1
V+
V-
CIRCUIT 3
FN6631.8
September 29, 2015
ISL28107, ISL28207, ISL28407
Ordering Information
PART NUMBER
(Notes 1, 2, 3)
PART
MARKING
TEMP. RANGE
(°C)
PACKAGE
(Pb-Free)
PKG.
DWG. #
ISL28107FBZ (No longer available, 28107 FBZ
recommended replacement:
ISL28107FUZ-T7)
-40 to +125
8 Ld SOIC
M8.15E
ISL28107FUZ
8107Z
-40 to +125
8 Ld MSOP
M8.118B
ISL28107FRTZ (No longer
available, recommended
replacement: ISL28107FUZ-T7)
107Z
-40 to +125
8 Ld TDFN
L8.3x3K
ISL28207FBZ
28207 FBZ
-40 to +125
8 Ld SOIC
M8.15E
ISL28207FUZ
8207Z
-40 to +125
8 Ld MSOP
M8.118B
ISL28207FRTZ
8207
-40 to +125
8 Ld TDFN
L8.3x3K
ISL28407FBZ
28407 FBZ
-40 to +125
14 Ld SOIC
MDP0027
ISL28107SOICEVAL1Z
Evaluation Board
ISL28207SOICEVAL2Z
Evaluation Board
NOTES:
1. Add “-T*” suffix for tape and reel. Please refer to Tech Brief TB347 for details on reel specifications.
2. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte
tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil Pbfree products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
3. For Moisture Sensitivity Level (MSL), please see device information page for ISL28107, ISL28207 and ISL28407. For more information on MSL please
see Tech Brief TB363.
Submit Document Feedback
5
FN6631.8
September 29, 2015
ISL28107, ISL28207, ISL28407
Absolute Maximum Ratings
Thermal Information
Maximum Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42V
Maximum Differential Input Current . . . . . . . . . . . . . . . . . . . . . . . . . . 20mA
Maximum Differential Input Voltage . . . . . . . . . . . (V-) - 0.5V to (V+) + 0.5V
Min/Max Input Voltage . . . . . . . . . . . . . . . . . . . . . . (V-) - 0.5V to (V+) + 0.5V
Max/Min Input Current for Input Voltage >V+ or <V- . . . . . . . . . . . . ±20mA
Output Short-Circuit Duration (1 Output at a Time) . . . . . . . . . . Indefinite
ESD Tolerance
Human Body Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4.5kV
Machine Model (ISL28207 MSOP only). . . . . . . . . . . . . . . . . . . . . . . 300V
Machine Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 500V
Charged Device Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1.5kV
ESD Tolerance (ISL28407 SOIC only)
Human Body Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6kV
Machine Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 450V
Charged Device Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2kV
Thermal Resistance (Typical)
JA (°C/W) JC (°C/W)
8 Ld SOIC (ISL28107, Notes 4, 5). . . . . . . .
120
60
8 Ld SOIC (ISL28207, Notes 4, 5) . . . . . . .
105
50
8 Ld MSOP (ISL28107, Notes 4, 5) . . . . . .
155
50
8 Ld MSOP (ISL28207, Notes 4, 5) . . . . . .
160
55
8 Ld TDFN (ISL28107, Notes 6, 7) . . . . . . .
44
3
8 Ld TDFN (ISL28207, Notes 6, 7) . . . . . .
43
2
14 Ld SOIC (ISL28407, Notes 4, 5) . . . . . .
73
45
Storage Temperature Range. . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C
Pb-Free Reflow Profile . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . see link below
http://www.intersil.com/pbfree/Pb-FreeReflow.asp
Operating Conditions
Ambient Operating Temperature Range . . . . . . . . . . . . . .-40°C to +125°C
Maximum Operating Junction Temperature . . . . . . . . . . . . . . . . . .+150°C
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product
reliability and result in failures not covered by warranty.
NOTES:
4. JA is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
5. For JC, the “case temp” location is taken at the package top center.
6. JA is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach” features. See Tech
Brief TB379.
7. For JC, the “case temp” location is the center of the exposed metal pad on the package underside.
Electrical Specifications VS ±15V, VCM = 0, VO = 0V, RL = Open, TA= +25°C, unless otherwise noted. Boldface limits apply over the
operating temperature range, -40°C to +125°C.
PARAMETER
VOS
DESCRIPTION
Offset Voltage Magnitude; SOIC
Package
CONDITIONS
ISL28107, ISL28207
MIN
(Note 8)
TYP
MAX
(Note 8)
UNIT
-75
5
75
µV
140
µV
90
µV
160
µV
100
µV
180
µV
-140
ISL28407
-90
10
-160
Offset Voltage Magnitude; MSOP
Package
ISL28107
-100
5
-180
ISL28207
-110
5
-200
Offset Voltage Magnitude; TDFN
Package
ISL28107
-100
10
-190
ISL28207
-100
10
-175
TCVOS
Offset Voltage Drift; SOIC Package ISL28107, ISL28207
Offset Voltage Drift; MSOP
Package
Offset Voltage Drift; TDFN
Package
Submit Document Feedback
6
110
µV
200
µV
100
µV
190
µV
100
µV
175
µV
-0.65
0.1
0.65
µV/°C
ISL28407
-0.8
0.2
0.8
µV/°C
ISL28107
-0.85
0.1
0.85
µV/°C
ISL28207
-0.9
0.1
0.9
µV/°C
ISL28107
-0.9
0.1
0.9
µV/°C
ISL28207
-0.75
0.1
0.75
µV/°C
FN6631.8
September 29, 2015
ISL28107, ISL28207, ISL28407
Electrical Specifications VS ±15V, VCM = 0, VO = 0V, RL = Open, TA= +25°C, unless otherwise noted. Boldface limits apply over the
operating temperature range, -40°C to +125°C. (Continued)
PARAMETER
IB
Input Bias Current
ISL28107, ISL28207
Input Bias Current
ISL28407
TCIB
Input Bias Current Drift
ISL28107, ISL28207
Input Bias Current Drift
ISL28407
IOS
Input Offset Current
ISL28107, ISL28207
Input Offset Current
ISL28407
TCIOS
MIN
(Note 8)
TYP
MAX
(Note 8)
UNIT
TA = -40°C to +85°C
-300
15
300
pA
TA = -40°C to +125°C
-600
600
pA
TA = 0°C to +70°C
-250
50
250
pA
TA = -40°C to +85°C
-330
50
330
pA
TA = -40°C to +125°C
-700
700
pA
TA = -40°C to +85°C
-0.9
0.19
0.9
pA/°C
TA = -40°C to +85°C;
ISL28207 MSOP Package Only
-1.5
0.19
1.5
pA/°C
DESCRIPTION
Input Offset Current Drift
ISL28107, ISL28207
Input Offset Current Drift
ISL28407
CONDITIONS
TA = -40°C to +125°C
-3.5
0.26
3.5
pA/°C
TA = 0°C to +70°C
-1.5
0.3
1.5
pA/°C
TA = -40°C to +85°C
-2.0
0.3
2.0
pA/°C
TA = -40°C to +125°C
-3.5
0.3
3.5
pA/°C
TA = -40°C to +85°C
-300
15
300
pA
TA = -40°C to +125°C
-600
600
pA
TA = 0°C to +70°C
-250
50
250
pA
TA = -40°C to +85°C
-330
50
330
pA
TA = -40°C to +125°C
-700
700
pA
TA = -40°C to +85°C
-0.9
0.19
0.9
pA/°C
TA = -40°C to +125°C
-3.5
0.26
3.5
pA/°C
TA = -40°C to +85°C;
ISL28207 MSOP Package Only
-1.5
1.5
pA/°C
TA = 0°C to +70°C
-1.5
0.3
1.5
pA/°C
TA = -40°C to +85°C
-2.0
0.3
2.0
pA/°C
TA = -40°C to +125°C
-3.5
0.3
3.5
pA/°C
13
V
VCM
Input Voltage Range
Guaranteed by CMRR test
-13
CMRR
Common-Mode Rejection Ratio
VCM = -13V to +13V
115
145
dB
PSRR
Power Supply Rejection Ratio
VS = ±2.25V to ±20V
115
145
dB
AVOL
Open-Loop Gain
VO = -13V to +13V, RL = 10k to ground
130
152
dB
VOH
Output Voltage High
RL = 10k to ground
13.5
13.7
V
-40°C to +125°C
13.2
RL = 2k to ground
13.3
-40°C to +125°C
13.1
VOL
Output Voltage Low
RL = 10k to ground
V
13.55
V
-13.7
-13.5
-13.2
V
-13.55
-13.3
V
-13.1
V
0.29
mA
0.35
mA
-40°C to +125°C
RL = 2k to ground
-40°C to +125°C
IS
Supply Current/Amplifier
RL = Open
ISC
Output Short-Circuit Current
(Note 9)
VSUPPLY
Supply Voltage Range
Guaranteed by PSRR
Submit Document Feedback
7
V
0.21
±40
±2.25
V
mA
±20
V
FN6631.8
September 29, 2015
ISL28107, ISL28207, ISL28407
Electrical Specifications VS ±15V, VCM = 0, VO = 0V, RL = Open, TA= +25°C, unless otherwise noted. Boldface limits apply over the
operating temperature range, -40°C to +125°C. (Continued)
PARAMETER
DESCRIPTION
CONDITIONS
MIN
(Note 8)
TYP
MAX
(Note 8)
UNIT
AC SPECIFICATIONS
GBW
Gain Bandwidth Product
1
MHz
enp-p
Voltage Noise
0.1Hz to 10Hz, VS = ±19V
340
nVP-P
en
Voltage Noise Density
f = 10Hz, VS = ±19V
14
nV/Hz
en
Voltage Noise Density
f = 100Hz, VS = ±19V
13
nV/Hz
en
Voltage Noise Density
f = 1kHz, VS = ±19V
13
nV/Hz
en
Voltage Noise Density
f = 10kHz, VS = ±19V
13
nV/Hz
in
Current Noise Density
f = 10kHz, VS = ±19V
53
fA/Hz
THD + N
Total Harmonic Distortion + Noise 1kHz, G = 1, VO = 3.5VRMS, RL = 2k
0.0035
%
±0.32
V/µs
TRANSIENT RESPONSE
SR
Slew Rate
AV = 10, RL = 10kVO = 10VP-P
tr, tf, Small
Signal
Rise Time
10% to 90% of VOUT
AV = 1, VOUT = 100mVP-P, Rf = 0RL = 2kto VCM
355
ns
Fall Time
90% to 10% of VOUT
AV = 1, VOUT = 100mVP-P, Rf = 0RL = 2kto VCM
365
ns
Settling Time to 0.1%
10V Step; 10% to VOUT
AV = -1 VOUT = 10VP-P, Rg = Rf = 10k,
RL = 2k to VCM
29
µs
Settling Time to 0.01%
10V Step; 10% to VOUT
AV = -1, VOUT = 10VP-P, Rg = Rf =10k,
RL = 2k to VCM
31.2
µs
Output Overload Recovery Time
AV = 100, VIN = 0.2V, RL = 2k to VCM
6
µs
ts
tOL
Electrical Specifications VS ±5V, VCM = 0, VO = 0V, TA = +25°C, unless otherwise noted. Boldface limits apply over the operating
temperature range, -40°C to +125°C.
PARAMETER
VOS
DESCRIPTION
Offset Voltage Magnitude; SOIC
Package
CONDITIONS
ISL28107, ISL28207
MIN
(Note 8)
TYP
MAX
(Note 8)
UNIT
-75
5
75
µV
140
µV
90
µV
160
µV
100
µV
180
µV
110
µV
200
µV
100
µV
190
µV
100
µV
175
µV
-140
ISL28407
-90
10
-160
Offset Voltage Magnitude; MSOP
Package
ISL28107
-100
5
-180
ISL28207
-110
5
-200
Offset Voltage Magnitude; TDFN
Package
ISL28107
-100
-190
ISL28207
-100
-175
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8
10
10
FN6631.8
September 29, 2015
ISL28107, ISL28207, ISL28407
Electrical Specifications VS ±5V, VCM = 0, VO = 0V, TA = +25°C, unless otherwise noted. Boldface limits apply over the operating
temperature range, -40°C to +125°C. (Continued)
PARAMETER
TCVOS
DESCRIPTION
Offset Voltage Drift; SOIC Package ISL28107, ISL28207
TCIB
TCIOS
TYP
MAX
(Note 8)
UNIT
-0.65
0.1
0.65
µV/°C
-0.8
0.2
0.8
µV/°C
ISL28107
-0.85
0.1
0.85
µV/°C
ISL28207
-0.9
0.1
0.9
µV/°C
Offset Voltage Drift; TDFN Package ISL28107
-0.9
0.1
0.9
µV/°C
ISL28207
-0.75
0.1
0.75
µV/°C
Input Bias Current
ISL28107, ISL28207
TA = -40°C to +85°C
-300
15
300
pA
TA = -40°C to +125°C
-600
600
pA
Input Bias Current
ISL28407
TA = 0°C to +70°C
-250
50
250
pA
TA = -40°C to +85°C
-330
50
330
pA
TA = -40°C to +125°C
-700
700
pA
Input Bias Current Drift
ISL28107, ISL28207
TA = -40°C to +85°C
-0.9
0.19
0.9
pA/°C
TA = -40°C to +85°C;
ISL28207 MSOP Package Only
-1.5
0.19
1.5
pA/°C
TA = -40°C to +125°C
-3.5
0.26
3.5
pA/°C
TA = 0°C to +70°C
-1.5
0.3
1.5
pA/°C
TA = -40°C to +85°C
-2.0
0.3
2.0
pA/°C
TA = -40°C to +125°C
-3.5
0.3
3.5
pA/°C
Input Offset Current
ISL28107, ISL28207
TA = -40°C to +85°C
-300
15
300
pA
TA = -40°C to +125°C
-600
600
pA
Input Offset Current
ISL28407
TA = 0°C to +70°C
-250
50
250
pA
TA = -40°C to +85°C
-330
50
330
pA
TA = -40°C to +125°C
-700
700
pA
TA = -40°C to +85°C
-0.9
0.19
0.9
pA/°C
TA = -40°C to +125°C
-3.5
0.26
3.5
pA/°C
TA = -40°C to +85°C;
ISL28207 MSOP Package Only
-1.5
1.5
pA/°C
TA = 0°C to +70°C
-1.5
0.3
1.5
pA/°C
TA = -40°C to +85°C
-2.0
0.3
2.0
pA/°C
TA = -40°C to +125°C
-3.5
0.3
3.5
pA/°C
3
V
Input Bias Current Drift
ISL28407
IOS
MIN
(Note 8)
ISL28407
Offset Voltage Drift; MSOP
Package
IB
CONDITIONS
Input Offset Current Drift
ISL28107, ISL28207
Input Offset Current Drift
ISL28407
VCM
Common Mode Input Voltage
Range
Guaranteed by CMRR test
CMRR
Common-Mode Rejection Ratio
VCM = -3V to +3V
115
145
dB
PSRR
Power Supply Rejection Ratio
VS = ±2.25V to ±5V
115
145
dB
AVOL
Open-Loop Gain
VO = -3V to +3V, RL = 10k to ground
130
152
dB
VOH
Output Voltage High
RL = 10k to ground
3.5
3.7
V
-40°C to +125°C
3.2
RL = 2k to ground
3.3
-40°C to +125°C
3.1
Submit Document Feedback
9
-3
V
3.55
V
V
FN6631.8
September 29, 2015
ISL28107, ISL28207, ISL28407
Electrical Specifications VS ±5V, VCM = 0, VO = 0V, TA = +25°C, unless otherwise noted. Boldface limits apply over the operating
temperature range, -40°C to +125°C. (Continued)
PARAMETER
VOL
DESCRIPTION
Output Voltage Low
CONDITIONS
RL = 10k to ground
MIN
(Note 8)
TYP
-3.7
-40°C to +125°C
RL = 2k to ground
-3.55
-40°C to +125°C
IS
ISC
Supply Current/Amplifier
Output Short-Circuit Current
RL = Open
(Note 9)
0.21
MAX
(Note 8)
UNIT
-3.5
V
-3.2
V
-3.3
V
-3.1
V
0.29
mA
0.35
mA
±40
mA
1
MHz
0.0053
%
AC SPECIFICATIONS
GBW
Gain Bandwidth Product
THD + N
Total Harmonic Distortion + Noise
1kHz, G = 1, VO = 2.5VRMS, RL = 2k
TRANSIENT RESPONSE
SR
Slew Rate
AV = 10, RL = 2k
0.32
V/µs
tr, tf, Small
Signal
Rise Time
10% to 90% of VOUT
AV = 1, VOUT = 100mVP-P, Rf = 0,
RL = 2k to VCM
355
ns
Fall Time
90% to 10% of VOUT
AV = 1, VOUT = 100mVP-P, Rf = 0,
RL = 2k to VCM
370
ns
Settling Time to 0.1%
4V Step; 10% to VOUT
AV = -1, VOUT = 4VP-P, Rf = Rg = 2k,
RL = 2k to VCM
12.4
µs
Settling Time to 0.01%
4V Step; 10% to VOUT
AV = -1, VOUT = 4VP-P, Rf = Rg = 2k,
RL = 2k to VCM
22
µs
ts
NOTES:
8. Parameters with MIN and/or MAX limits are 100% tested at +25°C, unless otherwise specified. Temperature limits established by characterization
and are not production tested.
9. Output Short Circuit Current is the minimum current (source or sink) when the output is driven into the supply rails with RL = 0 to ground.
Submit Document Feedback
10
FN6631.8
September 29, 2015
ISL28107, ISL28207, ISL28407
Typical Performance Curves
VS = ±15V, VCM = 0V, RL = Open, TA = +25°C unless otherwise specified.
30
30
VS = ±5V
20
20
10
10
VOS (µV)
VOS (µV)
VS = ±15V
0
-10
-10
-20
-20
-30
-50
0
50
TEMPERATURE (°C)
100
100
1000
800
600
400
200
-60
-40
-20
0
20
VOS (µV)
40
60
80
VS = ±5V
16
1200
1000
10
8
6
4
2
-0.30
-0.15
0
0.15
TCVOS (µV/°C)
0.30
0.45
FIGURE 7. TCVOS vs NUMBER OF AMPLIFIERS, VS = ±15V
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11
400
200
-80
-60
-40
-20
0
20
VOS (µV)
40
60
16
NUMBER OF AMPLIFIERS
12
600
80
100
FIGURE 6. INPUT OFFSET VOLTAGE DISTRIBUTION, VS = ±5V
VS = ±15V
14
800
0
-100
100
FIGURE 5. INPUT OFFSET VOLTAGE DISTRIBUTION, VS = ±15V
150
FIGURE 4. INPUT OFFSET VOLTAGE vs TEMPERATURE, VS = ±5V
NUMBER OF AMPLIFIERS
NUMBER OF AMPLIFIERS
50
TEMPERATURE (°C)
VS = ±15V
1200
0
-0.45
0
1400
1400
0
-100 -80
-30
-50
150
FIGURE 3. INPUT OFFSET VOLTAGE vs TEMPERATURE, VS = ±15V
NUMBER OF AMPLIFIERS
0
VS = ±5V
14
12
10
8
6
4
2
0
-0.45
-0.30
-0.15
0
0.15
TCVOS (µV/°C)
0.30
0.45
FIGURE 8. TCVOS vs NUMBER OF AMPLIFIERS, VS = ±5V
FN6631.8
September 29, 2015
ISL28107, ISL28207, ISL28407
Typical Performance Curves
VS = ±15V, VCM = 0V, RL = Open, TA = +25°C unless otherwise specified. (Continued)
200
200
VS = ±15V
VS = ±5V
100
Ib+ (pA)
Ib+ (pA)
100
0
-100
0
-100
-200
-50
-25
0
25
50
75
100
125
-200
-50
150
-25
0
TEMPERATURE (°C)
FIGURE 9. POSITIVE BIAS CURRENT vs TEMPERATURE,
VS = ±15V
60
50
40
30
20
10
0
-1.8
-1.4
-1.0
-0.6
-0.2
0.2
TCIb+ (pA/°C)
0.6
VS = ±5V
60
50
40
30
20
10
-1.8
-1.4
-1.0
-0.6
-0.2
0.2
TCIb+ (pA/°C)
0.6
1.0
FIGURE 12. TCIb+ vs NUMBER OF AMPLIFIERS, VS = ±5V
200
200
VS = ±15V
Vs = ±5V
100
100
Ib- (pA)
Ib- (pA)
150
70
0
1.0
FIGURE 11. TCIb+ vs NUMBER OF AMPLIFIERS, VS = ±15V
0
-100
-200
-50
125
80
VS = ±15V
70
100
FIGURE 10. POSITIVE BIAS CURRENT vs TEMPERATURE, VS = ±5V
NUMBER OF AMPLIFIERS
NUMBER OF AMPLIFIERS
80
25
50
75
TEMPERATURE (°C)
0
-100
-25
0
25
50
75
TEMPERATURE (°C)
100
125
FIGURE 13. NEGATIVE BIAS CURRENT vs TEMPERATURE,
VS = ±15V
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12
150
-200
-50
-25
0
25
50
75
TEMPERATURE (°C)
100
125
150
FIGURE 14. NEGATIVE BIAS CURRENT vs TEMPERATURE,
VS = ±5V
FN6631.8
September 29, 2015
ISL28107, ISL28207, ISL28407
Typical Performance Curves
100
80
VS = ±5V
NUMBER OF AMPLIFIERS
90
NUMBER OF AMPLIFIERS
VS = ±15V, VCM = 0V, RL = Open, TA = +25°C unless otherwise specified. (Continued)
80
70
60
50
40
30
20
10
0
-1.8
-1.4
-1.0
-0.6
-0.2
0.2
TCIb- (pA/°C)
0.6
50
40
30
20
10
-1.4
-1.0
-0.6
-0.2
0.2
TCIb- (pA/°C)
0.6
1.0
FIGURE 16. TCIb- vs NUMBER OF AMPLIFIERS, VS = ±15V
200
200
VS = ±15V
100
50
50
IOS (pA)
100
-50
0
-50
-100
-100
-150
-150
-200
-50
0
50
TEMPERATURE (°C)
100
150
FIGURE 17. OFFSET CURRENT vs TEMPERATURE, VS = ±15V
-200
-50
0
50
TEMPERATURE (°C)
100
50
VS = ±15V
40
35
30
25
20
15
10
5
VS = ±5V
45
NUMBER OF AMPLIFIERS
45
150
FIGURE 18. OFFSET CURRENT vs TEMPERATURE, VS = ±5V
50
0
VS = ±5V
150
0
NUMBER OF AMPLIFIERS
-1.8
FIGURE 15. TCIb- vs NUMBER OF AMPLIFIERS, VS = ±5V
150
IOS (pA)
60
0
1.0
VS = ±15V
70
40
35
30
25
20
15
10
5
-0.7
-0.5
-0.3
-0.1
0.1
0.3
TCIOS (pA/°C)
0.5
0.7
FIGURE 19. TCIOS- vs NUMBER OF AMPLIFIERS, VS = ±15V
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13
0
-0.7
-0.5
-0.3
-0.1
0.1
0.3
TCIOS (pA/°C)
0.5
0.7
FIGURE 20. TCIOS- vs NUMBER OF AMPLIFIERS, VS = ±5V
FN6631.8
September 29, 2015
ISL28107, ISL28207, ISL28407
Typical Performance Curves
180
VS = ±15V, VCM = 0V, RL = Open, TA = +25°C unless otherwise specified. (Continued)
180
Vcm = ±13V
VS = ± 2.25V TO ± 20V
PSRR (dB)
CMRR (dB)
160
160
140
140
120
120
-50
0
50
TEMPERATURE (°C)
100
100
-50
150
63000
14.4
53000
14.2
43000
14.0
VOH (V)
AVOL (V/mV)
VO = ±13V
33000
13.6
13000
13.4
50
TEMPERATURE (°C)
100
13.2
-50
150
FIGURE 23. AVOL vs TEMPERATURE
-13.2
50
TEMPERATURE (°C)
100
150
VS = ±15V
RL = 2k
14.2
14.0
VOH (V)
VOL (V)
0
14.4
-13.6
-13.8
13.8
-14.0
13.6
-14.2
13.4
-14.4
-50
Vs = ±15V
RL = 10k
FIGURE 24. VOH vs TEMPERATURE, VS = ±15V, RL = 10k
VS = ±15V
RL = 10k
-13.4
150
13.8
23000
0
50
100
TEMPERATURE (°C)
FIGURE 22. PSRR vs TEMPERATURE
FIGURE 21. CMRR vs TEMPERATURE
3000
-50
0
0
50
100
TEMPERATURE (°C)
FIGURE 25. VOL vs TEMPERATURE, VS = ±15V, RL = 10k
Submit Document Feedback
14
150
13.2
-50
0
50
100
TEMPERATURE (°C)
150
FIGURE 26. VOH vs TEMPERATURE, VS = ±15V, RL = 2k
FN6631.8
September 29, 2015
ISL28107, ISL28207, ISL28407
Typical Performance Curves
-13.2
VS = ±15V, VCM = 0V, RL = Open, TA = +25°C unless otherwise specified. (Continued)
4.4
VS = ±15V
RL = 2k
-13.4
4.0
VOH (V)
VOL (V)
-13.6
-13.8
3.6
-14.2
3.4
0
50
100
TEMPERATURE (°C)
3.2
-50
150
0
50
TEMPERATURE (°C)
100
150
FIGURE 27. VOL vs TEMPERATURE, VS = ±15V, RL = 2k
FIGURE 28. VOH vs TEMPERATURE, VS = ±5V, RL = 10k
-3.2
0.40
VS = ±5V
RL = 10k
-3.4
0.35
-3.6
-3.8
0.20
-4.2
0.15
0
50
TEMPERATURE (°C)
100
150
0.10
-50
FIGURE 29. VOL vs TEMPERATURE, VS = ±5V, RL = 10k
60
50
45
45
40
35
35
30
25
25
50
TEMPERATURE (°C)
100
FIGURE 31. POSITIVE SHORT CIRCUIT CURRENT vs
TEMPERATURE
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15
150
40
30
0
100
ISC- @ ±15V
55
ISC- (mA)
ISC+ (mA)
50
TEMPERATURE (°C)
60
50
20
-50
0
FIGURE 30. SUPPLY CURRENT vs TEMPERATURE
ISC+ @ ±15V
55
±2.25V
0.25
-4.0
-4.4
-50
±15V
0.30
IS (mA)
VOL (V)
3.8
-14.0
-14.4
-50
VS = ±5V
RL = 10k
4.2
150
20
-50
0
50
TEMPERATURE (°C)
100
150
FIGURE 32. NEGATIVE SHORT CIRCUIT CURRENT vs
TEMPERATURE
FN6631.8
September 29, 2015
ISL28107, ISL28207, ISL28407
Typical Performance Curves
VS = ±15V, VCM = 0V, RL = Open, TA = +25°C unless otherwise specified. (Continued)
1000
INPUT NOISE VOLTAGE (nV/Hz)
INPUT NOISE VOLTAGE (nV)
200
150
100
50
0
-50
-100
V+ = ±19V
RL = INF, CL = 4pF
Rg = 10, Rf = 100k
AV = 10,000
-150
-200
0
1
2
3
4
5
6
7
8
9
V+ = ±19V
AV = 1
100
10
0.1
10
1
10
TIME (s)
FIGURE 33. INPUT NOISE VOLTAGE 0.1Hz TO 10Hz
10k
100k
100
80
PSRR- VS = ±5V, VS = ±15V
60
PSRR (dB)
INPUT NOISE CURRENT (pA/Hz)
1k
FIGURE 34. INPUT NOISE VOLTAGE SPECTRAL DENSITY
1
0.1
V+ = ±19V
AV = 1
0.01
0.1
1
10
100
1k
10k
100k
40
20 R = INF
L
CL = 4pF
0 AV = +1
VSOURCE = 1VP-P
-20
10
100
FREQUENCY (Hz)
160
120
1k
100k
1M
60
40
80
60
+125°C
20
VOS (µV)
100
+25°C
0
-20
-40°C
40
-40
20
0
0.1
10k
FIGURE 36. PSRR vs FREQUENCY, VS = ±5V, ±15V
RL = INF
CL = 4pF
AV = +1
VCM = 1VP-P
140
PSRR+ VS = ±5V, VS = ±15V
FREQUENCY (Hz)
FIGURE 35. INPUT NOISE CURRENT SPECTRAL DENSITY
CMRR (dB)
100
FREQUENCY (Hz)
VS = ±2.25V, ±5V, ±15V
1
10
100
1k
10k
100k
1M
10M 100M
FREQUENCY (Hz)
FIGURE 37. CMRR vs FREQUENCY, VS = ±2.25, ±5V, ±15V
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16
-60
-15
-10
-5
0
5
10
15
INPUT COMMON MODE VOLTAGE
FIGURE 38. INPUT OFFSET VOLTAGE vs INPUT COMMON MODE
VOLTAGE, VS = ±15V
FN6631.8
September 29, 2015
ISL28107, ISL28207, ISL28407
VS = ±15V, VCM = 0V, RL = Open, TA = +25°C unless otherwise specified. (Continued)
200
180
160
140
PHASE
120
100
80
60
40
20
GAIN
0
-20 R = 10k
L
-40
CL = 10pF
-60
SIMULATION
-80
-100
0.1m 1m 10m 100m 1 10 100 1k 10k 100k 1M 10M 100M
OPEN LOOP GAIN (dB)/PHASE (°)
OPEN LOOP GAIN (dB)/PHASE (°)
Typical Performance Curves
200
180
160
140
PHASE
120
100
80
60
40
20
GAIN
0
-20 R = 10k
L
-40
CL = 100pF
-60
SIMULATION
-80
-100
0.1m 1m 10m 100m 1 10 100 1k 10k 100k 1M 10M 100M
FREQUENCY (Hz)
FREQUENCY (Hz)
FIGURE 39. OPEN-LOOP GAIN, PHASE vs FREQUENCY, RL = 10k
CL = 10pF
60
50
GAIN (dB)
40
30
20
10
0
AV = 1000
8
Rg = 100, Rf = 100k
6
Rg = 1k, Rf = 100k
AV = 100
V+ = ±20V
CL = 4pF
RL = 10k
VOUT = 100mVP-P
AV = 10
Rg = 10k, Rf = 100k
AV = 1
NORMALIZED GAIN (dB)
70
FIGURE 40. OPEN-LOOP GAIN, PHASE vs FREQUENCY, RL = 10k
CL = 100pF
Rg = OPEN, Rf = 0
-10
-20
10
100
1k
10k
100k
1M
4
Rf = Rg = 100k
2
0
Rf = Rg = 1k
-2
-4 V+ = ±5V
-6 RL = 10k
CL = 4pF
-8
AV = +2
-10 VOUT = 10mVP-P
-12
1k
10M
10k
FREQUENCY (Hz)
1M
10M
1
0
0
-1
-1
NORMALIZED GAIN (dB)
NORMALIZED GAIN (dB)
100k
FIGURE 42. FREQUENCY RESPONSE vs FEEDBACK RESISTANCE
Rf/Rg
1
RL = 100k
-2
-3
RL = 10k
-4
RL = 1k
-5
RL = 499
-6
V+ = ±5V
-7
CL = 4pF
AV = +1
VOUT = 10mVP-P
-9
Rf = Rg = 100
FREQUENCY (Hz)
FIGURE 41. FREQUENCY RESPONSE vs CLOSED LOOP GAIN
-8
Rf = Rg = 10k
1k
10k
1M
FREQUENCY (Hz)
FIGURE 43. GAIN vs FREQUENCY vs RL
Submit Document Feedback
-3
17
10M
RL = 10k
-4
RL = 1k
-5
RL = 499
-6
-7
-8
100k
RL = 100k
-2
-9
V+ = ±20V
CL = 4pF
AV = +1
VOUT = 100mVP-P
1k
10k
100k
1M
10M
FREQUENCY (Hz)
FIGURE 44. GAIN vs FREQUENCY vs RL
FN6631.8
September 29, 2015
ISL28107, ISL28207, ISL28407
Typical Performance Curves
VS = ±15V, VCM = 0V, RL = Open, TA = +25°C unless otherwise specified. (Continued)
8
1
0
CL = 334pF
4
CL = 224pF
2
CL = 104pF
NORMALIZED GAIN (dB)
NORMALIZED GAIN (dB)
6
0
-2
-4
-6
-8
CL = 51pF
VS = ±15V
RL = 10k
AV = +1
VOUT = 100mVP-P
1k
10k
CL = 4pF
100k
FREQUENCY (Hz)
1M
10M
FIGURE 45. GAIN vs FREQUENCY vs CL
-2
-3
-4
VOUT = 10mVP-P
-5
VOUT = 50mVP-P
-6 VS = ±5V
-7 CL = 4pF
AV = +1
-8
RL = INF
-91k
VOUT = 100mVP-P
VOUT = 200mVP-P
VOUT = 500mVP-P
VOUT = 1VP-P
10k
100k
FREQUENCY (Hz)
1M
10M
FIGURE 46. GAIN vs FREQUENCY vs OUTPUT VOLTAGE
2
140
0
120
-2
CROSSTALK (dB)
NORMALIZED GAIN (dB)
-1
-4
-6
VS = ±20V
-8
VS = ±5V
-10 C = 4pF
L
-12 RL = 10k
AV = +1
-14 VOUT = 100mVP-P
-16
1k
10k
VS = ±15V
VS = ±2.25V
100k
FREQUENCY (Hz)
1M
100
80
60
RL = 10k
40 C = 4pF
L
AV = +1
20
VOUT = 1VP-P
0
10
10M
100
VS = ±5V
VS = ±15V
1k
10k
100k
FREQUENCY (Hz)
1M
10M
FIGURE 48. CROSSTALK vs FREQUENCY, VS = ±5V, ±15V
FIGURE 47. GAIN vs FREQUENCY vs SUPPLY VOLTAGE
2.5
6
2.0
V+ = ±15V
CL = 4pF
AV = 11
Rf = 10k, Rg = 1k
VOUT = 10VP-P
2
0
1.5
LARGE SIGNAL (V)
LARGE SIGNAL (V)
4
RL = 10k
-2
RL = 2k
VS = ±5V, ±15V, RL = 10k
1.0
0.5
VS = ±5V, ±15V, RL = 2k
0
-0.5
-1.0
CL = 4pF
AV = 1
VOUT = 4VP-P
-1.5
-4
-2.0
-6
0
50
100
150
200
250
300
350
400
TIME (µs)
FIGURE 49. LARGE SIGNAL 10V STEP RESPONSE, VS = ±15V
Submit Document Feedback
18
-2.5
0
5
10
15
20
25
30
35
TIME (µs)
FIGURE 50. LARGE SIGNAL TRANSIENT RESPONSE vs RL VS = ±5V,
±15V
FN6631.8
September 29, 2015
ISL28107, ISL28207, ISL28407
VS = ±15V, VCM = 0V, RL = Open, TA = +25°C unless otherwise specified. (Continued)
0.26
0.06
0.22
0.04
0.18
VS = ±5V, ±15V, ±20V
0.00
-0.02
RL = 2k, 10k
CL = 4pF
AV = 1
VOUT = 100mVP-P
-0.04
-0.06
-0.08
0
5
10
15
20
25
TIME (µs)
35
OUTPUT
0.02
INPUT
INPUT (V)
-0.02
1
50
-1
45
-5
-0.10
-7
VS = ±15V
RL = 10k
CL = 4pF
AV = 100
Rf = 10k, Rg = 100
VIN = 200mVP-P
-0.18
-0.22
0
20
40
60
-9
-11
0
20
40
-1
80 100 120 140 160 180 200
TIME (µs)
60
VS = ±15V
RL = 10k
AV = 1
VOUT = 100mVP-P
20
The ISL28107, ISL28207 and ISL28407 are single, dual and
quad, very low 1/f noise (14nV/Hz @ 10Hz) precision op-amps.
These amplifiers feature very high open loop gain (50kV/mV) for
excellent CMRR (145dB) and gain accuracy. Both devices are
fabricated in a new precision 40V complementary bipolar DI
process.
The super-beta NPN input stage with bias current cancellation
provides bipolar-like levels of AC performance, with the low input
bias currents approaching JFET levels. The temperature
stabilization provided by bias current cancellation removes the
high input bias current temperature coefficient commonly found
in JFET amplifiers. Figures 9 and 10 show the input bias current
variation over temperature.
The input offset voltage (VOS) has a very low, worst case value of
75µV max at +25°C and a maximum TC of 0.65µV/°C. Figure 38
shows VOS as a function of supply voltage and temperature with
the common mode voltage at 0V for split supply operation.
OT
HO
+
OT
-
15
10
0
Functional Description
S
ER
OV
25
5
Applications Information
O
HO
RS
VE
30
-15
80 100 120 140 160 180 200
TIME (µs)
19
1
OUTPUT
35
-13
FIGURE 53. NEGATIVE OUTPUT OVERLOAD RESPONSE TIME, VS =
±15V
Submit Document Feedback
3
INPUT
40
-3
-0.06
-0.14
5
FIGURE 52. POSITIVE OUTPUT OVERLOAD RESPONSE TIME,
VS = ±15V
OUTPUT (V)
0.06
9
0.06
-0.06
40
11
7
-0.02
30
13
0.10
0.02
FIGURE 51. SMALL SIGNAL TRANSIENT RESPONSE VS = ±5V,
±15V, ±20V
-0.26
0.14
INPUT (V)
0.02
15
VS = ±15V
RL = 10k
CL = 4pF
AV = 100
Rf = 10k, Rg = 100
VIN = 200mVP-P
OUTPUT (V)
0.08
OVERSHOOT (%)
SMALL SIGNAL (V)
Typical Performance Curves
1
10
100
1,000
CAPACITANCE (pF)
10,000
FIGURE 54. % OVERSHOOT vs LOAD CAPACITANCE, VS = ±15V
The complementary bipolar output stage maintains stability
driving large capacitive loads (to 10nF) without external
compensation. The small signal overshoot vs. load capacitance is
shown in Figure 54.
Operating Voltage Range
The devices are designed to operate over the 4.5V (±2.25V) to
40V (±20V) range and are fully characterized at 10V (±5V) and
30V (±15V). Both DC and AC performance remain virtually
unchanged over the complete 4.5V to 40V operating voltage
range. Parameter variation with operating voltage is shown in the
“Typical Performance Curves” beginning on page 11. The input
common mode voltage range sensitivity to temperature is shown
in Figure 38 (±15V).
Input ESD Diode Protection
The input terminals (IN+ and IN-) each have internal ESD
protection diodes to the positive and negative supply rails, a series
connected 500 current limiting resistor followed by an
anti-parallel diode pair across the input NPN transistors (Circuit 1
in “Pin Descriptions” on page 4).
FN6631.8
September 29, 2015
ISL28107, ISL28207, ISL28407
The resistor-ESD diode configuration enables a wide differential
input voltage range equal to the lesser of the Maximum Supply
Voltage in the “Absolute Maximum Ratings” on page 6 (42V), or a
maximum of 0.5V beyond the V+ and V- supply voltage. The
internal protection resistors eliminate the need for external input
current limiting resistors in unity gain connections and other
circuit applications where large voltages or high slew rate signals
are present. Although the amplifier is fully protected, high input
slew rates that exceed the amplifier slew rate (±0.32V/µs) may
cause output distortion.
Output Current Limiting
The output current is internally limited to approximately ±40mA
at +25°C and can withstand a short circuit to either rail as long
as the power dissipation limits are not exceeded. This applies to
only one amplifier at a time for the dual op-amp. Continuous
operation under these conditions may degrade long-term
reliability.
Output Phase Reversal
Output phase reversal is a change of polarity in the amplifier
transfer function when the input voltage exceeds the supply
voltage. The ISL28107, ISL28207 and ISL28407 are immune to
output phase reversal, even when the input voltage is 1V beyond
the supplies.
Unused Channels
If the application only requires one channel, the user must
configure the unused channels to prevent them from oscillating.
The unused channels can oscillate if the input and output pins
are floating. This results in higher than expected supply currents
and possible noise injection into the channel being used. The
proper way to prevent this oscillation is to short the output to the
inverting input and ground the positive input, as shown in
Figure 55.
+
FIGURE 55. PREVENTING OSCILLATIONS IN UNUSED CHANNELS
Power Dissipation
It is possible to exceed the +150°C maximum junction
temperatures under certain load and power supply conditions. It
is therefore important to calculate the maximum junction
temperature (TJMAX) for all applications to determine if power
supply voltages, load conditions, or package type need to be
modified to remain in the safe operating area. These parameters
are related using Equation 1:
T JMAX = T MAX +  JA xPD MAXTOTAL
(EQ. 1)
Where:
• PDMAXTOTAL is the sum of the maximum power dissipation of
each amplifier in the package (PDMAX)
Submit Document Feedback
20
PDMAX for each amplifier can be calculated using Equation 2:
V OUTMAX
PD MAX = V S  I qMAX +  V S - V OUTMAX   ---------------------------R
(EQ. 2)
L
where:
• TMAX = Maximum ambient temperature
• JA = Thermal resistance of the package
• PDMAX = Maximum power dissipation of one amplifier
• VS = Total supply voltage
• IqMAX = Maximum quiescent supply current of one amplifier
• VOUTMAX = Maximum output voltage swing of the application
• RL = Load resistance
ISL28107, ISL28207, ISL28407 SPICE Model
Figure 56 shows the SPICE model schematic, and Figure 57 shows
the net list for the ISL28107, ISL28207 and ISL28407 SPICE
model. The model is a simplified version of the actual device and
simulates important AC and DC parameters. AC parameters
incorporated into the model are: 1/f and flatband noise, Slew
Rate, CMRR, Gain and Phase. The DC parameters are VOS, IOS,
total supply current and output voltage swing. The model uses
typical parameters given in the “Electrical Specifications” table
beginning on page 6. AVOL is adjusted for 155dB with the
dominant pole at 0.01Hz. CMRR is set (145dB, fcm = 100Hz). The
input stage models the actual device to present an accurate AC
representation. The model is configured for ambient temperature
of +25°C.
Figures 58 through 68 show the characterization vs simulation
results for the Noise Voltage, Closed Loop Gain vs Frequency,
Closed Loop Gain vs RL, Large Signal Step Response, Open Loop
Gain Phase and Simulated CMRR vs Frequency.
License Statement
The information in this SPICE model is protected under the
United States copyright laws. Intersil Corporation hereby grants
users of this macro-model hereto referred to as “Licensee”, a
nonexclusive, nontransferable licence to use this model as long
as the Licensee abides by the terms of this agreement. Before
using this macro-model, the Licensee should read this license. If
the Licensee does not accept these terms, permission to use the
model is not granted.
The Licensee may not sell, loan, rent, or license the macro-model,
in whole, in part, or in modified form, to anyone outside the
Licensee’s company. The Licensee may modify the macro-model
to suit his/her specific applications, and the Licensee may make
copies of this macro-model for use within their company only.
This macro-model is provided “AS IS, WHERE IS, AND WITH NO
WARRANTY OF ANY KIND EITHER EXPRESSED OR IMPLIED,
INCLUDING BUY NOT LIMITED TO ANY IMPLIED WARRANTIES OF
MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.”
In no event will Intersil be liable for special, collateral, incidental, or
consequential damages in connection with or arising out of the
use of this macro-model. Intersil reserves the right to make
changes to the product and the macro-model without prior notice.
FN6631.8
September 29, 2015
ISL28107, ISL28207, ISL28407
V++
V++
R3
R4
4.45k
4.45k
CASCODE
4
5
Q4
C4
2pF
Vin-
VIN-
-
+
D1
3
SUPERB
DX
EOS
1
IOS
Mirror
VCM
-
+
5E11
+
-
En
Vmid
-
9
IEE
200E-6
R2
Vc
+
+
-
Q3
15pA
600
C5
2pF
8
7
5E11
C6
1.2pF
R17
In+
VIN+
5
6
R1
0.1V
25
4
Q1 Q2
24
DN
CASCODE
Q5
2
SUPERB
V5
D12
IEE1
96E-6
+
VOS
-
5E-6
V-VCM
Voltage Noise
Input Stage
V++
V++
4
10
+
-
5
G3
13
+
R5
1
-
D4
DX
+
V3
- 1.86V
11
G5
R7
2.55E10
Vg
+
V2
1.86V
+
-
12
14
D3
DX
+
V--
R8
G4
1ST Gain Stage
-
Vc
2.55E10
V4
1.86V
R10
1
C3
6.25pF
1.59E-3
R11
1
Vg
R12
1
G6
18
-
+
VCM
R6
1
G2
17
-
Vmid
Vc
Vmid
+
R9
1
C2
6.25pF
L1
VCM
D5
DX
L2
+
D2
DX
+
V1
- 1.86V
G1
1.59E-3
V--
2nd Gain Stage
Mid Supply Ref
Common Mode Gain Stage
V++
D8
DX
+
-
-
E2
Vg
D6
DX
23
20
V5
+
1.12V
V-
V6
21
+
DX
-
D7
R15
90
-
22
ISY
0.21mA
G7
+
+
D9
DX
-
V+
1.12V
G8
-
E3
+
V-
V--
D10
DY
+
+
-
G9
D11
DY
R16
90
-
+
VOUT
VOUT
+
V+
G10
Output Stage
Supply Isolation Stage
FIGURE 56. SPICE SCHEMATIC
Submit Document Feedback
21
FN6631.8
September 29, 2015
ISL28107, ISL28207, ISL28407
*ISL28107 Macromodel - covers following
*products
*ISL28107
*ISL28207
*ISL28407
**Revision History:
*Revision B, LaFontaine January 31, 2012
*Model for Noise, quiescent supply currents,
*CMRR 145dB, fcm=100Hz, AVOL 155dB
*f=0.01Hz, SR = 0.3V/us, output voltage
*clamp and short ckt current limit.
*
*Copyright 2012 by Intersil Corporation
Refer *to data sheet "LICENSE
STATEMENT", Use *of this model indicates
your acceptance with *the terms and
provisions in the License *Statement.
*Intended use:
*This Pspice Macromodel is intended to give
*typical DC and AC performance
*characteristics under a wide range of
*external circuit configurations using
*compatible simulation platforms - such as
*iSim PE.
**
*Device performance features supported by
*this model
*Typical, room temp., nominal power supply
*voltages used to produce the following
*characteristics:
*Open and closed loop I/O impedances
*Open loop gain and phase
*Closed loop bandwidth and frequency
*response
*Loading effects on closed loop frequency
*response
*Input noise terms including 1/f effects
*Slew rate
*Input and Output Headroom limits to I/O
*voltage swing
*Supply current at nominal specified supply
*voltages
**
*Device performance features NOT
*supported by this model:
*Harmonic distortion effects
*Disable operation (if any)
*Thermal effects and/or over temperature
*parameter variation
*Limited performance variation vs. supply
*voltage is modeled
*Part to part performance variation due to
*normal process parameter spread
*Any performance difference arising from
*different packaging
* source
:
*
+input
*
| -input
*
|
| +Vsupply
*
|
| | -Vsupply
*
|
| | | output
*
|
| | |
|
.subckt ISL28107 Vin+ Vin- V+ V- VOUT
* source ISL28127_SPICEMODEL_0_0
*
*Voltage Noise
E_En
IN+ VIN+ 25 0 1
R_R17
25 0 600
D_D12
24 25 DN
V_V7
24 0 0.1
*
*Input Stage
I_IOS
IN+ VIN- DC 15e-12
C_C6
IN+ VIN- 1.2E-12
R_R1
VCM VIN- 5e11
R_R2
IN+ VCM 5e11
Q_Q1
2 VIN- 1 SuperB
Q_Q2
3 8 1 SuperB
Q_Q3
V-- 1 7 Mirror
Q_Q4
4 6 2 Cascode
Q_Q5
5 6 3 Cascode
R_R3
4 V++ 4.45e3
R_R4
5 V++ 4.45e3
C_C4 VIN- 0 2e-12
C_C5 8 0 2e-12
D_D1
6 7 DX
I_IEE
1 V-- DC 200e-6
I_IEE1
V++ 6 DC 96e-6
V_VOS
9 IN+ 5e-6
E_EOS
8 9 VC VMID 1
*
*1st Gain Stage
G_G1
V++ 11 4 5 101.6828e-3
G_G2
V-- 11 4 5 101.6828e-3
R_R5
11 V++ 1
R_R6
V-- 11 1
D_D2
10 V++ DX
D_D3
V-- 12 DX
V_V1
10 11 1.86
V_V2
11 12 1.86
*
*2nd Gain Stage
G_G3
V++ VG 11 VMID 2.21e-3
G_G4
V-- VG 11 VMID 2.21e-3
R_R7
VG V++ 2.55e10
R_R8
V-- VG 2.55e10
C_C2
VG V++ 6.25e-10
C_C3
V-- VG 6.25e-10
D_D4
13 V++ DX
D_D5
V-- 14 DX
V_V3
13 VG 1.86
V_V4
VG 14 1.86
*
*Mid supply Ref
R_R9
VMID V++ 1
R_R10
V-- VMID 1
I_ISY V+ V- DC 0.21E-3
E_E2
V++ 0 V+ 0 1
E_E3
V-- 0 V- 0 1
*
*Common Mode Gain Stage with Zero
G_G5
V++ VC VCM VMID 5.62e-8
G_G6
V-- VC VCM VMID 5.62e-8
R_R11
VC 17 1
R_R12
18 VC 1
L_L1
17 V++ 1.59e-3
L_L2
18 V-- 1.59e-3
*
*Output Stage with Correction Current
Sources
G_G7
VOUT V++ V++ VG 1.11e-2
G_G8
V-- VOUT VG V-- 1.11e-2
G_G9
22 V-- VOUT VG 1.11e-2
G_G10
23 V-- VG VOUT 1.11e-2
D_D6
VG 20 DX
D_D7
21 VG DX
D_D8
V++ 22 DX
D_D9
V++ 23 DX
D_D10
V-- 22 DY
D_D11
V-- 23 DY
V_V5
20 VOUT 1.12
V_V6
VOUT 21 1.12
R_R15
VOUT V++ 9E1
R_R16
V-- VOUT 9E1
*
.model SuperB npn
+ is=184E-15 bf=30e3 va=15 ik=70E-3
rb=50
+ re=0.065 rc=35 cje=1.5E-12 cjc=2E-12
+ kf=0 af=0
.model Cascode npn
+ is=502E-18 bf=150 va=300 ik=17E-3
+rb=140 re=0.011 rc=900 cje=0.2E-12
+cjc=0.16E-12f kf=0 af=0
.model Mirror pnp
+ is=4E-15 bf=150 va=50 ik=138E-3 rb=185
+ re=0.101 rc=180 cje=1.34E-12 cjc=0.44E+12 kf=0 af=0
.model DN D(KF=6.69e-9 AF=1)
.MODEL DX D(IS=1E-12 Rs=0.1)
.MODEL DY D(IS=1E-15 BV=50 Rs=1)
.ends ISL28107
FIGURE 57. SPICE NET LIST
Submit Document Feedback
22
FN6631.8
September 29, 2015
ISL28107, ISL28207, ISL28407
Characterization vs Simulation Results
1000
INPUT NOISE VOLTAGE (nV/Hz)
INPUT NOISE VOLTAGE (nV/Hz)
1000
V+ = ±19V
AV = 1
100
10
0.1
1
10
100
1k
10k
100
10
100m
100k
1.0
10
100
1k
FREQUENCY (Hz)
FREQUENCY (Hz)
FIGURE 58. CHARACTERIZED INPUT NOISE VOLTAGE
50
GAIN (dB)
40
Rg = 1k, Rf = 100k
AV = 100
30
V+ = ±20V
CL = 4pF
RL = 10k
VOUT = 100mVP-P
AV = 10
20
Rg = 10k, Rf = 100k
10
Rg = OPEN, Rf = 0
-20
10
100
-20
1M
10M
Rg = 10k, Rf = 100k
AV = 1
10
0
NORMALIZED GAIN (dB)
1
0
-1
RL = 100k
RL = 10k
-4
RL = 1k
-5
-6
-7
-8
-9
V+ = ±20V
CL = 4pF
AV = +1
VOUT = 100mVP-P
1k
10k
RL = 499
1M
10M
FIGURE 62. CHARACTERIZED CLOSED LOOP GAIN vs RL
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10k
100k
1M
10M
RL = 100k
RL = 1k
-2
RL = 10k
-4
RL = 499
V+ = ±15V
-6
-8
100k
FREQUENCY (Hz)
1k
FIGURE 61. SIMULATED CLOSED LOOP GAIN vs FREQUENCY
1
-3
100
FREQUENCY (Hz)
FIGURE 60. CHARACTERIZED CLOSED LOOP GAIN vs FREQUENCY
NORMALIZED GAIN (dB)
AV = 10
20
Rg = OPEN, Rf = 0
1k
10k
100k
FREQUENCY (Hz)
-2
Rg = 1k, Rf = 100k
40
0
-10
Rg = 100, Rf = 100k
AV = 100
AV = 1
0
AV = 1000
60
GAIN (dB)
60
Rg = 100, Rf = 100k
AV = 1000
100k
FIGURE 59. SIMULATED INPUT NOISE VOLTAGE
70
70
10k
-9
1k
CL = 4pF
AV = +1
VOUT = 100mVP-P
10k
100k
FREQUENCY (Hz)
1M
10M
FIGURE 63. SIMULATED CLOSED LOOP GAIN vs RL
FN6631.8
September 29, 2015
ISL28107, ISL28207, ISL28407
Characterization vs Simulation Results (Continued)
6
20
LARGE SIGNAL (V)
2
0
LARGE SIGNAL (V)
V+ = ±15V
CL = 4pF
AV = 11
Rf = 10k, Rg = 1k
VOUT = 10VP-P
4
RL = 10k
-2
RL = 2k
10
OUTPUT
0
INPUT
-10
-4
-6
0
50
100
150
200
250
TIME (µs)
300
350
-20
0
400
100
150
TIME (µs)
200
250
300
FIGURE 65. SIMULATED LARGE SIGNAL 10V STEP RESPONSE
200
200
180
160
140
PHASE
120
100
80
60
40
20
GAIN
0
-20 R = 10k
L
-40
CL = 10pF
-60
SIMULATION
-80
-100
0.1m 1m 10m 100m 1 10 100 1k 10k 100k 1M 10M 100M
FREQUENCY (Hz)
OPEN LOOP GAIN (dB)/PHASE (°)
OPEN LOOP GAIN (dB)/PHASE (°)
FIGURE 64. CHARACTERIZED LARGE SIGNAL 10V STEP
RESPONSE
50
150
PHASE
100
50
0
RL = 10k
CL = 10pF
SIMULATION
-50
1m 10m
FIGURE 66. SIMULATED OPEN-LOOP GAIN, PHASE vs FREQUENCY
1
GAIN
100
10k
FREQUENCY (Hz)
1M
100M
FIGURE 67. SIMULATED OPEN-LOOP GAIN, PHASE vs FREQUENCY
CMRR (dB)
150
100
50
SIMULATION
0
1m
100m
10
1k
100k
FREQUENCY (Hz)
10M
100M
FIGURE 68. SIMULATED CMRR vs FREQUENCY
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FN6631.8
September 29, 2015
ISL28107, ISL28207, ISL28407
Revision History
The revision history provided is for informational purposes only and is believed to be accurate, but not warranted. Please go to the web to make sure that
you have the latest revision.
DATE
September 29, 2015
REVISION
CHANGE
FN6631.8 - Updated Ordering Information Table on page 5.
- Updated About Intersil Verbiage.
-Updated POD L8.3X3K to most current revision with changes as follows:
-Revision 1 to Revision 2 Changes:
Tiebar Note 5 updated
From: Tiebar shown (if present) is a non-functional feature.
To: Tiebar shown (if present) is a non-functional feature and may be located on any of the 4 sides (or ends).
February 11, 2013
FN6631.7 Removed following parts from datasheet and updated accordingly throughout:
ISL28407FRZ, 16 Ld QFN
ISL28407FVZ, 14 Ld TSSOP
ISL28407SOICEVAL1Z
Parts were never released and were marked as Coming Soon
Updated Package Outline Drawing M8.118B on page 29. Correct lead dimension in side view 2 from 0.15 - 0.05mm
to 0.15±0.05mm.
February 21, 2012
FN6631.6 Added dual and quad to the “SPICE NET LIST” on page 22.
Updated “Package Outline Drawing” on page 30. Added Thin to Package Title.
October 14, 2011
FN6631.5 Page 7: for ±15V and page 8 ±5V Elect Spec tables:
1. Ib for ISL28407 with Ta = -40C to 85C, change from +/-300pA to +/-330pA.
2. Ios for ISL28407 with Ta = -40C to 85C, change from +/-300pA to +/-330pA
3. TCIb/TCIos for 28407 with Ta = -40C to 70C, change the typical from 0.03 pA/C to 0.3 pA/C.
4. Spec limits for TCIb and TCIos for 0C to 70C: please change it from +/-1.4pA/C to +/-1.5pA/C and change test
condition from "-40C to 70C" to "0C to 70C".
For ISL28407 specs, change all "-40C to 70C" to "0C to 70C"
5. Spec limits for TCIb and TCIos for -40C to 85C: please change it from +/-1.8pA/C to +/-2.0pA/C
6. Voh @ Rl = 10kohm and 2kohm, please add "-40C to 70C under "test condition" and bold min. spec "13.2V and
13.1V"
7. Vol @ Rl = 10kohm and 2kohm, please add "-40C to 70C under "test condition" to max. spec. "-13.2V and -13.1V"
ESD Levels for ISL28407FBZ SOIC package
HBM: 6kV, MM: 450V, CDM: 2kV
• Pg 1 Description:
- Last paragraph - changed "ISL28407 will be available" to "ISL28407 is available"
• Pg 4 Ordering Information
- Removed Coming Soon from ISL28407FBZ
• Pg 6 Thermal Information:
- 8 Ld TDFN (ISL28107) ThetaJA changed from 48 to 44
- 8 Ld TDFN (ISL28107) ThetaJC changed from 7 to 3
•
•
•
•
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25
±15V Electrical Specifications table
- Added ISL28407 VOS spec limits
- Added ISL28407 TCVOS spec limits
Pg 7 ±15V Electrical Specifications table
- Added ISL28407 IB spec limits
- Added ISL28407 TCIB spec limits
- Added ISL28407 IOS spec limits
- Added ISL28407 TCIOS spec limits
- Converted AOL specs and limits from 3,000 V/mV and 40,000V/mV to 130dB and 152dB respectively
Pg 8 ±5V Electrical Specifications table
- Added ISL28407 VOS spec limits
Pg 9 ±5V Electrical Specifications table
- Added ISL28407 TCVOS spec limits
- Added ISL28407 IB spec limits
- Added ISL28407 TCIB spec limits
- Added ISL28407 IOS spec limits
- Added ISL28407 TCIOS spec limits
- Converted AOL specs and limits from 3,000 V/mV and 40,000V/mV to 130 dB and 152 dB respectively
Pg 19 - Applications section "Using one Channel"
- Changed title to "unused channels" and added text edits for clarity.
FN6631.8
September 29, 2015
ISL28107, ISL28207, ISL28407
Revision History
The revision history provided is for informational purposes only and is believed to be accurate, but not warranted. Please go to the web to make sure that
you have the latest revision. (Continued)
DATE
August 26, 2011
REVISION
CHANGE
FN6631.4 • On page 3, Pin Configurations, added ISL28207 MSOP pin diagram.
• On page 4, Pin Descriptions, added ISL28207 MSOP to pin descriptions.
• On page 5, Ordering Information, added ISL28207FUZ part and information. Updated ISL28107FBZ Pkg Dwg #
from M8.118 to M8.118B. For ISL28107FRTZ and ISL28207FRTZ, updated Pkg Dwg # from L8.3x3A to
L8.3x3K. For "Coming Soon" parts: ISL28407FBZ: changed Pkg Dwg # from M14.15 to MDP0027;
ISL28407FVZ: changed Pkg Dwg # from M14.173 to MDP0044; ISL28407FRZ: changed Pkg Dwg # from
16.4x4 to L16.4x4E. ISL28207FRTZ: changed Part Marking from 207Z to 8207. For "Coming Soon" parts:
ISL28407FBZ: changed Part Marking from 28407 to 28407 FBZ. ISL28407FVZ: changed Part Marking from
28407 to 28407 FVZ. ISL28407FRZ: changed Part Marking from 28407 to 407FRZ. Added "Coming Soon"
ISL28407SOICEVAL1Z Evaluation Board.
• On page 6, Thermal Information, added ISL28207 8Ld MSOP, and ISL28407 14 Ld SOIC and 16 Ld QFN thermal
information.
• On page 6 and page 8, Electrical Specifications: for VOS spec for ISL28207 MSOP package, added -110µV MIN,
+110 µV MAX, and -200µV MIN, +200µV MAX. For TCVOS spec for ISL28207 MSOP package, added -0.9µV/°C
MIN, +0.9µV/°C MAX.
• On page 8 and page 8, Electrical Specifications: for TCIB spec for ISL28207 MSOP package, added -1.5pA/°C
MIN, +1.5pA/°C MAX. For TCIOS spec for ISL28207 MSOP package, added -1.5pA/°C MIN, +1.5pA/°C MAX.
• Updated to current Intersil datasheet template.
September 7, 2010
March 9, 2010
FN6631.3 1. General changes:
a. Added in ISL28407 Quad devices for SOIC, TSSOP and QFN packages.
b. Added in TDFN packages for single ISL28107 and dual ISL28207 devices.
c. Added in new VOS and TCVOS limits for TDFN packages
2. Specific changes:
a. On page 1 – Added in ISL28407 to title and front page info. Corrected Input Bias Current in Features from 60pA
to 15pA (in order to match Spec Table)
b. On page 3 - Added in ISL28107FRTZ, ISL28207FRTZ, ISL28407FBZ, ISL28407FVZ, and ISL28407FRZ packages
to Ordering information. Added in –T7, T-13 & -T7A tape and reel extensions where applicable.
c. On page 3 -Corrected part marking for ISL28207FRTZ parts from 207Z to 8207
d. On page 3 – Added in TDFN, 14 Ld SOIC, 14 Ld TSSOP and 16 Ld QFN to pin configurations.
e. On page 4 – Updated “Pin Descriptions” with newly added packages.
f. On page 6 – in “Thermal Information”, added in thermal packaging info & applicable notes for TDFN packages.
g. On page 6 and page 7 Electrical Specifications Tables – Added two new line items for VOS spec. TDFN package
ISL28107 limits ±100uV 25C and ±190uV full temp. TDFN package ISL28207 limits ±100uV 25C and ±175uV full
temp.
h. On page 6 and page 7 Electrical Specifications Table – Added two new line items for TCVOS spec. TDFN package
ISL28107 limits ±0.9uV/C full temp. TDFN package ISL28207 limits ±0.75uV/C.
i. On page 30 to page 34 - Added in POD for L8.3x3A, M14.15, M14.173, and L16.4x4
FN6631.2 1. Added MSOP package to the ordering information and added applicable POD M8.118 to end of datasheet
2. Separated each part number with it's own specific -T7 and -T13 suffix. Removed “Add
“-T7” or “-T13” suffix for Tape and Reel.” from Note 1.
3. Added MSOP to the Pin Configuration and Pin Descriptions
4. Updated ±15 and ±5V Electrical Specification table with the following edits:
A) Separated VOS specs for SOIC and MSOP packages. Added new VOS specs for MSOP Grade package.
B) Separated TCVOS specs for SOIC and MSOP packages. Added new TCVOS specs for MSOP package.
5. Added Theta JA and JC for the 8 Ld MSOP package. Added Theta JC values for both SOIC package options.
Changed Theta JA for 8 Ld SOIC (ISL28207) from 115 to 105.
February 22, 2010
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1. Added “Related Literature*(see page 26)” on page 1.
2. Added Evaluation Boards to “Ordering Information” on page 3.
3. “Electrical Specifications” Tables, page 6 to page 10. Unbolded MIN/MAX specs with “TA = -40°C to +85°C”
conditions (since only MIN/MAX specs with “TA = -40°C to +125°C” conditions should be bolded, per note in
common conditions)
4. Corrected Note reference in ISC parameter on page 7 and page 10 from Note 3 to Note 9.
26
FN6631.8
September 29, 2015
ISL28107, ISL28207, ISL28407
Revision History
The revision history provided is for informational purposes only and is believed to be accurate, but not warranted. Please go to the web to make sure that
you have the latest revision. (Continued)
DATE
November 10, 2009
June 5, 2009
REVISION
CHANGE
FN6631.1 1. Updated VOS, IB, and IOS electrical specifications.
2. Added Typical performance curves, Figures 3 through 32.
3. Output Short Circuit Current test condition has been clarified with Note 9.
4. Updated POD.
5. Added Spice Model, associated text and Figures 58 through 68.
6. Deleted old Figures 6, 7, 8, 10, 11 and 12.
7. Added Licence Statement on page 16 and referenced in spice model.
FN6631.0 Initial Release
About Intersil
Intersil Corporation is a leading provider of innovative power management and precision analog solutions. The company's products
address some of the largest markets within the industrial and infrastructure, mobile computing and high-end consumer markets.
For the most updated datasheet, application notes, related documentation and related parts, please see the respective product
information page found at www.intersil.com.
You may report errors or suggestions for improving this datasheet by visiting www.intersil.com/ask.
Reliability reports are also available from our website at www.intersil.com/support.
For additional products, see www.intersil.com/en/products.html
Intersil products are manufactured, assembled and tested utilizing ISO9001 quality systems as noted
in the quality certifications found at www.intersil.com/en/support/qualandreliability.html
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time
without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be
accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third
parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
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FN6631.8
September 29, 2015
ISL28107, ISL28207, ISL28407
Package Outline Drawing
M8.15E
8 LEAD NARROW BODY SMALL OUTLINE PLASTIC PACKAGE
Rev 0, 08/09
4
4.90 ± 0.10
A
DETAIL "A"
0.22 ± 0.03
B
6.0 ± 0.20
3.90 ± 0.10
4
PIN NO.1
ID MARK
5
(0.35) x 45°
4° ± 4°
0.43 ± 0.076
1.27
0.25 M C A B
SIDE VIEW “B”
TOP VIEW
1.75 MAX
1.45 ± 0.1
0.25
GAUGE PLANE
C
SEATING PLANE
0.10 C
0.175 ± 0.075
SIDE VIEW “A
0.63 ±0.23
DETAIL "A"
(0.60)
(1.27)
NOTES:
(1.50)
(5.40)
1.
Dimensions are in millimeters.
Dimensions in ( ) for Reference Only.
2.
Dimensioning and tolerancing conform to AMSE Y14.5m-1994.
3.
Unless otherwise specified, tolerance : Decimal ± 0.05
4.
Dimension does not include interlead flash or protrusions.
Interlead flash or protrusions shall not exceed 0.25mm per side.
5.
The pin #1 identifier may be either a mold or mark feature.
6.
Reference to JEDEC MS-012.
TYPICAL RECOMMENDED LAND PATTERN
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FN6631.8
September 29, 2015
ISL28107, ISL28207, ISL28407
Package Outline Drawing
M8.118B
8 LEAD MINI SMALL OUTLINE PLASTIC PACKAGE
Rev 1, 3/12
3.0±0.10mm
5
A
D
8
4.9±0.20mm
DETAIL "X"
3.0±0.10mm
5
1.10 MAX
0.15±0.05mm
PIN# 1 ID
SIDE VIEW 2
1
2
B
0.65mm BSC
TOP VIEW
0.95 REF
0.86±0.05mm
H
GAUGE
PLANE
C
0.25
SEATING PLANE
0.23 - 0.36mm
0.08 M C A-B D
0.10 ± 0.05mm
3°±3°
0.10 C
0.53 ± 0.10mm
SIDE VIEW 1
DETAIL "X"
(5.80)
NOTES:
(4.40)
(3.00)
1. Dimensions are in millimeters.
(0.65)
(0.40)
(1.40)
TYPICAL RECOMMENDED LAND PATTERN
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29
2. Dimensioning and tolerancing conform to JEDEC MO-187-AA
and AMSEY14.5m-1994.
3. Plastic or metal protrusions of 0.15mm max per side are not
included.
4. Plastic interlead protrusions of 0.15mm max per side are not
included.
5. Dimensions are measured at Datum Plane "H".
6. Dimensions in ( ) are for reference only.
FN6631.8
September 29, 2015
ISL28107, ISL28207, ISL28407
Package Outline Drawing
L8.3x3K
8 LEAD THIN DUAL FLAT NO-LEAD PLASTIC PACKAGE
Rev 2, 5/15
2X 1.95
3.00
6X 0.65
A
B
1
PIN #1
INDEX AREA
3.00
6
6
PIN 1
INDEX AREA
(4X)
1.50 ±0.10
0.15
8
TOP VIEW
8X 0.25 ±0.05
0.40 ± 0.05
4
0.10 M C A B
2.30 ±0.10
BOTTOM VIEW
SEE DETAIL "X"
C
0.10 C
0.75 ±0.05
0 . 203 REF
5
C
0 . 02 NOM.
0 . 05 MAX.
0.08 C
SIDE VIEW
DETAIL "X"
( 2.30)
( 1.95)
NOTES:
( 8X 0.50)
1.
Dimensions are in millimeters.
Dimensions in ( ) for Reference Only.
2.
Dimensioning and tolerancing conform to ASME Y14.5m-1994.
3.
Unless otherwise specified, tolerance : Decimal ± 0.05
4.
Dimension applies to the metallized terminal and is measured
(1.50)
( 2.90 )
between 0.15mm and 0.20mm from the terminal tip.
PIN 1
5.
Tiebar shown (if present) is a non-functional feature and may be
located on any of the 4 sides (or ends).
6.
The configuration of the pin #1 identifier is optional, but must be
located within the zone indicated. The pin #1 identifier may be
(6x 0.65)
( 8 X 0.25)
either a mold or mark feature.
TYPICAL RECOMMENDED LAND PATTERN
7.
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30
Compliant to JEDEC MO-229 WEEC-2 except for the foot length.
FN6631.8
September 29, 2015
ISL28107, ISL28207, ISL28407
Small Outline Package Family (SO)
A
D
h X 45°
(N/2)+1
N
A
PIN #1
I.D. MARK
E1
E
c
SEE DETAIL “X”
1
(N/2)
B
L1
0.010 M C A B
e
H
C
A2
GAUGE
PLANE
SEATING
PLANE
A1
0.004 C
0.010 M C A B
L
b
0.010
4° ±4°
DETAIL X
MDP0027
SMALL OUTLINE PACKAGE FAMILY (SO)
INCHES
SYMBOL
A
SO-8
0.068
SO-14
SO16
(0.150”)
0.068
0.068
SO16 (0.300”)
(SOL-16)
SO20
(SOL-20)
SO24
(SOL-24)
SO28
(SOL-28)
TOLERANCE
NOTES
0.104
0.104
0.104
0.104
MAX
-
A1
0.006
0.006
0.006
0.007
0.007
0.007
0.007
0.003
-
A2
0.057
0.057
0.057
0.092
0.092
0.092
0.092
0.002
-
b
0.017
0.017
0.017
0.017
0.017
0.017
0.017
0.003
-
c
0.009
0.009
0.009
0.011
0.011
0.011
0.011
0.001
-
D
0.193
0.341
0.390
0.406
0.504
0.606
0.704
0.004
1, 3
E
0.236
0.236
0.236
0.406
0.406
0.406
0.406
0.008
-
E1
0.154
0.154
0.154
0.295
0.295
0.295
0.295
0.004
2, 3
e
0.050
0.050
0.050
0.050
0.050
0.050
0.050
Basic
-
L
0.025
0.025
0.025
0.030
0.030
0.030
0.030
0.009
-
L1
0.041
0.041
0.041
0.056
0.056
0.056
0.056
Basic
-
h
0.013
0.013
0.013
0.020
0.020
0.020
0.020
Reference
-
16
20
24
28
Reference
N
8
14
16
Rev. M 2/07
NOTES:
1. Plastic or metal protrusions of 0.006” maximum per side are not included.
2. Plastic interlead protrusions of 0.010” maximum per side are not included.
3. Dimensions “D” and “E1” are measured at Datum Plane “H”.
4. Dimensioning and tolerancing per ASME Y14.5M-1994
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31
FN6631.8
September 29, 2015
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